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([203.56.128.103]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2cacd419af7sm5463589a91.25.2024.07.14.22.58.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Jul 2024 22:58:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: danikhan632@git.sr.ht, qemu-arm@nongnu.org, Daniyal Khan , qemu-stable@nongnu.org Subject: [PATCH 1/3] target/arm: Use float_status copy in sme_fmopa_s Date: Mon, 15 Jul 2024 15:58:18 +1000 Message-ID: <20240715055820.319035-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240715055820.319035-1-richard.henderson@linaro.org> References: <20240715055820.319035-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Daniyal Khan We made a copy above because the fp exception flags are not propagated back to the FPST register, but then failed to use the copy. Cc: qemu-stable@nongnu.org Fixes: 558e956c719 ("target/arm: Implement FMOPA, FMOPS (non-widening)") Signed-off-by: Daniyal Khan [rth: Split from a larger patch] Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- target/arm/tcg/sme_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c index e2e0575039..5a6dd76489 100644 --- a/target/arm/tcg/sme_helper.c +++ b/target/arm/tcg/sme_helper.c @@ -916,7 +916,7 @@ void HELPER(sme_fmopa_s)(void *vza, void *vzn, void *vzm, void *vpn, if (pb & 1) { uint32_t *a = vza_row + H1_4(col); uint32_t *m = vzm + H1_4(col); - *a = float32_muladd(n, *m, *a, 0, vst); + *a = float32_muladd(n, *m, *a, 0, &fpst); } col += 4; pb >>= 4; From patchwork Mon Jul 15 05:58:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 812597 Delivered-To: patch@linaro.org Received: by 2002:adf:fac3:0:b0:367:895a:4699 with SMTP id a3csp1658883wrs; Sun, 14 Jul 2024 22:59:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUCkFk31qqqONu/9fG2eBZheenGB/ozoNCPL0Rh/N763dknPvAcXFP8wWoH2uURLJD+Aia4kdoSH39nqgJwK2jC X-Google-Smtp-Source: AGHT+IFG8MEYwirpud9Xhv5jGzZfpUN+tWJxndtTmAFJoUovaZA8JXixbb3cwEJFhppxX1H3FwJo X-Received: by 2002:a05:6214:416:b0:6b0:68cd:6fc3 with SMTP id 6a1803df08f44-6b61bca3818mr231535056d6.20.1721023149161; Sun, 14 Jul 2024 22:59:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721023149; cv=none; d=google.com; s=arc-20160816; b=o/58fbstWRvsnbJK31KFsY89K5+pP35zUTJjiZE98Ab6BK+CvLDIs/Q5ZmsLQIUtZ7 OBHhuxXONvbBaHlQz24wi1u/eT/xnXOlu6cHVLxdcmyCZmKGdOLR+dLZ/Mi0m/skqzd5 DjzOA/j5aikJ2g3cNpRTi7WVFxM6MoEUNU5ukYCfWJM+njYQ8lyOCki9LffcFaIqpkxA +lvBshpYLN+OeKQ60TW4no8QWZIPVn+uYC5Sl+jKouN2lJZOzoWOyyNkAR+aMI7cHchx poVBoW2+tZF1TQxpN01cJy1mwx23LeWoEUORLDoD/CAxjZFMO7g2q+AnTEFRVZ2/9vAb xn5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bo/AQ8LDzk/AOqWq7VGMP1dwGD9Dmy3wpy1bY1Rsljs=; fh=NWGQ7fZR3zVEVi2WAz7PRCM0UoPYD55CyBanUzcPfOE=; b=t6sGdlybXPRghZ8+/M5rTw63dsmpOx7lNpcuToNhhRz8T8Hc7/GaMIJA6yny1t91fc OhmQSpFx3PlP7zGRmu1XrfUaWODr9dos8Fw04+3XNsTnzsx/syPGNxA+4McD/XBrPUXP SZnzMoeP5TJ/oUPorz9gwM16UY0/AYpovlTcWqCaNgYjBQtSr5I3r2yYpJOLfpROtZnF IbuHA/J3GxE4MdkwZJMGcS9eo+A5qw3/Rpc2zawYMbu85/RdRA+ksUSRNTNz9EGGkyEd TVUQ7jz1G4Fnx1aqnM+rHjqx6g2cGwBk9GhKNaRWeH9GZd7M3eMRbKiekE5ZzvUH41pN FnIQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Vvn3SVcx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([203.56.128.103]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2cacd419af7sm5463589a91.25.2024.07.14.22.58.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Jul 2024 22:58:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: danikhan632@git.sr.ht, qemu-arm@nongnu.org, qemu-stable@nongnu.org, Daniyal Khan Subject: [PATCH 2/3] target/arm: Use FPST_F16 for SME FMOPA (widening) Date: Mon, 15 Jul 2024 15:58:19 +1000 Message-ID: <20240715055820.319035-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240715055820.319035-1-richard.henderson@linaro.org> References: <20240715055820.319035-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This operation has float16 inputs and thus must use the FZ16 control not the FZ control. Cc: qemu-stable@nongnu.org Reported-by: Daniyal Khan Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2374 Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée --- target/arm/tcg/translate-sme.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index 46c7fce8b4..185a8a917b 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -304,6 +304,7 @@ static bool do_outprod(DisasContext *s, arg_op *a, MemOp esz, } static bool do_outprod_fpst(DisasContext *s, arg_op *a, MemOp esz, + ARMFPStatusFlavour e_fpst, gen_helper_gvec_5_ptr *fn) { int svl = streaming_vec_reg_size(s); @@ -319,15 +320,18 @@ static bool do_outprod_fpst(DisasContext *s, arg_op *a, MemOp esz, zm = vec_full_reg_ptr(s, a->zm); pn = pred_full_reg_ptr(s, a->pn); pm = pred_full_reg_ptr(s, a->pm); - fpst = fpstatus_ptr(FPST_FPCR); + fpst = fpstatus_ptr(e_fpst); fn(za, zn, zm, pn, pm, fpst, tcg_constant_i32(desc)); return true; } -TRANS_FEAT(FMOPA_h, aa64_sme, do_outprod_fpst, a, MO_32, gen_helper_sme_fmopa_h) -TRANS_FEAT(FMOPA_s, aa64_sme, do_outprod_fpst, a, MO_32, gen_helper_sme_fmopa_s) -TRANS_FEAT(FMOPA_d, aa64_sme_f64f64, do_outprod_fpst, a, MO_64, gen_helper_sme_fmopa_d) +TRANS_FEAT(FMOPA_h, aa64_sme, do_outprod_fpst, a, + MO_32, FPST_FPCR_F16, gen_helper_sme_fmopa_h) +TRANS_FEAT(FMOPA_s, aa64_sme, do_outprod_fpst, a, + MO_32, FPST_FPCR, gen_helper_sme_fmopa_s) +TRANS_FEAT(FMOPA_d, aa64_sme_f64f64, do_outprod_fpst, a, + MO_64, FPST_FPCR, gen_helper_sme_fmopa_d) /* TODO: FEAT_EBF16 */ TRANS_FEAT(BFMOPA, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_bfmopa) From patchwork Mon Jul 15 05:58:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 812596 Delivered-To: patch@linaro.org Received: by 2002:adf:fac3:0:b0:367:895a:4699 with SMTP id a3csp1658808wrs; Sun, 14 Jul 2024 22:58:49 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVTsvC5ny4Hr/haQdi0YX+nAAWmJuARF6b6Al/iH5u0OuSj9z2HKx6EwAnWBK/RhK1+saJqipp5k2jmE7AODTRF X-Google-Smtp-Source: AGHT+IHbJWgWCNEaNKdQ+xk2BvZiyR9BbTN+YKxjd654KUAzd7MHUxLTTj8Zy9lgLQIIJYEtZKiQ X-Received: by 2002:a05:6214:27c6:b0:6b2:b2a3:67ce with SMTP id 6a1803df08f44-6b61c1e4312mr232669636d6.51.1721023129741; Sun, 14 Jul 2024 22:58:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721023129; cv=none; d=google.com; s=arc-20160816; b=npsj9iQr0kcdCHVNDsbcgUZnoViUDsbDBiUKFqkATXOPEHxPQ4BV1rqd6UwUFQPVSw 7k9QRC5yeCQjLrafikH8jiQvQIqfhgtWmRwLBSLiAT1CvDZ/uq1xHX0q4TbB1yvIqURV e3nyM78+jvosoEyExWtkaCDiimhNkCw+pq6Tuq1bZMJ4f+nS8Igjhkl5f8LDNJZ83gPh yek9N6ZmAVCX2sxemXpKe1o6LoaqOQPixr9A7V5DTNwIC4iItLloeb7xBAYNqD7QspEE Edjf5brCPHMycBZwvXan//1qwkNX7k1AYo3Z1IUzkyGFaoP2/zPOdirz5Hm3IiN5EPTV Fkzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=JeM+PyZIgZuwJtOyeBwiQLcZE1Nzm+KGAI4nD2vg1aw=; fh=b6mY2tz5CfKH2WDdeIpBoQpsqs2HTjYOG+Gro5qKkKI=; b=HpqYX5BQN8qKQQuy93sNe3Zhy8wiAsP6ckQRf3wPAnT4oV0qN03G7Tj9XUdKrBHG7H A1xj4BkiQCf9aXyy1HNzUDtqDAA/Sm8v6sfXQ5JBBnXediRNjoZJrbw3DwOBXHipfWGd uH9Q4ETJY42pp/ySzB69d+rPHowLL03mdcPTzf4nm9yMqWbrNOqJUQL1SIdjuIVmIV6t 5JxnIB5T3q3756eLBRpQ495N96+FLDGsEyrlbpRFjPWY7L6WHSZz/UNWN2edILGZ3Pob IFXLZfYLC6mbN+SIStDkmQIBScl4UEvGQkl38YcAIF/IM9p/EvPKRMVnkqzmCPCTvrLU oUTg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PIizPCKQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([203.56.128.103]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2cacd419af7sm5463589a91.25.2024.07.14.22.58.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Jul 2024 22:58:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: danikhan632@git.sr.ht, qemu-arm@nongnu.org, Daniyal Khan Subject: [PATCH 3/3] tests/tcg/aarch64: Add test cases for SME FMOPA (widening) Date: Mon, 15 Jul 2024 15:58:20 +1000 Message-ID: <20240715055820.319035-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240715055820.319035-1-richard.henderson@linaro.org> References: <20240715055820.319035-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Daniyal Khan Signed-off-by: Daniyal Khan Message-Id: 172090222034.13953.16888708708822922098-1@git.sr.ht [rth: Split test cases to separate patch, tidy assembly.] Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée --- tests/tcg/aarch64/sme-fmopa-1.c | 63 +++++++++++++++++++++++++++++++ tests/tcg/aarch64/sme-fmopa-2.c | 51 +++++++++++++++++++++++++ tests/tcg/aarch64/sme-fmopa-3.c | 58 ++++++++++++++++++++++++++++ tests/tcg/aarch64/Makefile.target | 5 ++- 4 files changed, 175 insertions(+), 2 deletions(-) create mode 100644 tests/tcg/aarch64/sme-fmopa-1.c create mode 100644 tests/tcg/aarch64/sme-fmopa-2.c create mode 100644 tests/tcg/aarch64/sme-fmopa-3.c diff --git a/tests/tcg/aarch64/sme-fmopa-1.c b/tests/tcg/aarch64/sme-fmopa-1.c new file mode 100644 index 0000000000..652c4ea090 --- /dev/null +++ b/tests/tcg/aarch64/sme-fmopa-1.c @@ -0,0 +1,63 @@ +/* + * SME outer product, 1 x 1. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include + +static void foo(float *dst) +{ + asm(".arch_extension sme\n\t" + "smstart\n\t" + "ptrue p0.s, vl4\n\t" + "fmov z0.s, #1.0\n\t" + /* + * An outer product of a vector of 1.0 by itself should be a matrix of 1.0. + * Note that we are using tile 1 here (za1.s) rather than tile 0. + */ + "zero {za}\n\t" + "fmopa za1.s, p0/m, p0/m, z0.s, z0.s\n\t" + /* + * Read the first 4x4 sub-matrix of elements from tile 1: + * Note that za1h should be interchangeable here. + */ + "mov w12, #0\n\t" + "mova z0.s, p0/m, za1v.s[w12, #0]\n\t" + "mova z1.s, p0/m, za1v.s[w12, #1]\n\t" + "mova z2.s, p0/m, za1v.s[w12, #2]\n\t" + "mova z3.s, p0/m, za1v.s[w12, #3]\n\t" + /* + * And store them to the input pointer (dst in the C code): + */ + "st1w {z0.s}, p0, [%0]\n\t" + "add x0, x0, #16\n\t" + "st1w {z1.s}, p0, [x0]\n\t" + "add x0, x0, #16\n\t" + "st1w {z2.s}, p0, [x0]\n\t" + "add x0, x0, #16\n\t" + "st1w {z3.s}, p0, [x0]\n\t" + "smstop" + : : "r"(dst) + : "x12", "d0", "d1", "d2", "d3", "memory"); +} + +int main() +{ + float dst[16] = { }; + + foo(dst); + + for (int i = 0; i < 16; i++) { + if (dst[i] != 1.0f) { + goto failure; + } + } + /* success */ + return 0; + + failure: + for (int i = 0; i < 16; i++) { + printf("%f%c", dst[i], i % 4 == 3 ? '\n' : ' '); + } + return 1; +} diff --git a/tests/tcg/aarch64/sme-fmopa-2.c b/tests/tcg/aarch64/sme-fmopa-2.c new file mode 100644 index 0000000000..198cc31528 --- /dev/null +++ b/tests/tcg/aarch64/sme-fmopa-2.c @@ -0,0 +1,51 @@ +#include +#include + +static void test_fmopa(uint32_t *result) +{ + asm(".arch_extension sme\n\t" + "smstart\n\t" /* Z*, P* and ZArray cleared */ + "ptrue p2.b, vl16\n\t" /* Limit vector length to 16 */ + "ptrue p5.b, vl16\n\t" + "movi d0, #0x00ff\n\t" /* fp16 denormal */ + "movi d16, #0x00ff\n\t" + "mov w15, #0x0001000000\n\t" /* FZ=1, FZ16=0 */ + "msr fpcr, x15\n\t" + "fmopa za3.s, p2/m, p5/m, z16.h, z0.h\n\t" + "mov w15, #0\n\t" + "st1w {za3h.s[w15, 0]}, p2, [%0]\n\t" + "add %0, %0, #16\n\t" + "st1w {za3h.s[w15, 1]}, p2, [%0]\n\t" + "mov w15, #2\n\t" + "add %0, %0, #16\n\t" + "st1w {za3h.s[w15, 0]}, p2, [%0]\n\t" + "add %0, %0, #16\n\t" + "st1w {za3h.s[w15, 1]}, p2, [%0]\n\t" + "smstop" + : "+r"(result) : + : "x15", "x16", "p2", "p5", "d0", "d16", "memory"); +} + +int main(void) +{ + uint32_t result[4 * 4] = { }; + + test_fmopa(result); + + if (result[0] != 0x2f7e0100) { + printf("Test failed: Incorrect output in first 4 bytes\n" + "Expected: %08x\n" + "Got: %08x\n", + 0x2f7e0100, result[0]); + return 1; + } + + for (int i = 1; i < 16; ++i) { + if (result[i] != 0) { + printf("Test failed: Non-zero word at position %d\n", i); + return 1; + } + } + + return 0; +} diff --git a/tests/tcg/aarch64/sme-fmopa-3.c b/tests/tcg/aarch64/sme-fmopa-3.c new file mode 100644 index 0000000000..6617355c9d --- /dev/null +++ b/tests/tcg/aarch64/sme-fmopa-3.c @@ -0,0 +1,58 @@ +#include +#include +#include +#include + +static const float i_1234[4] = { + 1.0f, 2.0f, 3.0f, 4.0f +}; + +static const float expected[4] = { + 4.515625f, 5.750000f, 6.984375f, 8.218750f +}; + +static void test_fmopa(float *result) +{ + asm(".arch_extension sme\n\t" + "smstart\n\t" /* ZArray cleared */ + "ptrue p2.b, vl16\n\t" /* Limit vector length to 16 */ + "ld1w {z0.s}, p2/z, [%1]\n\t" + "mov w15, #0\n\t" + "mov za3h.s[w15, 0], p2/m, z0.s\n\t" + "mov za3h.s[w15, 1], p2/m, z0.s\n\t" + "mov w15, #2\n\t" + "mov za3h.s[w15, 0], p2/m, z0.s\n\t" + "mov za3h.s[w15, 1], p2/m, z0.s\n\t" + "msr fpcr, xzr\n\t" + "fmopa za3.s, p2/m, p2/m, z0.h, z0.h\n\t" + "mov w15, #0\n\t" + "st1w {za3h.s[w15, 0]}, p2, [%0]\n" + "add %0, %0, #16\n\t" + "st1w {za3h.s[w15, 1]}, p2, [%0]\n\t" + "mov w15, #2\n\t" + "add %0, %0, #16\n\t" + "st1w {za3h.s[w15, 0]}, p2, [%0]\n\t" + "add %0, %0, #16\n\t" + "st1w {za3h.s[w15, 1]}, p2, [%0]\n\t" + "smstop" + : "+r"(result) : "r"(i_1234) + : "x15", "x16", "p2", "d0", "memory"); +} + +int main(void) +{ + float result[4 * 4] = { }; + int ret = 0; + + test_fmopa(result); + + for (int i = 0; i < 4; i++) { + float actual = result[i]; + if (fabsf(actual - expected[i]) > 0.001f) { + printf("Test failed at element %d: Expected %f, got %f\n", + i, expected[i], actual); + ret = 1; + } + } + return ret; +} diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index b53218e115..8cc62eb456 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -70,8 +70,9 @@ endif # SME Tests ifneq ($(CROSS_AS_HAS_ARMV9_SME),) -AARCH64_TESTS += sme-outprod1 sme-smopa-1 sme-smopa-2 -sme-outprod1 sme-smopa-1 sme-smopa-2: CFLAGS += $(CROSS_AS_HAS_ARMV9_SME) +SME_TESTS = sme-outprod1 sme-smopa-1 sme-smopa-2 sme-fmopa-1 sme-fmopa-2 sme-fmopa-3 +AARCH64_TESTS += $(SME_TESTS) +$(SME_TESTS): CFLAGS += $(CROSS_AS_HAS_ARMV9_SME) endif # System Registers Tests