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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/arm/qcom.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index ec1c10a12470..f06543f96026 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -45,6 +45,7 @@ description: | qcs8550 qcm2290 qcm6490 + qcs9100 qdu1000 qrb2210 qrb4210 @@ -894,7 +895,9 @@ properties: - items: - enum: + - qcom,qcs9100-ride - qcom,sa8775p-ride + - const: qcom,qcs9100 - const: qcom,sa8775p - items: From patchwork Wed Jul 3 03:56:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809853 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F56941C77; 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Wed, 03 Jul 2024 03:59:17 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4633xFfc022371 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 03:59:15 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 20:58:54 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 02/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi Date: Wed, 3 Jul 2024 11:56:50 +0800 Message-ID: <20240703035735.2182165-3-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035735.2182165-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035735.2182165-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YvnKmYECPQYUdxvJBiR5XoGVNtXBbtYE X-Proofpoint-ORIG-GUID: YvnKmYECPQYUdxvJBiR5XoGVNtXBbtYE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 adultscore=0 mlxscore=0 clxscore=1015 malwarescore=0 bulkscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030027 Introduce QCS9100 SoC dtsi, QCS9100 is mainly used in IoT products. QCS9100 is drived from SA8775p. The current QCS9100 SoC dtsi is directly renamed from the SA8775p SoC dtsi. The QCS9100 platform is currently in the early design stage. Currently, Both the QCS9100 platform and SA8775p platform use non-SCMI resources, In the future, the SA8775p platform will transition to using SCMI resources and it will have new sa8775p-related device tree. This QCS9100 SoC dtsi remains consistent with the current SA8775p SoC dtsi, except for updating the following sa8775p-related compatible names to the qcs9100-related compatible name: - qcom,sa8775p-clk-virt - qcom,sa8775p-mc-virt - qcom,sa8775p-adsp-pas - qcom,sa8775p-cdsp-pas - qcom,sa8775p-cdsp1-pas - qcom,sa8775p-gpdsp0-pas - qcom,sa8775p-gpdsp1-pas - qcom,sa8775p-gcc - qcom,sa8775p-ipcc - qcom,sa8775p-config-noc - qcom,sa8775p-system-noc - qcom,sa8775p-aggre1-noc - qcom,sa8775p-aggre2-noc - qcom,sa8775p-pcie-anoc - qcom,sa8775p-gpdsp-anoc - qcom,sa8775p-mmss-noc - qcom,sa8775p-trng - qcom,sa8775p-ufshc - qcom,sa8775p-qmp-ufs-phy - qcom,sa8775p-qce - qcom,sa8775p-lpass-ag-noc - qcom,sa8775p-usb-hs-phy - qcom,sa8775p-dc-noc - qcom,sa8775p-gem-noc - qcom,sa8775p-dwc3 - qcom,sa8775p-qmp-usb3-uni-phy - qcom,sa8775p-gpucc - qcom,sa8775p-smmu-500 - qcom,sa8775p-dwmac-sgmii-phy - qcom,sa8775p-llcc-bwmon - qcom,sa8775p-cpu-bwmon - qcom,sa8775p-llcc - qcom,sa8775p-videocc - qcom,sa8775p-camcc - qcom,sa8775p-dispcc0 - qcom,sa8775p-pdc - qcom,sa8775p-aoss-qmp - qcom,sa8775p-tlmm - qcom,sa8775p-imem - qcom,sa8775p-smmu-500 - qcom,sa8775p-rpmh-clk - qcom,sa8775p-rpmhpd - qcom,sa8775p-cpufreq-epss - qcom,sa8775p-dispcc1 - qcom,sa8775p-ethqos - qcom,sa8775p-nspa-noc - qcom,sa8775p-nspb-noc - qcom,sa8775p-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x4-pcie-phy Signed-off-by: Tengfei Fan --- .../dts/qcom/{sa8775p.dtsi => qcs9100.dtsi} | 112 +++++++++--------- 1 file changed, 56 insertions(+), 56 deletions(-) rename arch/arm64/boot/dts/qcom/{sa8775p.dtsi => qcs9100.dtsi} (97%) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/qcs9100.dtsi similarity index 97% rename from arch/arm64/boot/dts/qcom/sa8775p.dtsi rename to arch/arm64/boot/dts/qcom/qcs9100.dtsi index 23f1b2e5e624..1c257287af0c 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs9100.dtsi @@ -220,91 +220,91 @@ eud_in: endpoint { firmware { scm { - compatible = "qcom,scm-sa8775p", "qcom,scm"; + compatible = "qcom,scm-qcs9100", "qcom,scm"; memory-region = <&tz_ffi_mem>; }; }; aggre1_noc: interconnect-aggre1-noc { - compatible = "qcom,sa8775p-aggre1-noc"; + compatible = "qcom,qcs9100-aggre1-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; aggre2_noc: interconnect-aggre2-noc { - compatible = "qcom,sa8775p-aggre2-noc"; + compatible = "qcom,qcs9100-aggre2-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; clk_virt: interconnect-clk-virt { - compatible = "qcom,sa8775p-clk-virt"; + compatible = "qcom,qcs9100-clk-virt"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; config_noc: interconnect-config-noc { - compatible = "qcom,sa8775p-config-noc"; + compatible = "qcom,qcs9100-config-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; dc_noc: interconnect-dc-noc { - compatible = "qcom,sa8775p-dc-noc"; + compatible = "qcom,qcs9100-dc-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; gem_noc: interconnect-gem-noc { - compatible = "qcom,sa8775p-gem-noc"; + compatible = "qcom,qcs9100-gem-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; gpdsp_anoc: interconnect-gpdsp-anoc { - compatible = "qcom,sa8775p-gpdsp-anoc"; + compatible = "qcom,qcs9100-gpdsp-anoc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; lpass_ag_noc: interconnect-lpass-ag-noc { - compatible = "qcom,sa8775p-lpass-ag-noc"; + compatible = "qcom,qcs9100-lpass-ag-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; mc_virt: interconnect-mc-virt { - compatible = "qcom,sa8775p-mc-virt"; + compatible = "qcom,qcs9100-mc-virt"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; mmss_noc: interconnect-mmss-noc { - compatible = "qcom,sa8775p-mmss-noc"; + compatible = "qcom,qcs9100-mmss-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; nspa_noc: interconnect-nspa-noc { - compatible = "qcom,sa8775p-nspa-noc"; + compatible = "qcom,qcs9100-nspa-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; nspb_noc: interconnect-nspb-noc { - compatible = "qcom,sa8775p-nspb-noc"; + compatible = "qcom,qcs9100-nspb-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; pcie_anoc: interconnect-pcie-anoc { - compatible = "qcom,sa8775p-pcie-anoc"; + compatible = "qcom,qcs9100-pcie-anoc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; system_noc: interconnect-system-noc { - compatible = "qcom,sa8775p-system-noc"; + compatible = "qcom,qcs9100-system-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; @@ -571,7 +571,7 @@ soc: soc@0 { ranges = <0 0 0 0 0x10 0>; gcc: clock-controller@100000 { - compatible = "qcom,sa8775p-gcc"; + compatible = "qcom,qcs9100-gcc"; reg = <0x0 0x00100000 0x0 0xc7018>; #clock-cells = <1>; #reset-cells = <1>; @@ -595,7 +595,7 @@ gcc: clock-controller@100000 { }; ipcc: mailbox@408000 { - compatible = "qcom,sa8775p-ipcc", "qcom,ipcc"; + compatible = "qcom,qcs9100-ipcc", "qcom,ipcc"; reg = <0x0 0x00408000 0x0 0x1000>; interrupts = ; interrupt-controller; @@ -1593,12 +1593,12 @@ &config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS>, }; rng: rng@10d2000 { - compatible = "qcom,sa8775p-trng", "qcom,trng"; + compatible = "qcom,qcs9100-trng", "qcom,trng"; reg = <0 0x010d2000 0 0x1000>; }; ufs_mem_hc: ufs@1d84000 { - compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; + compatible = "qcom,qcs9100-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; reg = <0x0 0x01d84000 0x0 0x3000>; interrupts = ; phys = <&ufs_mem_phy>; @@ -1640,7 +1640,7 @@ ufs_mem_hc: ufs@1d84000 { }; ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sa8775p-qmp-ufs-phy"; + compatible = "qcom,qcs9100-qmp-ufs-phy"; reg = <0x0 0x01d87000 0x0 0xe10>; /* * Yes, GCC_EDP_REF_CLKREF_EN is correct in qref. It @@ -1658,7 +1658,7 @@ ufs_mem_phy: phy@1d87000 { }; ice: crypto@1d88000 { - compatible = "qcom,sa8775p-inline-crypto-engine", + compatible = "qcom,qcs9100-inline-crypto-engine", "qcom,inline-crypto-engine"; reg = <0x0 0x01d88000 0x0 0x8000>; clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; @@ -2578,7 +2578,7 @@ apss_tpdm2_out: endpoint { }; usb_0_hsphy: phy@88e4000 { - compatible = "qcom,sa8775p-usb-hs-phy", + compatible = "qcom,qcs9100-usb-hs-phy", "qcom,usb-snps-hs-5nm-phy"; reg = <0 0x088e4000 0 0x120>; clocks = <&rpmhcc RPMH_CXO_CLK>; @@ -2591,7 +2591,7 @@ usb_0_hsphy: phy@88e4000 { }; usb_0_qmpphy: phy@88e8000 { - compatible = "qcom,sa8775p-qmp-usb3-uni-phy"; + compatible = "qcom,qcs9100-qmp-usb3-uni-phy"; reg = <0 0x088e8000 0 0x2000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, @@ -2615,7 +2615,7 @@ usb_0_qmpphy: phy@88e8000 { }; usb_0: usb@a6f8800 { - compatible = "qcom,sa8775p-dwc3", "qcom,dwc3"; + compatible = "qcom,qcs9100-dwc3", "qcom,dwc3"; reg = <0 0x0a6f8800 0 0x400>; #address-cells = <2>; #size-cells = <2>; @@ -2667,7 +2667,7 @@ usb_0_dwc3: usb@a600000 { }; usb_1_hsphy: phy@88e6000 { - compatible = "qcom,sa8775p-usb-hs-phy", + compatible = "qcom,qcs9100-usb-hs-phy", "qcom,usb-snps-hs-5nm-phy"; reg = <0 0x088e6000 0 0x120>; clocks = <&gcc GCC_USB_CLKREF_EN>; @@ -2680,7 +2680,7 @@ usb_1_hsphy: phy@88e6000 { }; usb_1_qmpphy: phy@88ea000 { - compatible = "qcom,sa8775p-qmp-usb3-uni-phy"; + compatible = "qcom,qcs9100-qmp-usb3-uni-phy"; reg = <0 0x088ea000 0 0x2000>; clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, @@ -2704,7 +2704,7 @@ usb_1_qmpphy: phy@88ea000 { }; usb_1: usb@a8f8800 { - compatible = "qcom,sa8775p-dwc3", "qcom,dwc3"; + compatible = "qcom,qcs9100-dwc3", "qcom,dwc3"; reg = <0 0x0a8f8800 0 0x400>; #address-cells = <2>; #size-cells = <2>; @@ -2756,7 +2756,7 @@ usb_1_dwc3: usb@a800000 { }; usb_2_hsphy: phy@88e7000 { - compatible = "qcom,sa8775p-usb-hs-phy", + compatible = "qcom,qcs9100-usb-hs-phy", "qcom,usb-snps-hs-5nm-phy"; reg = <0 0x088e7000 0 0x120>; clocks = <&gcc GCC_USB_CLKREF_EN>; @@ -2769,7 +2769,7 @@ usb_2_hsphy: phy@88e7000 { }; usb_2: usb@a4f8800 { - compatible = "qcom,sa8775p-dwc3", "qcom,dwc3"; + compatible = "qcom,qcs9100-dwc3", "qcom,dwc3"; reg = <0 0x0a4f8800 0 0x400>; #address-cells = <2>; #size-cells = <2>; @@ -2825,7 +2825,7 @@ tcsr_mutex: hwlock@1f40000 { }; gpucc: clock-controller@3d90000 { - compatible = "qcom,sa8775p-gpucc"; + compatible = "qcom,qcs9100-gpucc"; reg = <0x0 0x03d90000 0x0 0xa000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPU_GPLL0_CLK_SRC>, @@ -2839,7 +2839,7 @@ gpucc: clock-controller@3d90000 { }; adreno_smmu: iommu@3da0000 { - compatible = "qcom,sa8775p-smmu-500", "qcom,adreno-smmu", + compatible = "qcom,qcs9100-smmu-500", "qcom,adreno-smmu", "qcom,smmu-500", "arm,mmu-500"; reg = <0x0 0x03da0000 0x0 0x20000>; #iommu-cells = <2>; @@ -2875,7 +2875,7 @@ adreno_smmu: iommu@3da0000 { }; serdes0: phy@8901000 { - compatible = "qcom,sa8775p-dwmac-sgmii-phy"; + compatible = "qcom,qcs9100-dwmac-sgmii-phy"; reg = <0x0 0x08901000 0x0 0xe10>; clocks = <&gcc GCC_SGMI_CLKREF_EN>; clock-names = "sgmi_ref"; @@ -2884,7 +2884,7 @@ serdes0: phy@8901000 { }; serdes1: phy@8902000 { - compatible = "qcom,sa8775p-dwmac-sgmii-phy"; + compatible = "qcom,qcs9100-dwmac-sgmii-phy"; reg = <0x0 0x08902000 0x0 0xe10>; clocks = <&gcc GCC_SGMI_CLKREF_EN>; clock-names = "sgmi_ref"; @@ -2893,7 +2893,7 @@ serdes1: phy@8902000 { }; llcc: system-cache-controller@9200000 { - compatible = "qcom,sa8775p-llcc"; + compatible = "qcom,qcs9100-llcc"; reg = <0x0 0x09200000 0x0 0x80000>, <0x0 0x09300000 0x0 0x80000>, <0x0 0x09400000 0x0 0x80000>, @@ -2912,7 +2912,7 @@ llcc: system-cache-controller@9200000 { }; pdc: interrupt-controller@b220000 { - compatible = "qcom,sa8775p-pdc", "qcom,pdc"; + compatible = "qcom,qcs9100-pdc", "qcom,pdc"; reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x17c000f0 0x0 0x64>; qcom,pdc-ranges = <0 480 40>, @@ -2959,7 +2959,7 @@ pdc: interrupt-controller@b220000 { }; tsens2: thermal-sensor@c251000 { - compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2"; + compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2"; reg = <0x0 0x0c251000 0x0 0x1ff>, <0x0 0x0c224000 0x0 0x8>; interrupts = , @@ -2970,7 +2970,7 @@ tsens2: thermal-sensor@c251000 { }; tsens3: thermal-sensor@c252000 { - compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2"; + compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2"; reg = <0x0 0x0c252000 0x0 0x1ff>, <0x0 0x0c225000 0x0 0x8>; interrupts = , @@ -2981,7 +2981,7 @@ tsens3: thermal-sensor@c252000 { }; tsens0: thermal-sensor@c263000 { - compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2"; + compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2"; reg = <0x0 0x0c263000 0x0 0x1ff>, <0x0 0x0c222000 0x0 0x8>; interrupts = , @@ -2992,7 +2992,7 @@ tsens0: thermal-sensor@c263000 { }; tsens1: thermal-sensor@c265000 { - compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2"; + compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2"; reg = <0x0 0x0c265000 0x0 0x1ff>, <0x0 0x0c223000 0x0 0x8>; interrupts = , @@ -3003,7 +3003,7 @@ tsens1: thermal-sensor@c265000 { }; aoss_qmp: power-management@c300000 { - compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp"; + compatible = "qcom,qcs9100-aoss-qmp", "qcom,aoss-qmp"; reg = <0x0 0x0c300000 0x0 0x400>; interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP @@ -3040,7 +3040,7 @@ spmi_bus: spmi@c440000 { }; tlmm: pinctrl@f000000 { - compatible = "qcom,sa8775p-tlmm"; + compatible = "qcom,qcs9100-tlmm"; reg = <0x0 0x0f000000 0x0 0x1000000>; interrupts = ; gpio-controller; @@ -3052,7 +3052,7 @@ tlmm: pinctrl@f000000 { }; sram: sram@146d8000 { - compatible = "qcom,sa8775p-imem", "syscon", "simple-mfd"; + compatible = "qcom,qcs9100-imem", "syscon", "simple-mfd"; reg = <0x0 0x146d8000 0x0 0x1000>; ranges = <0x0 0x0 0x146d8000 0x1000>; @@ -3066,7 +3066,7 @@ pil-reloc@94c { }; apps_smmu: iommu@15000000 { - compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500"; + compatible = "qcom,qcs9100-smmu-500", "qcom,smmu-500", "arm,mmu-500"; reg = <0x0 0x15000000 0x0 0x100000>; #iommu-cells = <2>; #global-interrupts = <2>; @@ -3204,7 +3204,7 @@ apps_smmu: iommu@15000000 { }; pcie_smmu: iommu@15200000 { - compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500"; + compatible = "qcom,qcs9100-smmu-500", "qcom,smmu-500", "arm,mmu-500"; reg = <0x0 0x15200000 0x0 0x80000>; #iommu-cells = <2>; #global-interrupts = <2>; @@ -3289,7 +3289,7 @@ intc: interrupt-controller@17a00000 { }; watchdog@17c10000 { - compatible = "qcom,apss-wdt-sa8775p", "qcom,kpss-wdt"; + compatible = "qcom,apss-wdt-qcs9100", "qcom,kpss-wdt"; reg = <0x0 0x17c10000 0x0 0x1000>; clocks = <&sleep_clk>; interrupts = ; @@ -3375,14 +3375,14 @@ apps_bcm_voter: bcm-voter { }; rpmhcc: clock-controller { - compatible = "qcom,sa8775p-rpmh-clk"; + compatible = "qcom,qcs9100-rpmh-clk"; #clock-cells = <1>; clock-names = "xo"; clocks = <&xo_board_clk>; }; rpmhpd: power-controller { - compatible = "qcom,sa8775p-rpmhpd"; + compatible = "qcom,qcs9100-rpmhpd"; #power-domain-cells = <1>; operating-points-v2 = <&rpmhpd_opp_table>; @@ -3433,7 +3433,7 @@ rpmhpd_opp_turbo_l1: opp-9 { }; cpufreq_hw: cpufreq@18591000 { - compatible = "qcom,sa8775p-cpufreq-epss", + compatible = "qcom,qcs9100-cpufreq-epss", "qcom,cpufreq-epss"; reg = <0x0 0x18591000 0x0 0x1000>, <0x0 0x18593000 0x0 0x1000>; @@ -3446,7 +3446,7 @@ cpufreq_hw: cpufreq@18591000 { }; ethernet1: ethernet@23000000 { - compatible = "qcom,sa8775p-ethqos"; + compatible = "qcom,qcs9100-ethqos"; reg = <0x0 0x23000000 0x0 0x10000>, <0x0 0x23016000 0x0 0x100>; reg-names = "stmmaceth", "rgmii"; @@ -3481,7 +3481,7 @@ ethernet1: ethernet@23000000 { }; ethernet0: ethernet@23040000 { - compatible = "qcom,sa8775p-ethqos"; + compatible = "qcom,qcs9100-ethqos"; reg = <0x0 0x23040000 0x0 0x10000>, <0x0 0x23056000 0x0 0x100>; reg-names = "stmmaceth", "rgmii"; @@ -4495,7 +4495,7 @@ arch_timer: timer { }; pcie0: pcie@1c00000 { - compatible = "qcom,pcie-sa8775p"; + compatible = "qcom,pcie-qcs9100"; reg = <0x0 0x01c00000 0x0 0x3000>, <0x0 0x40000000 0x0 0xf20>, <0x0 0x40000f20 0x0 0xa8>, @@ -4576,7 +4576,7 @@ pcie@0 { }; pcie0_ep: pcie-ep@1c00000 { - compatible = "qcom,sa8775p-pcie-ep"; + compatible = "qcom,qcs9100-pcie-ep"; reg = <0x0 0x01c00000 0x0 0x3000>, <0x0 0x40000000 0x0 0xf20>, <0x0 0x40000f20 0x0 0xa8>, @@ -4623,7 +4623,7 @@ pcie0_ep: pcie-ep@1c00000 { }; pcie0_phy: phy@1c04000 { - compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy"; + compatible = "qcom,qcs9100-qmp-gen4x2-pcie-phy"; reg = <0x0 0x1c04000 0x0 0x2000>; clocks = <&gcc GCC_PCIE_0_AUX_CLK>, @@ -4652,7 +4652,7 @@ pcie0_phy: phy@1c04000 { }; pcie1: pcie@1c10000 { - compatible = "qcom,pcie-sa8775p"; + compatible = "qcom,pcie-qcs9100"; reg = <0x0 0x01c10000 0x0 0x3000>, <0x0 0x60000000 0x0 0xf20>, <0x0 0x60000f20 0x0 0xa8>, @@ -4733,7 +4733,7 @@ pcie@0 { }; pcie1_ep: pcie-ep@1c10000 { - compatible = "qcom,sa8775p-pcie-ep"; + compatible = "qcom,qcs9100-pcie-ep"; reg = <0x0 0x01c10000 0x0 0x3000>, <0x0 0x60000000 0x0 0xf20>, <0x0 0x60000f20 0x0 0xa8>, @@ -4780,7 +4780,7 @@ pcie1_ep: pcie-ep@1c10000 { }; pcie1_phy: phy@1c14000 { - compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy"; 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Wed, 3 Jul 2024 03:59:35 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 20:59:13 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 03/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 PMIC dtsi Date: Wed, 3 Jul 2024 11:56:51 +0800 Message-ID: <20240703035735.2182165-4-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035735.2182165-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035735.2182165-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: k543lf8i4HUYbE8bVyhpJP4aArU_jvtK X-Proofpoint-ORIG-GUID: k543lf8i4HUYbE8bVyhpJP4aArU_jvtK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=870 priorityscore=1501 suspectscore=0 adultscore=0 mlxscore=0 clxscore=1015 malwarescore=0 bulkscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030027 Introduce QCS9100 PMIC dtsi. The current QCS9100 PMIC dtsi is directly renamed from the SA8775p PMIC dtsi. Currently, the QCS9100 platform and SA8775p platform have the same PMIC requirements. In the future, as the SA8775p platform will transitions to using SCMI resources, their PMIC requirements will differ. Signed-off-by: Tengfei Fan --- .../boot/dts/qcom/{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename arch/arm64/boot/dts/qcom/{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi} (100%) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/qcs9100-pmics.dtsi similarity index 100% rename from arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi rename to arch/arm64/boot/dts/qcom/qcs9100-pmics.dtsi From patchwork Wed Jul 3 03:56:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810261 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C18AB137773; Wed, 3 Jul 2024 04:01:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; 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Wed, 03 Jul 2024 03:59:57 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4633xuRa029349 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 03:59:56 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 20:59:32 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 04/47] arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts Date: Wed, 3 Jul 2024 11:56:52 +0800 Message-ID: <20240703035735.2182165-5-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035735.2182165-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035735.2182165-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 8iZrOHvPGxATC45IwqyADW71lv5yylXQ X-Proofpoint-ORIG-GUID: 8iZrOHvPGxATC45IwqyADW71lv5yylXQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 bulkscore=0 spamscore=0 mlxscore=0 clxscore=1015 phishscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030027 Add support for the QCS9100 RIDE board dts. The current QCS9100 RIDE board dts is directly renamed from the SA8775p RIDE board dts. The difference between the current QCS9100 RIDE board and the SA8775p RIDE board lies solely in the replacement of the SA8775p SoC with the QCS9100 SoC, all other board resources remain the same. The following items have been updated: - use QCS9100-related compatible names for this board dts. - replace the inclusion of sa8775p.dtsi with qcs9100.dtsi. - replace the inclusion of sa8775p-pmics.dtsi with qcs9100-pmics.dtsi Signed-off-by: Tengfei Fan --- arch/arm64/boot/dts/qcom/Makefile | 2 +- .../boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts} | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) rename arch/arm64/boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts} (99%) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 5576c7d6ea06..a7a3792b0691 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb4210-rb2.dtb @@ -112,7 +113,6 @@ dtb-$(CONFIG_ARCH_QCOM) += qru1000-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb -dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts similarity index 99% rename from arch/arm64/boot/dts/qcom/sa8775p-ride.dts rename to arch/arm64/boot/dts/qcom/qcs9100-ride.dts index 26ad05bd3b3f..2415d34b8aa5 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts @@ -8,12 +8,12 @@ #include #include -#include "sa8775p.dtsi" -#include "sa8775p-pmics.dtsi" +#include "qcs9100.dtsi" +#include "qcs9100-pmics.dtsi" / { - model = "Qualcomm SA8775P Ride"; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml index 2cc83771d8e7..3596ae0e0610 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -42,6 +42,7 @@ properties: - qcom,scm-msm8996 - qcom,scm-msm8998 - qcom,scm-qcm2290 + - qcom,scm-qcs9100 - qcom,scm-qdu1000 - qcom,scm-sa8775p - qcom,scm-sc7180 From patchwork Wed Jul 3 03:56:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809851 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4DA713B59A; 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Signed-off-by: Tengfei Fan --- .../bindings/interconnect/qcom,sa8775p-rpmh.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml index 2e0c0bc7a376..748fe2084ad8 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml @@ -18,6 +18,20 @@ description: | properties: compatible: enum: + - qcom,qcs9100-aggre1-noc + - qcom,qcs9100-aggre2-noc + - qcom,qcs9100-clk-virt + - qcom,qcs9100-config-noc + - qcom,qcs9100-dc-noc + - qcom,qcs9100-gem-noc + - qcom,qcs9100-gpdsp-anoc + - qcom,qcs9100-lpass-ag-noc + - qcom,qcs9100-mc-virt + - qcom,qcs9100-mmss-noc + - qcom,qcs9100-nspa-noc + - qcom,qcs9100-nspb-noc + - qcom,qcs9100-pcie-anoc + - qcom,qcs9100-system-noc - qcom,sa8775p-aggre1-noc - qcom,sa8775p-aggre2-noc - qcom,sa8775p-clk-virt From patchwork Wed Jul 3 03:56:55 2024 Content-Type: text/plain; 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Signed-off-by: Tengfei Fan --- .../devicetree/bindings/clock/qcom,sa8775p-gcc.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml index addbd323fa6d..0ca77054e527 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml @@ -17,7 +17,10 @@ description: | properties: compatible: - const: qcom,sa8775p-gcc + items: + - enum: + - qcom,qcs9100-gcc + - qcom,sa8775p-gcc clocks: items: From patchwork Wed Jul 3 03:56:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809850 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99EBB2E646; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml index 05e4e1d51713..916c47fbc238 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml @@ -24,6 +24,7 @@ properties: compatible: items: - enum: + - qcom,qcs9100-ipcc - qcom,qdu1000-ipcc - qcom,sa8775p-ipcc - qcom,sc7280-ipcc From patchwork Wed Jul 3 02:58:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809870 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BAB6567D; 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Signed-off-by: Tengfei Fan --- .../devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml index f9cfbd0b2de6..f5c321a4a2f9 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml @@ -18,6 +18,7 @@ properties: enum: - qcom,msm8996-qmp-ufs-phy - qcom,msm8998-qmp-ufs-phy + - qcom,qcs9100-qmp-ufs-phy - qcom,sa8775p-qmp-ufs-phy - qcom,sc7180-qmp-ufs-phy - qcom,sc7280-qmp-ufs-phy @@ -85,6 +86,7 @@ allOf: contains: enum: - qcom,msm8998-qmp-ufs-phy + - qcom,qcs9100-qmp-ufs-phy - qcom,sa8775p-qmp-ufs-phy - qcom,sc7180-qmp-ufs-phy - qcom,sc7280-qmp-ufs-phy From patchwork Wed Jul 3 03:56:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810258 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7064B12E1D4; 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Signed-off-by: Tengfei Fan --- .../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml index 0304f074cf08..ad0944e05025 100644 --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml @@ -13,6 +13,7 @@ properties: compatible: items: - enum: + - qcom,qcs9100-inline-crypto-engine - qcom,sa8775p-inline-crypto-engine - qcom,sc7180-inline-crypto-engine - qcom,sc7280-inline-crypto-engine From patchwork Wed Jul 3 02:58:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809869 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1E921BC37; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml index 89c88004b41b..e97226eb7a50 100644 --- a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml @@ -17,6 +17,7 @@ properties: - qcom,prng-ee # 8996 and later using EE - items: - enum: + - qcom,qcs9100-trng - qcom,sa8775p-trng - qcom,sc7280-trng - qcom,sm8450-trng From patchwork Wed Jul 3 03:57:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809848 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 605B117580; 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Signed-off-by: Tengfei Fan --- .../devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml index 519c2b403f66..cd0a723590f0 100644 --- a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml @@ -17,6 +17,7 @@ properties: oneOf: - items: - enum: + - qcom,qcs9100-usb-hs-phy - qcom,sa8775p-usb-hs-phy - qcom,sc8280xp-usb-hs-phy - const: qcom,usb-snps-hs-5nm-phy From patchwork Wed Jul 3 03:57:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809847 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E04812FF8B; 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Wed, 03 Jul 2024 04:02:56 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46342tRc007245 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 04:02:55 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 21:02:32 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 13/47] dt-bindings: ufs: qcom: document QCS9100 UFS Date: Wed, 3 Jul 2024 11:57:01 +0800 Message-ID: <20240703035735.2182165-14-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035735.2182165-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035735.2182165-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: DhNT4GzN0EU0-ZkMkj-8yVCVxRc43_WO X-Proofpoint-ORIG-GUID: DhNT4GzN0EU0-ZkMkj-8yVCVxRc43_WO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=999 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 suspectscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030028 Document the compatible string for the UFS found on QCS9100. Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index 25a5edeea164..baee567fbcd6 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -26,6 +26,7 @@ properties: - qcom,msm8994-ufshc - qcom,msm8996-ufshc - qcom,msm8998-ufshc + - qcom,qcs9100-ufshc - qcom,sa8775p-ufshc - qcom,sc7180-ufshc - qcom,sc7280-ufshc @@ -146,6 +147,7 @@ allOf: contains: enum: - qcom,msm8998-ufshc + - qcom,qcs9100-ufshc - qcom,sa8775p-ufshc - qcom,sc7280-ufshc - qcom,sc8180x-ufshc From patchwork Wed Jul 3 03:57:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810257 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E3D54F5FB; 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Signed-off-by: Tengfei Fan --- .../bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml index 5755245ecfd6..8c1bc416646c 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml @@ -20,6 +20,7 @@ properties: - qcom,ipq8074-qmp-usb3-phy - qcom,ipq9574-qmp-usb3-phy - qcom,msm8996-qmp-usb3-phy + - qcom,qcs9100-qmp-usb3-uni-phy - com,qdu1000-qmp-usb3-uni-phy - qcom,sa8775p-qmp-usb3-uni-phy - qcom,sc8180x-qmp-usb3-uni-phy @@ -111,6 +112,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-qmp-usb3-uni-phy - qcom,qdu1000-qmp-usb3-uni-phy - qcom,sa8775p-qmp-usb3-uni-phy - qcom,sc8180x-qmp-usb3-uni-phy @@ -153,6 +155,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-qmp-usb3-uni-phy - qcom,sa8775p-qmp-usb3-uni-phy - qcom,sc8180x-qmp-usb3-uni-phy - qcom,sc8280xp-qmp-usb3-uni-phy From patchwork Wed Jul 3 03:57:03 2024 Content-Type: text/plain; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index efde47a5b145..07b0b6530b78 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -26,6 +26,7 @@ properties: - qcom,msm8998-dwc3 - qcom,qcm2290-dwc3 - qcom,qcs404-dwc3 + - qcom,qcs9100-dwc3 - qcom,qdu1000-dwc3 - qcom,sa8775p-dwc3 - qcom,sc7180-dwc3 @@ -199,6 +200,7 @@ allOf: - qcom,msm8953-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 + - qcom,qcs9100-dwc3 - qcom,sa8775p-dwc3 - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 @@ -448,6 +450,7 @@ allOf: - qcom,ipq4019-dwc3 - qcom,ipq8064-dwc3 - qcom,msm8994-dwc3 + - qcom,qcs9100-dwc3 - qcom,qdu1000-dwc3 - qcom,sa8775p-dwc3 - qcom,sc7180-dwc3 From patchwork Wed Jul 3 03:57:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809845 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 700AB13A402; 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It matches the generic QCom GPUCC description. Add device-specific DT bindings defines as well. Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index 0858fd635282..33eb62ec4745 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -27,6 +27,7 @@ description: | properties: compatible: enum: + - qcom,qcs9100-gpucc - qcom,sdm845-gpucc - qcom,sa8775p-gpucc - qcom,sc7180-gpucc From patchwork Wed Jul 3 03:57:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809843 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE0A813C670; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 5c130cf06a21..82b7e1d40ce0 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -36,6 +36,7 @@ properties: items: - enum: - qcom,qcm2290-smmu-500 + - qcom,qcs9100-smmu-500 - qcom,qdu1000-smmu-500 - qcom,sa8775p-smmu-500 - qcom,sc7180-smmu-500 @@ -84,6 +85,7 @@ properties: items: - enum: - qcom,qcm2290-smmu-500 + - qcom,qcs9100-smmu-500 - qcom,sa8775p-smmu-500 - qcom,sc7280-smmu-500 - qcom,sc8280xp-smmu-500 @@ -385,6 +387,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-smmu-500 - qcom,sa8775p-smmu-500 - qcom,sc7280-smmu-500 - qcom,sc8280xp-smmu-500 From patchwork Wed Jul 3 02:58:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809866 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03FD710A1F; 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Signed-off-by: Tengfei Fan --- .../bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml index b9107759b2a5..74ec4579c0d6 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml @@ -15,7 +15,10 @@ description: properties: compatible: - const: qcom,sa8775p-dwmac-sgmii-phy + items: + - enum: + - qcom,qcs9100-dwmac-sgmii-phy + - qcom,sa8775p-dwmac-sgmii-phy reg: items: From patchwork Wed Jul 3 02:58:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809864 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3EF02D517; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 68ea5f70b75f..a38c8b99099e 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -21,6 +21,7 @@ properties: compatible: enum: - qcom,qdu1000-llcc + - qcom,qcs9100-llcc - qcom,sa8775p-llcc - qcom,sc7180-llcc - qcom,sc7280-llcc @@ -85,6 +86,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-llcc - qcom,sa8775p-llcc then: properties: From patchwork Wed Jul 3 03:57:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809842 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C77C813CFB0; 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Wed, 03 Jul 2024 04:05:26 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46345Dmn030859 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 04:05:13 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 21:04:50 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 20/47] dt-bindings: interrupt-controller: qcom,pdc: document pdc on QCS9100 Date: Wed, 3 Jul 2024 11:57:08 +0800 Message-ID: <20240703035735.2182165-21-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035735.2182165-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035735.2182165-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: NvLsxp2dT5wlxAGM5cBrB0ZtjjjHkPDw X-Proofpoint-ORIG-GUID: NvLsxp2dT5wlxAGM5cBrB0ZtjjjHkPDw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 clxscore=1015 adultscore=0 malwarescore=0 mlxlogscore=955 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030028 The QCS9100 SoC includes a PDC, document it. Signed-off-by: Tengfei Fan --- .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml index 985fa10abb99..41fbfce838fa 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml @@ -26,6 +26,7 @@ properties: compatible: items: - enum: + - qcom,qcs9100-pdc - qcom,qdu1000-pdc - qcom,sa8775p-pdc - qcom,sc7180-pdc From patchwork Wed Jul 3 03:57:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809844 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0828B1822CE; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index 99d9c526c0b6..ace2cf1975c4 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -51,6 +51,7 @@ properties: - qcom,msm8996-tsens - qcom,msm8998-tsens - qcom,qcm2290-tsens + - qcom,qcs9100-tsens - qcom,sa8775p-tsens - qcom,sc7180-tsens - qcom,sc7280-tsens From patchwork Wed Jul 3 02:58:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809863 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0E525C613; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml index 7afdb60edb22..80e1a8b43586 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml @@ -25,6 +25,7 @@ properties: compatible: items: - enum: + - qcom,qcs9100-aoss-qmp - qcom,qdu1000-aoss-qmp - qcom,sa8775p-aoss-qmp - qcom,sc7180-aoss-qmp From patchwork Wed Jul 3 03:57:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810253 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 238B713C670; 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Signed-off-by: Tengfei Fan --- .../devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml index e9abbf2c0689..1bdec08efc4a 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml @@ -17,7 +17,10 @@ allOf: properties: compatible: - const: qcom,sa8775p-tlmm + items: + - enum: + - qcom,qcs9100-tlmm + - qcom,sa8775p-tlmm reg: maxItems: 1 From patchwork Wed Jul 3 03:57:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810251 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2C0B1B977; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index faef3d6e0a94..e45337a21232 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -21,6 +21,7 @@ properties: - qcom,msm8226-imem - qcom,msm8974-imem - qcom,qcs404-imem + - qcom,qcs9100-imem - qcom,qdu1000-imem - qcom,sa8775p-imem - qcom,sc7180-imem From patchwork Wed Jul 3 03:57:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809840 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D35F13E02D; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml index 47587971fb0b..5a78816aeece 100644 --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml @@ -26,6 +26,7 @@ properties: - qcom,apss-wdt-msm8994 - qcom,apss-wdt-qcm2290 - qcom,apss-wdt-qcs404 + - qcom,apss-wdt-qcs9100 - qcom,apss-wdt-sa8775p - qcom,apss-wdt-sc7180 - qcom,apss-wdt-sc7280 From patchwork Wed Jul 3 03:57:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810252 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83D463CF74; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml index ca857942ed6c..63e4b8f8e571 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml @@ -17,6 +17,7 @@ description: | properties: compatible: enum: + - qcom,qcs9100-rpmh-clk - qcom,qdu1000-rpmh-clk - qcom,sa8775p-rpmh-clk - qcom,sc7180-rpmh-clk From patchwork Wed Jul 3 03:57:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809841 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC7C85FEED; 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Wed, 03 Jul 2024 04:07:34 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46347WPb028913 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 04:07:32 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 21:07:09 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 27/47] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles Date: Wed, 3 Jul 2024 11:57:15 +0800 Message-ID: <20240703035735.2182165-28-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035735.2182165-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035735.2182165-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 3I93DWgguuRYhG_LzDI1jxglECoC6agl X-Proofpoint-ORIG-GUID: 3I93DWgguuRYhG_LzDI1jxglECoC6agl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 clxscore=1015 adultscore=0 malwarescore=0 mlxlogscore=954 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030028 Add compatible for EPSS CPUFREQ-HW on QCS9100. Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml index 1e9797f96410..02875e7a44f9 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml @@ -33,6 +33,7 @@ properties: - description: v2 of CPUFREQ HW (EPSS) items: - enum: + - qcom,qcs9100-cpufreq-epss - qcom,qdu1000-cpufreq-epss - qcom,sa8775p-cpufreq-epss - qcom,sc7280-cpufreq-epss From patchwork Wed Jul 3 02:58:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809861 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A75A12FF8B; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml index 929b7ef9c1bc..0e5aaca38994 100644 --- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml @@ -32,6 +32,7 @@ properties: - qcom,msm8998-rpmpd - qcom,qcm2290-rpmpd - qcom,qcs404-rpmpd + - qcom,qcs9100-rpmhpd - qcom,qdu1000-rpmhpd - qcom,qm215-rpmpd - qcom,sa8155p-rpmhpd From patchwork Wed Jul 3 03:57:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809839 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EEB48288B1; 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Wed, 03 Jul 2024 04:08:11 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46348AEO031141 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 04:08:10 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 21:07:48 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100 Date: Wed, 3 Jul 2024 11:57:17 +0800 Message-ID: <20240703035735.2182165-30-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035735.2182165-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035735.2182165-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ueGZ7X8pqFhe_-hOlUnvRwXOqryMqAYr X-Proofpoint-ORIG-GUID: ueGZ7X8pqFhe_-hOlUnvRwXOqryMqAYr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=666 priorityscore=1501 impostorscore=0 bulkscore=0 spamscore=0 mlxscore=0 clxscore=1015 phishscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030028 Add the compatible for the MAC controller on qcs9100 platforms. This MAC works with a single interrupt so add minItems to the interrupts property. The fourth clock's name is different here so change it. Enable relevant PHY properties. Add the relevant compatibles to the binding document for snps,dwmac as well. Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/net/qcom,ethqos.yaml | 1 + Documentation/devicetree/bindings/net/snps,dwmac.yaml | 3 +++ 2 files changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml index 6672327358bc..8ab11e00668c 100644 --- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml @@ -20,6 +20,7 @@ properties: compatible: enum: - qcom,qcs404-ethqos + - qcom,qcs9100-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 3bab4e1f3fbf..269c21779396 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -67,6 +67,7 @@ properties: - loongson,ls2k-dwmac - loongson,ls7a-dwmac - qcom,qcs404-ethqos + - qcom,qcs9100-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos @@ -582,6 +583,7 @@ allOf: - ingenic,x1600-mac - ingenic,x1830-mac - ingenic,x2000-mac + - qcom,qcs9100-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - snps,dwmac-3.50a @@ -639,6 +641,7 @@ allOf: - ingenic,x1830-mac - ingenic,x2000-mac - qcom,qcs404-ethqos + - qcom,qcs9100-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos From patchwork Wed Jul 3 03:51:37 2024 Content-Type: text/plain; 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Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml index efde49d1bef8..4de33df6963f 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml @@ -16,7 +16,10 @@ description: properties: compatible: - const: qcom,pcie-sa8775p + items: + - enum: + - qcom,pcie-qcs9100 + - qcom,pcie-sa8775p reg: minItems: 6 From patchwork Wed Jul 3 03:51:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810269 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8AC7179BC; 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It has DMA register space and dma interrupt to support HDMA. Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 46802f7d9482..8012663e7efc 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -13,6 +13,7 @@ properties: compatible: oneOf: - enum: + - qcom,qcs9100-pcie-ep - qcom,sa8775p-pcie-ep - qcom,sdx55-pcie-ep - qcom,sm8450-pcie-ep @@ -203,6 +204,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-pcie-ep - qcom,sa8775p-pcie-ep then: properties: From patchwork Wed Jul 3 03:51:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810267 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 19FB218039; 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Wed, 03 Jul 2024 03:53:36 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4633rYu0031241 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 03:53:34 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 20:53:12 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 32/47] dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY Date: Wed, 3 Jul 2024 11:51:39 +0800 Message-ID: <20240703035154.2182083-3-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035154.2182083-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035154.2182083-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: CczZf1AdsL4QgKNAXR7kek7qYT_HkWqD X-Proofpoint-ORIG-GUID: CczZf1AdsL4QgKNAXR7kek7qYT_HkWqD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 priorityscore=1501 bulkscore=0 phishscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 mlxscore=0 malwarescore=0 clxscore=1015 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030027 Add devicetree YAML binding for Qualcomm QMP PCIe PHY for QCS9100 platform. Signed-off-by: Tengfei Fan --- .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 03dbd02cf9e7..d128ac8cb583 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -16,6 +16,8 @@ description: properties: compatible: enum: + - qcom,qcs9100-qmp-gen4x2-pcie-phy + - qcom,qcs9100-qmp-gen4x4-pcie-phy - qcom,sa8775p-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x4-pcie-phy - qcom,sc8180x-qmp-pcie-phy @@ -181,6 +183,8 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-qmp-gen4x2-pcie-phy + - qcom,qcs9100-qmp-gen4x4-pcie-phy - qcom,sa8775p-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x4-pcie-phy then: From patchwork Wed Jul 3 03:51:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809859 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7631917BCA; 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Signed-off-by: Tengfei Fan --- drivers/interconnect/qcom/sa8775p.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/interconnect/qcom/sa8775p.c b/drivers/interconnect/qcom/sa8775p.c index a729775c2aa4..72eb94a8873d 100644 --- a/drivers/interconnect/qcom/sa8775p.c +++ b/drivers/interconnect/qcom/sa8775p.c @@ -2499,6 +2499,20 @@ static const struct qcom_icc_desc sa8775p_system_noc = { }; static const struct of_device_id qnoc_of_match[] = { + { .compatible = "qcom,qcs9100-aggre1-noc", .data = &sa8775p_aggre1_noc, }, + { .compatible = "qcom,qcs9100-aggre2-noc", .data = &sa8775p_aggre2_noc, }, + { .compatible = "qcom,qcs9100-clk-virt", .data = &sa8775p_clk_virt, }, + { .compatible = "qcom,qcs9100-config-noc", .data = &sa8775p_config_noc, }, + { .compatible = "qcom,qcs9100-dc-noc", .data = &sa8775p_dc_noc, }, + { .compatible = "qcom,qcs9100-gem-noc", .data = &sa8775p_gem_noc, }, + { .compatible = "qcom,qcs9100-gpdsp-anoc", .data = &sa8775p_gpdsp_anoc, }, + { .compatible = "qcom,qcs9100-lpass-ag-noc", .data = &sa8775p_lpass_ag_noc, }, + { .compatible = "qcom,qcs9100-mc-virt", .data = &sa8775p_mc_virt, }, + { .compatible = "qcom,qcs9100-mmss-noc", .data = &sa8775p_mmss_noc, }, + { .compatible = "qcom,qcs9100-nspa-noc", .data = &sa8775p_nspa_noc, }, + { .compatible = "qcom,qcs9100-nspb-noc", .data = &sa8775p_nspb_noc, }, + { .compatible = "qcom,qcs9100-pcie-anoc", .data = &sa8775p_pcie_anoc, }, + { .compatible = "qcom,qcs9100-system-noc", .data = &sa8775p_system_noc, }, { .compatible = "qcom,sa8775p-aggre1-noc", .data = &sa8775p_aggre1_noc, }, { .compatible = "qcom,sa8775p-aggre2-noc", .data = &sa8775p_aggre2_noc, }, { .compatible = "qcom,sa8775p-clk-virt", .data = &sa8775p_clk_virt, }, From patchwork Wed Jul 3 03:51:41 2024 Content-Type: text/plain; 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Signed-off-by: Tengfei Fan --- drivers/clk/qcom/gcc-sa8775p.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/gcc-sa8775p.c b/drivers/clk/qcom/gcc-sa8775p.c index e7425e82c54f..e0f024f6c469 100644 --- a/drivers/clk/qcom/gcc-sa8775p.c +++ b/drivers/clk/qcom/gcc-sa8775p.c @@ -4656,6 +4656,7 @@ static const struct qcom_cc_desc gcc_sa8775p_desc = { }; static const struct of_device_id gcc_sa8775p_match_table[] = { + { .compatible = "qcom,qcs9100-gcc" }, { .compatible = "qcom,sa8775p-gcc" }, { } }; From patchwork Wed Jul 3 03:51:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809856 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7133A482C1; Wed, 3 Jul 2024 03:56:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Signed-off-by: Tengfei Fan --- drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c index a57e8a4657f4..cb72843218cc 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c @@ -2010,6 +2010,9 @@ static const struct of_device_id qmp_ufs_of_match_table[] = { }, { .compatible = "qcom,msm8998-qmp-ufs-phy", .data = &sdm845_ufsphy_cfg, + }, { + .compatible = "qcom,qcs9100-qmp-ufs-phy", + .data = &sa8775p_ufsphy_cfg, }, { .compatible = "qcom,sa8775p-qmp-ufs-phy", .data = &sa8775p_ufsphy_cfg, From patchwork Wed Jul 3 03:51:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809857 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E7622E639; 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Signed-off-by: Tengfei Fan --- drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c index 9b0eb87b1680..4ebfac113d86 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c @@ -2246,6 +2246,9 @@ static const struct of_device_id qmp_usb_of_match_table[] = { }, { .compatible = "qcom,msm8996-qmp-usb3-phy", .data = &msm8996_usb3phy_cfg, + }, { + .compatible = "qcom,qcs9100-qmp-usb3-uni-phy", + .data = &sa8775p_usb3_uniphy_cfg, }, { .compatible = "qcom,qdu1000-qmp-usb3-uni-phy", .data = &qdu1000_usb3_uniphy_cfg, From patchwork Wed Jul 3 03:51:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810266 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 340981863F; 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Wed, 03 Jul 2024 03:55:11 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4633tA6n001655 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 03:55:10 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 20:54:48 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 37/47] clk: qcom: add the GPUCC driver support for QCS9100 Date: Wed, 3 Jul 2024 11:51:44 +0800 Message-ID: <20240703035154.2182083-8-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035154.2182083-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035154.2182083-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: w9o7G1XBGLcWkBIAyGQmS-13N7ju4NTK X-Proofpoint-ORIG-GUID: w9o7G1XBGLcWkBIAyGQmS-13N7ju4NTK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=999 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 suspectscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030027 Add the clock driver support for the Qualcomm Graphics Clock control module. Signed-off-by: Tengfei Fan --- drivers/clk/qcom/gpucc-sa8775p.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/gpucc-sa8775p.c b/drivers/clk/qcom/gpucc-sa8775p.c index f8a8ac343d70..89ca1289cd74 100644 --- a/drivers/clk/qcom/gpucc-sa8775p.c +++ b/drivers/clk/qcom/gpucc-sa8775p.c @@ -584,6 +584,7 @@ static const struct qcom_cc_desc gpu_cc_sa8775p_desc = { static const struct of_device_id gpu_cc_sa8775p_match_table[] = { { .compatible = "qcom,sa8775p-gpucc" }, + { .compatible = "qcom,qcs9100-gpucc" }, { } }; MODULE_DEVICE_TABLE(of, gpu_cc_sa8775p_match_table); From patchwork Wed Jul 3 03:51:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810264 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8060A134410; 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Signed-off-by: Tengfei Fan --- drivers/phy/qualcomm/phy-qcom-sgmii-eth.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c b/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c index 5b1c82459c12..0ea7140564a9 100644 --- a/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c +++ b/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c @@ -353,6 +353,7 @@ static int qcom_dwmac_sgmii_phy_probe(struct platform_device *pdev) } static const struct of_device_id qcom_dwmac_sgmii_phy_of_match[] = { + { .compatible = "qcom,qcs9100-dwmac-sgmii-phy" }, { .compatible = "qcom,sa8775p-dwmac-sgmii-phy" }, { }, }; From patchwork Wed Jul 3 03:51:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809854 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A0691BC2A; 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Wed, 03 Jul 2024 03:55:49 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4633tlUo020289 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 03:55:47 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 20:55:26 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 39/47] soc: qcom: llcc: Add llcc configuration support for the QCS9100 platform Date: Wed, 3 Jul 2024 11:51:46 +0800 Message-ID: <20240703035154.2182083-10-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035154.2182083-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035154.2182083-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: JWJw3wKRNxpGuarutBJsTtEnT1gajV7p X-Proofpoint-ORIG-GUID: JWJw3wKRNxpGuarutBJsTtEnT1gajV7p X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 adultscore=0 mlxscore=0 clxscore=1015 malwarescore=0 bulkscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030027 Add llcc configuration support for the QCS9100 platform. Signed-off-by: Tengfei Fan --- drivers/soc/qcom/llcc-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 110b1f89aa59..5a0840df4ba8 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1379,6 +1379,7 @@ static int qcom_llcc_probe(struct platform_device *pdev) } static const struct of_device_id qcom_llcc_of_match[] = { + { .compatible = "qcom,qcs9100-llcc", .data = &sa8775p_cfgs }, { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs }, { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs }, From patchwork Wed Jul 3 03:51:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 810265 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 532EEBA2D; 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Signed-off-by: Tengfei Fan --- drivers/pinctrl/qcom/pinctrl-sa8775p.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-sa8775p.c b/drivers/pinctrl/qcom/pinctrl-sa8775p.c index 5459c0c681a2..4687e11dfe75 100644 --- a/drivers/pinctrl/qcom/pinctrl-sa8775p.c +++ b/drivers/pinctrl/qcom/pinctrl-sa8775p.c @@ -1519,6 +1519,7 @@ static int sa8775p_pinctrl_probe(struct platform_device *pdev) } static const struct of_device_id sa8775p_pinctrl_of_match[] = { + { .compatible = "qcom,qcs9100-tlmm", }, { .compatible = "qcom,sa8775p-tlmm", }, { }, }; From patchwork Wed Jul 3 03:51:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 809855 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90A70179BC; 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Wed, 03 Jul 2024 03:56:28 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4633uRFa012180 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 03:56:27 GMT Received: from tengfan-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 20:56:04 -0700 From: Tengfei Fan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH 41/47] clk: qcom: rpmh: Add support for QCS9100 rpmh clocks Date: Wed, 3 Jul 2024 11:51:48 +0800 Message-ID: <20240703035154.2182083-12-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240703035154.2182083-1-quic_tengfan@quicinc.com> References: <20240703025850.2172008-1-quic_tengfan@quicinc.com> <20240703035154.2182083-1-quic_tengfan@quicinc.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: pqSOMNMhPw0wqh6ImDsDUgq0vhUw9eWK X-Proofpoint-ORIG-GUID: pqSOMNMhPw0wqh6ImDsDUgq0vhUw9eWK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_18,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 bulkscore=0 spamscore=0 mlxscore=0 clxscore=1015 phishscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030027 Adds the RPMH clocks present in QCS9100 SoC. Signed-off-by: Tengfei Fan --- drivers/clk/qcom/clk-rpmh.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index bb82abeed88f..8131afba85d6 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -876,6 +876,7 @@ static int clk_rpmh_probe(struct platform_device *pdev) } static const struct of_device_id clk_rpmh_match_table[] = { + { .compatible = "qcom,qcs9100-rpmh-clk", .data = &clk_rpmh_sa8775p}, { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000}, { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180},