From patchwork Mon Oct 28 12:42:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177911 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339051ill; Mon, 28 Oct 2019 05:43:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqzp3udYLqBay8Buyc1sUxcmA4qaFsgcxn9FMQDtTwcHSIBzGj+6CC6xcRWPUERXBxvgxKZA X-Received: by 2002:a17:906:448e:: with SMTP id y14mr16763315ejo.136.1572266583556; Mon, 28 Oct 2019 05:43:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266583; cv=none; d=google.com; s=arc-20160816; b=bSSZvIRQjr8inFkdnz1Dbkp2DAcQgx1Qr0yiiXaU+KDgn2dhSqJq0IkxizqRRtXTcQ 3XsHdFUY+PsH6/nu9YfODp+tNtZynJypqz0ekj+POYd6V0ivPFK7pFJ61eTnAlyeZi3u xM3CbV2m1YHrsgQzWE9bF1DphuTh8fwZziZR5QZB6MnSitmQnNcLNHDnyMUBuEYaI+DS KiRGHzU4+ztQTRDiZATDndie32e20czCRY9lQlIvWFgGcy6e42ANEHukve/aMzu6WtWF LuwGLx+yzEk8Zd8ANCdrZehp8+dDxrwidc6yXOWLOeVnlxCdib5UdjO+AzvpNGJ3Y8kC hBSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Yz1BgUME6cvxTTqAS0w5bXD+zTBDG2uq+6hnZdt0R4M=; b=mr8YZ4N+s1qMXtGLgmlALDb1nC/7ck8S47lknQnxv7F7VtaI+Z+0GdVDGBwKaxkThG uw2S+4ana1tHV7uY8mDf6EGNBtubbci8Hg24rP0ot3sfGIc2DMopQQsyGNziNIutfynt 8ypIGvlxqkwNXvRwi6HxOQkg8flYzvRwpZ4TMpOzp2AQ82AxCXKmc8KJ/keF9/XlDq6l CZo0gBDs0VwRNCfUkPPZfrTMFbG8llrKN6j30ZSoKuiKMWyye6I2Eo1HbzesJ+3hpOXE nPtCHXtSkVoc7dh6Ao0MUjDIwkl2s47U9BR+hZF+4qOvICaOT7ar/haodF3Gohjjj7XG diiQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=GtxJLjhi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h48si7324375ede.31.2019.10.28.05.43.03; Mon, 28 Oct 2019 05:43:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=GtxJLjhi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389256AbfJ1MnA (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:00 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:54456 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389229AbfJ1Mm6 (ORCPT ); Mon, 28 Oct 2019 08:42:58 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgvPc067052; Mon, 28 Oct 2019 07:42:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266577; bh=Yz1BgUME6cvxTTqAS0w5bXD+zTBDG2uq+6hnZdt0R4M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GtxJLjhiK7D+ofcX6HEQPIEpw7ocMXBawr+nOqYTSlOj0eznVkTpT7LA6C4n+nem6 I+SyG2koZkG8z9f00pt8l4xrE7ebsv5mRvUtczNYPYMNG8RUYB3WNUDhGBOapklzZ1 mk0zeylUs82ISrfuWsZ/wStpvxo7uw+NujPjLBIY= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SCgvue074467 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:42:57 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:42:45 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:42:45 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgogs063574; Mon, 28 Oct 2019 07:42:55 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 02/17] remoteproc/omap: Switch to SPDX license identifiers Date: Mon, 28 Oct 2019 14:42:23 +0200 Message-ID: <20191028124238.19224-3-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna Use the appropriate SPDX license identifiers in various OMAP remoteproc source files and drop the previous boilerplate license text. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.h | 27 +-------------------------- 1 file changed, 1 insertion(+), 26 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.h b/drivers/remoteproc/omap_remoteproc.h index f6d2036d383d..1e6fef753c4f 100644 --- a/drivers/remoteproc/omap_remoteproc.h +++ b/drivers/remoteproc/omap_remoteproc.h @@ -1,35 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ /* * Remote processor messaging * * Copyright (C) 2011 Texas Instruments, Inc. * Copyright (C) 2011 Google, Inc. * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name Texas Instruments nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _OMAP_RPMSG_H From patchwork Mon Oct 28 12:42:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177913 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339160ill; Mon, 28 Oct 2019 05:43:09 -0700 (PDT) X-Google-Smtp-Source: APXvYqxp6LJNKH/IexBxGE3bwy2BQGVAEp4iYT/oG6UPTRjPIUoyDjX0ZL6e0wA66LpULqzZksTu X-Received: by 2002:a17:906:a3d4:: with SMTP id ca20mr16519279ejb.212.1572266588932; Mon, 28 Oct 2019 05:43:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266588; cv=none; d=google.com; s=arc-20160816; b=x9RNOGOaNkF7Q0Cuymaf8R2LIRaOFs0qqpRR8/GMJtaYjBKFqEUNwQurHyJFVCqesa vyslj9tliaC6S6xZa96PeaIgOj5AffTRg/3UdliIL9F9j9auXIwr4xRlHjb7MF8wbLOf b4UIWp5qdq67Kt3YBKIOus+5lIiIXQ17tOBOxKI7Ek1HDeikdRoO3upqUf9ka3hPMdpf suhgBddjcznCLv+sKK5870c+XzHxd4CbyYYFN3VCLIpgcqOsmvynj6yWgBQVmF3Q05K0 YuWXrJn2jnzVxSONxUIhzOO08nCk6R6Ks1l+k3GIo/I4vxnAqmdGdQlMfw5B8e/5/l0p SD0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=ELlXTMe6zCSoapNhxhIUf5j2RgroU8X7YRwSmGhTVvs=; b=zR9o2co8vyXUN8lHuuaoqTZ648u/biyS4Njvdjge0jMKBA2UCTLK4p9KHWkQtuEKP5 kdvAum8UcFT9z37NUcs0F8y2pw5zbjest/EHuQlJPCaZy7sHrQaB1PzpgGTKD8hnj8+D bAk6miz81/Mr1uI3V1l8Pb4kyDNPY0KDCE2lS5gz8+3joXTSswCtSm2YLvO5jclOzbRv 2ZspNz3BO4WefGZwRDq7GWau8m2IByStwRjRUf3VwBEDuPxbDWK0bFk9NnJSPSmDxKkZ eGuGs6xP2LxQFrv2euAu6Q3Fikl6p/BzWyP8SAya4JilR9633C7AVtEfFDknt5fks4I1 MVCw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=rAJlk+Pb; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a7si6238715ejj.288.2019.10.28.05.43.08; Mon, 28 Oct 2019 05:43:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=rAJlk+Pb; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389293AbfJ1MnG (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:06 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37238 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389270AbfJ1MnE (ORCPT ); Mon, 28 Oct 2019 08:43:04 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SCh3Ox033808; Mon, 28 Oct 2019 07:43:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266583; bh=ELlXTMe6zCSoapNhxhIUf5j2RgroU8X7YRwSmGhTVvs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rAJlk+PbPIC+lU7oX5RPPKD+Tc3MEelTCCqza4UnlYLbLjaAQkM57WJ2FEkEtC45B uHzhVy0/hDhVBPmRe41nyhz0Fj6uqxxiJzN1ZgxJ/qJQcHcOzcyaVwsK078Bz2h1ua jPPquWD0HB4n6p+JE0zD9iAh+aDG/YEqLqWQAhzI= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SCh2lY039563 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:02 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:42:50 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:43:01 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgogu063574; Mon, 28 Oct 2019 07:43:00 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 04/17] remoteproc/omap: Add a sanity check for DSP boot address alignment Date: Mon, 28 Oct 2019 14:42:25 +0200 Message-ID: <20191028124238.19224-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The DSP remote processors on OMAP SoCs require a boot register to be programmed with a boot address, and this boot address needs to be on a 1KB boundary. The current code is simply masking the boot address appropriately without performing any sanity checks before releasing the resets. An unaligned boot address results in an undefined execution behavior and can result in various bus errors like MMU Faults or L3 NoC errors. Such errors are hard to debug and can be easily avoided by adding a sanity check for the alignment before booting a DSP remote processor. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index cd776189d20b..a10377547533 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -124,13 +124,22 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) * * Set boot address for a supported DSP remote processor. */ -static void omap_rproc_write_dsp_boot_addr(struct rproc *rproc) +static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) { + struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_boot_data *bdata = oproc->boot_data; u32 offset = bdata->boot_reg; + if (rproc->bootaddr & (SZ_1K - 1)) { + dev_err(dev, "invalid boot address 0x%x, must be aligned on a 1KB boundary\n", + rproc->bootaddr); + return -EINVAL; + } + regmap_write(bdata->syscon, offset, rproc->bootaddr); + + return 0; } /* @@ -147,8 +156,11 @@ static int omap_rproc_start(struct rproc *rproc) int ret; struct mbox_client *client = &oproc->client; - if (oproc->boot_data) - omap_rproc_write_dsp_boot_addr(rproc); + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) + return ret; + } client->dev = dev; client->tx_done = NULL; From patchwork Mon Oct 28 12:42:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177914 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339164ill; Mon, 28 Oct 2019 05:43:09 -0700 (PDT) X-Google-Smtp-Source: APXvYqxY2HUkRRV61sT5T27C3DIpAZhBDj+hO+AvtCc/+2jY/zZq/fVL6G42mCax8JUtT/Zm8H6E X-Received: by 2002:a50:f306:: with SMTP id p6mr7268732edm.284.1572266589343; Mon, 28 Oct 2019 05:43:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266589; cv=none; d=google.com; s=arc-20160816; b=JRQd/xojcQZnH+Q7QdyC/4vSPAZIxvZ83F1vBNiQ/gC0lNXFQFCFnE1/xT3YXKrN2P dD3ONxrXeaOu58vpJw2VU0dya+H57bQ6+3xSby09CDUqQjW/nNyTA1o6qec0bb0L5bJR Wlt7dWCTBDLTCKW35zIuVhUOJ7LCuJq8sLsVHDNGtDic/Ej+//JVrqD6uFWuvxdI+5NZ u37AVDZ6zRGS//g9Eq9rofuioRNP1e3aMYFBGE+ceftwJMZo6S7AhH2yiL5sysB6JXP9 YATFAxN5hIYiSCmp7zQeasH1u/lzW4U+spUyxtW64Fpxuq9yn7HeXuBFPjQs7JZ+xg5r 3NcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=kORRencE9DM8NfTqtaMIohHglGjh+p4ato3bv8Q2oMs=; b=h1S4v7ZiCDVwxm5gwSBmMTQRKvFV1FQq6w7II8ntpPK/0kq6HhugHf9u9zUlspRnL0 Uta7Y4ERvPUxGq46B3DD1YY+OSM2WF+4UqEyK7tJ5kf+1RjXd0MHDj9ogx7BEChKcNBC dyM+DfP+iY7FgUQap6fsLH+vhr6nDF5H51O58X/9xERBrQGOzCm4RlThpKzHrvasiCo8 eu3GBqELFAisJD88djrTkGHTrO9T2e4pKfBhN3ZLU6etpOngfon6duHD9uEj79oNuPya ngUBxxqPWhcqvuD6I0H1ylFwwd2GgyX9kvn7Gu7QFSgGvYn5nu8RyavCbkzZEEyOISer 8y7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VO5zVgxL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a7si6238715ejj.288.2019.10.28.05.43.09; Mon, 28 Oct 2019 05:43:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VO5zVgxL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389304AbfJ1MnI (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:08 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:48222 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389230AbfJ1MnF (ORCPT ); Mon, 28 Oct 2019 08:43:05 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SCh4hR016610; Mon, 28 Oct 2019 07:43:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266584; bh=kORRencE9DM8NfTqtaMIohHglGjh+p4ato3bv8Q2oMs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VO5zVgxLXHGx0Ya0ikqnXBdW+tGudvi4TvHFdzX2tKzVNXD5WBYcDWrKEbz4z4fz6 rbT37xBFAk0iQuMiPYP6xiA0ZXYD7QFf9QoWoqdK7u8kWfOVFh4eZRkBiQCc3Cg4y3 2DUny/oywJ4PNWpLlT2H7xjFBtVBO4wVmB9Cf1PE= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SCh4lR074933 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:04 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:42:52 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:42:51 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgogv063574; Mon, 28 Oct 2019 07:43:02 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 05/17] remoteproc/omap: Add support to parse internal memories from DT Date: Mon, 28 Oct 2019 14:42:26 +0200 Message-ID: <20191028124238.19224-6-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The OMAP remoteproc driver has been enhanced to parse and store the kernel mappings for different internal RAM memories that may be present within each remote processor IP subsystem. Different devices have varying memories present on current SoCs. The current support handles the L2RAM for all IPU devices on OMAP4+ SoCs. The DSPs on OMAP4/OMAP5 only have Unicaches and do not have any L1 or L2 RAM memories. IPUs are expected to have the L2RAM at a fixed device address of 0x20000000, based on the current limitations on Attribute MMU configurations. NOTE: The current logic doesn't handle the parsing of memories for DRA7 remoteproc devices, and will be added alongside the DRA7 support. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 69 ++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index a10377547533..bbd6ff360e10 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -29,6 +29,8 @@ #include "omap_remoteproc.h" #include "remoteproc_internal.h" +#define OMAP_RPROC_IPU_L2RAM_DEV_ADDR (0x20000000) + /** * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs * @syscon: regmap handle for the system control configuration module @@ -39,11 +41,27 @@ struct omap_rproc_boot_data { unsigned int boot_reg; }; +/* + * struct omap_rproc_mem - internal memory structure + * @cpu_addr: MPU virtual address of the memory region + * @bus_addr: bus address used to access the memory region + * @dev_addr: device address of the memory region from DSP view + * @size: size of the memory region + */ +struct omap_rproc_mem { + void __iomem *cpu_addr; + phys_addr_t bus_addr; + u32 dev_addr; + size_t size; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle * @client: mailbox client to request the mailbox channel * @boot_data: boot data structure for setting processor boot address + * @mem: internal memory regions data + * @num_mems: number of internal memory regions * @rproc: rproc handle * @reset: reset handle */ @@ -51,6 +69,8 @@ struct omap_rproc { struct mbox_chan *mbox; struct mbox_client client; struct omap_rproc_boot_data *boot_data; + struct omap_rproc_mem *mem; + int num_mems; struct rproc *rproc; struct reset_control *reset; }; @@ -307,6 +327,51 @@ static int omap_rproc_get_boot_data(struct platform_device *pdev, return 0; } +static int omap_rproc_of_get_internal_memories(struct platform_device *pdev, + struct rproc *rproc) +{ + static const char * const mem_names[] = {"l2ram"}; + struct device_node *np = pdev->dev.of_node; + struct omap_rproc *oproc = rproc->priv; + struct device *dev = &pdev->dev; + struct resource *res; + int num_mems; + int i; + + /* OMAP4 and OMAP5 DSPs do not have support for flat SRAM */ + if (of_device_is_compatible(np, "ti,omap4-dsp") || + of_device_is_compatible(np, "ti,omap5-dsp")) + return 0; + + num_mems = ARRAY_SIZE(mem_names); + oproc->mem = devm_kcalloc(dev, num_mems, sizeof(*oproc->mem), + GFP_KERNEL); + if (!oproc->mem) + return -ENOMEM; + + for (i = 0; i < num_mems; i++) { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + mem_names[i]); + oproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res); + if (IS_ERR(oproc->mem[i].cpu_addr)) { + dev_err(dev, "failed to parse and map %s memory\n", + mem_names[i]); + return PTR_ERR(oproc->mem[i].cpu_addr); + } + oproc->mem[i].bus_addr = res->start; + oproc->mem[i].dev_addr = OMAP_RPROC_IPU_L2RAM_DEV_ADDR; + oproc->mem[i].size = resource_size(res); + + dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n", + mem_names[i], &oproc->mem[i].bus_addr, + oproc->mem[i].size, oproc->mem[i].cpu_addr, + oproc->mem[i].dev_addr); + } + oproc->num_mems = num_mems; + + return 0; +} + static int omap_rproc_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -346,6 +411,10 @@ static int omap_rproc_probe(struct platform_device *pdev) /* All existing OMAP IPU and DSP processors have an MMU */ rproc->has_iommu = true; + ret = omap_rproc_of_get_internal_memories(pdev, rproc); + if (ret) + goto free_rproc; + ret = omap_rproc_get_boot_data(pdev, rproc); if (ret) goto free_rproc; From patchwork Mon Oct 28 12:42:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177915 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339283ill; Mon, 28 Oct 2019 05:43:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqzD5iw+ruhPPIfbiCHJZNKPyGMXam1+pjv6FUvLrjcs6eFXbW6WrCZXsl+nuCTLu49gWJJd X-Received: by 2002:a17:906:4ec9:: with SMTP id i9mr9457071ejv.8.1572266595728; Mon, 28 Oct 2019 05:43:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266595; cv=none; d=google.com; s=arc-20160816; b=RcEb4Wbsm9giRWZbzHiY3ynDjWS9RWo+hqRi3mZw5Fd4PHE7uc9qHHV+ZqwVXJjziJ dIrEqHIGHnGOX7JUc5V4021SuYiAUWutIhZ08/ZL2I9WQuPMowxbrqvqvS3hrWExj0Bi XYkYxy+HyPCbg1NDeieJK/vl6PzJb79GFW/cvBUwM+E6LTRfmWd22qrGRgBdEX/5RZ7s dr+XGrpOth08eGvtihnS1YaUuTUC3l8zSpgtPFTm+fUM3xtbhaHsJIdTulwwFz3H//6+ I2RDjJ2SFxRdZff+I0S4RjQMwsp5wrbTW1txdcPObzNbW/UlXydwTYxLTPhTil55Au8F Kasw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id ce3si625614edb.441.2019.10.28.05.43.15; Mon, 28 Oct 2019 05:43:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=IW5MCy8i; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389324AbfJ1MnL (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:11 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:48230 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389297AbfJ1MnH (ORCPT ); Mon, 28 Oct 2019 08:43:07 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SCh6f9016615; Mon, 28 Oct 2019 07:43:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266586; bh=AaLjhHOmwp62B5A7lWLn5awjIayOT2x0x5f3vvXKOSk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=IW5MCy8i+ch4qe72edpVfUyr89IJxU9RlF3nW1C4ICYDwYLnMBZ3WZvVnd4Gxd5LQ NS3rmlHoO1qLGgZEoR0vz00a7lBRrS5WX4iina7zl+1eYINJejUupKvx7z/ZDRYr7q jmEgIB6V6ZpAG4ukeyrOKq8ycZJPyJ1lx9S5eHMs= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCh6Jh072841; Mon, 28 Oct 2019 07:43:06 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:42:54 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:42:54 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgogw063574; Mon, 28 Oct 2019 07:43:04 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 06/17] remoteproc/omap: Add the rproc ops .da_to_va() implementation Date: Mon, 28 Oct 2019 14:42:27 +0200 Message-ID: <20191028124238.19224-7-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna An implementation for the rproc ops .da_to_va() has been added that provides the address translation between device addresses to kernel virtual addresses for internal RAMs present on that particular remote processor device. The implementation provides the translations based on the addresses parsed and stored during the probe. This ops gets invoked by the exported rproc_da_to_va() function and allows the remoteproc core's ELF loader to be able to load program data directly into the internal memories. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 35 ++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index bbd6ff360e10..0524f7e0ffa4 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -230,10 +230,45 @@ static int omap_rproc_stop(struct rproc *rproc) return 0; } +/* + * Internal Memory translation helper + * + * Custom function implementing the rproc .da_to_va ops to provide address + * translation (device address to kernel virtual address) for internal RAMs + * present in a DSP or IPU device). The translated addresses can be used + * either by the remoteproc core for loading, or by any rpmsg bus drivers. + */ +static void *omap_rproc_da_to_va(struct rproc *rproc, u64 da, int len) +{ + struct omap_rproc *oproc = rproc->priv; + void *va = NULL; + int i; + u32 offset; + + if (len <= 0) + return NULL; + + if (!oproc->num_mems) + return NULL; + + for (i = 0; i < oproc->num_mems; i++) { + if (da >= oproc->mem[i].dev_addr && da + len <= + oproc->mem[i].dev_addr + oproc->mem[i].size) { + offset = da - oproc->mem[i].dev_addr; + /* __force to make sparse happy with type conversion */ + va = (__force void *)(oproc->mem[i].cpu_addr + offset); + break; + } + } + + return va; +} + static const struct rproc_ops omap_rproc_ops = { .start = omap_rproc_start, .stop = omap_rproc_stop, .kick = omap_rproc_kick, + .da_to_va = omap_rproc_da_to_va, }; static const struct omap_rproc_dev_data omap4_dsp_dev_data = { From patchwork Mon Oct 28 12:42:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177926 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3340351ill; Mon, 28 Oct 2019 05:44:17 -0700 (PDT) X-Google-Smtp-Source: APXvYqy8wHlREmIFvAorFUemuSdkS1IgzCzwBpGb+JcJ91aM9wh89bH8xngpVamxL+Sbzwli8HxE X-Received: by 2002:a50:8871:: with SMTP id c46mr19458540edc.24.1572266657311; Mon, 28 Oct 2019 05:44:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266657; cv=none; d=google.com; s=arc-20160816; b=oDayMVCmoI5Lp1OZOu90eQWcOv/CqV9X1dQliB84vY8j02CFoV+1ONQSefy/WgvZ9b FxVYXgWlWzvKzbFVUntJLFrHbf5wh8mNMVc40295HjV4OM0qYKdoAqbbePJ3WLVGZf/D 0NnC57ncs2fyVCtl38qSAWSamf47QuqHdTMdCYF62Zvt9K7P8MY1pnjoXgxx2HgScC3X iX7kCTxpUTQ6JVvaxaXFY/NlDnAfW8hbImPFf1eHtD98RCsigZklrXM4QRREaThW7EnO AYirSWJB6arsZjGwHqEB9PUJvKd+0hfAKOZt0eK/tZsEDBr++t4Opq3JVfv9KH6pApz6 oB+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=h71AZDQ2bHAHRihIGL9SD3KVSssjV5YZ19fAlli3XOs=; b=y5iS8+GJjSW5HivbCECvFHYaUPEzhvjstjuXo1mKhfekpUscBb0ff8ATgnwwoanhaz QXpvt1j4Rspua01sZPYzouYB7t9fFtHYGFDqBhzGDf6FabzKs9W+oYh6LqUfGEMSwTB0 WvubOIe6Rt4TUJ4sZritnCLYJTzWbWAENy2kl8kXP0SBSXZHBtVF8+ZCpFRPTqekfW0V KMgoN9kd7c2ntkQQhuEth/Waaw2ZS0EUX4BDTNrsQvqjWeBr1SWPc+83wFYI2xBudMyQ fKxANXfOCNhCB/ZsQNnYjOt8vnUo2mf921B4+E6E7hEe7uSkmW39+5QxQtXFanONnukX M8zg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ei0EBSiT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f7si4013312ejt.373.2019.10.28.05.44.17; Mon, 28 Oct 2019 05:44:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ei0EBSiT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389337AbfJ1MnN (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:13 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37258 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389230AbfJ1MnJ (ORCPT ); Mon, 28 Oct 2019 08:43:09 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SCh86d033895; Mon, 28 Oct 2019 07:43:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266588; bh=h71AZDQ2bHAHRihIGL9SD3KVSssjV5YZ19fAlli3XOs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ei0EBSiT52wY+TapJMoEsXSDbp7VsLw0WTyT/bXbw51s6voWITkVoPBvWivAsyVSY WBvNPR0REgYrORPe8qgt9eAierD+tv2PpYp8pAiKmKVZ30mWkjxez32WSKB8Q73pvP X6IxjNbHBeJSnE9tLF3GZ1mFWMQbhjBNzdaTWbXE= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SCh87g075163 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:08 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:42:56 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:43:08 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgogx063574; Mon, 28 Oct 2019 07:43:06 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 07/17] remoteproc/omap: Initialize and assign reserved memory node Date: Mon, 28 Oct 2019 14:42:28 +0200 Message-ID: <20191028124238.19224-8-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The reserved memory nodes are not assigned to platform devices by default in the driver core to avoid the lookup for every platform device and incur a penalty as the real users are expected to be only a few devices. OMAP remoteproc devices fall into the above category and the OMAP remoteproc driver _requires_ specific CMA pools to be assigned for each device at the moment to align on the location of the vrings and vring buffers in the RTOS-side firmware images. So, use the of_reserved_mem_device_init/release() API appropriately to assign the corresponding reserved memory region to the OMAP remoteproc device. Note that only one region per device is allowed by the framework. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki Reviewed-by: Bjorn Andersson diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 0524f7e0ffa4..0b80570effee 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -454,14 +455,22 @@ static int omap_rproc_probe(struct platform_device *pdev) if (ret) goto free_rproc; + ret = of_reserved_mem_device_init(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "device does not have specific CMA pool\n"); + goto free_rproc; + } + platform_set_drvdata(pdev, rproc); ret = rproc_add(rproc); if (ret) - goto free_rproc; + goto release_mem; return 0; +release_mem: + of_reserved_mem_device_release(&pdev->dev); free_rproc: rproc_free(rproc); return ret; @@ -473,6 +482,7 @@ static int omap_rproc_remove(struct platform_device *pdev) rproc_del(rproc); rproc_free(rproc); + of_reserved_mem_device_release(&pdev->dev); return 0; } From patchwork Mon Oct 28 12:42:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177925 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3340315ill; Mon, 28 Oct 2019 05:44:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqzgVmySynou8VUtzUqrtjbDqKJUHpGNSnmi925mVURvXZR6KQOfBYJjiCQaHdWW/mVTETmy X-Received: by 2002:a17:906:5ac5:: with SMTP id x5mr14439892ejs.257.1572266655476; Mon, 28 Oct 2019 05:44:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266655; cv=none; d=google.com; s=arc-20160816; b=KgKShT0+joeZPmXStsU+ijVEtgpS7D1wVBDJIQ0Xm/esmCkzb7Gh1PL72jHoneIqW8 G0c+e3HmSzyDrf6p9USukoXFcMXVsRF02+yBcwG7YwN8rn6abiHcX+qEYf3AZxoglepC VNBy4RxXrrL16p0REHrqilLSrXnXmnhb1UEI/3P5qpihi/wtU+tziD3kAXR46uJa118E vmb2qXXmmAjIA3Nh65eWrVvX6fHmyv+ysh2GCyrGLTrsEsP1BeRt6WZzfgnbC2A41bIb O4N0LG8WAr43xNQ2cY/ZIvoPJrTqJr965rZCkaLsTq5+edkyXUkx0fAG3Wf7+hYpitm9 vKvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=x/1ShyHw3DHIb91zMf5BuVBlWyo7PisYhvGSZymjxI8=; b=WQH4V7yoS3klGj4cCtdo4bZFzq4Q6PTZG8SW+stfmA53JEPPZrVV5Xmeo1ldZ3s7UZ ApgCPQxQd+dPSGXHSrGqXmxn81fLNA9lqx+TOYXzs5OAayIRJH8MG/IVqDRh9KlAk97c ANg71M+rOUMGA8ZeyOY+KNQHVbtZwc7SCupMuJjxoA7zqj64Y9cDKMkbYEIa61ez1KPS qiDnl3pXRoa1QipTW/9MqvhsuIpx90rKo+r1MFaDWAY3Qf9g8DqjcPaQhAxDdYZQnGxG HXP3Q7hZ3X8jiJQKbHnirsoTQpA/RdE2RQyZemk5OsOt88yIM6dp8lm0HEnNjRflJ9CM oiCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ONDhbt7X; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n26si6249791ejy.153.2019.10.28.05.44.15; Mon, 28 Oct 2019 05:44:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ONDhbt7X; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389351AbfJ1MnP (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:15 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37268 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389320AbfJ1MnM (ORCPT ); Mon, 28 Oct 2019 08:43:12 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SChADk033937; Mon, 28 Oct 2019 07:43:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266590; bh=x/1ShyHw3DHIb91zMf5BuVBlWyo7PisYhvGSZymjxI8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ONDhbt7XTx98Ac7dGPshObPYP14+jRzrfTJoTtDs+qDe5HUdWL9wMvt6iAknmiX4u wNXBs/mtgHa64WgDzM+lP/MqrInVelZqo7SSFO12y0SAPi3v8wVZcmRU3ROVNPtocN f5Pj/J+foA0H+oWkGCW7n+JaNcPI5Zb07gVJ5m6I= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SChAe4075265 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:10 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:43:10 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:42:58 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgoh0063574; Mon, 28 Oct 2019 07:43:08 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 08/17] remoteproc/omap: Add support for DRA7xx remote processors Date: Mon, 28 Oct 2019 14:42:29 +0200 Message-ID: <20191028124238.19224-9-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna DRA7xx/AM57xx SoCs have two IPU and up to two DSP processor subsystems for offloading different computation algorithms. The IPU processor subsystem contains dual-core ARM Cortex-M4 processors, and is very similar to those on OMAP5. The DSP processor subsystem is based on the TI's standard TMS320C66x DSP CorePac core. Support has been added to the OMAP remoteproc driver through new DRA7xx specific compatibles for properly probing and booting the all the different processor subsystem instances on DRA7xx/AM57xx SoCs - IPU1, IPU2, DSP1 & DSP2. A build dependency with SOC_DRA7XX is added to enable the driver to be built in DRA7xx-only configuration. The DSP boot address programming needed enhancement for DRA7xx as the boot register fields are different on DRA7 compared to OMAP4 and OMAP5 SoCs. The register on DRA7xx contains additional fields within the register and the boot address bit-field is right-shifted by 10 bits. The internal memory parsing logic has also been updated to compute the device addresses for the L2 RAM for DSP devices using relative addressing logic, and to parse two additional RAMs at L1 level - L1P and L1D. This allows the remoteproc driver to support loading into these regions for a small subset of firmware images requiring as such. The most common usage would be to use the L1 programmable RAMs as L1 Caches. The firmware lookup logic also has to be adjusted for DRA7xx as there are (can be) more than one instance of both the IPU and DSP remote processors for the first time in OMAP4+ SoCs. The names for the firmware images are fixed for each processor and are expected to be as follows: IPU1: dra7-ipu1-fw.xem4 IPU2: dra7-ipu2-fw.xem4 DSP1: dra7-dsp1-fw.xe66 DSP2: dra7-dsp2-fw.xe66 Signed-off-by: Suman Anna [t-kristo@ti.com: fixed l4_offset calculation logic] Signed-off-by: Tero Kristo --- drivers/remoteproc/Kconfig | 2 +- drivers/remoteproc/omap_remoteproc.c | 103 ++++++++++++++++++++++++--- 2 files changed, 96 insertions(+), 9 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 94afdde4bc9f..d6450d7fcf92 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -25,7 +25,7 @@ config IMX_REMOTEPROC config OMAP_REMOTEPROC tristate "OMAP remoteproc support" - depends on ARCH_OMAP4 || SOC_OMAP5 + depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX depends on OMAP_IOMMU select MAILBOX select OMAP2PLUS_MBOX diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 0b80570effee..e46bb4c790d7 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -30,16 +31,20 @@ #include "omap_remoteproc.h" #include "remoteproc_internal.h" +#define OMAP_RPROC_DSP_LOCAL_MEM_OFFSET (0x00800000) #define OMAP_RPROC_IPU_L2RAM_DEV_ADDR (0x20000000) /** * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs * @syscon: regmap handle for the system control configuration module * @boot_reg: boot register offset within the @syscon regmap + * @boot_reg_shift: bit-field shift required for the boot address value in + * @boot_reg */ struct omap_rproc_boot_data { struct regmap *syscon; unsigned int boot_reg; + unsigned int boot_reg_shift; }; /* @@ -151,14 +156,19 @@ static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) struct omap_rproc *oproc = rproc->priv; struct omap_rproc_boot_data *bdata = oproc->boot_data; u32 offset = bdata->boot_reg; + unsigned int value = rproc->bootaddr; + unsigned int mask = ~(SZ_1K - 1); - if (rproc->bootaddr & (SZ_1K - 1)) { + if (value & (SZ_1K - 1)) { dev_err(dev, "invalid boot address 0x%x, must be aligned on a 1KB boundary\n", - rproc->bootaddr); + value); return -EINVAL; } - regmap_write(bdata->syscon, offset, rproc->bootaddr); + value >>= bdata->boot_reg_shift; + mask >>= bdata->boot_reg_shift; + + regmap_update_bits(bdata->syscon, offset, mask, value); return 0; } @@ -292,6 +302,28 @@ static const struct omap_rproc_dev_data omap5_ipu_dev_data = { .fw_name = "omap5-ipu-fw.xem4", }; +static const struct omap_rproc_dev_data dra7_rproc_dev_data[] = { + { + .device_name = "40800000.dsp", + .fw_name = "dra7-dsp1-fw.xe66", + }, + { + .device_name = "41000000.dsp", + .fw_name = "dra7-dsp2-fw.xe66", + }, + { + .device_name = "55020000.ipu", + .fw_name = "dra7-ipu2-fw.xem4", + }, + { + .device_name = "58820000.ipu", + .fw_name = "dra7-ipu1-fw.xem4", + }, + { + /* sentinel */ + }, +}; + static const struct of_device_id omap_rproc_of_match[] = { { .compatible = "ti,omap4-dsp", @@ -309,6 +341,14 @@ static const struct of_device_id omap_rproc_of_match[] = { .compatible = "ti,omap5-ipu", .data = &omap5_ipu_dev_data, }, + { + .compatible = "ti,dra7-dsp", + .data = dra7_rproc_dev_data, + }, + { + .compatible = "ti,dra7-ipu", + .data = dra7_rproc_dev_data, + }, { /* end */ }, @@ -317,13 +357,23 @@ MODULE_DEVICE_TABLE(of, omap_rproc_of_match); static const char *omap_rproc_get_firmware(struct platform_device *pdev) { + struct device_node *np = pdev->dev.of_node; const struct omap_rproc_dev_data *data; data = of_device_get_match_data(&pdev->dev); if (!data) return ERR_PTR(-ENODEV); - return data->fw_name; + if (!of_device_is_compatible(np, "ti,dra7-dsp") && + !of_device_is_compatible(np, "ti,dra7-ipu")) + return data->fw_name; + + for (; data && data->device_name; data++) { + if (!strcmp(dev_name(&pdev->dev), data->device_name)) + return data->fw_name; + } + + return ERR_PTR(-ENOENT); } static int omap_rproc_get_boot_data(struct platform_device *pdev, @@ -334,7 +384,8 @@ static int omap_rproc_get_boot_data(struct platform_device *pdev, int ret; if (!of_device_is_compatible(np, "ti,omap4-dsp") && - !of_device_is_compatible(np, "ti,omap5-dsp")) + !of_device_is_compatible(np, "ti,omap5-dsp") && + !of_device_is_compatible(np, "ti,dra7-dsp")) return 0; oproc->boot_data = devm_kzalloc(&pdev->dev, sizeof(*oproc->boot_data), @@ -360,18 +411,27 @@ static int omap_rproc_get_boot_data(struct platform_device *pdev, return -EINVAL; } + if (of_device_is_compatible(np, "ti,dra7-dsp")) + oproc->boot_data->boot_reg_shift = 10; + return 0; } static int omap_rproc_of_get_internal_memories(struct platform_device *pdev, struct rproc *rproc) { - static const char * const mem_names[] = {"l2ram"}; + static const char * const ipu_mem_names[] = {"l2ram"}; + static const char * const dra7_dsp_mem_names[] = {"l2ram", "l1pram", + "l1dram"}; struct device_node *np = pdev->dev.of_node; struct omap_rproc *oproc = rproc->priv; struct device *dev = &pdev->dev; + const char * const *mem_names; struct resource *res; int num_mems; + const __be32 *addrp; + u32 l4_offset = 0; + u64 size; int i; /* OMAP4 and OMAP5 DSPs do not have support for flat SRAM */ @@ -379,7 +439,15 @@ static int omap_rproc_of_get_internal_memories(struct platform_device *pdev, of_device_is_compatible(np, "ti,omap5-dsp")) return 0; - num_mems = ARRAY_SIZE(mem_names); + /* DRA7 DSPs have two additional SRAMs at L1 level */ + if (of_device_is_compatible(np, "ti,dra7-dsp")) { + mem_names = dra7_dsp_mem_names; + num_mems = ARRAY_SIZE(dra7_dsp_mem_names); + } else { + mem_names = ipu_mem_names; + num_mems = ARRAY_SIZE(ipu_mem_names); + } + oproc->mem = devm_kcalloc(dev, num_mems, sizeof(*oproc->mem), GFP_KERNEL); if (!oproc->mem) @@ -395,7 +463,26 @@ static int omap_rproc_of_get_internal_memories(struct platform_device *pdev, return PTR_ERR(oproc->mem[i].cpu_addr); } oproc->mem[i].bus_addr = res->start; - oproc->mem[i].dev_addr = OMAP_RPROC_IPU_L2RAM_DEV_ADDR; + + /* + * The DSPs have the internal memories starting at a fixed + * offset of 0x800000 from address 0, and this corresponds to + * L2RAM. The L3 address view has the L2RAM bus address as the + * starting address for the IP, so the L2RAM memory region needs + * to be processed first, and the device addresses for each + * memory region can be computed using the relative offset + * from this base address. + */ + if (of_device_is_compatible(np, "ti,dra7-dsp") && + !strcmp(mem_names[i], "l2ram")) { + addrp = of_get_address(dev->of_node, i, &size, NULL); + l4_offset = of_translate_address(dev->of_node, addrp); + } + oproc->mem[i].dev_addr = + of_device_is_compatible(np, "ti,dra7-dsp") ? + res->start - l4_offset + + OMAP_RPROC_DSP_LOCAL_MEM_OFFSET : + OMAP_RPROC_IPU_L2RAM_DEV_ADDR; oproc->mem[i].size = resource_size(res); dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n", From patchwork Mon Oct 28 12:42:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177917 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339368ill; Mon, 28 Oct 2019 05:43:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqyATUr4duX9PEo3Qczhw7aQOTxhRdJMBILQt+FnATY9t4hDB7jP56/XNE25AYBUjbMdcZFK X-Received: by 2002:a50:9fc1:: with SMTP id c59mr19768898edf.305.1572266601370; Mon, 28 Oct 2019 05:43:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266601; cv=none; d=google.com; s=arc-20160816; b=Kdt7J7FCZIW4bXRflfwrypktM/wneD3T//FMfYTsfOHTTvsc8gZOuZIHPnGTubS7wu 07g4c8fdWaH5LlRIl3qDI2+8fnm+1jr9GwcPJ+oq++KFZj3+b8ghkpk+zAXKqCSB39TX 5nMN2x2V2/3VctHpHPtH46DGI8a3zhglUpsKfZov6grvAG2GG0HzC7DJhqT7RDgnfnH4 OnF/NAELXWsujOmR9zbQkgOxVSpKBzdNsml+a+aapJvwH1E6C4Aaw2UxxdUNGbGRO8o2 95kG/dD1MT27WwlHHd70SPO6+jjmD5GFP4QFvCPL+Gl0uA66CC1Y/KAZg5J6ytK2S2KA qnDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Y1auuAq5xKvSGOrmGT7DMiILh+5hUGrcb4QBov2/0Q8=; b=aliZZmZK3ol1CPJduxeLlbomEQM4Hv7bmjOPo+qK9hI9hrr+Rbb29irep3ydkjQ1Sm M0QWUfFF/fetLOyWUpxkrgftvafggGpkV3X22FhcBMO63PEMedqcZkGbv+CA5eul6XXp arlcM8ZpzPy9VN3VlYpJZ7UQJYItzpdMqVV2glBwV/d3kbGoQB+E8STKXu9t0N+KVnRG uyYehAujej0hx0draLoLGA7VXqCa65zlTIFcOh13AvihpBymxtP279Z9WHZ6C5ue1kp2 EeEC04DTxoNWXCBb02OtNuFSVdcOm7BACGsXsWcLmlm81x0WwY26vaJ1sVKoLNlYLSkv oTDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=fJGggYGg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d13si7775822edb.362.2019.10.28.05.43.21; Mon, 28 Oct 2019 05:43:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=fJGggYGg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389371AbfJ1MnR (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:17 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37286 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389353AbfJ1MnQ (ORCPT ); Mon, 28 Oct 2019 08:43:16 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SChFsu034012; Mon, 28 Oct 2019 07:43:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266595; bh=Y1auuAq5xKvSGOrmGT7DMiILh+5hUGrcb4QBov2/0Q8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fJGggYGgGXsPlOdP/c78uHparICetMwdaI0wtKi94H3RhiHCvovTLEByM1+0lNpZU 8k2gSVWdnBaifv6d9N0vo4Z0Nh78E9mKQmsaT12xTRt65R4NDY7sxmV6KQgsUMfeAA ND+j3rQMGKJD6O7CzrnkTL9cc5IPanACdZNLn1Nk= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SChFDp069506 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:15 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:43:02 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:43:02 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgoh2063574; Mon, 28 Oct 2019 07:43:12 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 10/17] remoteproc/omap: Remove the omap_rproc_reserve_cma declaration Date: Mon, 28 Oct 2019 14:42:31 +0200 Message-ID: <20191028124238.19224-11-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The omap_rproc_reserve_cma() function is not defined at the moment. This prototype was to be used to define a function to declare a remoteproc device-specific CMA pool. The remoteproc devices will be defined through DT going forward. A device specific CMA pool will be defined under the reserved-memory node, and will be associated with the appropriate remoteproc device node. This function prototype will no longer be needed and has therefore been cleaned up. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- include/linux/platform_data/remoteproc-omap.h | 12 ------------ 1 file changed, 12 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/include/linux/platform_data/remoteproc-omap.h b/include/linux/platform_data/remoteproc-omap.h index 6bea01e199fe..49c78805916f 100644 --- a/include/linux/platform_data/remoteproc-omap.h +++ b/include/linux/platform_data/remoteproc-omap.h @@ -21,16 +21,4 @@ struct omap_rproc_pdata { int (*device_shutdown)(struct platform_device *pdev); }; -#if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE) - -void __init omap_rproc_reserve_cma(void); - -#else - -static inline void __init omap_rproc_reserve_cma(void) -{ -} - -#endif - #endif /* _PLAT_REMOTEPROC_H */ From patchwork Mon Oct 28 12:42:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177918 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339401ill; Mon, 28 Oct 2019 05:43:24 -0700 (PDT) X-Google-Smtp-Source: APXvYqzcv6XmccrntxZ/HBYohu+WXe+QdPJIghEcajIXEd26wpPSAYjFK3wCPdS3Q8sdD2b+8bp7 X-Received: by 2002:a50:950a:: with SMTP id u10mr19665046eda.68.1572266604112; Mon, 28 Oct 2019 05:43:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266604; cv=none; d=google.com; s=arc-20160816; b=CZidNqP3OqOZ5Jn2uklkCivPHuptPzoficCh4ZVpu90637dQo2nehyTPQf8sbmMOVg Sgwf147vaa96qNUDDJhVFOh9LxKMtp+G4Jgp3NHMQ1GtI08IGyrYb2h768jsfWrIV7o+ /l2iv3PPcbj9dytYfgQKkHNSJxVOstyGm9hBOnwT/aFrkdNfhT5Xl7C7k4OGabcT6HQ7 cGGS1z6RXv3cMmVYbwmz/bxuvJ/YDsdRFcoxxbt2n169Jr03LiyoHImf9q3ylWKWzVNs 9A7c82vyuf1xr+bJYk38jX68EhF1lrGIYyBgCfgroaSf7moSAlEyYouLLCo1J3bVFnLm /Nlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=GcuJhLy2/UdXK6FDSfnKUOcBg0bgb5KT7rF6axB5KyM=; b=rPqmfA9GdP6OtyXjYLZv2oao3yrDdbb0JiEqzZPeOsiKN5J/urvnjt0iOorj8AB9Yg AVz3oh/X8TB+d9D/XlRRORVsL96EbwPrHMdSxCLWQLD2cPjSFHRrdeqh/PSjpvPmDxAZ eb7wjwsn1ksT/LzxNwwah3L+mf8MXlyFDD62CzRQ94q728nAIQa/7Sb46/4nWSTWg6Gc t74/oNmWXCf4LAAE6S9gQPqwdWqoN6jaf147xH9BQ9Uczaa/PoTyMdY5bkLeARmpVYaT rmSOt6VaH/d1r2uCuPnOXDLfQjOPo+ZZsUm5pdwKcKP2xazr2paxXQzgzCNuTrsrpgsL pIUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=vw1pOpbH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d2si6157522ejk.301.2019.10.28.05.43.23; Mon, 28 Oct 2019 05:43:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=vw1pOpbH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389386AbfJ1MnU (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:20 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:46276 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389353AbfJ1MnS (ORCPT ); Mon, 28 Oct 2019 08:43:18 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SChHrg047782; Mon, 28 Oct 2019 07:43:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266597; bh=GcuJhLy2/UdXK6FDSfnKUOcBg0bgb5KT7rF6axB5KyM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vw1pOpbHBBTy5qPwt5quy5Y33ZYmdS26AXuhvhi93bwyhkbZw7HqW95+2xPg+SPXa A/bCr5eH42Hdg40cfKYZ8NNOlN9DlT8axd/Io4GNOE4aWFEsBogt4sYpHtlkc90z/+ FZn64kE21RfQbY0D42iqMvpiV0mR6LtY812gqKnI= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SChGFK040486 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:16 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:43:05 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:43:04 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgoh3063574; Mon, 28 Oct 2019 07:43:14 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 11/17] remoteproc/omap: Check for undefined mailbox messages Date: Mon, 28 Oct 2019 14:42:32 +0200 Message-ID: <20191028124238.19224-12-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna Add some checks in the mailbox callback function to limit any processing in the mailbox callback function to only certain currently valid messages, and drop all the remaining messages. A debug message is added to print any such invalid messages when the appropriate trace control is enabled. Signed-off-by: Subramaniam Chanderashekarapuram Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 6 ++++++ drivers/remoteproc/omap_remoteproc.h | 7 +++++++ 2 files changed, 13 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index e46bb4c790d7..016d5beda195 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -124,6 +124,12 @@ static void omap_rproc_mbox_callback(struct mbox_client *client, void *data) dev_info(dev, "received echo reply from %s\n", name); break; default: + if (msg >= RP_MBOX_READY && msg < RP_MBOX_END_MSG) + return; + if (msg > oproc->rproc->max_notifyid) { + dev_dbg(dev, "dropping unknown message 0x%x", msg); + return; + } /* msg contains the index of the triggered vring */ if (rproc_vq_interrupt(oproc->rproc, msg) == IRQ_NONE) dev_dbg(dev, "no message was found in vqid %d\n", msg); diff --git a/drivers/remoteproc/omap_remoteproc.h b/drivers/remoteproc/omap_remoteproc.h index 1e6fef753c4f..18f522617683 100644 --- a/drivers/remoteproc/omap_remoteproc.h +++ b/drivers/remoteproc/omap_remoteproc.h @@ -31,6 +31,12 @@ * * @RP_MBOX_ABORT_REQUEST: a "please crash" request, used for testing the * recovery mechanism (to some extent). + * + * Introduce new message definitions if any here. + * + * @RP_MBOX_END_MSG: Indicates end of known/defined messages from remote core + * This should be the last definition. + * */ enum omap_rp_mbox_messages { RP_MBOX_READY = 0xFFFFFF00, @@ -39,6 +45,7 @@ enum omap_rp_mbox_messages { RP_MBOX_ECHO_REQUEST = 0xFFFFFF03, RP_MBOX_ECHO_REPLY = 0xFFFFFF04, RP_MBOX_ABORT_REQUEST = 0xFFFFFF05, + RP_MBOX_END_MSG = 0xFFFFFF06, }; #endif /* _OMAP_RPMSG_H */ From patchwork Mon Oct 28 12:42:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177919 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339435ill; Mon, 28 Oct 2019 05:43:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqyQcDVh+He/bmZuJydEOXajUSuXsCTDzTKLl+imDA3EuLlXuzBdpO/o2T2f/4E+j7YH5bYP X-Received: by 2002:a17:906:e296:: with SMTP id gg22mr16888464ejb.211.1572266606784; Mon, 28 Oct 2019 05:43:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266606; cv=none; d=google.com; s=arc-20160816; b=qJ1a/gqkGD8svl4emHApp3rf9bcmd4vVCEvNYH+Mg5S2pSzbT7vls8HT9V17zccG9G ZfaCBlLLJQEFKpY8w8fw/iq/2pZAgH09utn0YMeY133CxcEnqv2fA5LnDoT6zISnGnCt y8eE/OLp8OSPwhJXkLOlUyPkwPjrT4JG0hS1c5zc1jMmPPyIBubF0O7Am56EbJ0ROuXD WI0Um7ZJDkisf4+HkGE/kNtdwTOzHQJO1UlxeAkZcFAFB1KZ4XfLhyzvS85HSy9QP4Bf 5YImH4gzUtGvCDawfv1S33jLtUAXDW8HtWhy2/OaUK9VxFAbXO0NoTR1EvYlIr1pIpGR HA/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=p8h+bZ+TK/CM9qfriPDOCHLSHnTMv1pY3dVFwsRuu78=; b=jV1hlE4szOPpZkjV02+hiUMrcVlGSvKtaonjRnzxe1ryMkLXttYZHzqV11WOpGbu4G lvotx/NX2Tz6xVL2a2p8CEBPEpXSqqQhgYSm4F2JtZcHyoamDI59FxJ6qSKPm6uvtXi8 VeOhsO6+EnZP2d/H5Xogz59wM9EoliCtRykNWfrQki5GSKgJzs2Z6VcPnUE9jFqdXip6 5YqACRDjgSEErE3tiaQ2d04mbvUy9bf6LSPWDfyB2D4fS5IRWuAevV56krVMmJ8HLfuO GQopmF6A0hf0a9+YJ22xtPYaY4DGug4OUPsBlMCSluOcmU9aP8Lrx5w+ls2YtjJoPwIY BJBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=g9ZGRdLx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 26si7378003edz.340.2019.10.28.05.43.26; Mon, 28 Oct 2019 05:43:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=g9ZGRdLx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389401AbfJ1MnX (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:23 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37312 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389382AbfJ1MnV (ORCPT ); Mon, 28 Oct 2019 08:43:21 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SChJ47034058; Mon, 28 Oct 2019 07:43:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266599; bh=p8h+bZ+TK/CM9qfriPDOCHLSHnTMv1pY3dVFwsRuu78=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=g9ZGRdLxR15ccs580iDUjvgeBRNb+6tLRyfo5Pywl6YlGvl4063skXWVcFHs20y9x r3bZlgusiexEO2XzD/egyeX9WDgdETFbHqjmS750MWnU3u9wlVY7wJdeUN6KVRUKif bRxGvMjvWstVRUSlQ5JYwY9j1D9YtKOX5YqtBgSU= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SChJ6Z040567 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:19 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:43:07 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:43:07 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgoh4063574; Mon, 28 Oct 2019 07:43:17 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 12/17] remoteproc/omap: Request a timer(s) for remoteproc usage Date: Mon, 28 Oct 2019 14:42:33 +0200 Message-ID: <20191028124238.19224-13-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The remote processors in OMAP4+ SoCs are equipped with internal timers, like the internal SysTick timer in a Cortex M3/M4 NVIC or the CTM timer within Unicache in IPU & DSP. However, these timers are gated when the processor subsystem clock is gated, making them rather difficult to use as OS tick sources. They will not be able to wakeup the processor from any processor-sleep induced clock-gating states. This can be avoided by using an external timer as the tick source, which can be controlled independently by the OMAP remoteproc driver code, but still allowing the processor subsystem clock to be auto-gated when the remoteproc cores are idle. This patch adds the support for OMAP remote processors to request timer(s) to be used by the remoteproc. The timers are enabled and disabled in line with the enabling/disabling of the remoteproc. The timer data is not mandatory if the advanced device management features are not required. The core timer functionality is provided by the OMAP DMTimer clocksource driver, which does not export any API. The logic is implemented through the timer device's platform data ops. The OMAP remoteproc driver mainly requires ops to request/free a dmtimer, and to start/stop a timer. The split ops helps in controlling the timer state without having to request and release a timer everytime it needs to use the timer. NOTE: If the gptimer is already in use by the time IPU and/or DSP are loaded, the processors will fail to boot. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 258 +++++++++++++++++++++++++++ 1 file changed, 258 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 016d5beda195..8450dd79d391 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -27,6 +27,9 @@ #include #include #include +#include + +#include #include "omap_remoteproc.h" #include "remoteproc_internal.h" @@ -61,6 +64,16 @@ struct omap_rproc_mem { size_t size; }; +/** + * struct omap_rproc_timer - data structure for a timer used by a omap rproc + * @odt: timer pointer + * @timer_ops: OMAP dmtimer ops for @odt timer + */ +struct omap_rproc_timer { + struct omap_dm_timer *odt; + const struct omap_dm_timer_ops *timer_ops; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle @@ -68,6 +81,8 @@ struct omap_rproc_mem { * @boot_data: boot data structure for setting processor boot address * @mem: internal memory regions data * @num_mems: number of internal memory regions + * @num_timers: number of rproc timer(s) + * @timers: timer(s) info used by rproc * @rproc: rproc handle * @reset: reset handle */ @@ -77,6 +92,8 @@ struct omap_rproc { struct omap_rproc_boot_data *boot_data; struct omap_rproc_mem *mem; int num_mems; + int num_timers; + struct omap_rproc_timer *timers; struct rproc *rproc; struct reset_control *reset; }; @@ -91,6 +108,212 @@ struct omap_rproc_dev_data { const char *fw_name; }; +/** + * omap_rproc_request_timer - request a timer for a remoteproc + * @np: device node pointer to the desired timer + * @timer: handle to a struct omap_rproc_timer to return the timer handle + * + * This helper function is used primarily to request a timer associated with + * a remoteproc. The returned handle is stored in the .odt field of the + * @timer structure passed in, and is used to invoke other timer specific + * ops (like starting a timer either during device initialization or during + * a resume operation, or for stopping/freeing a timer). + * + * Returns 0 on success, otherwise an appropriate failure + */ +static int omap_rproc_request_timer(struct device_node *np, + struct omap_rproc_timer *timer) +{ + int ret = 0; + + timer->odt = timer->timer_ops->request_by_node(np); + if (!timer->odt) { + pr_err("request for timer node %p failed\n", np); + return -EBUSY; + } + + ret = timer->timer_ops->set_source(timer->odt, OMAP_TIMER_SRC_SYS_CLK); + if (ret) { + pr_err("error setting OMAP_TIMER_SRC_SYS_CLK as source for timer node %p\n", + np); + timer->timer_ops->free(timer->odt); + return ret; + } + + /* clean counter, remoteproc code will set the value */ + timer->timer_ops->set_load(timer->odt, 0, 0); + + return ret; +} + +/** + * omap_rproc_start_timer - start a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used to start a timer associated with a remoteproc, + * obtained using the request_timer ops. The helper function needs to be + * invoked by the driver to start the timer (during device initialization) + * or to just resume the timer. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_start_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->start(timer->odt); +} + +/** + * omap_rproc_stop_timer - stop a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used to disable a timer associated with a + * remoteproc, and needs to be called either during a device shutdown + * or suspend operation. The separate helper function allows the driver + * to just stop a timer without having to release the timer during a + * suspend operation. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_stop_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->stop(timer->odt); +} + +/** + * omap_rproc_release_timer - release a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used primarily to release a timer associated + * with a remoteproc. The dmtimer will be available for other clients to + * use once released. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->free(timer->odt); +} + +/** + * omap_rproc_enable_timers - enable the timers for a remoteproc + * @rproc: handle of a remote processor + * @configure: boolean flag used to acquire and configure the timer handle + * + * This function is used primarily to enable the timers associated with + * a remoteproc. The configure flag is provided to allow the driver to + * to either acquire and start a timer (during device initialization) or + * to just start a timer (during a resume operation). + */ +static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) +{ + int i; + int ret = 0; + struct platform_device *tpdev; + struct dmtimer_platform_data *tpdata; + const struct omap_dm_timer_ops *timer_ops; + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_timer *timers = oproc->timers; + struct device *dev = rproc->dev.parent; + struct device_node *np = NULL; + + if (oproc->num_timers <= 0) + return 0; + + if (!configure) + goto start_timers; + + for (i = 0; i < oproc->num_timers; i++) { + np = of_parse_phandle(dev->of_node, "timers", i); + if (!np) { + ret = -ENXIO; + dev_err(dev, "device node lookup for timer at index %d failed: %d\n", + i, ret); + goto free_timers; + } + + tpdev = of_find_device_by_node(np); + if (!tpdev) { + ret = -ENODEV; + dev_err(dev, "could not get timer platform device\n"); + goto put_node; + } + + tpdata = dev_get_platdata(&tpdev->dev); + put_device(&tpdev->dev); + if (!tpdata) { + ret = -EINVAL; + dev_err(dev, "dmtimer pdata structure NULL\n"); + goto put_node; + } + + timer_ops = tpdata->timer_ops; + if (!timer_ops || !timer_ops->request_by_node || + !timer_ops->set_source || !timer_ops->set_load || + !timer_ops->free || !timer_ops->start || + !timer_ops->stop) { + ret = -EINVAL; + dev_err(dev, "device does not have required timer ops\n"); + goto put_node; + } + + timers[i].timer_ops = timer_ops; + ret = omap_rproc_request_timer(np, &timers[i]); + if (ret) { + dev_err(dev, "request for timer %p failed: %d\n", np, + ret); + goto put_node; + } + of_node_put(np); + } + +start_timers: + for (i = 0; i < oproc->num_timers; i++) + omap_rproc_start_timer(&timers[i]); + return 0; + +put_node: + of_node_put(np); +free_timers: + while (i--) { + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + } + + return ret; +} + +/** + * omap_rproc_disable_timers - disable the timers for a remoteproc + * @rproc: handle of a remote processor + * @configure: boolean flag used to release the timer handle + * + * This function is used primarily to disable the timers associated with + * a remoteproc. The configure flag is provided to allow the driver to + * to either stop and release a timer (during device shutdown) or to just + * stop a timer (during a suspend operation). + */ +static int omap_rproc_disable_timers(struct rproc *rproc, bool configure) +{ + int i; + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_timer *timers = oproc->timers; + + if (oproc->num_timers <= 0) + return 0; + + for (i = 0; i < oproc->num_timers; i++) { + omap_rproc_stop_timer(&timers[i]); + if (configure) { + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + } + } + + return 0; +} + /** * omap_rproc_mbox_callback() - inbound mailbox message handler * @client: mailbox client pointer used for requesting the mailbox channel @@ -226,6 +449,12 @@ static int omap_rproc_start(struct rproc *rproc) goto put_mbox; } + ret = omap_rproc_enable_timers(rproc, true); + if (ret) { + dev_err(dev, "omap_rproc_enable_timers failed: %d\n", ret); + goto put_mbox; + } + reset_control_deassert(oproc->reset); return 0; @@ -239,9 +468,14 @@ static int omap_rproc_start(struct rproc *rproc) static int omap_rproc_stop(struct rproc *rproc) { struct omap_rproc *oproc = rproc->priv; + int ret; reset_control_assert(oproc->reset); + ret = omap_rproc_disable_timers(rproc, true); + if (ret) + return ret; + mbox_free_channel(oproc->mbox); return 0; @@ -548,6 +782,30 @@ static int omap_rproc_probe(struct platform_device *pdev) if (ret) goto free_rproc; + /* + * Timer nodes are directly used in client nodes as phandles, so + * retrieve the count using appropriate size + */ + oproc->num_timers = of_property_count_elems_of_size(np, "timers", + sizeof(phandle)); + if (oproc->num_timers <= 0) { + dev_dbg(&pdev->dev, "device does not have timers, status = %d\n", + oproc->num_timers); + oproc->num_timers = 0; + } + + if (oproc->num_timers) { + oproc->timers = devm_kzalloc(&pdev->dev, sizeof(*oproc->timers) + * oproc->num_timers, GFP_KERNEL); + if (!oproc->timers) { + ret = -ENOMEM; + goto free_rproc; + } + + dev_dbg(&pdev->dev, "device has %d tick timers\n", + oproc->num_timers); + } + ret = of_reserved_mem_device_init(&pdev->dev); if (ret) { dev_err(&pdev->dev, "device does not have specific CMA pool\n"); From patchwork Mon Oct 28 12:42:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177920 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339440ill; Mon, 28 Oct 2019 05:43:27 -0700 (PDT) X-Google-Smtp-Source: APXvYqwwM3VQ3Z7dhM01+uPasWRp8+S+W6ltxl6gKnUneBw1Y1VqkVatWYejxy+Cjqg/+3nwxT5b X-Received: by 2002:a50:f40c:: with SMTP id r12mr19476699edm.50.1572266607259; Mon, 28 Oct 2019 05:43:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266607; cv=none; d=google.com; s=arc-20160816; b=iSl+2RVJhOc5tr1cgrcXMBdgule8UiuZCjDbcX1bbiLoLq/6vfTcAsmjz1r69+NA8/ 1ddi8ypAhFm/wfieTKAhrm5Ac37z6bMpiUHNrcXjJc9PMVAfzoWO/N0jSBiM+A/4HcLH PR/fZdqHc8QQXkGB6R6y+WWPC3R7RWw4XIkN7JJRfgsLKydGC6nTfrq5HiDKFThdiiG3 mOzRAzLM7yim0s6CFsVADbMvvPrsSA5lEGju27QVchQ5EpKfS2wbhCroGlsOohv5OWfK 76kI9lqb5oEGUt28s28FfKwn4zks+zR/euPEJMGBg6pmGCuzjPXPkIF+d8ZRjG6brj/D h6Ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=IukYFzDkiSMrQ6S0FDCYhbnA7FNEtc4qXaqzQbxLG6A=; b=UhNRynOzGfYAJzkuY7wBrIRh+XUm6v4X2Grht060aLm0wUV6/NcrqFIz6VDZ6VeSy6 A3R8pBZ+rlmbVQ4mLGBpdi+Dko8PDlw0x3NCxhWqAiAts/SNHtlsVWsHDux/+/i8fYdA c6Jf19jKNA4SucO1FaX7icTfA4A4QUHWj9O92c4jNH3HCmjv6ZmLw3+I1gOPW0xObBZw 6mqclV81kb/4giKpRSFsfAekkKXOmKrRmcNYZ7YVeNrxZrwhIeYXuZXlQemM47oBE6FX tU9CatLDPJfHmbjJUV1DXLjrFpvahqX3zKIrlKQ3H8flwH2tVaTfwz1J19gnUSnITb7g 7c9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=oZO1sXbY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 26si7378003edz.340.2019.10.28.05.43.27; Mon, 28 Oct 2019 05:43:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=oZO1sXbY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389412AbfJ1MnZ (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:25 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:46292 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389395AbfJ1MnX (ORCPT ); Mon, 28 Oct 2019 08:43:23 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SChLZ5047814; Mon, 28 Oct 2019 07:43:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266601; bh=IukYFzDkiSMrQ6S0FDCYhbnA7FNEtc4qXaqzQbxLG6A=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oZO1sXbYKAEfnVFby252Zg2E2IPjyukV7awiApruZTX1ns+1PLuzM63XTv9yUHxne p+vEcbpBuP3Z2/oxkKoMudy8yZ11Q5/ZyJ8c2kwzQPMTaZJZ9HXBl8pUcvcEyw75qY sNPHgq2MlIipPKPN5LqQIQioUTZ/Xnd7mU76+9dw= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SChLDY069688 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:21 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:43:09 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:43:09 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgoh5063574; Mon, 28 Oct 2019 07:43:19 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 13/17] remoteproc/omap: add support for system suspend/resume Date: Mon, 28 Oct 2019 14:42:34 +0200 Message-ID: <20191028124238.19224-14-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna This patch adds the support for system suspend/resume to the OMAP remoteproc driver so that the OMAP remoteproc devices can be suspended/resumed during a system suspend/resume. The support is added through the driver PM .suspend/.resume callbacks, and requires appropriate support from the OS running on the remote processors. The IPU & DSP remote processors typically have their own private modules like registers, internal memories, caches etc. The context of these modules need to be saved and restored properly for a suspend/resume to work. These are in general not accessible from the MPU, so the remote processors themselves have to implement the logic for the context save & restore of these modules. The OMAP remoteproc driver initiates a suspend by sending a mailbox message requesting the remote processor to save its context and enter into an idle/standby state. The remote processor should usually stop whatever processing it is doing to switch to a context save mode. The OMAP remoteproc driver detects the completion of the context save by checking the module standby status for the remoteproc device. It also stops any resources used by the remote processors like the timers. The timers need to be running only when the processor is active and executing, and need to be stopped otherwise to allow the timer driver to reach low-power states. The IOMMUs are automatically suspended by the PM core during the late suspend stage, after the remoteproc suspend process is completed by putting the remote processor cores into reset. Thereafter, the Linux kernel can put the domain into further lower power states as possible. The resume sequence undoes the operations performed in the PM suspend callback, by starting the timers and finally releasing the processors from reset. This requires that the remote processor side OS be able to distinguish a power-resume boot from a power-on/cold boot, restore the context of its private modules saved during the suspend phase, and resume executing code from where it was suspended. The IOMMUs would have been resumed by the PM core during early resume, so they are already enabled by the time remoteproc resume callback gets invoked. The remote processors should save their context into System RAM (DDR), as any internal memories are not guaranteed to retain context as it depends on the lowest power domain that the remote processor device is put into. The management of the DDR contents will be managed by the Linux kernel. Signed-off-by: Suman Anna [t-kristo@ti.com: converted to use ti-sysc instead of hwmod] Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 180 +++++++++++++++++++++++++++ drivers/remoteproc/omap_remoteproc.h | 18 ++- 2 files changed, 196 insertions(+), 2 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 8450dd79d391..410bf1b56e93 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -24,10 +25,13 @@ #include #include #include +#include #include #include #include #include +#include +#include #include @@ -85,6 +89,9 @@ struct omap_rproc_timer { * @timers: timer(s) info used by rproc * @rproc: rproc handle * @reset: reset handle + * @pm_comp: completion primitive to sync for suspend response + * @fck: functional clock for the remoteproc + * @suspend_acked: state machine flag to store the suspend request ack */ struct omap_rproc { struct mbox_chan *mbox; @@ -96,6 +103,9 @@ struct omap_rproc { struct omap_rproc_timer *timers; struct rproc *rproc; struct reset_control *reset; + struct completion pm_comp; + struct clk *fck; + bool suspend_acked; }; /** @@ -346,6 +356,11 @@ static void omap_rproc_mbox_callback(struct mbox_client *client, void *data) case RP_MBOX_ECHO_REPLY: dev_info(dev, "received echo reply from %s\n", name); break; + case RP_MBOX_SUSPEND_ACK: + case RP_MBOX_SUSPEND_CANCEL: + oproc->suspend_acked = msg == RP_MBOX_SUSPEND_ACK; + complete(&oproc->pm_comp); + break; default: if (msg >= RP_MBOX_READY && msg < RP_MBOX_END_MSG) return; @@ -522,6 +537,157 @@ static const struct rproc_ops omap_rproc_ops = { .da_to_va = omap_rproc_da_to_va, }; +#ifdef CONFIG_PM +static bool _is_rproc_in_standby(struct omap_rproc *oproc) +{ + return ti_clk_is_in_standby(oproc->fck); +} + +/* 1 sec is long enough time to let the remoteproc side suspend the device */ +#define DEF_SUSPEND_TIMEOUT 1000 +static int _omap_rproc_suspend(struct rproc *rproc) +{ + struct device *dev = rproc->dev.parent; + struct omap_rproc *oproc = rproc->priv; + unsigned long to = msecs_to_jiffies(DEF_SUSPEND_TIMEOUT); + unsigned long ta = jiffies + to; + int ret; + + reinit_completion(&oproc->pm_comp); + oproc->suspend_acked = false; + ret = mbox_send_message(oproc->mbox, (void *)RP_MBOX_SUSPEND_SYSTEM); + if (ret < 0) { + dev_err(dev, "PM mbox_send_message failed: %d\n", ret); + return ret; + } + + ret = wait_for_completion_timeout(&oproc->pm_comp, to); + if (!oproc->suspend_acked) + return -EBUSY; + + /* + * The remoteproc side is returning the ACK message before saving the + * context, because the context saving is performed within a SYS/BIOS + * function, and it cannot have any inter-dependencies against the IPC + * layer. Also, as the SYS/BIOS needs to preserve properly the processor + * register set, sending this ACK or signalling the completion of the + * context save through a shared memory variable can never be the + * absolute last thing to be executed on the remoteproc side, and the + * MPU cannot use the ACK message as a sync point to put the remoteproc + * into reset. The only way to ensure that the remote processor has + * completed saving the context is to check that the module has reached + * STANDBY state (after saving the context, the SYS/BIOS executes the + * appropriate target-specific WFI instruction causing the module to + * enter STANDBY). + */ + while (!_is_rproc_in_standby(oproc)) { + if (time_after(jiffies, ta)) + return -ETIME; + schedule(); + } + + reset_control_assert(oproc->reset); + + ret = omap_rproc_disable_timers(rproc, false); + if (ret) { + dev_err(dev, "disabling timers during suspend failed %d\n", + ret); + goto enable_device; + } + + return 0; + +enable_device: + reset_control_deassert(oproc->reset); + return ret; +} + +static int _omap_rproc_resume(struct rproc *rproc) +{ + struct device *dev = rproc->dev.parent; + struct omap_rproc *oproc = rproc->priv; + int ret; + + /* boot address could be lost after suspend, so restore it */ + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) { + dev_err(dev, "boot address restore failed %d\n", ret); + goto out; + } + } + + ret = omap_rproc_enable_timers(rproc, false); + if (ret) { + dev_err(dev, "enabling timers during resume failed %d\n", + ret); + goto out; + } + + reset_control_deassert(oproc->reset); + +out: + return ret; +} + +static int __maybe_unused omap_rproc_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rproc *rproc = platform_get_drvdata(pdev); + int ret = 0; + + mutex_lock(&rproc->lock); + if (rproc->state == RPROC_OFFLINE) + goto out; + + if (rproc->state == RPROC_SUSPENDED) + goto out; + + if (rproc->state != RPROC_RUNNING) { + ret = -EBUSY; + goto out; + } + + ret = _omap_rproc_suspend(rproc); + if (ret) { + dev_err(dev, "suspend failed %d\n", ret); + goto out; + } + + rproc->state = RPROC_SUSPENDED; +out: + mutex_unlock(&rproc->lock); + return ret; +} + +static int __maybe_unused omap_rproc_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rproc *rproc = platform_get_drvdata(pdev); + int ret = 0; + + mutex_lock(&rproc->lock); + if (rproc->state == RPROC_OFFLINE) + goto out; + + if (rproc->state != RPROC_SUSPENDED) { + ret = -EBUSY; + goto out; + } + + ret = _omap_rproc_resume(rproc); + if (ret) { + dev_err(dev, "resume failed %d\n", ret); + goto out; + } + + rproc->state = RPROC_RUNNING; +out: + mutex_unlock(&rproc->lock); + return ret; +} +#endif /* CONFIG_PM */ + static const struct omap_rproc_dev_data omap4_dsp_dev_data = { .device_name = "dsp", .fw_name = "omap4-dsp-fw.xe64T", @@ -806,6 +972,14 @@ static int omap_rproc_probe(struct platform_device *pdev) oproc->num_timers); } + init_completion(&oproc->pm_comp); + + oproc->fck = of_clk_get(np, 0); + if (IS_ERR(oproc->fck)) { + ret = PTR_ERR(oproc->fck); + goto free_rproc; + } + ret = of_reserved_mem_device_init(&pdev->dev); if (ret) { dev_err(&pdev->dev, "device does not have specific CMA pool\n"); @@ -823,6 +997,7 @@ static int omap_rproc_probe(struct platform_device *pdev) release_mem: of_reserved_mem_device_release(&pdev->dev); free_rproc: + clk_put(oproc->fck); rproc_free(rproc); return ret; } @@ -838,11 +1013,16 @@ static int omap_rproc_remove(struct platform_device *pdev) return 0; } +static const struct dev_pm_ops omap_rproc_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(omap_rproc_suspend, omap_rproc_resume) +}; + static struct platform_driver omap_rproc_driver = { .probe = omap_rproc_probe, .remove = omap_rproc_remove, .driver = { .name = "omap-rproc", + .pm = &omap_rproc_pm_ops, .of_match_table = omap_rproc_of_match, }, }; diff --git a/drivers/remoteproc/omap_remoteproc.h b/drivers/remoteproc/omap_remoteproc.h index 18f522617683..e44458634608 100644 --- a/drivers/remoteproc/omap_remoteproc.h +++ b/drivers/remoteproc/omap_remoteproc.h @@ -2,7 +2,7 @@ /* * Remote processor messaging * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2018 Texas Instruments, Inc. * Copyright (C) 2011 Google, Inc. * All rights reserved. */ @@ -32,6 +32,16 @@ * @RP_MBOX_ABORT_REQUEST: a "please crash" request, used for testing the * recovery mechanism (to some extent). * + * @RP_MBOX_SUSPEND_AUTO: auto suspend request for the remote processor + * + * @RP_MBOX_SUSPEND_SYSTEM: system suspend request for the remote processor + * + * @RP_MBOX_SUSPEND_ACK: successful response from remote processor for a + * suspend request + * + * @RP_MBOX_SUSPEND_CANCEL: a cancel suspend response from a remote processor + * on a suspend request + * * Introduce new message definitions if any here. * * @RP_MBOX_END_MSG: Indicates end of known/defined messages from remote core @@ -45,7 +55,11 @@ enum omap_rp_mbox_messages { RP_MBOX_ECHO_REQUEST = 0xFFFFFF03, RP_MBOX_ECHO_REPLY = 0xFFFFFF04, RP_MBOX_ABORT_REQUEST = 0xFFFFFF05, - RP_MBOX_END_MSG = 0xFFFFFF06, + RP_MBOX_SUSPEND_AUTO = 0xFFFFFF10, + RP_MBOX_SUSPEND_SYSTEM = 0xFFFFFF11, + RP_MBOX_SUSPEND_ACK = 0xFFFFFF12, + RP_MBOX_SUSPEND_CANCEL = 0xFFFFFF13, + RP_MBOX_END_MSG = 0xFFFFFF14, }; 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The watchdog implementation for OMAP remote processors uses external gptimers that can be used to interrupt both the Linux host as well as the remote processor. Each remote processor is responsible for refreshing the timer during normal behavior - during OS task scheduling or entering the idle loop properly. During a watchdog condition (executing a tight loop causing no scheduling), the host processor gets interrupts and schedules a recovery for the corresponding remote processor. The remote processor may also get interrupted to be able to print a back trace. A menuconfig option has also been added to enable/disable the Watchdog functionality, with the default as disabled. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/Kconfig | 12 +++ drivers/remoteproc/omap_remoteproc.c | 154 ++++++++++++++++++++++++--- 2 files changed, 154 insertions(+), 12 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index d6450d7fcf92..b2eaa18ad503 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -42,6 +42,18 @@ config OMAP_REMOTEPROC It's safe to say N here if you're not interested in multimedia offloading or just want a bare minimum kernel. +config OMAP_REMOTEPROC_WATCHDOG + bool "OMAP remoteproc watchdog timer" + depends on OMAP_REMOTEPROC + default n + help + Say Y here to enable watchdog timer for remote processors. + + This option controls the watchdog functionality for the remote + processors in OMAP. Dedicated OMAP DMTimers are used by the remote + processors and triggers the timer interrupt upon a watchdog + detection. + config WKUP_M3_RPROC tristate "AMx3xx Wakeup M3 remoteproc support" depends on SOC_AM33XX || SOC_AM43XX diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 6f797025bb6b..2eb05d7a4dec 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -76,10 +77,12 @@ struct omap_rproc_mem { * struct omap_rproc_timer - data structure for a timer used by a omap rproc * @odt: timer pointer * @timer_ops: OMAP dmtimer ops for @odt timer + * @irq: timer irq */ struct omap_rproc_timer { struct omap_dm_timer *odt; const struct omap_dm_timer_ops *timer_ops; + int irq; }; /** @@ -90,6 +93,7 @@ struct omap_rproc_timer { * @mem: internal memory regions data * @num_mems: number of internal memory regions * @num_timers: number of rproc timer(s) + * @num_wd_timers: number of rproc watchdog timers * @timers: timer(s) info used by rproc * @autosuspend_delay: auto-suspend delay value to be used for runtime pm * @need_resume: if true a resume is needed in the system resume callback @@ -106,6 +110,7 @@ struct omap_rproc { struct omap_rproc_mem *mem; int num_mems; int num_timers; + int num_wd_timers; struct omap_rproc_timer *timers; int autosuspend_delay; bool need_resume; @@ -214,6 +219,81 @@ static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer) return timer->timer_ops->free(timer->odt); } +/** + * omap_rproc_get_timer_irq - get the irq for a timer + * @timer - handle to a OMAP rproc timer + * + * This function is used to get the irq associated with a watchdog timer. The + * function is called by the OMAP remoteproc driver to register a interrupt + * handler to handle watchdog events on the remote processor. + * + * Returns the irq id on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_get_timer_irq(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->get_irq(timer->odt); +} + +/** + * omap_rproc_ack_timer_irq - acknowledge a timer irq + * @timer: handle to a OMAP rproc timer + * + * This function is used to clear the irq associated with a watchdog timer. The + * The function is called by the OMAP remoteproc upon a watchdog event on the + * remote processor to clear the interrupt status of the watchdog timer. + * + * Returns the irq id on success, otherwise a failure as returned by DMTimer ops + */ +static inline void omap_rproc_ack_timer_irq(struct omap_rproc_timer *timer) +{ + timer->timer_ops->write_status(timer->odt, OMAP_TIMER_INT_OVERFLOW); +} + +/** + * omap_rproc_watchdog_isr - Watchdog ISR handler for remoteproc device + * @irq: IRQ number associated with a watchdog timer + * @data: IRQ handler data + * + * This ISR routine executes the required necessary low-level code to + * acknowledge a watchdog timer interrupt. There can be multiple watchdog + * timers associated with a rproc (like IPUs which have 2 watchdog timers, + * one per Cortex M3/M4 core), so a lookup has to be performed to identify + * the timer to acknowledge its interrupt. + * + * The function also invokes rproc_report_crash to report the watchdog event + * to the remoteproc driver core, to trigger a recovery. + * + * Return: IRQ_HANDLED or IRQ_NONE + */ +static irqreturn_t omap_rproc_watchdog_isr(int irq, void *data) +{ + struct rproc *rproc = data; + struct omap_rproc *oproc = rproc->priv; + struct device *dev = rproc->dev.parent; + struct omap_rproc_timer *timers = oproc->timers; + struct omap_rproc_timer *wd_timer = NULL; + int num_timers = oproc->num_timers + oproc->num_wd_timers; + int i; + + for (i = oproc->num_timers; i < num_timers; i++) { + if (timers[i].irq > 0 && irq == timers[i].irq) { + wd_timer = &timers[i]; + break; + } + } + + if (!wd_timer) { + dev_err(dev, "invalid timer\n"); + return IRQ_NONE; + } + + omap_rproc_ack_timer_irq(wd_timer); + + rproc_report_crash(rproc, RPROC_WATCHDOG); + + return IRQ_HANDLED; +} + /** * omap_rproc_enable_timers - enable the timers for a remoteproc * @rproc: handle of a remote processor @@ -235,19 +315,25 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) struct omap_rproc_timer *timers = oproc->timers; struct device *dev = rproc->dev.parent; struct device_node *np = NULL; + int num_timers = oproc->num_timers + oproc->num_wd_timers; - if (oproc->num_timers <= 0) + if (num_timers <= 0) return 0; if (!configure) goto start_timers; - for (i = 0; i < oproc->num_timers; i++) { - np = of_parse_phandle(dev->of_node, "timers", i); + for (i = 0; i < num_timers; i++) { + if (i < oproc->num_timers) + np = of_parse_phandle(dev->of_node, "timers", i); + else + np = of_parse_phandle(dev->of_node, "watchdog-timers", + (i - oproc->num_timers)); if (!np) { ret = -ENXIO; dev_err(dev, "device node lookup for timer at index %d failed: %d\n", - i, ret); + i < oproc->num_timers ? i : + i - oproc->num_timers, ret); goto free_timers; } @@ -270,12 +356,14 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) if (!timer_ops || !timer_ops->request_by_node || !timer_ops->set_source || !timer_ops->set_load || !timer_ops->free || !timer_ops->start || - !timer_ops->stop) { + !timer_ops->stop || !timer_ops->get_irq || + !timer_ops->write_status) { ret = -EINVAL; dev_err(dev, "device does not have required timer ops\n"); goto put_node; } + timers[i].irq = -1; timers[i].timer_ops = timer_ops; ret = omap_rproc_request_timer(np, &timers[i]); if (ret) { @@ -284,10 +372,33 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) goto put_node; } of_node_put(np); + + if (i >= oproc->num_timers) { + timers[i].irq = omap_rproc_get_timer_irq(&timers[i]); + if (timers[i].irq < 0) { + dev_err(dev, "get_irq for timer %p failed: %d\n", + np, timers[i].irq); + ret = -EBUSY; + goto free_timers; + } + + ret = request_irq(timers[i].irq, + omap_rproc_watchdog_isr, IRQF_SHARED, + "rproc-wdt", rproc); + if (ret) { + dev_err(dev, "error requesting irq for timer %p\n", + np); + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + timers[i].irq = -1; + goto free_timers; + } + } } start_timers: - for (i = 0; i < oproc->num_timers; i++) + for (i = 0; i < num_timers; i++) omap_rproc_start_timer(&timers[i]); return 0; @@ -295,9 +406,12 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) of_node_put(np); free_timers: while (i--) { + if (i >= oproc->num_timers) + free_irq(timers[i].irq, rproc); omap_rproc_release_timer(&timers[i]); timers[i].odt = NULL; timers[i].timer_ops = NULL; + timers[i].irq = -1; } return ret; @@ -318,16 +432,20 @@ static int omap_rproc_disable_timers(struct rproc *rproc, bool configure) int i; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_timer *timers = oproc->timers; + int num_timers = oproc->num_timers + oproc->num_wd_timers; - if (oproc->num_timers <= 0) + if (num_timers <= 0) return 0; - for (i = 0; i < oproc->num_timers; i++) { + for (i = 0; i < num_timers; i++) { omap_rproc_stop_timer(&timers[i]); if (configure) { + if (i >= oproc->num_timers) + free_irq(timers[i].irq, rproc); omap_rproc_release_timer(&timers[i]); timers[i].odt = NULL; timers[i].timer_ops = NULL; + timers[i].irq = -1; } } @@ -1120,6 +1238,7 @@ static int omap_rproc_probe(struct platform_device *pdev) struct omap_rproc *oproc; struct rproc *rproc; const char *firmware; + int num_timers; int ret; struct reset_control *reset; @@ -1173,16 +1292,27 @@ static int omap_rproc_probe(struct platform_device *pdev) oproc->num_timers = 0; } - if (oproc->num_timers) { +#ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG + oproc->num_wd_timers = of_count_phandle_with_args(np, "watchdog-timers", + NULL); + if (oproc->num_wd_timers <= 0) { + dev_dbg(&pdev->dev, "device does not have watchdog timers, status = %d\n", + oproc->num_wd_timers); + oproc->num_wd_timers = 0; + } +#endif + + if (oproc->num_timers || oproc->num_wd_timers) { + num_timers = oproc->num_timers + oproc->num_wd_timers; oproc->timers = devm_kzalloc(&pdev->dev, sizeof(*oproc->timers) - * oproc->num_timers, GFP_KERNEL); + * num_timers, GFP_KERNEL); if (!oproc->timers) { ret = -ENOMEM; goto free_rproc; } - dev_dbg(&pdev->dev, "device has %d tick timers\n", - oproc->num_timers); + dev_dbg(&pdev->dev, "device has %d tick timers and %d watchdog timers\n", + oproc->num_timers, oproc->num_wd_timers); } init_completion(&oproc->pm_comp); From patchwork Mon Oct 28 12:42:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 177923 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3339650ill; Mon, 28 Oct 2019 05:43:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqzi5KLy5GoqxXFVxe2fbIU0ZofX1keOVSUq8CzcjnxMk+GwYv/49q2uu1O8UmXcBJmOkzpi X-Received: by 2002:a17:906:d794:: with SMTP id pj20mr9441908ejb.184.1572266618121; Mon, 28 Oct 2019 05:43:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572266618; 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[209.132.180.67]) by mx.google.com with ESMTP id g3si6168162ejw.13.2019.10.28.05.43.37; Mon, 28 Oct 2019 05:43:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=MSpMeR3C; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389485AbfJ1Mnf (ORCPT + 26 others); Mon, 28 Oct 2019 08:43:35 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37336 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389444AbfJ1Mnb (ORCPT ); Mon, 28 Oct 2019 08:43:31 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SChUE9034373; Mon, 28 Oct 2019 07:43:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572266610; bh=RjOxaFJF9928MExwXsThcLzcc0mTulOCLUMie9VmrpA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=MSpMeR3C94Knhds1rQEhThX7xPi6ZtSwvVbqGp02NXI4Fkqcig9lrELGkDc6BgrFt YszypclGnQOdKrcPhm05WLNYVy+qC9SmYK7CI+NnkhAB3h+gyxtX6Yr83kjP1WjV1T eJwus7NTNAK391rb2ssBP+ud89SGvalyxKLEjxes= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SChUEr075731 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 07:43:30 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 07:43:17 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 07:43:29 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SCgoh9063574; Mon, 28 Oct 2019 07:43:27 -0500 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCH 17/17] remoteproc/omap: fix auto-suspend failure warning during crashed state Date: Mon, 28 Oct 2019 14:42:38 +0200 Message-ID: <20191028124238.19224-18-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028124238.19224-1-t-kristo@ti.com> References: <20191028124238.19224-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The runtime autosuspend on a OMAP remoteproc device is attempted when the suspend timer expires (autosuspend delay elapsed since the last time the device is busy). This is the normal autosuspend scenario for a device functioning normally. This timer can also expire during the debugging of a remoteproc crash when the remoteproc recovery is disabled. This is an invalid pre-condition though, so check for the RPROC_CRASHED state and bail out before the actual check for the RPROC_RUNNING state. The auto-suspend is also not re-attempted until the remoteproc is recovered and restored to normal functional state. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 2eb05d7a4dec..1dfac82224f7 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -945,6 +945,11 @@ static int omap_rproc_runtime_suspend(struct device *dev) struct omap_rproc *oproc = rproc->priv; int ret; + if (rproc->state == RPROC_CRASHED) { + dev_dbg(dev, "rproc cannot be runtime suspended when crashed!\n"); + return -EBUSY; + } + if (WARN_ON(rproc->state != RPROC_RUNNING)) { dev_err(dev, "rproc cannot be runtime suspended when not running!\n"); return -EBUSY;