From patchwork Mon Oct 28 09:10:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 177888 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2805759ocf; Mon, 28 Oct 2019 02:14:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqze6hX0rPj4sdN6Idhqw5yePcsVEtMWSt1nnQ/2qBoZfK301qiXzznDJc3h8ZA6OrsRq+xo X-Received: by 2002:aa7:c2d0:: with SMTP id m16mr1228398edp.215.1572254046845; Mon, 28 Oct 2019 02:14:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572254046; cv=none; d=google.com; s=arc-20160816; b=Q8P3RG99hlBzTEpttNlvYn68Y1StZOCaUVCK+FNNLE9rA9RpyqpP0d1INPlpH2NaF/ UlZDhBcAzE7hQch9R3ob0bDlx48IioL/wzcP0TyVbuoBsZtBCjfF3V9BN6a2CZUQGfKH qmqJbeywnRO6cz1l/kmMk6jyt7HUTjN8xD/D1DPxj/MvQt7+Ge6GhP/5he6/ZzQ/AbUU Kv9rTPoHiY1DzAjVmg3PyKFlQITR6GgDk//7fNhDL/SIpBiCpuVkftBFlSQbagAm7Brh 9MdyvRFe4yoV78P1uXb8cUUgi17ZhefbQ1iBRpLBM26rqAkQf64hCoyLKT/PTFOzknWP CI5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=Wnb+7DJ1AgBo8LkDLCxToA8eC/gfZNuGzczKsd5N1iE=; b=jMoBzDz+CyYC4dxcWMNr3YZYHpD7T1ASybDRmfBxWR/w2kD64IZF9+AnzUrVVCaAGl ziopwgjmBhehcvR9HOzqvdVpDHUEqWxMtbhlbu9B677n6VcD2f1gbFlbcN+XOLrYBRoH aIbEoAvKLXy9FRfBy46ZxN/0PoXJJBtbmX2mN9d4zgmP9uYRZyS0bmxEl+vtRdaQJbIX rOTpm2zTRKJMtyBmfC/A0zhCsNk7cAX7IjFr5eaZTvKGuJ6U8N15osv6WJAiTqsktgQq cKCGOHJswSfzfvjSGuWXNlbTo7rYeK7MaJjuXblSz9nZrNpwiU3SzLeiwhNUv7e6PA21 TWVg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h3si6750519edd.54.2019.10.28.02.13.58; Mon, 28 Oct 2019 02:14:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387846AbfJ1JNz (ORCPT + 26 others); Mon, 28 Oct 2019 05:13:55 -0400 Received: from inva020.nxp.com ([92.121.34.13]:54496 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387596AbfJ1JNz (ORCPT ); Mon, 28 Oct 2019 05:13:55 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 50C351A0706; Mon, 28 Oct 2019 10:13:52 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 021761A0715; Mon, 28 Oct 2019 10:13:47 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 7DCF2402E2; Mon, 28 Oct 2019 17:13:40 +0800 (SGT) From: Shengjiu Wang To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, broonie@kernel.org, alsa-devel@alsa-project.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH V3] ASoC: fsl_asrc: refine the setting of internal clock divider Date: Mon, 28 Oct 2019 17:10:29 +0800 Message-Id: <23c634e4bf58afce5b3ae67f5f42e8d1cae2639a.1572252307.git.shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The output divider should align with the output sample rate, if use ideal sample rate, there will be a lot of overload, which would cause underrun. The maximum divider of asrc clock is 1024, but there is no judgement for this limitation in driver, which may cause the divider setting not correct. For non-ideal ratio mode, the clock rate should divide the sample rate with no remainder, and the quotient should be less than 1024. Signed-off-by: Shengjiu Wang Acked-by: Nicolin Chen --- Change in v3 - refine comments Change in v2 - remove p2p/m2m word - use use_ideal_rate sound/soc/fsl/fsl_asrc.c | 45 ++++++++++++++++++++++++++++++---------- 1 file changed, 34 insertions(+), 11 deletions(-) -- 2.21.0 diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 0bf91a6f54b9..a3cfceea7d2f 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -259,8 +259,15 @@ static int fsl_asrc_set_ideal_ratio(struct fsl_asrc_pair *pair, * It configures those ASRC registers according to a configuration instance * of struct asrc_config which includes in/output sample rate, width, channel * and clock settings. + * + * Note: + * The ideal ratio configuration can work with a flexible clock rate setting. + * Using IDEAL_RATIO_RATE gives a faster converting speed but overloads ASRC. + * For a regular audio playback, the clock rate should not be slower than an + * clock rate aligning with the output sample rate; For a use case requiring + * faster conversion, set use_ideal_rate to have the faster speed. */ -static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) +static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) { struct asrc_config *config = pair->config; struct fsl_asrc *asrc_priv = pair->asrc_priv; @@ -268,7 +275,8 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) enum asrc_word_width input_word_width; enum asrc_word_width output_word_width; u32 inrate, outrate, indiv, outdiv; - u32 clk_index[2], div[2]; + u32 clk_index[2], div[2], rem[2]; + u64 clk_rate; int in, out, channels; int pre_proc, post_proc; struct clk *clk; @@ -351,27 +359,42 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) /* We only have output clock for ideal ratio mode */ clk = asrc_priv->asrck_clk[clk_index[ideal ? OUT : IN]]; - div[IN] = clk_get_rate(clk) / inrate; - if (div[IN] == 0) { + clk_rate = clk_get_rate(clk); + rem[IN] = do_div(clk_rate, inrate); + div[IN] = (u32)clk_rate; + + /* + * The divider range is [1, 1024], defined by the hardware. For non- + * ideal ratio configuration, clock rate has to be strictly aligned + * with the sample rate. For ideal ratio configuration, clock rates + * only result in different converting speeds. So remainder does not + * matter, as long as we keep the divider within its valid range. + */ + if (div[IN] == 0 || (!ideal && (div[IN] > 1024 || rem[IN] != 0))) { pair_err("failed to support input sample rate %dHz by asrck_%x\n", inrate, clk_index[ideal ? OUT : IN]); return -EINVAL; } + div[IN] = min_t(u32, 1024, div[IN]); + clk = asrc_priv->asrck_clk[clk_index[OUT]]; - - /* Use fixed output rate for Ideal Ratio mode (INCLK_NONE) */ - if (ideal) - div[OUT] = clk_get_rate(clk) / IDEAL_RATIO_RATE; + clk_rate = clk_get_rate(clk); + if (ideal && use_ideal_rate) + rem[OUT] = do_div(clk_rate, IDEAL_RATIO_RATE); else - div[OUT] = clk_get_rate(clk) / outrate; + rem[OUT] = do_div(clk_rate, outrate); + div[OUT] = clk_rate; - if (div[OUT] == 0) { + /* Output divider has the same limitation as the input one */ + if (div[OUT] == 0 || (!ideal && (div[OUT] > 1024 || rem[OUT] != 0))) { pair_err("failed to support output sample rate %dHz by asrck_%x\n", outrate, clk_index[OUT]); return -EINVAL; } + div[OUT] = min_t(u32, 1024, div[OUT]); + /* Set the channel number */ channels = config->channel_num; @@ -560,7 +583,7 @@ static int fsl_asrc_dai_hw_params(struct snd_pcm_substream *substream, config.output_sample_rate = rate; } - ret = fsl_asrc_config_pair(pair); + ret = fsl_asrc_config_pair(pair, false); if (ret) { dev_err(dai->dev, "fail to config asrc pair\n"); return ret;