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If these properties do not exist, fall back to legacy 'fsl,spi-cs-sck-delay' and 'fsl,spi-sck-cs-delay'. Signed-off-by: Frank Li --- Change from v3 to v4 - check spi_delay_to_ns() return value, which may return negative value as error code. It will be very big value when cast to u32. --- drivers/spi/spi-fsl-dspi.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 0a2730cd07c6a..191de1917f831 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -1006,6 +1006,7 @@ static int dspi_setup(struct spi_device *spi) struct chip_data *chip; unsigned long clkrate; bool cs = true; + int val; /* Only alloc on first setup */ chip = spi_get_ctldata(spi); @@ -1018,11 +1019,19 @@ static int dspi_setup(struct spi_device *spi) pdata = dev_get_platdata(&dspi->pdev->dev); if (!pdata) { - of_property_read_u32(spi->dev.of_node, "fsl,spi-cs-sck-delay", - &cs_sck_delay); - - of_property_read_u32(spi->dev.of_node, "fsl,spi-sck-cs-delay", - &sck_cs_delay); + val = spi_delay_to_ns(&spi->cs_setup, NULL); + cs_sck_delay = val >= 0 ? val : 0; + if (!cs_sck_delay) + of_property_read_u32(spi->dev.of_node, + "fsl,spi-cs-sck-delay", + &cs_sck_delay); + + val = spi_delay_to_ns(&spi->cs_hold, NULL); + sck_cs_delay = val >= 0 ? val : 0; + if (!sck_cs_delay) + of_property_read_u32(spi->dev.of_node, + "fsl,spi-sck-cs-delay", + &sck_cs_delay); } else { cs_sck_delay = pdata->cs_sck_delay; sck_cs_delay = pdata->sck_cs_delay; From patchwork Mon Jun 24 18:55:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 807206 Received: from EUR03-VI1-obe.outbound.protection.outlook.com (mail-vi1eur03on2047.outbound.protection.outlook.com [40.107.103.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9D2E1A00F9; Mon, 24 Jun 2024 18:56:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.103.47 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719255366; cv=fail; b=ptCU9CrWZDDSaW2XlsnyeTDtrCrp2yHmT+TVt7hAaKNzn7EJifwUX/nazWP3N1DSvYk/Eq+L8drifJlVFjjig1gmpE7qS1Kn4gI8n9Dv1dgiexuU3360gv7Msjkd/CyMyWjyj1fcehsJS1ly/uyLKKm8viXN8RKiusPVYitORl0= ARC-Message-Signature: i=2; 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Mon, 24 Jun 2024 18:56:00 +0000 From: Frank Li Date: Mon, 24 Jun 2024 14:55:28 -0400 Subject: [PATCH v4 2/3] spi: dt-bindings: fsl-dspi: Convert to yaml format Message-Id: <20240624-ls_qspi-v4-2-3d1c6f5005bf@nxp.com> References: <20240624-ls_qspi-v4-0-3d1c6f5005bf@nxp.com> In-Reply-To: <20240624-ls_qspi-v4-0-3d1c6f5005bf@nxp.com> To: Vladimir Oltean , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, Frank Li , Kuldeep Singh , Vladimir Oltean X-Mailer: b4 0.13-dev-e586c X-Developer-Signature: v=1; a=ed25519-sha256; t=1719255350; l=9546; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=G/DRGrVocyvETq+rGdmcTSv8wITZDgGEQQ67/lp1qLk=; b=l+4vQcvmorXujEmS8KIG8itUk7LoAXYMTAdUrTKUM+mE/SQrSe5Kz03TS9nXlSGVgzWJSqI/L hOGjJ5F2UBkCXkkAHmHSGzpmhJS9Sfa/XCoCEuZ44YbSUA8i1cJ3A/H X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; 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Use part Vladimir Oltean's work at of https://lore.kernel.org/linux-spi/20221111224651.577729-1-vladimir.oltean@nxp.com/ Additional changes during convert: - compatible string "fsl,ls1028a-dspi" can be followed by fsl,ls1021a-v1.0-dspi. - Change "dspi0@4002c000" to "spi@4002c000" in example. - Reorder properties in example. - Use GIC include in example. - Deprecated fsl,spi-cs-sck-delay and fsl,spi-sck-cs-delay by use common SPI property. - Use compatible string 'jedec,spi-nor' in example. - Split peripheral part to fsl,dspi-peripheral-props.yaml. - Remove 'interrupts' and 'pinctrl' from required list. - Update 'bus-num' description. - Update 'spi-num-chipselects' description by add "cs-gpios don't count against this number". - Remove 'big-endian' description. Co-developed-by: Kuldeep Singh Signed-off-by: Kuldeep Singh Co-developed-by: Vladimir Oltean Signed-off-by: Vladimir Oltean Signed-off-by: Frank Li Reviewed-by: Vladimir Oltean --- Change from v3 to v4 - Add Co-developed-by and Signed-off-by from Kuldeep and Vladimir - Remove 'interrupts' and 'pinctrl' from required list - Update 'bus-num' descripton. - Update 'spi-num-chipselects' description by add "cs-gpios don't count against this number". - Remove 'big-endian' description. --- .../bindings/spi/fsl,dspi-peripheral-props.yaml | 30 ++++++ .../devicetree/bindings/spi/fsl,dspi.yaml | 103 +++++++++++++++++++++ .../devicetree/bindings/spi/spi-fsl-dspi.txt | 65 ------------- .../bindings/spi/spi-peripheral-props.yaml | 1 + MAINTAINERS | 2 +- 5 files changed, 135 insertions(+), 66 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/fsl,dspi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/fsl,dspi-peripheral-props.yaml new file mode 100644 index 0000000000000..9b62b75e17a7f --- /dev/null +++ b/Documentation/devicetree/bindings/spi/fsl,dspi-peripheral-props.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/fsl,dspi-peripheral-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Peripheral-specific properties for Freescale DSPI controller + +maintainers: + - Vladimir Oltean + +description: + See spi-peripheral-props.yaml for more info. + +properties: + fsl,spi-cs-sck-delay: + deprecated: true + description: + Delay in nanoseconds between activating chip select and the start of + clock signal, at the start of a transfer. + $ref: /schemas/types.yaml#/definitions/uint32 + + fsl,spi-sck-cs-delay: + deprecated: true + description: + Delay in nanoseconds between stopping the clock signal and + deactivating chip select, at the end of a transfer. + $ref: /schemas/types.yaml#/definitions/uint32 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/fsl,dspi.yaml b/Documentation/devicetree/bindings/spi/fsl,dspi.yaml new file mode 100644 index 0000000000000..bd28335a6ac86 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/fsl,dspi.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/fsl,dspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Freescale DSPI controller + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - enum: + - fsl,vf610-dspi + - fsl,ls1021a-v1.0-dspi + - fsl,ls1012a-dspi + - fsl,ls1028a-dspi + - fsl,ls1043a-dspi + - fsl,ls1046a-dspi + - fsl,ls1088a-dspi + - fsl,ls2080a-dspi + - fsl,ls2085a-dspi + - fsl,lx2160a-dspi + - items: + - enum: + - fsl,ls1012a-dspi + - fsl,ls1028a-dspi + - fsl,ls1043a-dspi + - fsl,ls1046a-dspi + - fsl,ls1088a-dspi + - const: fsl,ls1021a-v1.0-dspi + - items: + - const: fsl,ls2080a-dspi + - const: fsl,ls2085a-dspi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: dspi + + spi-num-chipselects: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The number of the chip native chipselect signals. + cs-gpios don't count against this number. + + big-endian: true + + bus-num: + $ref: /schemas/types.yaml#/definitions/uint32 + description: SoC-specific identifier for the SPI controller. + +required: + - compatible + - reg + - clocks + - clock-names + - spi-num-chipselects + +allOf: + - $ref: spi-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + spi@4002c000 { + compatible = "fsl,vf610-dspi"; + reg = <0x4002c000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&clks VF610_CLK_DSPI0>; + clock-names = "dspi"; + spi-num-chipselects = <5>; + bus-num = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dspi0_1>; + big-endian; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <16000000>; + spi-cpol; + spi-cpha; + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <50>; + }; + }; diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt deleted file mode 100644 index 30a79da9c039d..0000000000000 --- a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt +++ /dev/null @@ -1,65 +0,0 @@ -ARM Freescale DSPI controller - -Required properties: -- compatible : must be one of: - "fsl,vf610-dspi", - "fsl,ls1021a-v1.0-dspi", - "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), - "fsl,ls1028a-dspi", - "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), - "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), - "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), - "fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"), - "fsl,ls2085a-dspi", - "fsl,lx2160a-dspi", -- reg : Offset and length of the register set for the device -- interrupts : Should contain SPI controller interrupt -- clocks: from common clock binding: handle to dspi clock. -- clock-names: from common clock binding: Shall be "dspi". -- pinctrl-0: pin control group to be used for this controller. -- pinctrl-names: must contain a "default" entry. -- spi-num-chipselects : the number of the chipselect signals. - -Optional property: -- big-endian: If present the dspi device's registers are implemented - in big endian mode. -- bus-num : the slave chip chipselect signal number. - -Optional SPI slave node properties: -- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip - select and the start of clock signal, at the start of a transfer. -- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock - signal and deactivating chip select, at the end of a transfer. - -Example: - -dspi0@4002c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,vf610-dspi"; - reg = <0x4002c000 0x1000>; - interrupts = <0 67 0x04>; - clocks = <&clks VF610_CLK_DSPI0>; - clock-names = "dspi"; - spi-num-chipselects = <5>; - bus-num = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_dspi0_1>; - big-endian; - - sflash: at26df081a@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,at26df081a"; - spi-max-frequency = <16000000>; - spi-cpol; - spi-cpha; - reg = <0>; - linux,modalias = "m25p80"; - modal = "at26df081a"; - fsl,spi-cs-sck-delay = <100>; - fsl,spi-sck-cs-delay = <50>; - }; -}; - - diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 15938f81fdce2..0bb443b8decda 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -122,6 +122,7 @@ properties: allOf: - $ref: arm,pl022-peripheral-props.yaml# - $ref: cdns,qspi-nor-peripheral-props.yaml# + - $ref: fsl,dspi-peripheral-props.yaml# - $ref: samsung,spi-peripheral-props.yaml# - $ref: nvidia,tegra210-quad-peripheral-props.yaml# diff --git a/MAINTAINERS b/MAINTAINERS index e04f583780c5f..25e485fad9ae8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8748,7 +8748,7 @@ FREESCALE DSPI DRIVER M: Vladimir Oltean L: linux-spi@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt +F: Documentation/devicetree/bindings/spi/fsl,dspi*.yaml F: drivers/spi/spi-fsl-dspi.c F: include/linux/spi/spi-fsl-dspi.h From patchwork Mon Jun 24 18:55:29 2024 Content-Type: text/plain; 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Signed-off-by: Frank Li --- Chang from v3 to v4 - fix typo at commit message - use comments: Standard CS timing properties replace the deprecated vendor variants below --- arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts index 26f8540cb101b..de23f5ebaafdb 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts @@ -104,6 +104,12 @@ flash@0 { compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */ reg = <0>; spi-max-frequency = <1000000>; /* input clock */ + /* + * Standard CS timing properties replace the deprecated vendor + * variants below. + */ + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <100>; fsl,spi-cs-sck-delay = <100>; fsl,spi-sck-cs-delay = <100>; }; @@ -112,6 +118,12 @@ slic@2 { compatible = "maxim,ds26522"; reg = <2>; spi-max-frequency = <2000000>; + /* + * Standard CS timing properties replace the deprecated vendor + * variants below. + */ + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <50>; fsl,spi-cs-sck-delay = <100>; fsl,spi-sck-cs-delay = <50>; }; @@ -120,6 +132,12 @@ slic@3 { compatible = "maxim,ds26522"; reg = <3>; spi-max-frequency = <2000000>; + /* + * Standard CS timing properties replace the deprecated vendor + * variants below. + */ + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <50>; fsl,spi-cs-sck-delay = <100>; fsl,spi-sck-cs-delay = <50>; };