From patchwork Fri Oct 25 07:13:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 177654 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3268809ill; Fri, 25 Oct 2019 00:16:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqy2oV2+t9IaK5SzITXQqdazP1KdqjLDGGIHnse55s/53BDrul9JQLyhwiFFlXIghXHWqYIm X-Received: by 2002:a17:906:1f16:: with SMTP id w22mr2022561ejj.5.1571987800530; Fri, 25 Oct 2019 00:16:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571987800; cv=none; d=google.com; s=arc-20160816; b=lbIPdpN9nNuSe4EQ0W7qdycc2LTgfuoMksL6oZcKNo81WZMGhqPnj1XUJPwq2NP+p7 pI6jWlq1EDC5w2ecfIGUd1b2aPEUxoNigVHXhEXlESi1XcGa8TT5VD5NG1k+0erVrY8r G+bc2qOmoSt6tfxSD3y9xXX5eIJHHOXYrrtrn/pa/T/NCGuSDQKzmB1sI6+pRv8sOZJP xoJ8F7nLPK32uX39YHg6pNYL9vqViltSC3Fb8lEAoDXDrLtHf2hIoxQNH+RJkAMEt0Iy l6Fg2KrWzfvqX+yCFLU+JIhTUc6u5oUJmXlQA0OXjS63pQHkvEkVfWi9VPXRTzknoGWf Aaug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=uU8AS5WLQfgRm2KxKLZ+PnLKC22kJO8nSU+sSm158EA=; b=wZICAD90CPMm2jluNx064XMC1wRT3ffuoDTzaZczVV8IPg1G9QKJs0rBmXHgRKj3B8 lonrE/LQyXXYNqRV3uOjGDTvwl0RWK19SNlzGfHN9HB9f7EfVADsyONNSniASvc2qzCl TENcfGOuOg9mlLRH7/fgqcoPt9btOsmvkBEJ4cVyBCgIR+dbkyD2n3i59gnebAImR4q0 tx9A6n7hdWxL6hF7UOR27wedWB+5YT/7e6xwkJO14AamnfqFcopjzRnIcg0Gut4OXa7T WSQGR7mLGMiRkKEqkvWV+/lq24u98dIX0mI4OAGmgN0Dtl3rq17/qh3W8mbz2NH9MrrD o4OQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id jr6si654077ejb.307.2019.10.25.00.16.40; Fri, 25 Oct 2019 00:16:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2406706AbfJYHQg (ORCPT + 26 others); Fri, 25 Oct 2019 03:16:36 -0400 Received: from inva020.nxp.com ([92.121.34.13]:54508 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406555AbfJYHQf (ORCPT ); Fri, 25 Oct 2019 03:16:35 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id EA5701A040B; Fri, 25 Oct 2019 09:16:32 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id C8FEC1A0412; Fri, 25 Oct 2019 09:16:27 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 8064C402BC; Fri, 25 Oct 2019 15:16:21 +0800 (SGT) From: Shengjiu Wang To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, broonie@kernel.org, alsa-devel@alsa-project.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH V2] ASoC: fsl_asrc: refine the setting of internal clock divider Date: Fri, 25 Oct 2019 15:13:22 +0800 Message-Id: X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The output divider should align with the output sample rate, if use ideal sample rate, there will be a lot of overload, which would cause underrun. The maximum divider of asrc clock is 1024, but there is no judgement for this limitaion in driver, which may cause the divider setting not correct. For non-ideal ratio mode, the clock rate should divide the sample rate with no remainder, and the quotient should be less than 1024. Signed-off-by: Shengjiu Wang --- Change in v2 - remove p2p/m2m word - use use_ideal_rate sound/soc/fsl/fsl_asrc.c | 37 +++++++++++++++++++++++++++---------- 1 file changed, 27 insertions(+), 10 deletions(-) -- 2.21.0 Acked-by: Nicolin Chen diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 0bf91a6f54b9..89cf333154c7 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -259,8 +259,11 @@ static int fsl_asrc_set_ideal_ratio(struct fsl_asrc_pair *pair, * It configures those ASRC registers according to a configuration instance * of struct asrc_config which includes in/output sample rate, width, channel * and clock settings. + * + * Note: + * use_ideal_rate = true is need by some case which need higher performance. */ -static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) +static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) { struct asrc_config *config = pair->config; struct fsl_asrc *asrc_priv = pair->asrc_priv; @@ -268,7 +271,8 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) enum asrc_word_width input_word_width; enum asrc_word_width output_word_width; u32 inrate, outrate, indiv, outdiv; - u32 clk_index[2], div[2]; + u32 clk_index[2], div[2], rem[2]; + u64 clk_rate; int in, out, channels; int pre_proc, post_proc; struct clk *clk; @@ -351,8 +355,10 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) /* We only have output clock for ideal ratio mode */ clk = asrc_priv->asrck_clk[clk_index[ideal ? OUT : IN]]; - div[IN] = clk_get_rate(clk) / inrate; - if (div[IN] == 0) { + clk_rate = clk_get_rate(clk); + rem[IN] = do_div(clk_rate, inrate); + div[IN] = (u32)clk_rate; + if (div[IN] == 0 || (!ideal && (div[IN] > 1024 || rem[IN] != 0))) { pair_err("failed to support input sample rate %dHz by asrck_%x\n", inrate, clk_index[ideal ? OUT : IN]); return -EINVAL; @@ -360,18 +366,29 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) clk = asrc_priv->asrck_clk[clk_index[OUT]]; - /* Use fixed output rate for Ideal Ratio mode (INCLK_NONE) */ - if (ideal) - div[OUT] = clk_get_rate(clk) / IDEAL_RATIO_RATE; + /* + * Output rate should be align with the out samplerate. If set too + * high output rate, there will be lots of Overload. + * But some case need higher performance, then we can use + * IDEAL_RATIO_RATE specifically for such case. + */ + clk_rate = clk_get_rate(clk); + if (ideal && use_ideal_rate) + rem[OUT] = do_div(clk_rate, IDEAL_RATIO_RATE); else - div[OUT] = clk_get_rate(clk) / outrate; + rem[OUT] = do_div(clk_rate, outrate); + div[OUT] = clk_rate; - if (div[OUT] == 0) { + if (div[OUT] == 0 || (!ideal && (div[OUT] > 1024 || rem[OUT] != 0))) { pair_err("failed to support output sample rate %dHz by asrck_%x\n", outrate, clk_index[OUT]); return -EINVAL; } + /* Divider range is [1, 1024] */ + div[IN] = min_t(u32, 1024, div[IN]); + div[OUT] = min_t(u32, 1024, div[OUT]); + /* Set the channel number */ channels = config->channel_num; @@ -560,7 +577,7 @@ static int fsl_asrc_dai_hw_params(struct snd_pcm_substream *substream, config.output_sample_rate = rate; } - ret = fsl_asrc_config_pair(pair); + ret = fsl_asrc_config_pair(pair, false); if (ret) { dev_err(dai->dev, "fail to config asrc pair\n"); return ret;