From patchwork Thu Oct 24 14:21:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 177522 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2265551ill; Thu, 24 Oct 2019 07:25:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqwUi6HIkCM3GdAuOBItFYuo+KPWgLN7ETlSIiEs0ZUd7XHywKpmEe+FHocnIf6SIe8WZzFn X-Received: by 2002:a17:906:3ec8:: with SMTP id d8mr38418279ejj.57.1571927100817; Thu, 24 Oct 2019 07:25:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571927100; cv=none; d=google.com; s=arc-20160816; b=A0wf6MRFBKgeFNIelEIkWmFm2OIR9qh12JvaMPDrg3cDUCfZABtv3XKS0z6yNGzCSI SCrxWXoUp7164okD2SXj4lq2XAbq2h0z1TgWxZgwHVzAJvHIS117Xxl0yVy+4HsvXV3m K2e/LGBsCADcFNVGqIh1RzQ6W+IYhdG4k7QfryCISBTG/5VCJgYaM8MV7AlUBc6Hx55N x0dQNGxYFYBxZBdrWyXhNwPtqgFcZmcjhmikILbL0nPPLbmEJkB0Ch1Lw6AgdI+MIxpj 5NxTW2T61z34SQUynqxO4v6amFZFlDFbRwxDax+g4zxn9tYE4y3kZQFjuh2xpZ9QdZyN Gj6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=ApmAaiR9PqJ1Xp8Qkc4u4n77WdRomGUBPcg/DmN5w5k=; b=osIQpm/ESX49DvUQKFnKmhR0PP45PHYdHMp7qxp8DQtYQrjrhqZnCEy24wd4QGUxHd RtX7Hvft4r/PzQYQWzWpvgTDDPe43pcQshXlpOEE1WBTyZSLfOv/N4yRpcydQUim/qU/ WwcNVnQLbGe774VwZrtrkExMmRV1YgcZuwJp0B8TaQvmU3Xgb1nPRCSKBVSsZG7ns3aS I3MI1DjR5Y2PiMxZEU8x5p7DQOxRpXYu9SUIw20cInG/4olzrTu6sOxkbyeWGkj2EUZr NomnN5GgYtqga4meusV6qo/k06aJi9728ktUiaY++9A9XJRlWiZIPYIhF6cM8cx15GrU v/iQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w56si4031696eda.376.2019.10.24.07.25.00; Thu, 24 Oct 2019 07:25:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2502717AbfJXOY6 (ORCPT + 26 others); Thu, 24 Oct 2019 10:24:58 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:32828 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2409404AbfJXOY4 (ORCPT ); Thu, 24 Oct 2019 10:24:56 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 3F24D3117FE96FF371F1; Thu, 24 Oct 2019 22:24:50 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.439.0; Thu, 24 Oct 2019 22:24:40 +0800 From: John Garry To: , CC: , , , , , "John Garry" Subject: [PATCH 1/6] scsi: hisi_sas: Use sbitmap for IPTT management Date: Thu, 24 Oct 2019 22:21:16 +0800 Message-ID: <1571926881-75524-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1571926881-75524-1-git-send-email-john.garry@huawei.com> References: <1571926881-75524-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Using sbitmap will be more efficient in scenarios where we generate the IPTT in the driver, so make the transition. For non-v2 hw, we only use the sbitmap to manage reserved tags. For v2 hw, we use separate sbitmap sets to manage SAS/SMP and SATA tags. Using separate SATA sbitmaps for v2 hw was suggested by Hannes Reinecke. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas.h | 7 +- drivers/scsi/hisi_sas/hisi_sas_main.c | 82 +++++++------------ drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 107 +++++++++++++++++-------- 3 files changed, 109 insertions(+), 87 deletions(-) -- 2.17.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h index 233c73e01246..fbfaa92765cf 100644 --- a/drivers/scsi/hisi_sas/hisi_sas.h +++ b/drivers/scsi/hisi_sas/hisi_sas.h @@ -279,6 +279,8 @@ struct hisi_sas_hw { struct hisi_sas_device *device); int (*slot_index_alloc)(struct hisi_hba *hisi_hba, struct domain_device *device); + void (*slot_index_free)(struct hisi_hba *hisi_hba, int slot_idx); + int (*bitmaps_alloc)(struct hisi_hba *hisi_hba); struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); void (*start_delivery)(struct hisi_sas_dq *dq); @@ -388,10 +390,9 @@ struct hisi_hba { struct timer_list timer; struct workqueue_struct *wq; - int slot_index_count; int last_slot_index; int last_dev_id; - unsigned long *slot_index_tags; + struct sbitmap slot_index_tags; unsigned long reject_stp_links_msk; /* SCSI/SAS glue */ @@ -424,6 +425,8 @@ struct hisi_hba { unsigned long flags; const struct hisi_sas_hw *hw; /* Low level hw interface */ unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; + struct sbitmap sata_slot_index_tags[HISI_SAS_MAX_DEVICES]; + int sbitmap_alloc_hint; struct work_struct rst_work; struct work_struct debugfs_work; u32 phy_state; diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index a7af9483b678..f4937da9baf8 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -156,65 +156,36 @@ EXPORT_SYMBOL_GPL(hisi_sas_stop_phys); static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx) { - void *bitmap = hisi_hba->slot_index_tags; + struct sbitmap *slot_index_tags = &hisi_hba->slot_index_tags; - clear_bit(slot_idx, bitmap); + sbitmap_clear_bit(slot_index_tags, slot_idx); } static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx) { - unsigned long flags; - - if (hisi_hba->hw->slot_index_alloc || - slot_idx >= HISI_SAS_UNRESERVED_IPTT) { - spin_lock_irqsave(&hisi_hba->lock, flags); - hisi_sas_slot_index_clear(hisi_hba, slot_idx); - spin_unlock_irqrestore(&hisi_hba->lock, flags); - } -} - -static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx) -{ - void *bitmap = hisi_hba->slot_index_tags; - - set_bit(slot_idx, bitmap); + if (hisi_hba->hw->slot_index_free) + hisi_hba->hw->slot_index_free(hisi_hba, slot_idx); + else if (slot_idx >= HISI_SAS_UNRESERVED_IPTT) + hisi_sas_slot_index_clear(hisi_hba, + slot_idx - HISI_SAS_UNRESERVED_IPTT); } static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba, struct scsi_cmnd *scsi_cmnd) { + struct sbitmap *slot_index_tags = &hisi_hba->slot_index_tags; int index; - void *bitmap = hisi_hba->slot_index_tags; - unsigned long flags; if (scsi_cmnd) return scsi_cmnd->request->tag; - spin_lock_irqsave(&hisi_hba->lock, flags); - index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count, - hisi_hba->last_slot_index + 1); - if (index >= hisi_hba->slot_index_count) { - index = find_next_zero_bit(bitmap, - hisi_hba->slot_index_count, - HISI_SAS_UNRESERVED_IPTT); - if (index >= hisi_hba->slot_index_count) { - spin_unlock_irqrestore(&hisi_hba->lock, flags); - return -SAS_QUEUE_FULL; - } - } - hisi_sas_slot_index_set(hisi_hba, index); - hisi_hba->last_slot_index = index; - spin_unlock_irqrestore(&hisi_hba->lock, flags); + index = sbitmap_get(slot_index_tags, hisi_hba->sbitmap_alloc_hint, + false); + if (index == -1) + return index; + hisi_hba->sbitmap_alloc_hint = (index + 1) % slot_index_tags->depth; - return index; -} - -static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba) -{ - int i; - - for (i = 0; i < hisi_hba->slot_index_count; ++i) - hisi_sas_slot_index_clear(hisi_hba, i); + return index + HISI_SAS_UNRESERVED_IPTT; } void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task, @@ -481,7 +452,7 @@ static int hisi_sas_task_prep(struct sas_task *task, scsi_cmnd = task->uldd_task; } } - rc = hisi_sas_slot_index_alloc(hisi_hba, scsi_cmnd); + rc = hisi_sas_slot_index_alloc(hisi_hba, scsi_cmnd); } if (rc < 0) goto err_out_dif_dma_unmap; @@ -1957,7 +1928,10 @@ hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id, port = to_hisi_sas_port(sas_port); /* simply get a slot and send abort command */ - rc = hisi_sas_slot_index_alloc(hisi_hba, NULL); + if (hisi_hba->hw->slot_index_alloc) + rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device); + else + rc = hisi_sas_slot_index_alloc(hisi_hba, NULL); if (rc < 0) goto err_out; @@ -2309,7 +2283,7 @@ int hisi_sas_alloc(struct hisi_hba *hisi_hba) struct device *dev = hisi_hba->dev; int i, j, s, max_command_entries = HISI_SAS_MAX_COMMANDS; int max_command_entries_ru, sz_slot_buf_ru; - int blk_cnt, slots_per_blk; + int blk_cnt, slots_per_blk, rc; sema_init(&hisi_hba->sem, 1); spin_lock_init(&hisi_hba->lock); @@ -2415,10 +2389,13 @@ int hisi_sas_alloc(struct hisi_hba *hisi_hba) if (!hisi_hba->breakpoint) goto err_out; - hisi_hba->slot_index_count = max_command_entries; - s = hisi_hba->slot_index_count / BITS_PER_BYTE; - hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL); - if (!hisi_hba->slot_index_tags) + if (hisi_hba->hw->bitmaps_alloc) + rc = hisi_hba->hw->bitmaps_alloc(hisi_hba); + else + rc = sbitmap_init_node(&hisi_hba->slot_index_tags, + HISI_SAS_RESERVED_IPTT, -1, + GFP_KERNEL, dev_to_node(dev)); + if (rc) goto err_out; s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS; @@ -2435,7 +2412,6 @@ int hisi_sas_alloc(struct hisi_hba *hisi_hba) if (!hisi_hba->sata_breakpoint) goto err_out; - hisi_sas_slot_index_init(hisi_hba); hisi_hba->last_slot_index = HISI_SAS_UNRESERVED_IPTT; hisi_hba->wq = create_singlethread_workqueue(dev_name(dev)); @@ -2460,6 +2436,10 @@ void hisi_sas_free(struct hisi_hba *hisi_hba) del_timer_sync(&phy->timer); } + sbitmap_free(&hisi_hba->slot_index_tags); + for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) + sbitmap_free(&hisi_hba->sata_slot_index_tags[i]); + if (hisi_hba->wq) destroy_workqueue(hisi_hba->wq); } diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c index 61b1e2693b08..683e1b99c9ae 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c @@ -763,59 +763,96 @@ static u32 hisi_sas_phy_read32(struct hisi_hba *hisi_hba, return readl(regs); } -/* This function needs to be protected from pre-emption. */ +static int bitmaps_alloc_v2_hw(struct hisi_hba *hisi_hba) +{ + struct device *dev = hisi_hba->dev; + int sata_idx, i; + + if (sbitmap_init_node(&hisi_hba->slot_index_tags, + HISI_SAS_MAX_COMMANDS / 2, -1, + GFP_KERNEL, dev_to_node(hisi_hba->dev))) + return -ENOMEM; + + for (sata_idx = 0; sata_idx < HISI_MAX_SATA_SUPPORT_V2_HW; sata_idx++) { + if (sbitmap_init_node(&hisi_hba->sata_slot_index_tags[sata_idx], + 32, -1, GFP_KERNEL, dev_to_node(dev))) + goto free_slot_index_tags; + } + + return 0; + +free_slot_index_tags: + sbitmap_free(&hisi_hba->slot_index_tags); + for (i = 0; i < HISI_MAX_SATA_SUPPORT_V2_HW; i++) + sbitmap_free(&hisi_hba->sata_slot_index_tags[sata_idx]); + + return -ENOMEM; +} + static int slot_index_alloc_quirk_v2_hw(struct hisi_hba *hisi_hba, struct domain_device *device) { + struct sbitmap *slot_index_tags; int sata_dev = dev_is_sata(device); - void *bitmap = hisi_hba->slot_index_tags; struct hisi_sas_device *sas_dev = device->lldd_dev; int sata_idx = sas_dev->sata_idx; - int start, end; - unsigned long flags; + int start; + + if (sata_dev) { + int start; + int base = 64 * (sata_idx + 1); - if (!sata_dev) { - /* - * STP link SoC bug workaround: index starts from 1. - * additionally, we can only allocate odd IPTT(1~4095) - * for SAS/SMP device. - */ - start = 1; - end = hisi_hba->slot_index_count; - } else { if (sata_idx >= HISI_MAX_SATA_SUPPORT_V2_HW) return -EINVAL; - /* * For SATA device: allocate even IPTT in this interval * [64*(sata_idx+1), 64*(sata_idx+2)], then each SATA device * own 32 IPTTs. IPTT 0 shall not be used duing to STP link * SoC bug workaround. So we ignore the first 32 even IPTTs. */ - start = 64 * (sata_idx + 1); - end = 64 * (sata_idx + 2); - } - spin_lock_irqsave(&hisi_hba->lock, flags); - while (1) { - start = find_next_zero_bit(bitmap, - hisi_hba->slot_index_count, start); - if (start >= end) { - spin_unlock_irqrestore(&hisi_hba->lock, flags); - return -SAS_QUEUE_FULL; - } - /* - * SAS IPTT bit0 should be 1, and SATA IPTT bit0 should be 0. - */ - if (sata_dev ^ (start & 1)) - break; - start++; + slot_index_tags = &hisi_hba->sata_slot_index_tags[sata_idx]; + + start = sbitmap_get(slot_index_tags, 0, true); + if (start == -1) + return -ENOMEM; + start *= 2; + return start + base; } - set_bit(start, bitmap); - spin_unlock_irqrestore(&hisi_hba->lock, flags); - return start; + slot_index_tags = &hisi_hba->slot_index_tags; + start = sbitmap_get(slot_index_tags, hisi_hba->sbitmap_alloc_hint, + true); + if (start == -1) + return -ENOMEM; + + /* + * SAS/SMP IPTT bit0 should be 1, and SATA IPTT bit0 should be 0. + */ + return (start * 2) + 1; +} + +static void slot_index_free_quirk_v2_hw(struct hisi_hba *hisi_hba, int slot_idx) +{ + struct sbitmap *slot_index_tags; + + if (slot_idx & 1) { + int start = (slot_idx - 1) / 2; + + slot_index_tags = &hisi_hba->slot_index_tags; + sbitmap_clear_bit(&hisi_hba->slot_index_tags, start); + hisi_hba->sbitmap_alloc_hint = (start + 1) % + slot_index_tags->depth; + } else { + int sata_idx = (slot_idx / 64) - 1; + int base = 64 * (sata_idx + 1); + + slot_index_tags = &hisi_hba->sata_slot_index_tags[sata_idx]; + slot_idx -= base; + slot_idx /= 2; + sbitmap_clear_bit(slot_index_tags, slot_idx); + } } static bool sata_index_alloc_v2_hw(struct hisi_hba *hisi_hba, int *idx) @@ -3559,6 +3596,8 @@ static const struct hisi_sas_hw hisi_sas_v2_hw = { .hw_init = hisi_sas_v2_init, .setup_itct = setup_itct_v2_hw, .slot_index_alloc = slot_index_alloc_quirk_v2_hw, + .slot_index_free = slot_index_free_quirk_v2_hw, + .bitmaps_alloc = bitmaps_alloc_v2_hw, .alloc_dev = alloc_dev_quirk_v2_hw, .sl_notify_ssp = sl_notify_ssp_v2_hw, .get_wideport_bitmap = get_wideport_bitmap_v2_hw, From patchwork Thu Oct 24 14:21:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 177521 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2265532ill; Thu, 24 Oct 2019 07:25:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqxHxwm5T1gTFfMBcfMmykpHYenaVXEu8VT+lPprtS3nXgLZs5nSY3uZ1aPTZ4yB1E/BoSgZ X-Received: by 2002:a05:6402:1a55:: with SMTP id bf21mr20823211edb.61.1571927099954; Thu, 24 Oct 2019 07:24:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571927099; cv=none; d=google.com; s=arc-20160816; b=HXZXjpezttc+ko5BpOsaCviIGYPNGX/PDtXnDP6O7Cn4ui+oL+Y+p87XcW/FNrBqQd ZxNn6b5S2R2k4+Fs02BaR+8uy99mpAfvn7jOICmwCffFunpLxXvpAq/Fx7hLVn/aAfN8 mtn8Vw+amSCRxzrhOW2Lujfyf0j0UXj7Dmrz8T88m6vI6D/RlUv9sFWgku3hZ2R8GMcM hHVR+edZW52QzCSCZnfYRgtMgnlawKjGZb5rMlJsaoc+M58JJ8BlKQyw2A0zlxHqN7YR LnTI5Wo4Piid10v4I606fMSpNaDqUHl+UkBYxuLbL5l0EyC+SaD3Ebk2oKKpvCfkGZ7b z9Cg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=YWnviruY8vK+DMfnPrsbc3t9oUQJB4wDk2zM3T7WYVQ=; b=U2oho3X9dA3EoOSUYlb5ASaFj6PzFCNFor0CGdAOwsdlUqW/6qyV+GOpSn8V87EYyq lwzqHltRz9Qjo27YpA1K4F+eGNoO23+pjoWvNZaK+RQsLDnOtFDOJ5o9h4tRyPnajDnM cfeEhKd0Cdxj3Wd5Ue1KwpGEo2hMQ1b9KyNLC8dWLJuOQ9dRk65qIWol4qeRKnSM0MRy 8Bi7frSDt/XWKleeJOubH2el0wSJeADfhrtx0EXwZ4lpKSObY+ZIzFUFiqBCHdKL6Djt KnB8jl19s9c38GfoWnh5s2c1rBOou4tR92PQCy6MazugAiU2lHn3GL16sTAUeT5B+x25 5bug== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w56si4031696eda.376.2019.10.24.07.24.59; Thu, 24 Oct 2019 07:24:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2409441AbfJXOYz (ORCPT + 26 others); Thu, 24 Oct 2019 10:24:55 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:4759 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2409390AbfJXOYx (ORCPT ); Thu, 24 Oct 2019 10:24:53 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 97E4D15FBED8605D361F; Thu, 24 Oct 2019 22:24:50 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.439.0; Thu, 24 Oct 2019 22:24:40 +0800 From: John Garry To: , CC: , , , , , "John Garry" Subject: [PATCH 3/6] scsi: hisi_sas: Add bitmaps_alloc_v3_hw() Date: Thu, 24 Oct 2019 22:21:18 +0800 Message-ID: <1571926881-75524-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1571926881-75524-1-git-send-email-john.garry@huawei.com> References: <1571926881-75524-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We will want to make this non-generic in future. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.17.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 2ae7070db41a..a46717efb870 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -556,6 +556,13 @@ static u32 hisi_sas_phy_read32(struct hisi_hba *hisi_hba, readl_poll_timeout_atomic(regs, val, cond, delay_us, timeout_us);\ }) +static int bitmaps_alloc_v3_hw(struct hisi_hba *hisi_hba) +{ + return sbitmap_init_node(&hisi_hba->slot_index_tags, + HISI_SAS_UNRESERVED_IPTT, -1, + GFP_KERNEL, dev_to_node(hisi_hba->dev)); +} + static void init_reg_v3_hw(struct hisi_hba *hisi_hba) { int i; @@ -3083,6 +3090,7 @@ static struct scsi_host_template sht_v3_hw = { static const struct hisi_sas_hw hisi_sas_v3_hw = { .hw_init = hisi_sas_v3_init, .setup_itct = setup_itct_v3_hw, + .bitmaps_alloc = bitmaps_alloc_v3_hw, .get_wideport_bitmap = get_wideport_bitmap_v3_hw, .complete_hdr_size = sizeof(struct hisi_sas_complete_v3_hdr), .clear_itct = clear_itct_v3_hw, From patchwork Thu Oct 24 14:21:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 177524 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2265896ill; Thu, 24 Oct 2019 07:25:14 -0700 (PDT) X-Google-Smtp-Source: APXvYqyBg75+P2rsTn7hU0oDoavMM4kNJmq5x9SOtXR6+WzRluIlg+QWuavKEqK6NL4q1B9TcBxU X-Received: by 2002:a17:906:2550:: with SMTP id j16mr12352989ejb.239.1571927113962; Thu, 24 Oct 2019 07:25:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571927113; cv=none; d=google.com; s=arc-20160816; b=h0flYxPEoP3QorCTy3HTTWNQ3CTxnWMriAdI8vsGOJzV83td51cokdPKv2vIhscjvw ww5XJPTMevjFsZlbaBjSQgBHwofFgthzXR2bZAVwvInuRbQfDSJqlmVCmywVXmDym4FJ v9nKeCRIzj8O0ZFTFfgiKtBOaOx/mH4iZ/VAfFl6T1fGlSEpac3My0pLS9r2kuCh50MP dWATKEh/u7U6W4Ovz5cTeX0qJgZ12lh+EG3iuVsOD1Twex18ncpLzM90yLGzTK0F1mzG XgGt3b5kKfF4B/sQ/HcAsVW4l8uYPx2CgjVJ/+VkHkKNUhesZWVnElmvST/OrO4ktAgD 0hrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=dthpy2cdcdaJydXm3i2mbXcxDOdRZHYgtIYzbd2yNic=; b=L3k6smWXee7jTRYt87OguDhqZUKZW7WTfu7xi3gLCfYrc+9DwYUdZ7GQebqee8rS0h /wnTBYyG829iDvTkDdpGLv6KHpKCHcr0t1FRf8m1QFH/pDQpl2iBqx39GX5tYRR7cu9n rD9rFeeAmYpS4S/rW/hez0xhgb9lwQZhhODiLpfRzm6JrBikpErrWyuiCNZvpnd84Xt9 pF/t1Bw+RjT9f9FqIh2AYF1kM1d48zKF+PN/9WkY431e7FCE33Vl+L8Y4F9JSPnxvea/ Bw+i3WODY0+reHT5liZG9CIZZApsoEzy3BPTRs46/W4FfzPR7Cs4o16OIq70DcKzzmy4 R9Zw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l22si14480470ejr.149.2019.10.24.07.25.13; Thu, 24 Oct 2019 07:25:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2502827AbfJXOZJ (ORCPT + 26 others); Thu, 24 Oct 2019 10:25:09 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:32834 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1732393AbfJXOYy (ORCPT ); Thu, 24 Oct 2019 10:24:54 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 46566FB19A85F1FDF07C; Thu, 24 Oct 2019 22:24:50 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.439.0; Thu, 24 Oct 2019 22:24:41 +0800 From: John Garry To: , CC: , , , , , "John Garry" Subject: [PATCH 4/6] scsi: hisi_sas: Add slot_index_alloc_v3_hw() and slot_index_free_v3_hw() Date: Thu, 24 Oct 2019 22:21:19 +0800 Message-ID: <1571926881-75524-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1571926881-75524-1-git-send-email-john.garry@huawei.com> References: <1571926881-75524-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We will want to make these non-generic in future. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 27 ++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) -- 2.17.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index a46717efb870..497bbf6964f6 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -563,6 +563,31 @@ static int bitmaps_alloc_v3_hw(struct hisi_hba *hisi_hba) GFP_KERNEL, dev_to_node(hisi_hba->dev)); } +static int slot_index_alloc_v3_hw(struct hisi_hba *hisi_hba, + struct domain_device *device, + struct scsi_cmnd *scmd) +{ + struct sbitmap *slot_index_tags = &hisi_hba->slot_index_tags; + int index; + + if (scmd) + return scmd->request->tag; + + index = sbitmap_get(slot_index_tags, 0, false); + if (index == -1) + return index; + return index + HISI_SAS_UNRESERVED_IPTT; +} + +static void slot_index_free_v3_hw(struct hisi_hba *hisi_hba, int slot_idx) +{ + struct sbitmap *slot_index_tags = &hisi_hba->slot_index_tags; + + if (slot_idx >= HISI_SAS_UNRESERVED_IPTT) + sbitmap_clear_bit(slot_index_tags, + slot_idx - HISI_SAS_UNRESERVED_IPTT); +} + static void init_reg_v3_hw(struct hisi_hba *hisi_hba) { int i; @@ -3090,6 +3115,8 @@ static struct scsi_host_template sht_v3_hw = { static const struct hisi_sas_hw hisi_sas_v3_hw = { .hw_init = hisi_sas_v3_init, .setup_itct = setup_itct_v3_hw, + .slot_index_alloc = slot_index_alloc_v3_hw, + .slot_index_free = slot_index_free_v3_hw, .bitmaps_alloc = bitmaps_alloc_v3_hw, .get_wideport_bitmap = get_wideport_bitmap_v3_hw, .complete_hdr_size = sizeof(struct hisi_sas_complete_v3_hdr), From patchwork Thu Oct 24 14:21:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 177519 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2265409ill; Thu, 24 Oct 2019 07:24:54 -0700 (PDT) X-Google-Smtp-Source: APXvYqxZ5U6QURXVUTgEODKTj7/9YK0qUU9b0Iz/iTKaZ6WMq8MxpT4PDPx5C+crJ2bgl2CWUdxF X-Received: by 2002:aa7:d714:: with SMTP id t20mr1476809edq.129.1571927094542; Thu, 24 Oct 2019 07:24:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571927094; cv=none; d=google.com; s=arc-20160816; b=Zkv0T1YkCupIa8i76rm12lGJGPG3e4qhMtVwmp3YnmpPTaV6fTuDff0nuWPh76Jw3Z +XwiK4VA1mVx1EDC47c3rONLmJucel2m4mMFoid37BdIWvmv+ZinUoY7IucIxEYMOdq6 zhsYDXFlwU/5K87H2Hix1D2fUcsXnUkCCI+W+pp29mLzABQmjlwl/fWT+S8PU6jnE2X3 bMAEQrf3xMWnWN8LBVkR/+ab1xZufh/PHOvx/cW3rNWwiRbiKGP63WSvumT8lnNjdanZ UzKmhuvb1ixEb1+NSZd+nFylftPKakWREwDQsTYQkyytb/8Q86sfu5OvTrha8LVkwmVf uswQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=aSCoNqNy3xGLxMpXwVIvvD6y1m+KCuLYrhI8jmrHN7w=; b=OsGoEhWPmwlsCVXjn3VNIHoCge5WP3D5gbq0uBn4gnap9CU7H1/q9j3+0JpTYUIX/9 QDQDMvDg427+MO5vTDjaVbJDJ4hMlKqeKWJ7YIg932HN0ayappjTKq7WNTb2jOhxOBzc Vdpmnt/3tmwGvy8tyjIGTqGaJ/ckU9/RUv7E640k+3MMA8Vhq/QpHC1rQ96yr6+AZCCS Yow6kRF6+Es2HqiSR0tbLvmzzf8K3cuJ3TtAp+PkIgvjwbfxe4d+/WV6MRL2lvR5kDPe 2t6qVk2YLN+afoqTYDKgI4z0ga+tyY9HHBAOoIdDXFwB17IOV56eItgO1FopXdrozVDu PCbw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id jo18si15183629ejb.27.2019.10.24.07.24.54; Thu, 24 Oct 2019 07:24:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2409416AbfJXOYx (ORCPT + 26 others); Thu, 24 Oct 2019 10:24:53 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:52470 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2409387AbfJXOYx (ORCPT ); Thu, 24 Oct 2019 10:24:53 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 6567F4D347CCF59F7DB4; Thu, 24 Oct 2019 22:24:50 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.439.0; Thu, 24 Oct 2019 22:24:41 +0800 From: John Garry To: , CC: , , , , , "John Garry" Subject: [PATCH 5/6] scsi: hisi_sas: Split interrupt_init_v3_hw() Date: Thu, 24 Oct 2019 22:21:20 +0800 Message-ID: <1571926881-75524-6-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1571926881-75524-1-git-send-email-john.garry@huawei.com> References: <1571926881-75524-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To expose multiple queues to the upper layer we will need to do some interrupt initialisation earlier - that being to calculate the vectors - so split interrupt_init_v3_hw(). Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 497bbf6964f6..29119d0b27a7 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -2409,11 +2409,10 @@ static void setup_reply_map_v3_hw(struct hisi_hba *hisi_hba, int nvecs) /* Don't clean all CQ masks */ } -static int interrupt_init_v3_hw(struct hisi_hba *hisi_hba) +static int interrupt_preinit_v3_hw(struct hisi_hba *hisi_hba) { struct device *dev = hisi_hba->dev; - struct pci_dev *pdev = hisi_hba->pci_dev; - int vectors, rc, i; + int vectors; int max_msi = HISI_SAS_MSI_COUNT_V3_HW, min_msi; if (auto_affine_msi_experimental) { @@ -2445,6 +2444,14 @@ static int interrupt_init_v3_hw(struct hisi_hba *hisi_hba) } hisi_hba->cq_nvecs = vectors - BASE_VECTORS_V3_HW; + return 0; +} + +static int interrupt_init_v3_hw(struct hisi_hba *hisi_hba) +{ + struct device *dev = hisi_hba->dev; + struct pci_dev *pdev = hisi_hba->pci_dev; + int rc, i; rc = devm_request_irq(dev, pci_irq_vector(pdev, 1), int_phy_up_down_bcast_v3_hw, 0, @@ -3284,6 +3291,9 @@ hisi_sas_v3_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (hisi_sas_debugfs_enable) hisi_sas_debugfs_init(hisi_hba); + rc = interrupt_preinit_v3_hw(hisi_hba); + if (rc) + goto err_out_ha; rc = scsi_add_host(shost, dev); if (rc) goto err_out_ha; From patchwork Thu Oct 24 14:21:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 177523 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2265724ill; Thu, 24 Oct 2019 07:25:07 -0700 (PDT) X-Google-Smtp-Source: APXvYqxNs/4/HH7D6lJNsC1ulxR9C2QQcetoE7YGLfnkSbdyN+j0KzgL2mwPMLbSTEks03HftreK X-Received: by 2002:aa7:db88:: with SMTP id u8mr9498458edt.278.1571927107234; Thu, 24 Oct 2019 07:25:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571927107; cv=none; d=google.com; s=arc-20160816; b=MUqbYWJ4wJoQGTrGxwdtIQdTY/rc2J55iphWJSfTUkzeVUsd5+X/Sr92r4X6SLcHfJ D2HEkN+SSs4BMx6mr4iL3km1CjzCUCCpgDE4nTfYjPgq2yWWLOzMNIQdZYNqbz4yzvln qq+5BIZOBa8lZQI8xiZsp0FXSQltizUxsx/x8cG6q3e6U6sC/rRCJ7+RcgzggII7guyj 9dDrfgHKZCLbC04iUtWAafOVC39ktqhZM+s4QZMJHAgyPDOKxShvHYk8pnaJFAPOSNTE Hwgq8J1CwWdiQKl8i5wYETweSNbUmnXTIhtIiuDHXDr/CmHtJ8L1sBtO7AA/2pBh2686 NYuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=rJ7z09wyomGjRv6DXAMNYk4g3YMi60+u3j47EBS0qTI=; b=UyVR5sj5PWbZlkDQGAZB0Y5kUF7qjrAsShJ8snKjxNvv/mpL/9r1LK6xxrCkkKoccX US+8Y3FVBIFPHOdVEf65jMldlpu8sx93HoDzY3X+mpcYmwZPpag33MF0zikUrmCHmQxj 5/aD/yskvqNyx0t3sPdzuT7f5ZYCpEP8hbtow1UlodYgQ4AFWT6dCNUxDnZkM7zF2tug LzDp/EaHIsxXsUbMWjlEHRU7VZsoWMRsMgjQtRfAP8M4NKPuecugTvII6SdFcfHq/DiL Hr5RPCwr3EQ8mJaUYMSyBva8UQIuypYxUf8mBdbvGbncCtBTbYwzWaOSwNU2u5a9dTxk qnxw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h49si8974493edh.2.2019.10.24.07.25.07; Thu, 24 Oct 2019 07:25:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2502813AbfJXOZD (ORCPT + 26 others); Thu, 24 Oct 2019 10:25:03 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:32906 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2409403AbfJXOYz (ORCPT ); Thu, 24 Oct 2019 10:24:55 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 55BE0C3025B729EED883; Thu, 24 Oct 2019 22:24:50 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.439.0; Thu, 24 Oct 2019 22:24:41 +0800 From: John Garry To: , CC: , , , , , "John Garry" Subject: [PATCH 6/6] scsi: hisi_sas: Expose multiple hw queues for v3 as experimental Date: Thu, 24 Oct 2019 22:21:21 +0800 Message-ID: <1571926881-75524-7-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1571926881-75524-1-git-send-email-john.garry@huawei.com> References: <1571926881-75524-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since we're not ready to expose mutliple queues to the upper layer always due to CPU hotplug issue, add a new interim experimental command line option to support it. We still need to keep supporting auto_affine_msi_experimental, since people are now replying the performance it provides, even though it is unsafe. If auto_affine_msi_experimental and expose_mq_experimental are both set, then auto_affine_msi_experimental takes preference. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas.h | 2 + drivers/scsi/hisi_sas/hisi_sas_main.c | 55 ++++++++++++++++---------- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 51 +++++++++++++++++++++--- 3 files changed, 83 insertions(+), 25 deletions(-) -- 2.17.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h index 4eb8f1c53f78..884f2426d753 100644 --- a/drivers/scsi/hisi_sas/hisi_sas.h +++ b/drivers/scsi/hisi_sas/hisi_sas.h @@ -8,6 +8,8 @@ #define _HISI_SAS_H_ #include +#include +#include #include #include #include diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 53802c1cc1d0..c8c96a46acfd 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -389,9 +389,11 @@ static int hisi_sas_task_prep(struct sas_task *task, struct hisi_sas_slot *slot; struct hisi_sas_cmd_hdr *cmd_hdr_base; struct asd_sas_port *sas_port = device->port; + struct Scsi_Host *shost = hisi_hba->shost; struct device *dev = hisi_hba->dev; int dlvry_queue_slot, dlvry_queue, rc, slot_idx; int n_elem = 0, n_elem_dif = 0, n_elem_req = 0; + struct scsi_cmnd *scmd = NULL; struct hisi_sas_dq *dq; unsigned long flags; int wr_q_index; @@ -407,13 +409,38 @@ static int hisi_sas_task_prep(struct sas_task *task, return -ECOMM; } - if (hisi_hba->reply_map) { - int cpu = raw_smp_processor_id(); - unsigned int dq_index = hisi_hba->reply_map[cpu]; + if (task->uldd_task) { + struct ata_queued_cmd *qc; - *dq_pointer = dq = &hisi_hba->dq[dq_index]; - } else { + if (dev_is_sata(device)) { + qc = task->uldd_task; + scmd = qc->scsicmd; + } else { + scmd = task->uldd_task; + } + } + + /* We have to move to just a single mode: expose multiple queues */ + if (!hisi_hba->reply_map && !shost->nr_hw_queues) { *dq_pointer = dq = sas_dev->dq; + } else { + if (hisi_hba->reply_map) { + int cpu = raw_smp_processor_id(); + unsigned int dq_index = hisi_hba->reply_map[cpu]; + + *dq_pointer = dq = &hisi_hba->dq[dq_index]; + } else { + if (scmd) { + unsigned int dq_index; + u32 blk_tag; + + blk_tag = blk_mq_unique_tag(scmd->request); + dq_index = blk_mq_unique_tag_to_hwq(blk_tag); + *dq_pointer = dq = &hisi_hba->dq[dq_index]; + } else { + *dq_pointer = dq = sas_dev->dq; + } + } } port = to_hisi_sas_port(sas_port); @@ -438,22 +465,10 @@ static int hisi_sas_task_prep(struct sas_task *task, } if (hisi_hba->hw->slot_index_alloc) - rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device, NULL); - else { - struct scsi_cmnd *scsi_cmnd = NULL; - - if (task->uldd_task) { - struct ata_queued_cmd *qc; + rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device, scmd); + else + rc = hisi_sas_slot_index_alloc(hisi_hba, scmd); - if (dev_is_sata(device)) { - qc = task->uldd_task; - scsi_cmnd = qc->scsicmd; - } else { - scsi_cmnd = task->uldd_task; - } - } - rc = hisi_sas_slot_index_alloc(hisi_hba, scsi_cmnd); - } if (rc < 0) goto err_out_dif_dma_unmap; diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 29119d0b27a7..03ba0416f910 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -512,6 +512,11 @@ module_param(auto_affine_msi_experimental, bool, 0444); MODULE_PARM_DESC(auto_affine_msi_experimental, "Enable auto-affinity of MSI IRQs as experimental:\n" "default is off"); +static bool expose_mq_experimental; +module_param(expose_mq_experimental, bool, 0444); +MODULE_PARM_DESC(expose_mq_experimental, "Expose multiple hw queues to upper layer as experimental:\n" + "default is off"); + static u32 hisi_sas_read32(struct hisi_hba *hisi_hba, u32 off) { void __iomem *regs = hisi_hba->regs + off; @@ -558,6 +563,11 @@ static u32 hisi_sas_phy_read32(struct hisi_hba *hisi_hba, static int bitmaps_alloc_v3_hw(struct hisi_hba *hisi_hba) { + if (expose_mq_experimental) + return sbitmap_init_node(&hisi_hba->slot_index_tags, + HISI_SAS_MAX_COMMANDS, -1, + GFP_KERNEL, + dev_to_node(hisi_hba->dev)); return sbitmap_init_node(&hisi_hba->slot_index_tags, HISI_SAS_UNRESERVED_IPTT, -1, GFP_KERNEL, dev_to_node(hisi_hba->dev)); @@ -570,6 +580,10 @@ static int slot_index_alloc_v3_hw(struct hisi_hba *hisi_hba, struct sbitmap *slot_index_tags = &hisi_hba->slot_index_tags; int index; + if (expose_mq_experimental) + return sbitmap_get(slot_index_tags, + hisi_hba->sbitmap_alloc_hint, false); + if (scmd) return scmd->request->tag; @@ -583,7 +597,10 @@ static void slot_index_free_v3_hw(struct hisi_hba *hisi_hba, int slot_idx) { struct sbitmap *slot_index_tags = &hisi_hba->slot_index_tags; - if (slot_idx >= HISI_SAS_UNRESERVED_IPTT) + if (expose_mq_experimental) { + sbitmap_clear_bit(slot_index_tags, slot_idx); + hisi_hba->sbitmap_alloc_hint = slot_idx; + } else if (slot_idx >= HISI_SAS_UNRESERVED_IPTT) sbitmap_clear_bit(slot_index_tags, slot_idx - HISI_SAS_UNRESERVED_IPTT); } @@ -2414,8 +2431,9 @@ static int interrupt_preinit_v3_hw(struct hisi_hba *hisi_hba) struct device *dev = hisi_hba->dev; int vectors; int max_msi = HISI_SAS_MSI_COUNT_V3_HW, min_msi; + struct Scsi_Host *shost = hisi_hba->shost; - if (auto_affine_msi_experimental) { + if (auto_affine_msi_experimental || expose_mq_experimental) { struct irq_affinity desc = { .pre_vectors = BASE_VECTORS_V3_HW, }; @@ -2434,7 +2452,9 @@ static int interrupt_preinit_v3_hw(struct hisi_hba *hisi_hba) &desc); if (vectors < 0) return -ENOENT; - setup_reply_map_v3_hw(hisi_hba, vectors - BASE_VECTORS_V3_HW); + if (auto_affine_msi_experimental) + setup_reply_map_v3_hw(hisi_hba, + vectors - BASE_VECTORS_V3_HW); } else { min_msi = max_msi; vectors = pci_alloc_irq_vectors(hisi_hba->pci_dev, min_msi, @@ -2444,6 +2464,9 @@ static int interrupt_preinit_v3_hw(struct hisi_hba *hisi_hba) } hisi_hba->cq_nvecs = vectors - BASE_VECTORS_V3_HW; + if (expose_mq_experimental) + shost->nr_hw_queues = hisi_hba->cq_nvecs; + return 0; } @@ -3096,6 +3119,17 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) return 0; } +static int hisi_sas_map_queues(struct Scsi_Host *shost) +{ + struct hisi_hba *hisi_hba = shost_priv(shost); + struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT]; + + if (expose_mq_experimental) + return blk_mq_pci_map_queues(qmap, hisi_hba->pci_dev, + BASE_VECTORS_V3_HW); + return blk_mq_map_queues(qmap); +} + static struct scsi_host_template sht_v3_hw = { .name = DRV_NAME, .module = THIS_MODULE, @@ -3104,6 +3138,7 @@ static struct scsi_host_template sht_v3_hw = { .slave_configure = hisi_sas_slave_configure, .scan_finished = hisi_sas_scan_finished, .scan_start = hisi_sas_scan_start, + .map_queues = hisi_sas_map_queues, .change_queue_depth = sas_change_queue_depth, .bios_param = sas_bios_param, .this_id = -1, @@ -3265,8 +3300,14 @@ hisi_sas_v3_probe(struct pci_dev *pdev, const struct pci_device_id *id) shost->max_lun = ~0; shost->max_channel = 1; shost->max_cmd_len = 16; - shost->can_queue = HISI_SAS_UNRESERVED_IPTT; - shost->cmd_per_lun = HISI_SAS_UNRESERVED_IPTT; + + if (expose_mq_experimental) { + shost->can_queue = HISI_SAS_MAX_COMMANDS; + shost->cmd_per_lun = HISI_SAS_MAX_COMMANDS; + } else { + shost->can_queue = HISI_SAS_UNRESERVED_IPTT; + shost->cmd_per_lun = HISI_SAS_UNRESERVED_IPTT; + } sha->sas_ha_name = DRV_NAME; sha->dev = dev;