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[209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6b2a5a35dc7si26732296d6.172.2024.06.13.16.44.19 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Jun 2024 16:44:19 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nongnu.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sHu6t-0008KR-DG; Thu, 13 Jun 2024 19:44:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sHu6r-0008I0-Ea; Thu, 13 Jun 2024 19:44:01 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sHu6p-000494-JT; Thu, 13 Jun 2024 19:44:01 -0400 Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4W0fBL0Bl2z6K6Sd; Fri, 14 Jun 2024 07:43:54 +0800 (CST) Received: from lhrpeml500001.china.huawei.com (unknown [7.191.163.213]) by mail.maildlp.com (Postfix) with ESMTPS id DD488140C72; Fri, 14 Jun 2024 07:43:56 +0800 (CST) Received: from 00293818-MRGF.china.huawei.com (10.195.245.24) by lhrpeml500001.china.huawei.com (7.191.163.213) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 14 Jun 2024 00:43:34 +0100 To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC V3 16/29] hw/acpi: Make _MAT method optional Date: Fri, 14 Jun 2024 00:36:26 +0100 Message-ID: <20240613233639.202896-17-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240613233639.202896-1-salil.mehta@huawei.com> References: <20240613233639.202896-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.195.245.24] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To lhrpeml500001.china.huawei.com (7.191.163.213) Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta X-Patchwork-Original-From: Salil Mehta via From: Salil Mehta Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jean-Philippe Brucker The GICC interface on arm64 vCPUs is statically defined in the MADT, and doesn't require a _MAT entry. Although the GICC is indicated as present by the MADT entry, it can only be used from vCPU sysregs, which aren't accessible until hot-add. Co-developed-by: Jean-Philippe Brucker Signed-off-by: Jean-Philippe Brucker Co-developed-by: Jonathan Cameron Signed-off-by: Jonathan Cameron Reviewed-by: Gavin Shan Signed-off-by: Salil Mehta --- hw/acpi/cpu.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c index 40b8899125..2240c6e108 100644 --- a/hw/acpi/cpu.c +++ b/hw/acpi/cpu.c @@ -717,10 +717,13 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, aml_append(dev, method); /* build _MAT object */ - build_madt_cpu(i, arch_ids, madt_buf, true); /* set enabled flag */ - aml_append(dev, aml_name_decl("_MAT", + if (build_madt_cpu) { + build_madt_cpu(i, arch_ids, madt_buf, + true); /* set enabled flag */ + aml_append(dev, aml_name_decl("_MAT", aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); - g_array_free(madt_buf, true); + g_array_free(madt_buf, true); + } if (CPU(arch_ids->cpus[i].cpu) != first_cpu) { method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); From patchwork Thu Jun 13 23:36:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 803879 Delivered-To: patch@linaro.org Received: by 2002:a5d:6545:0:b0:35b:5a80:51b4 with SMTP id z5csp61230wrv; Thu, 13 Jun 2024 16:47:47 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCU7Lsrr50UvMMW9Bm3KOK7YIqfvBODQDo0DtQq/028PY5bdJuSPiLPdDIC+XKcqsj/xdF3JpHtVwrbjVUaTiOjY X-Google-Smtp-Source: AGHT+IHthJsCKI2b8Vc9adXT6FnP9MXypXN9+H7NALcrByxrQexW3IleECwGtkxim6s5qcQ5S7ZH X-Received: by 2002:a05:622a:15d4:b0:441:2995:fa08 with SMTP id d75a77b69052e-4421687be0emr10382481cf.19.1718322467242; Thu, 13 Jun 2024 16:47:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1718322467; cv=none; d=google.com; s=arc-20160816; b=wmJ8IEngLqgal2uZoLCI4Ss41JmbLMTvx5gwuio+lEKRtjd5Ua3AlBuB83tOMGBpSs LIAN8rk1yD1d6l+pmmNA7PwibFIORRZ7m1a5y89vZ0zUMzFtJsW38AclWexSC0vFVx3g Qn64RhDK3EgEaPmh69XNHCcESD6vqdpSf5EYK1ePfiwhTe6CM15G4Oud13yJ/Djxczg3 nx/aPaxYH6v/0F3+QORh284QH06N0urgP0t72B8Cnmv5PWNrdWqEQemE4+bWjvZckF9k VyQ3u5FfqpUUZNSIfkz45E+C1TSGq8SXh9EXg+iYsumDxqj8DUAoB7Nr40J91qg555DW gBzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:from:reply-to:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to; bh=iwEEX2SADeXqAFnprFupM3er8ptrR9grKukQeyzG7Ds=; fh=LTv9rZypFCL5Yl51dJY3ojnjwtjMOAtIYwj21UMTdvU=; b=nau4Dv/+IC6tLvkkpeH1DpWUHIQ5pqaSeD2m6ni1+N7BXYpCZ7OHbxt50GBzmAIVk+ 6uiPrACoJ1GwfCQ4MDtqxIblHu4oi1KcBirfVR7nbpXyqspOXcpdCePY7F9VQteN8vWp 171ktm8NdcDqNzR1q/kKatrUzwP5sL8WHeKBtFBt4TGzlUcRaQ6HGFxWg6fEvc2O8luh PON8Jz4PHN6SwikruecMk2vQr+oB4i93JjHXMnyvjbKXB5TPfo6D0+vDRIO+wfxMM00+ cDN/v08ZN+6pV902qdtclGQQC4h+nxpY8mdxr07jEZcFlJNehAUt3ZN70VLTek8PIQzV yWgg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-441f30f8748si27857381cf.676.2024.06.13.16.47.47 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Jun 2024 16:47:47 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nongnu.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sHuAC-0006qG-Cg; Thu, 13 Jun 2024 19:47:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sHuAA-0006kk-7s; Thu, 13 Jun 2024 19:47:26 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sHuA8-0004nN-Cw; Thu, 13 Jun 2024 19:47:25 -0400 Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4W0f8t5WZ0z6H8xV; Fri, 14 Jun 2024 07:42:38 +0800 (CST) Received: from lhrpeml500001.china.huawei.com (unknown [7.191.163.213]) by mail.maildlp.com (Postfix) with ESMTPS id 1A470140AE5; Fri, 14 Jun 2024 07:47:21 +0800 (CST) Received: from 00293818-MRGF.china.huawei.com (10.195.245.24) by lhrpeml500001.china.huawei.com (7.191.163.213) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 14 Jun 2024 00:46:58 +0100 To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC V3 25/29] target/arm/kvm: Write CPU state back to KVM on reset Date: Fri, 14 Jun 2024 00:36:35 +0100 Message-ID: <20240613233639.202896-26-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240613233639.202896-1-salil.mehta@huawei.com> References: <20240613233639.202896-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.195.245.24] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To lhrpeml500001.china.huawei.com (7.191.163.213) Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta X-Patchwork-Original-From: Salil Mehta via From: Salil Mehta Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jean-Philippe Brucker When a KVM vCPU is reset following a PSCI CPU_ON call, its power state is not synchronized with KVM at the moment. Because the vCPU is not marked dirty, we miss the call to kvm_arch_put_registers() that writes to KVM's MP_STATE. Force mp_state synchronization. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Salil Mehta --- target/arm/kvm.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 1121771c4a..7acd83ce64 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -980,6 +980,7 @@ void kvm_arm_cpu_post_load(ARMCPU *cpu) void kvm_arm_reset_vcpu(ARMCPU *cpu) { int ret; + CPUState *cs = CPU(cpu); /* Re-init VCPU so that all registers are set to * their respective reset values. @@ -1001,6 +1002,12 @@ void kvm_arm_reset_vcpu(ARMCPU *cpu) * for the same reason we do so in kvm_arch_get_registers(). */ write_list_to_cpustate(cpu); + + /* + * Ensure we call kvm_arch_put_registers(). The vCPU isn't marked dirty if + * it was parked in KVM and is now booting from a PSCI CPU_ON call. + */ + cs->vcpu_dirty = true; } void kvm_arm_create_host_vcpu(ARMCPU *cpu)