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a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The APTable attribute is two bits wide according to the ARMv8-A architecture reference manual. Fix the macro accordingly. Signed-off-by: Caleb Connolly --- arch/arm/include/asm/armv8/mmu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index ce655ce7a952..52cb18b9ed5e 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -50,9 +50,9 @@ #define PTE_TYPE_VALID (1 << 0) #define PTE_TABLE_PXN (1UL << 59) #define PTE_TABLE_XN (1UL << 60) -#define PTE_TABLE_AP (1UL << 61) +#define PTE_TABLE_AP (3UL << 61) #define PTE_TABLE_NS (1UL << 63) /* * Block From patchwork Fri Jun 7 16:51:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 802310 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp900866wro; Fri, 7 Jun 2024 09:51:59 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUW3Zg3Qk1ACM6pxD/KL3WWqUk6z+zK1pR1glAFeTkYykOILcaMfYSSv2rWzwQ3D5REDDpWwavtg2GZpmGCWONO X-Google-Smtp-Source: AGHT+IEnITqi+cfuKIPqAINFAAUdZx+VNRV+a5MReAYhwGCsmSVdiltN9Yp6WvbO/CAAbyiwaVS6 X-Received: by 2002:a17:906:12c1:b0:a67:b440:e50f with SMTP id a640c23a62f3a-a6cdbcfa817mr212457466b.63.1717779119206; Fri, 07 Jun 2024 09:51:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717779119; cv=none; d=google.com; s=arc-20160816; b=tCbFsU5KTnPfLfW+arVJRIfJidK177eB6mZFpLn1CYU1H+J2zDiDwqmoABa9YcCYbO 9auB4F8e3meCgvzSKXPMRO/duS2Jd4w2S4ARLNKUct5pG2hkpnshK5n+7p+wkYm+JJoe 7oqPEBsvCoZRQny+VWQhgqudY3EkZ0dLkURsxQPKuLW0jzp47O7XxWVMjrB3pcxUpPmI EPHtLoOVg2bwYcAAIun8Gqw5o0+mSpYv8iS7dSMKGAe9MzilGQIsh9tpkN6V5vH0N25P 2gaoE0CbcA/AWGtL3YvA2YTBvXzcS7HNnab80+fPwiDn438QBgrAffSRKbP+sMgpKGkJ rMKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=2nKwREbyBXmZFyQe8QoOBjCPftfcSOeh5MbTwZFQCM8=; fh=5k4CRDCjigTWqHxnMQpLJ3CBvzHyo7N9ypj0nkq/IvE=; b=e663KbjTcamtLX0/5LvOiaya9QJW9KI6smk/H6G5eB0mMlFFFDkdTgF1FDW0PdyALD qu0xqKQJNjx/YqF4aiMwePc8u8+wc9eM6DFpkakI6qhIR1TjPB9+WzCKWn9j7gv4Gc4G YF0zTMUdS/9lXD5z5mXsFhF/FDhJCovoTzWHDfPZuWvMeKdAlof9ajAbKZiUBFOTM5Wi tIl6yf12f0JGxE4luvZlH9tlh52It6eZcQ2HqRdvqHPToRtSK5XIglkqqLfhZlmJU45R pFte3IcoAltIpFt1MrFhjb+Q1G2URrxBwRCBzukJn4Y8nRndx3lWi0KyKPMRS95xWXz5 OGWQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mwUSDjUW; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Fri, 07 Jun 2024 09:51:35 -0700 (PDT) From: Caleb Connolly Date: Fri, 07 Jun 2024 18:51:20 +0200 Subject: [PATCH 2/2] arm64: add software pagetable walker MIME-Version: 1.0 Message-Id: <20240607-caleb-upstreaming-v1-2-99094dabb3d9@linaro.org> References: <20240607-caleb-upstreaming-v1-0-99094dabb3d9@linaro.org> In-Reply-To: <20240607-caleb-upstreaming-v1-0-99094dabb3d9@linaro.org> To: Tom Rini Cc: Michal Simek , Ilias Apalodimas , Neil Armstrong , u-boot@lists.denx.de, Caleb Connolly X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=8966; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=VhmUJx8jpOwiK3MIq8pjOiqf8F8oM/ZHnD/DDRA60P0=; b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmYzqUdnX1eGXoI/0zdRP39pp4GRj/nwRAVI8F7 CXyO+VGPQmJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZmM6lAAKCRAFgzErGV9k tnYqD/sF8Sy5aNQJkDBl6f5Xaen1pJJFCZgQ6pTmpHCMqnInQEuvSLxLOcQyOsNALVu/uirT+t6 +NwryRDCwpPHJsOVZF95ufXTQrOwhtf8jBGCNeaKtVsowHC4ejm6BIP9aT4J+/UF4t5QuP37Z6y rH6NM0VkA6MmCXMlwqnBb1Q+FOUZObaBDY9po2RzU+0iBm/oS3N6b0Uuibmm5QiJR52KNeXj9dx knhyXmCNhPw7Spj5OAqFR778HWXwYK7CJ27xAQj9AS8Bd8y5tD5itofP2ram+HfCldatdes8iX7 92H7xYtcxeK63ps8pgrPywOY9tsu9D5Ix7TSiihlGKK12iYoKZGJXV6mk5kaS66gSzvBcj9c0XG gfVnNNipe6Qq77YhGd4Mrz+RY8AoYMW110N4yd3AFbc6PnQy4k21+ADRqOXQP/K3JZO57Ir4BMO mltwT2zimk6Oq+etkpNDrRgW24Uho+qeBI1MXjv4sldNQ3Lyd7xgcWHkhyCYkC8WteCO7icLzSZ CwpxJDrkPCAM/YnFdh3jKuSoLbu0oFyegqvogJqZO0QH2ruLwgJu0JldmljE0xSQBRpUbjsPWrN rmmgIxWFZWiN0yr66mmNhsk6b58XMAV2zTxh20Q3lyJ4RnNUCaY+Onahu6pO3/CwM+kpMjcRjf8 N1v8N0f9A8eCKFA== X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add a basic software implementation of the ARM64 pagetable walker. This can be used for debugging U-Boot's pagetable, as well as dumping the pagetable from the previous bootloader stage if it used one (by reading out the ttbr address). One can either call dump_pagetable() to print the pagetable to the console with the default formatter, or implement their own pagetable handler using walke_pagetable() with a custom pte_walker_cb_t callback. Signed-off-by: Caleb Connolly --- arch/arm/cpu/armv8/cache_v8.c | 202 +++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/armv8/mmu.h | 55 +++++++++++ 2 files changed, 257 insertions(+) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index d4c64f2d60d9..cb7c0e61ba70 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -395,8 +395,210 @@ static int count_ranges(void) return count; } +#define ALL_ATTRS (3 << 8 | PMD_ATTRINDX_MASK) +#define PTE_IS_TABLE(pte, level) (pte_type(&(pte)) == PTE_TYPE_TABLE && (level) < 3) + +enum walker_state { + WALKER_STATE_START = 0, + WALKER_STATE_TABLE, + WALKER_STATE_REGION, /* block or page, depending on level */ +}; + +static void __pagetable_walk(u64 addr, u64 tcr, int level, pte_walker_cb_t cb, void *priv) +{ + u64 *table = (u64 *)addr; + u64 attrs, last_attrs = 0, last_addr = 0, entry_start = 0; + int i; + u64 va_bits = 64 - (tcr & (BIT(6) - 1)); + static enum walker_state state[4] = { 0 }; + static bool exit; + + if (!level) { + exit = false; + if (va_bits < 39) + level = 1; + } + + state[level] = WALKER_STATE_START; + + /* Walk through the table entries */ + for (i = 0; i < MAX_PTE_ENTRIES; i++) { + u64 pte = table[i]; + u64 _addr = pte & GENMASK_ULL(va_bits, PAGE_SHIFT); + + if (exit) + return; + + if (pte_type(&pte) == PTE_TYPE_FAULT) + continue; + + attrs = pte & ALL_ATTRS; + /* If we're currently inside a block or set of pages */ + if (state[level] > WALKER_STATE_START && state[level] != WALKER_STATE_TABLE) { + /* + * Continue walking if this entry has the same attributes as the last and + * is one page/block away -- it's a contiguous region. + */ + if (attrs == last_attrs && _addr == last_addr + (1 << level2shift(level))) { + last_attrs = attrs; + last_addr = _addr; + continue; + } else { + /* We either hit a table or a new region */ + exit = cb(entry_start, last_addr + (1 << level2shift(level)), + va_bits, level, priv); + if (exit) + return; + state[level] = WALKER_STATE_START; + } + } + last_attrs = attrs; + last_addr = _addr; + + if (PTE_IS_TABLE(pte, level)) { + /* After the end of the table might be corrupted data */ + if (!_addr || (pte & 0xfff) > 0x3ff) + return; + state[level] = WALKER_STATE_TABLE; + /* Signify the start of a table */ + exit = cb(pte, 0, va_bits, level, priv); + if (exit) + return; + + /* Go down a level */ + __pagetable_walk(_addr, tcr, level + 1, cb, priv); + state[level] = WALKER_STATE_START; + } else if (pte_type(&pte) == PTE_TYPE_BLOCK || pte_type(&pte) == PTE_TYPE_PAGE) { + /* We foud a block or page, start walking */ + entry_start = pte; + state[level] = WALKER_STATE_REGION; + } + } + + if (state[level] > WALKER_STATE_START) + exit = cb(entry_start, last_addr + (1 << level2shift(level)), va_bits, level, priv); +} + +static void pretty_print_pte_type(u64 pte) +{ + switch (pte_type(&pte)) { + case PTE_TYPE_FAULT: + printf(" %-5s", "Fault"); + break; + case PTE_TYPE_BLOCK: + printf(" %-5s", "Block"); + break; + case PTE_TYPE_PAGE: + printf(" %-5s", "Pages"); + break; + default: + printf(" %-5s", "Unk"); + } +} + +static void pretty_print_table_attrs(u64 pte) +{ + int ap = (pte & PTE_TABLE_AP) >> 61; + + printf(" | %2s %10s", + (ap & 2) ? "RO" : "", + (ap & 1) ? "!EL0" : ""); + printf(" | %3s %2s %2s", + (pte & PTE_TABLE_PXN) ? "PXN" : "", + (pte & PTE_TABLE_XN) ? "XN" : "", + (pte & PTE_TABLE_NS) ? "NS" : ""); +} + +static void pretty_print_block_attrs(u64 pte) +{ + u64 attrs = pte & PMD_ATTRINDX_MASK; + + switch (attrs) { + case PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE): + printf(" | %-13s", "Device-nGnRnE"); + break; + case PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE): + printf(" | %-13s", "Device-nGnRE"); + break; + case PTE_BLOCK_MEMTYPE(MT_DEVICE_GRE): + printf(" | %-13s", "Device-GRE"); + break; + case PTE_BLOCK_MEMTYPE(MT_NORMAL_NC): + printf(" | %-13s", "Normal-NC"); + break; + case PTE_BLOCK_MEMTYPE(MT_NORMAL): + printf(" | %-13s", "Normal"); + break; + default: + printf(" | %-13s", "Unknown"); + } +} + +static void pretty_print_block_memtype(u64 pte) +{ + u64 share = pte & (3 << 8); + + switch (share) { + case PTE_BLOCK_NON_SHARE: + printf(" | %-16s", "Non-shareable"); + break; + case PTE_BLOCK_OUTER_SHARE: + printf(" | %-16s", "Outer-shareable"); + break; + case PTE_BLOCK_INNER_SHARE: + printf(" | %-16s", "Inner-shareable"); + break; + default: + printf(" | %-16s", "Unknown"); + } +} + +static void print_pte(u64 pte, int level) +{ + if (PTE_IS_TABLE(pte, level)) { + printf(" %-5s", "Table"); + pretty_print_table_attrs(pte); + } else { + pretty_print_pte_type(pte); + pretty_print_block_attrs(pte); + pretty_print_block_memtype(pte); + } + printf("\n"); +} + +static bool pagetable_print_entry(u64 start_attrs, u64 end, int va_bits, int level, void *priv) +{ + u64 _addr = start_attrs & GENMASK_ULL(va_bits, PAGE_SHIFT); + int indent = va_bits < 39 ? level - 1 : level; + + printf("%*s", indent * 2, ""); + if (PTE_IS_TABLE(start_attrs, level)) + printf("[%#011llx]%14s", _addr, ""); + else + printf("[%#011llx - %#011llx]", _addr, end); + + printf("%*s | ", (3 - level) * 2, ""); + print_pte(start_attrs, level); + + return false; +} + +void walk_pagetable(u64 ttbr, u64 tcr, pte_walker_cb_t cb, void *priv) +{ + __pagetable_walk(ttbr, tcr, 0, cb, priv); +} + +void dump_pagetable(u64 ttbr, u64 tcr) +{ + u64 va_bits = 64 - (tcr & (BIT(6) - 1)); + + printf("Walking pagetable at %p, va_bits: %lld. Using %d levels\n", (void *)ttbr, + va_bits, va_bits < 39 ? 3 : 4); + walk_pagetable(ttbr, tcr, pagetable_print_entry, NULL); +} + /* Returns the estimated required size of all page tables */ __weak u64 get_page_table_size(void) { u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64); diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index 52cb18b9ed5e..eed121784247 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -128,8 +128,63 @@ static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr) } asm volatile("isb"); } +static inline void get_ttbr_tcr_mair(int el, u64 *table, u64 *tcr, u64 *attr) +{ + if (el == 1) { + asm volatile("mrs %0, ttbr0_el1" : "=r" (*table)); + asm volatile("mrs %0, tcr_el1" : "=r" (*tcr)); + asm volatile("mrs %0, mair_el1" : "=r" (*attr)); + } else if (el == 2) { + asm volatile("mrs %0, ttbr0_el2" : "=r" (*table)); + asm volatile("mrs %0, tcr_el2" : "=r" (*tcr)); + asm volatile("mrs %0, mair_el2" : "=r" (*attr)); + } else if (el == 3) { + asm volatile("mrs %0, ttbr0_el3" : "=r" (*table)); + asm volatile("mrs %0, tcr_el3" : "=r" (*tcr)); + asm volatile("mrs %0, mair_el3" : "=r" (*attr)); + } else { + hang(); + } +} + +/** + * pte_walker_cb_t - callback function for walk_pagetable. + * + * This function is called when the walker finds a table entry + * or after parsing a block or pages. For a table the @end address + * is 0, and @addr is the address of the table. Otherwise, they + * are the start and end physical addresses of the block or page. + * + * @addr: PTE start address (PA), or address of table. Includes attributes. + * @end: End address of the region (or 0 for a table) + * @va_bits: Number of bits in the virtual address + * @level: Table level + * @priv: Private data for the callback + * + * Return: true to stop walking, false to continue + */ +typedef bool (*pte_walker_cb_t)(u64 addr, u64 end, int va_bits, int level, void *priv); + +/** + * walk_pagetable() - Walk the pagetable at ttbr and call cb for each region + * + * @ttbr: Address of the pagetable to dump + * @tcr: TCR value to use + * @cb: Callback function to call for each entry + * @priv: Private data for the callback + */ +void walk_pagetable(u64 ttbr, u64 tcr, pte_walker_cb_t cb, void *priv); + +/** + * dump_pagetable() - Dump the pagetable at ttbr by printing each region + * + * @ttbr: Address of the pagetable to dump + * @tcr: TCR value to use + */ +void dump_pagetable(u64 ttbr, u64 tcr); + struct mm_region { u64 virt; u64 phys; u64 size;