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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN2PEPF0000449D.mail.protection.outlook.com (10.167.243.148) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7633.15 via Frontend Transport; Tue, 28 May 2024 04:19:43 +0000 Received: from chalupa-4a00host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 27 May 2024 23:19:42 -0500 From: Manali Shukla To: , CC: , , , , , , , , Subject: [PATCH v3 4/5] KVM: selftests: Add an interface to read the data of named vcpu stat Date: Tue, 28 May 2024 04:19:25 +0000 Message-ID: <20240528041926.3989-5-manali.shukla@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240528041926.3989-1-manali.shukla@amd.com> References: <20240528041926.3989-1-manali.shukla@amd.com> Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF0000449D:EE_|CH3PR12MB8972:EE_ X-MS-Office365-Filtering-Correlation-Id: 365663d0-da46-4e52-7f20-08dc7ecd669a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(82310400017)(36860700004)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2024 04:19:43.4095 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 365663d0-da46-4e52-7f20-08dc7ecd669a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF0000449D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8972 From: Manali Shukla The interface is used to read the data values of a specified vcpu stat from the currenly available binary stats interface. Signed-off-by: Manali Shukla --- .../kvm/include/kvm_arch_vcpu_states.h | 49 +++++++++++++++++++ .../testing/selftests/kvm/include/kvm_util.h | 34 +++++++++++++ tools/testing/selftests/kvm/lib/kvm_util.c | 32 ++++++++++++ 3 files changed, 115 insertions(+) create mode 100644 tools/testing/selftests/kvm/include/kvm_arch_vcpu_states.h diff --git a/tools/testing/selftests/kvm/include/kvm_arch_vcpu_states.h b/tools/testing/selftests/kvm/include/kvm_arch_vcpu_states.h new file mode 100644 index 000000000000..755ff7de53d9 --- /dev/null +++ b/tools/testing/selftests/kvm/include/kvm_arch_vcpu_states.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * Arch-specific stats are added to the kvm_arch_vcpu_states.h. Sequence + * of arch-specific vcpu_stat_type should be same as they are declared in + * arch-specific kvm_vcpu_stat. + */ +#ifdef __x86_64__ +#define KVM_X86_VCPU_STATE(x) KVM_VCPU_STATE(x) + +KVM_X86_VCPU_STATE(PF_TAKEN) +KVM_X86_VCPU_STATE(PF_FIXED) +KVM_X86_VCPU_STATE(PF_EMULATE) +KVM_X86_VCPU_STATE(PF_SPURIOUS) +KVM_X86_VCPU_STATE(PF_FAST) +KVM_X86_VCPU_STATE(PF_MMIO_SPTE_CREATED) +KVM_X86_VCPU_STATE(PF_GUEST) +KVM_X86_VCPU_STATE(TLB_FLUSH) +KVM_X86_VCPU_STATE(INVLPG) +KVM_X86_VCPU_STATE(EXITS) +KVM_X86_VCPU_STATE(IO_EXITS) +KVM_X86_VCPU_STATE(MMIO_EXITS) +KVM_X86_VCPU_STATE(SIGNAL_EXITS) +KVM_X86_VCPU_STATE(IRQ_WINDOW_EXITS) +KVM_X86_VCPU_STATE(NMI_WINDOW_EXITS) +KVM_X86_VCPU_STATE(LD_FLUSH) +KVM_X86_VCPU_STATE(HALT_EXITS) +KVM_X86_VCPU_STATE(REQUEST_IRQ_EXITS) +KVM_X86_VCPU_STATE(IRQ_EXITS) +KVM_X86_VCPU_STATE(HOST_STATE_RELOAD) +KVM_X86_VCPU_STATE(FPU_RELOAD) +KVM_X86_VCPU_STATE(INSN_EMULATION) +KVM_X86_VCPU_STATE(INSN_EMULATION_FAIL) +KVM_X86_VCPU_STATE(HYPERCALLS) +KVM_X86_VCPU_STATE(IRQ_INJECTIONS) +KVM_X86_VCPU_STATE(NMI_INJECTIONS) +KVM_X86_VCPU_STATE(REQ_EVENT) +KVM_X86_VCPU_STATE(NESTED_RUN) +KVM_X86_VCPU_STATE(DIRECTED_YIELD_ATTEMPTED) +KVM_X86_VCPU_STATE(DIRECTED_YIELD_SUCCESSFUL) +KVM_X86_VCPU_STATE(PREEMPTION_REPORTED) +KVM_X86_VCPU_STATE(PREEMPTION_OTHER) +KVM_X86_VCPU_STATE(GUEST_MODE) +KVM_X86_VCPU_STATE(NOTIFY_WINDOW_EXITS) + +#undef KVM_X86_VCPU_STATE +#undef KVM_VCPU_STATE +#endif + diff --git a/tools/testing/selftests/kvm/include/kvm_util.h b/tools/testing/selftests/kvm/include/kvm_util.h index 63c2aaae51f3..fe66b1736060 100644 --- a/tools/testing/selftests/kvm/include/kvm_util.h +++ b/tools/testing/selftests/kvm/include/kvm_util.h @@ -518,6 +518,40 @@ static inline uint64_t vm_get_stat(struct kvm_vm *vm, const char *stat_name) return data; } +/* + * Ensure that the sequence of the enum vcpu_stat_types matches the order of + * kvm_vcpu_stats_desc[]. Otherwise, vcpu_get_stat() may return incorrect data + * because __vcpu_get_stat() uses the enum type as an index to get the + * descriptor for a given stat and then uses read_stat_data() to get the stats + * from the descriptor. + */ +enum vcpu_stat_types { + HALT_SUCCESSFUL_POLL, + HALT_ATTEMPTED_POLL, + HALT_POLL_INVALID, + HALT_WAKEUP, + HALT_POLL_SUCCESS_NS, + HALT_POLL_FAIL_NS, + HALT_WAIT_NS, + HALT_POLL_SUCCESS_HIST, + HALT_POLL_FAIL_HIST, + HALT_WAIT_HIST, + BLOCKING, +#define KVM_VCPU_STATE(x) x, +#include "kvm_arch_vcpu_states.h" +}; + +void __vcpu_get_stat(struct kvm_vcpu *vcpu, enum vcpu_stat_types type, uint64_t *data, + size_t max_elements); + +static inline uint64_t vcpu_get_stat(struct kvm_vcpu *vcpu, enum vcpu_stat_types type) +{ + uint64_t data; + + __vcpu_get_stat(vcpu, type, &data, 1); + return data; +} + void vm_create_irqchip(struct kvm_vm *vm); static inline int __vm_create_guest_memfd(struct kvm_vm *vm, uint64_t size, diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/selftests/kvm/lib/kvm_util.c index ad00e4761886..d4b6a352c1ae 100644 --- a/tools/testing/selftests/kvm/lib/kvm_util.c +++ b/tools/testing/selftests/kvm/lib/kvm_util.c @@ -2264,6 +2264,38 @@ void read_stat_data(int stats_fd, struct kvm_stats_header *header, desc->name, size, ret); } +/* + * Read the data of the named vcpu stat + * + * Input Args: + * vcpu - the vcpu for which the stat should be read + * stat_name - the name of the stat to read + * max_elements - the maximum number of 8-byte values to read into data + * + * Output Args: + * data - the buffer into which stat data should be read + * + * Read the data values of a specified stat from the binary stats interface. + */ +void __vcpu_get_stat(struct kvm_vcpu *vcpu, enum vcpu_stat_types type, uint64_t *data, + size_t max_elements) +{ + int vcpu_stats_fd; + struct kvm_stats_header header; + struct kvm_stats_desc *desc, *t_desc; + size_t size_desc; + + vcpu_stats_fd = vcpu_get_stats_fd(vcpu); + read_stats_header(vcpu_stats_fd, &header); + + desc = read_stats_descriptors(vcpu_stats_fd, &header); + size_desc = get_stats_descriptor_size(&header); + + t_desc = (void *)desc + (type * size_desc); + read_stat_data(vcpu_stats_fd, &header, t_desc, + data, max_elements); +} + /* * Read the data of the named stat * From patchwork Tue May 28 04:19:26 2024 Content-Type: text/plain; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN2PEPF0000449D.mail.protection.outlook.com (10.167.243.148) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7633.15 via Frontend Transport; Tue, 28 May 2024 04:19:44 +0000 Received: from chalupa-4a00host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 27 May 2024 23:19:43 -0500 From: Manali Shukla To: , CC: , , , , , , , , Subject: [PATCH v3 5/5] KVM: selftests: KVM: SVM: Add Idle HLT intercept test Date: Tue, 28 May 2024 04:19:26 +0000 Message-ID: <20240528041926.3989-6-manali.shukla@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240528041926.3989-1-manali.shukla@amd.com> References: <20240528041926.3989-1-manali.shukla@amd.com> Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF0000449D:EE_|PH7PR12MB7937:EE_ X-MS-Office365-Filtering-Correlation-Id: e5129e38-61db-4cfe-ffe3-08dc7ecd675d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230031|82310400017|1800799015|376005|36860700004; X-Microsoft-Antispam-Message-Info: wflSQkQcCkLiGooUIzSFpyP3YyzfhFUD5QwhqYq5OB308OhGMdiuXrckrb8SviPHTXShgNGTioWxqi43n4NbGmAZJ1uX/SVmgUH07Nqb6W8y4ZhppTd/u4iop7scKPwgJqMz+vevzYV+5PZPn7h/r3KNF5uDEd8sZdM+dvTg0unUmgmDoy6S9Ti3wO8DW1No/leSitzxHKCg45sPX5sJT74z0HRHtvzEQb5vuAJBh8aB1A8/T+2Xxvb9P1cVrEy2RynChr0vHmIiSVfmcmEriU6Gyol6wAM7fRXaWO5sqOT3YAh9N/NI4ckKVxC4P0W1Rv4FYG/oARW8x6hg+zCg1Zrx+FXkX2vFMNalKCWxoAXAbw7IRc3Nxot2t1mUIfopXT3ipZV/xEla5om7z1Kg2zk5YVCskOz3nrB6UJq5udleyFKD+LZkCzMQpFPiauSacX1xPUfQ/ILwheYZqoW2CReFrBxbV7gaVoI5WMYt/k5p+/4f6gR/Nfo57MpVuyQ5xGZh9FxEb6LRSfOH8eXTjS3jN9xUi+pQqm8r76InLehqZrnY0DPO/VTE6gKWIyWqbFjIaRKkMIpFKv8MLr/ayxcJaYzPQ0IWZuxcL4C20UVAS/bi2ltiJ8ePNNVDAD7u25Ru0Rmu1gP8xiLSCTXfgnEkIabj/NYysmLdmk87UjWRSoemJrnjzFIAIb4lz+vHe7EJLSWhTzVQPA22MnGkKepCXgtFfcDfQuzbLabxkyB+MhH8oyUS83kjq42y0eYfT3e5uHU03ITdyC3270OFbU98t7L/S9Vtd6iKYZ2yyK4/LFfVivTT2BfhgOnk+ZqU3Cd/sZwgdgPILWDdwHGe47LHs9kXrO4/VpGf0QyJbGxTt6vEbU8RRakz8kIGqgm2myw/3ohm0ZZZDERaoBTlhxOahMw3nkKNnLxdX78SwBUa9znPq5fEfcaE7zskbHnsTdbLgRAHFsqQyxfIAkCGibCUmeqRLppfTTqFWds9cZKCuqbQJ2OZH9DFWSdoVEMZE4fkXXajQ0e4WiredlGsOtB2P7AsIR3K0OBx9DSp0xpBX09ejI4x/o4DEtlzymR4UGACYFTQLdMpZSR12TU+Z4a/0NfZhnzmf8ezq1foxoHExYeAJZ1uLjapLMS5DQKUqaNbyxVt9y3+g0Dwp+Zy9zjqyox0mXbeSo7Y0EPmpDM03rSiEri6DsxOM3D5p69u+8IiNQtoYwFLS0QdNaTMybtWELuhgk1QjHbo8DsncnpYwE6PgH3aIjhFS+tAFTyvP5BHrbdXevB0/FZp1j3Q2zXAZeRvZ8AJSuLQjCzvjlCAHPRVBXfayDkgI8zVDgxMF3LPXyuCJjPmBJ4Jlv88bC4uLB2WHXBJvhDLaLI0aT8= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(82310400017)(1800799015)(376005)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2024 04:19:44.6908 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e5129e38-61db-4cfe-ffe3-08dc7ecd675d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF0000449D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7937 From: Manali Shukla Execution of the HLT instruction results in VMEXIT. Hypervisor observes pending V_INTR and V_NMI events just after VMEXIT generated by HLT for the vCPU and causes VM entry to service the pending events. The Idle HLT intercept feature avoids the wasteful VMEXIT during halt if there are pending V_INTR and V_NMI events for the vCPU. The selftest for Idle HLT intercept instruments above-mentioned scenario. Signed-off-by: Manali Shukla --- tools/testing/selftests/kvm/Makefile | 1 + .../selftests/kvm/include/x86_64/processor.h | 1 + .../selftests/kvm/x86_64/svm_idle_hlt_test.c | 89 +++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86_64/svm_idle_hlt_test.c diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index 6de9994971c9..bd97586d7c04 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -93,6 +93,7 @@ TEST_GEN_PROGS_x86_64 += x86_64/smaller_maxphyaddr_emulation_test TEST_GEN_PROGS_x86_64 += x86_64/smm_test TEST_GEN_PROGS_x86_64 += x86_64/state_test TEST_GEN_PROGS_x86_64 += x86_64/vmx_preemption_timer_test +TEST_GEN_PROGS_x86_64 += x86_64/svm_idle_hlt_test TEST_GEN_PROGS_x86_64 += x86_64/svm_vmcall_test TEST_GEN_PROGS_x86_64 += x86_64/svm_int_ctl_test TEST_GEN_PROGS_x86_64 += x86_64/svm_nested_shutdown_test diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index f74f31df96d2..0036937b1be4 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -192,6 +192,7 @@ struct kvm_x86_cpu_feature { #define X86_FEATURE_PAUSEFILTER KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 10) #define X86_FEATURE_PFTHRESHOLD KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 12) #define X86_FEATURE_VGIF KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 16) +#define X86_FEATURE_IDLE_HLT KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 30) #define X86_FEATURE_SEV KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 1) #define X86_FEATURE_SEV_ES KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 3) diff --git a/tools/testing/selftests/kvm/x86_64/svm_idle_hlt_test.c b/tools/testing/selftests/kvm/x86_64/svm_idle_hlt_test.c new file mode 100644 index 000000000000..594caac7194b --- /dev/null +++ b/tools/testing/selftests/kvm/x86_64/svm_idle_hlt_test.c @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024 Advanced Micro Devices, Inc. + * + */ +#include +#include +#include +#include "svm_util.h" +#include "apic.h" + +#define VINTR_VECTOR 0x30 +#define NUM_ITERATIONS 1000 + +static bool irq_received; + +/* + * The guest code instruments the scenario where there is a V_INTR pending + * event available while hlt instruction is executed. The HLT VM Exit doesn't + * occur in above-mentioned scenario if Idle HLT intercept feature is enabled. + */ + +static void guest_code(void) +{ + uint32_t icr_val; + int i; + + xapic_enable(); + + icr_val = (APIC_DEST_SELF | APIC_INT_ASSERT | VINTR_VECTOR); + + for (i = 0; i < NUM_ITERATIONS; i++) { + cli(); + xapic_write_reg(APIC_ICR, icr_val); + safe_halt(); + GUEST_ASSERT(READ_ONCE(irq_received)); + WRITE_ONCE(irq_received, false); + } + GUEST_DONE(); +} + +static void guest_vintr_handler(struct ex_regs *regs) +{ + WRITE_ONCE(irq_received, true); + xapic_write_reg(APIC_EOI, 0x00); +} + +int main(int argc, char *argv[]) +{ + struct kvm_vm *vm; + struct kvm_vcpu *vcpu; + struct ucall uc; + uint64_t halt_exits, vintr_exits; + + /* Check the extension for binary stats */ + TEST_REQUIRE(this_cpu_has(X86_FEATURE_IDLE_HLT)); + TEST_REQUIRE(kvm_has_cap(KVM_CAP_BINARY_STATS_FD)); + + vm = vm_create_with_one_vcpu(&vcpu, guest_code); + + vm_install_exception_handler(vm, VINTR_VECTOR, guest_vintr_handler); + virt_pg_map(vm, APIC_DEFAULT_GPA, APIC_DEFAULT_GPA); + + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + + halt_exits = vcpu_get_stat(vcpu, HALT_EXITS); + vintr_exits = vcpu_get_stat(vcpu, IRQ_WINDOW_EXITS); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + /* NOT REACHED */ + case UCALL_DONE: + break; + + default: + TEST_FAIL("Unknown ucall 0x%lx.", uc.cmd); + } + + TEST_ASSERT_EQ(halt_exits, 0); + pr_debug("Guest executed VINTR followed by halts: %d times.\n" + "The guest exited due to halt: %ld times and number\n" + "of vintr exits: %ld.\n", + NUM_ITERATIONS, halt_exits, vintr_exits); + + kvm_vm_free(vm); + return 0; +}