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Wed, 22 May 2024 16:31:36 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 01/42] mmc: dw_mmc: Remove common.h Date: Wed, 22 May 2024 18:30:54 -0500 Message-Id: <20240522233135.26835-2-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean common.h header is marked for removal treewide and shouldn't be used. Remove it from DW MMC driver. No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- drivers/mmc/dw_mmc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index e1036641452a..e6107c770fe3 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include From patchwork Wed May 22 23:30:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798181 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917291lte; Wed, 22 May 2024 16:32:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVrgg2UXMqoo6Yy5zlJF+CO5A0Q6F294QlyBYdGANBxKE5Ttp82hoKLhyRxGfCdOP7SQmWUw5EDH1i/5PL4iSlX X-Google-Smtp-Source: AGHT+IHgeKJxOaOUeX9AupvZGmx6EC564GC4+JqTSkZXWrAyKqZ6hgqb9hvYNhboiOHP0/1/3Agq X-Received: by 2002:a5d:4007:0:b0:354:e72f:d5d7 with SMTP id ffacd0b85a97d-354e72fd6f3mr1751365f8f.24.1716420729411; Wed, 22 May 2024 16:32:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420729; cv=none; d=google.com; s=arc-20160816; b=kyoHQi734HgrAB2IQjbFpqgEnDXitDsW5BiaMEZT71e9J2kXfrPgsP2qzMP0b3UApj uhKnubpfGnbdbOBv2Y5v53RRgEkyhyJfbmD8Y8ft8T0uWtT0IsiXbDp4+JV7Z84ELmTA oodLVZGxXCDWd7MS/fdXyqyNIPp0BHRN36hc13yStiJB74SvIlbHZk5+t3s1Q1T0cg4W dUfbdoyreI69qY+hz9Ya+3hLyF18GChKRJ+1IbETqz3GxrbUCEalfAraT6r0SZnI1VS6 Uwk3bPTF6JY9ptaefVeSeYBjehicA8+mpHuTb+FVbwvSvZxIFNPhE2Tyr6mc0B/uO+9Y ScPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=UK+La7C1WTAR2Q1AWdJrZ4bxawvdTt4on1J5ulr8SBE=; fh=iNcAewHjQQMAH8srLZLhggGdVUsQ0DB/CRAkqLRBvBw=; b=xrcNbsIdQiR6axURLzfs6Z37XQaCdgKSHm4QLVSL2HhPlw5cSA6/yu9KBQ6XkrGjZs xiza/4wLhhQEhYKWHBwLYVPLE/CzUVTaybNalnr6A0rMjb8hvyl7r8pXKBJWMV9xzzy1 +XQY8SZCiap+0yZP4lWEszNyMUPEaELg1vfHA1E6RY53vD9PofF5JnPZxu01VtwEtwXH cgyrlDO3p1OGbMdctVt+5WwAv7/yq/r+Ww25Iqlod3e3CJxX5fDlkMksnuIcpsLxHX1O sySjLp9cUlDMcyUnjj/wtd6jDToCJXEq2rccXm3ALeS7Y47sPiOmELbKaRsnbzEsAXJs ChKg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DU8f4djZ; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:31:37 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 02/42] mmc: dw_mmc: Remove unused version field from struct dwmci_host Date: Wed, 22 May 2024 18:30:55 -0500 Message-Id: <20240522233135.26835-3-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Nobody seems to use it, so just remove it. No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- include/dwmmc.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dwmmc.h b/include/dwmmc.h index 136a95b8cdb6..39024fb38aaa 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -163,7 +163,6 @@ struct dwmci_host { void *ioaddr; unsigned int quirks; unsigned int caps; - unsigned int version; unsigned int clock; unsigned int bus_hz; unsigned int div; From patchwork Wed May 22 23:30:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798182 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917315lte; Wed, 22 May 2024 16:32:13 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUpLVI/QfUkEVmr4zTq0sBCjA0X54bxCUAeAKkgz/UuYzZYuAYst/Utw7UY4Z7ZKbLLIkm8oedEwmsSSpqpEQyi X-Google-Smtp-Source: AGHT+IGf019z6kdY3EkDd9wdNhG0SVrRBBYXcxljOq+PilbpnW/F2Rpj6inDfRMRYOjvzIHnGfyM X-Received: by 2002:a50:d64b:0:b0:572:a158:8a7c with SMTP id 4fb4d7f45d1cf-57832cbc562mr1826520a12.42.1716420733600; Wed, 22 May 2024 16:32:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420733; cv=none; d=google.com; s=arc-20160816; b=Vu9Qc/Nhr8NQpAO9z5ll8DmIZb1+0Fj4ydyBq5WAPlYqD/soizrekscRVJvz/g13rh TISW57UglV6XjTdl1LYdrKUy7VAy2ZOL3xcIYpKztwMBeHUeqgR96W7qKlAEL+kkzOYz D80sgUpLkqFVnV7HTMfI00KoPBzmc+2CBF1sIMLD1BFgAuodDQC+P39fHstXAmK4SYov d+wr4Htw5oM9bacKYH8A6l3YwKmgHiZh4Qh2+VYwJ3B8IHC0Q/TNN4LbHS59FfdufcKl 91JEyM4WzrNtkLn1SOYYOIoDyKyQo2/FmtxiPKusok9jlyOKBtJIzf35SsevWr+9bfTR YwrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=udSgRUpFNyiKR51hBGxj2miB/YWXrjw6MgLLrb8ORc8=; fh=0o3HHDYN7U5A2+Wk1nkRODkxCf6FGWn2Vpa1lm0C//Y=; b=C6OG5SIApfUJcjea8VOVuuH4UP//wuxaLVCPI6yHX7blZtn9flhneDqW6Vlv0ZHiCs 1T8SODzIH3z7laDWqc9UIrPOVmy8Hq1357JMiIdLbt7vGraKKQ2T0s36ysVNNqG59IiE QD/vyj/8TUHfvPAztTER/BxPSKRhQofBUauliLaZ6Y6qePepY1heo+1rrc0l9pAOHLpQ U19JaD6byc6Vq8+eD/qLLb/NMtjm52YNYEXOzRUnKeeLBoWf6nJPKtdt2AwKYj5iD1ZQ AdiVIC8u/m9Ddn1x3MfjiQ2e4tZIglvLjpbUIM2Uwmi6tl7w9AehIEmK410oI4uK0Oa8 Jaqg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BIBJZaNS; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- drivers/mmc/dw_mmc.c | 7 +++++++ include/dwmmc.h | 7 ------- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index e6107c770fe3..9d668b3d8813 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -20,6 +20,13 @@ #define PAGE_SIZE 4096 +struct dwmci_idmac { + u32 flags; + u32 cnt; + u32 addr; + u32 next_addr; +} __aligned(ARCH_DMA_MINALIGN); + static int dwmci_wait_reset(struct dwmci_host *host, u32 value) { unsigned long timeout = 1000; diff --git a/include/dwmmc.h b/include/dwmmc.h index 39024fb38aaa..7e4acf096dce 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -198,13 +198,6 @@ struct dwmci_host { bool fifo_mode; }; -struct dwmci_idmac { - u32 flags; - u32 cnt; - u32 addr; - u32 next_addr; -} __aligned(ARCH_DMA_MINALIGN); - static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val) { writel(val, host->ioaddr + reg); From patchwork Wed May 22 23:30:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798184 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917501lte; Wed, 22 May 2024 16:32:44 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV/QSTMLmZ9evCgRRyeEHSlWuekw0TDVaIhiFjtk0SMYBp1Du87dK6SZMxTtKltDurZ1JxjEQ/Mm8IMP50bJ10t X-Google-Smtp-Source: AGHT+IEx8OpPl8ASdKpUcrK7TxYFl4ykFAulb4tHj0we6zPGg8pBEO7VlGOuX7dYS7J5ilcDucOv X-Received: by 2002:a2e:a444:0:b0:2e5:2c7e:257 with SMTP id 38308e7fff4ca-2e94949dfa2mr20932521fa.30.1716420764382; Wed, 22 May 2024 16:32:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420764; cv=none; d=google.com; s=arc-20160816; b=q+6vKrdA3JJ8QCAOOwZJPaM45eWSpAplzWS6K9LOcIRQsH/18H6KmpOvMbgnNG9bb3 DIELkVwZG7iVqtQ3VBmlU4S5erj1FFLgIWlK3eoks2SaS+Qas6S0eP4NptVkpQxHNd4i opKh1a7RknhGorOlM8h+7YeFhYhTr+wBwhN7q0NnyWdby0LLRf92f/nh5xnnH9EtGnMf xf73fhUBX1cDY7ySnr5JACTaxSq/S30MgEWG2uANdsQbG3jayjkqKRMmgXIrlqzgeJ7u w37z8dQdC8clbjxG5MGPVXpkqMKEls5VKZaxcGJQ/hAeaSGbDJm9KEcVVZ6cCvP/IZBE EpqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=t3gboz91R7dbgrRePpjOmuoLxx9XyCXEGmIzVeG6Gic=; fh=qvfujmusX+st0fqR3cPijP3UMQnaKZE3Wmsnb/Zd33o=; b=nXlBHPk/ubgIsvUiyIL3MYBqu0XLsBEXV/LMj1EsPKcTSeArCONJJHZLDFSywVoQxe PPfAaxTaKZjZ+3zX+r/IbxBwQA9+Udgophdb99e3pNL0knYP7j/vZYB+VosYtuv9DCga ZQ9bKEg+WW7IdjGpmlUsm2ENMCHwPZ0hnoztzhWO15BI6dkQzrv/NMPbghX4pZYVCwD4 0vxs5z/PgBhTu2iVwHWXYIj5uJe0XTTZ3CdztSXIFqZbF9WBBm4U9Xh1NWcNNxttivDt C1G/+851o/xNlgLm9q4/XQAz05ENNAd/uQPUV52o9Hs6pF+9EAr8/BrAkLyB2nfRQcsc fG7Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yFcJC6Q+; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Follow Linux kernel example and extract it from dwmci_send_cmd(). This way it doesn't clutter dwmci_send_cmd() function, and can be reused later in other cases. No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- drivers/mmc/dw_mmc.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 9d668b3d8813..a82f6a96db39 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -246,6 +246,21 @@ static int dwmci_set_transfer_mode(struct dwmci_host *host, return mode; } +static void dwmci_wait_while_busy(struct dwmci_host *host, struct mmc_cmd *cmd) +{ + unsigned int timeout = 500; /* msec */ + ulong start; + + start = get_timer(0); + while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { + if (get_timer(start) > timeout) { + debug("%s: Timeout on data busy, continue anyway\n", + __func__); + break; + } + } +} + #ifdef CONFIG_DM_MMC static int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) @@ -260,19 +275,11 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac, data ? DIV_ROUND_UP(data->blocks, 8) : 0); int ret = 0, flags = 0, i; - unsigned int timeout = 500; u32 retry = 100000; u32 mask, ctrl; - ulong start = get_timer(0); struct bounce_buffer bbstate; - while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { - if (get_timer(start) > timeout) { - debug("%s: Timeout on data busy, continue anyway\n", __func__); - break; - } - } - + dwmci_wait_while_busy(host, cmd); dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL); if (data) { From patchwork Wed May 22 23:30:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798183 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917464lte; Wed, 22 May 2024 16:32:38 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWoxNbcJohLYg8XtW4dwnYtYbJ2Lz8RiUzO8bgKujBfcAcSEmSGtPlbE6NfR/uNBxO39LeNXBCllmwSiPmpkD1X X-Google-Smtp-Source: AGHT+IFUDzQZGWCW0Sw2OR6hGJFdNZuOnWHComdYVopc73NmXtVIWvNT+y9kolLBsz0jxNXuZbyX X-Received: by 2002:a05:6512:6f:b0:51d:5e78:17fa with SMTP id 2adb3069b0e04-526bd6936camr2140800e87.4.1716420758071; Wed, 22 May 2024 16:32:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420758; cv=none; d=google.com; s=arc-20160816; b=CzMNhJKPKhPQVFcWvWNrqZMfsAomzY7sZMkhbZjCoOXQfPso9tkETTg+aZqZ4cv5XT I3VXyCEz8dmD3+3C92iBABQCViFGiCeAc7aQwBnlBtkcslc6YwPycRg8D43P2g78PI+b PHaoXD6SOn9kJBTQEmsDRycGPjgT2Askk20sFOkr7tGKn+nD6qMVc0PZ44528VeXFRUK V97cHvAYqB/Cwyjd24zediFyMu1lB3oFvTxXQI6ZDZyZ8mgwlVnEz7MxT48RNFudSJSf X1yN/PzIGDRs82N6unYhZVxc4ElmtWqbAn1uyfiwUpWlrEfVHjFjhs0OlszoO065CBoy 8SJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9EVRv8bS0w3wESTaeA0XmRalvVP88dkRy96H1dAbcuI=; fh=EGEYzlzGFx7VUF1RD2dqTpOOWCK0rzPqyaWANP1Llj8=; b=tFC2OLEJtBbj+KoOJePBTiiLbdX/BXN8SUDNxprUMfzbDggoYyOvQOuILvusB1LSSX U95x/HEUX5othg97DD1Q0mrlZxa3pIuoNGGx2hzsKUu5rPqIOnqmyJdvdds4tX4H6535 RnmkHTfpNOHzRUQFCyK9ADmT2PQn22ncqC6OMCuwYBl+8HvQD9CXth0VJ29os5QZFPGU 4mO11IHFJAD7e0aOQ47AhpCbYkInLgxQzlOjhc5PQ/om7dREWaD0TRWEhn8IOXbHlCEB +sneV7Wb2yNC+5YWS7fHpcXUrgRrrC9fjk04+XjcO7YeRQKl4sC45IOSo6y22YFbz9SC 454A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Ewdw/MOF"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- drivers/mmc/dw_mmc.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index a82f6a96db39..cbfb8d3b8683 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -540,6 +540,20 @@ static int dwmci_set_ios(struct mmc *mmc) return 0; } +static void dwmci_init_fifo(struct dwmci_host *host) +{ + if (!host->fifoth_val) { + u32 fifo_size; + + fifo_size = dwmci_readl(host, DWMCI_FIFOTH); + fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; + host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | + TX_WMARK(fifo_size / 2); + } + + dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); +} + static int dwmci_init(struct mmc *mmc) { struct dwmci_host *host = mmc->priv; @@ -564,16 +578,7 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_IDINTEN, 0); dwmci_writel(host, DWMCI_BMOD, 1); - - if (!host->fifoth_val) { - uint32_t fifo_size; - - fifo_size = dwmci_readl(host, DWMCI_FIFOTH); - fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; - host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | - TX_WMARK(fifo_size / 2); - } - dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); + dwmci_init_fifo(host); dwmci_writel(host, DWMCI_CLKENA, 0); dwmci_writel(host, DWMCI_CLKSRC, 0); From patchwork Wed May 22 23:30:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798185 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917572lte; Wed, 22 May 2024 16:32:54 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV0ULX+RFDnHtJmtvLB+cBOoRaHvlVzO8S6LvGNuJ4H2sidklgl+vxxhMSc/AFtzR8x+maa9HO9gKs1RbAWaonF X-Google-Smtp-Source: AGHT+IFuaScSL0b9QYpCm9iE6vtIdFHYLaK05KBLRlBPg+sOJETWzb28XiP4Q2d5Aj+9beT1mVke X-Received: by 2002:a2e:2c0c:0:b0:2e0:9646:8512 with SMTP id 38308e7fff4ca-2e94959d2d1mr20521401fa.31.1716420774639; Wed, 22 May 2024 16:32:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420774; cv=none; d=google.com; s=arc-20160816; b=0Dh6k+FjO3zZMvP7JAfPgloIsctw9Ts4EuuNB8OgDZrTVqHcrPjeYU/LtrTD3fh0BS 75YtX0f9ycSAe7uNqf7FdyH1962tUdNMnc/iB5d48c275V4AWK/p4OQ7CoyQ86U4hxWu Y3iTX9nfnUsw3ag8h6fC9nGaHg5enpDDkVFR+lvR8XB8GWKCgfQ3F/tuMg+uUAM0Gd3F Zzut7zQS0EaGuqKndxmPJso8I7V+ckF2YxuhC4ODGT4LHL0bs8m3g+IICZ7WvkkBm5Ku 6xXAwnOl1BQIIwnI3MISSMDqF+VXHLYC4EIStEAxfQXUP0ycRlaJsWO92lVM+V/yL42l VFyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=nW2d4ajBUAfptcYRf7hM/6SH7SxDjRu31sqRJ6zWcGI=; fh=iB12APDNVqSb4KEVcOyNeRUpn2dlxnAefLA6qzL0Rko=; b=ZZoDPLLMrJsYxpNAH+TZOrKCyiWpK7XWhAq7+fYo0aN1LZbpr+foP5E5mp8SWzu1KW z5RZ4ujWlbFrijg+fbH21Vx/IuZStWupno/ic1in42UID+0QgmWYJDsvQGcfuyhRGP1t U0Pa1m/vvdHMtCoEofLSsfBAH56C0e3yFTaVFCNMGJzbQx3DLerCPet1SB1mvoTVzVa4 wcwB3G2T6opXCK9bGTWDf5lkvyfq+hqPfe7ZdDWWCPnjPDFoNq6bKEz10TEZuZxmeoW4 kQ1jAaQRNYfKNR8zU+KuYBkks4p1HRo5pfRqxZaznQQI8cxZFoXvUV+QGNxEMRC7Ohzr FKOQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mjumja+f; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:31:40 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 06/42] mmc: dw_mmc: Extract clock on/off code into a separate routine Date: Wed, 22 May 2024 18:30:59 -0500 Message-Id: <20240522233135.26835-7-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Extract clock control code into a separate routine to avoid code duplication in dwmci_setup_bus(). No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/dw_mmc.c | 60 ++++++++++++++++++++++++-------------------- 1 file changed, 33 insertions(+), 27 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index cbfb8d3b8683..40b9b034f793 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -412,11 +412,33 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, return ret; } -static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) +static int dwmci_control_clken(struct dwmci_host *host, bool on) { - u32 div, status; + const u32 val = on ? DWMCI_CLKEN_ENABLE | DWMCI_CLKEN_LOW_PWR : 0; + const u32 cmd_only_clk = DWMCI_CMD_PRV_DAT_WAIT | DWMCI_CMD_UPD_CLK; int timeout = 10000; + u32 status; + + dwmci_writel(host, DWMCI_CLKENA, val); + + /* Inform CIU */ + dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_START | cmd_only_clk); + do { + status = dwmci_readl(host, DWMCI_CMD); + if (timeout-- < 0) { + debug("%s: Timeout!\n", __func__); + return -ETIMEDOUT; + } + } while (status & DWMCI_CMD_START); + + return 0; +} + +static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) +{ + u32 div; unsigned long sclk; + int ret; if ((freq == host->clock) || (freq == 0)) return 0; @@ -439,35 +461,19 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) else div = DIV_ROUND_UP(sclk, 2 * freq); - dwmci_writel(host, DWMCI_CLKENA, 0); + /* Disable clock */ dwmci_writel(host, DWMCI_CLKSRC, 0); + ret = dwmci_control_clken(host, false); + if (ret) + return ret; + /* Set clock to desired speed */ dwmci_writel(host, DWMCI_CLKDIV, div); - dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT | - DWMCI_CMD_UPD_CLK | DWMCI_CMD_START); - do { - status = dwmci_readl(host, DWMCI_CMD); - if (timeout-- < 0) { - debug("%s: Timeout!\n", __func__); - return -ETIMEDOUT; - } - } while (status & DWMCI_CMD_START); - - dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE | - DWMCI_CLKEN_LOW_PWR); - - dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT | - DWMCI_CMD_UPD_CLK | DWMCI_CMD_START); - - timeout = 10000; - do { - status = dwmci_readl(host, DWMCI_CMD); - if (timeout-- < 0) { - debug("%s: Timeout!\n", __func__); - return -ETIMEDOUT; - } - } while (status & DWMCI_CMD_START); + /* Enable clock */ + ret = dwmci_control_clken(host, true); + if (ret) + return ret; host->clock = freq; From patchwork Wed May 22 23:31:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798186 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917645lte; Wed, 22 May 2024 16:33:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCU83WQTEpImdlpeg5yMvNWx97k09oh0h6mldLKNr+Ffv35E4R8nkDPhx+bOGdkTUSEbJNqCPcsIZVV/Pe1lUx40 X-Google-Smtp-Source: AGHT+IFNSg0uC0nGWgkAZlCMjChUJfevb154t/mz09mQAM9dzVlGSW9WL4fZCRD0ccXw/jBdAMnS X-Received: by 2002:a05:651c:c6:b0:2d8:3e60:b9c9 with SMTP id 38308e7fff4ca-2e949540f51mr20525381fa.33.1716420784161; Wed, 22 May 2024 16:33:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420784; cv=none; d=google.com; s=arc-20160816; b=alL7WqRULd+WXGApgndvLAHGYaFLJZmd5o3SYfGPl+2yUvxdhIasZNULN1Cmjg42P/ FfMeTrC4I6WZcLDUrWB5o/WEPPc4SDhB2PUVLdX6Sk/D3vprIvVzEAFUTYMBlB5Je5HL BxfQ8ZQaIcU4+Y8ynABlF/a3d7xCcg5Z2r9BgIewgzlWpDg1PKS7Dn6sB5kh3oo0+r/t qarnYyNLSr+3RTCnO0J4xIBo2+l/Q/wxuexABKaWUrpeFqvH2PEieAw+dg4OmnbaGiIe qtUhD5F5Q6JxRj1zot9KK/3ydIqkZLifYBpHbv9bE0GJRjGLiiyTcSoYIf/sOUezpi2y K1lA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=up20KcUHKaWbwVwB7lK+qX3BMiB3ScqRXF1dCSdqfWg=; fh=FHCgR61fMhvjGtSHlaRcX5S3FVMvzA3QxQVg+EJj5bw=; b=STLx0D203scTFmZ/9+LvX3hC8VXEcdzdnYW0ilqxxwMrhn3jTO5+Qc2XEpDWOSPOJK /oOyw4doZ803yqU1r6e367XI7MlT1k1Vv6xJd02+1wZfOVsZxAp2GIFNj6K3Z1Zlhanc cfpWbUvYPGxnhQqpRdLbH2aEMzrWQzGwUJ13WoOcdGuyAq0FwTSTg0RdEoMJ7pcW7VQi 7zCfLoxDZ6PFYk8sk8TYFLCI8b0xW5K0BzkBGcMbDMalgSaw9fQx3ilWk+LVyzC4czBr Hv5sWcFhE0k11gDf6hKrRtK38QDu5KQJaXCBkbahzh9QaNBMbawR2WzmJNr13QnLqVg5 ZX+w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="NQwVI/yY"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:31:41 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 07/42] mmc: dw_mmc: Extract FIFO data transfer into a separate routine Date: Wed, 22 May 2024 18:31:00 -0500 Message-Id: <20240522233135.26835-8-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean FIFO data transfer is implemented as quite a massive chunk of code. Extract it into a dedicated function to make dwmci_data_transfer() easier to read and reduce the indentation level of the code. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/dw_mmc.c | 107 +++++++++++++++++++++---------------------- 1 file changed, 53 insertions(+), 54 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 40b9b034f793..144f29f09240 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -140,25 +140,67 @@ static unsigned int dwmci_get_timeout(struct mmc *mmc, const unsigned int size) return timeout; } -static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) +static int dwmci_data_transfer_fifo(struct dwmci_host *host, + struct mmc_data *data, u32 mask) { - struct mmc *mmc = host->mmc; + const u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> + RX_WMARK_SHIFT) + 1) * 2; + const u32 int_rx = mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO); + const u32 int_tx = mask & DWMCI_INTMSK_TXDR; int ret = 0; - u32 timeout, mask, size, i, len = 0; - u32 *buf = NULL; - ulong start = get_timer(0); - u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> - RX_WMARK_SHIFT) + 1) * 2; + u32 len = 0, size, i; + u32 *buf; + + size = (data->blocksize * data->blocks) / 4; + if (!host->fifo_mode || !size) + return 0; - size = data->blocksize * data->blocks; if (data->flags == MMC_DATA_READ) buf = (unsigned int *)data->dest; else buf = (unsigned int *)data->src; - timeout = dwmci_get_timeout(mmc, size); + if (data->flags == MMC_DATA_READ && int_rx) { + dwmci_writel(host, DWMCI_RINTSTS, int_rx); + while (size) { + ret = dwmci_fifo_ready(host, DWMCI_FIFO_EMPTY, &len); + if (ret < 0) + break; + + len = (len >> DWMCI_FIFO_SHIFT) & DWMCI_FIFO_MASK; + len = min(size, len); + for (i = 0; i < len; i++) + *buf++ = dwmci_readl(host, DWMCI_DATA); + size = size > len ? (size - len) : 0; + } + } else if (data->flags == MMC_DATA_WRITE && int_tx) { + while (size) { + ret = dwmci_fifo_ready(host, DWMCI_FIFO_FULL, &len); + if (ret < 0) + break; + + len = fifo_depth - ((len >> DWMCI_FIFO_SHIFT) & + DWMCI_FIFO_MASK); + len = min(size, len); + for (i = 0; i < len; i++) + dwmci_writel(host, DWMCI_DATA, *buf++); + size = size > len ? (size - len) : 0; + } + dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_TXDR); + } - size /= 4; + return ret; +} + +static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) +{ + struct mmc *mmc = host->mmc; + int ret = 0; + u32 timeout, mask, size; + ulong start = get_timer(0); + + size = data->blocksize * data->blocks; + timeout = dwmci_get_timeout(mmc, size); for (;;) { mask = dwmci_readl(host, DWMCI_RINTSTS); @@ -169,50 +211,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) break; } - if (host->fifo_mode && size) { - len = 0; - if (data->flags == MMC_DATA_READ && - (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) { - dwmci_writel(host, DWMCI_RINTSTS, - mask & (DWMCI_INTMSK_RXDR | - DWMCI_INTMSK_DTO)); - while (size) { - ret = dwmci_fifo_ready(host, - DWMCI_FIFO_EMPTY, - &len); - if (ret < 0) - break; - - len = (len >> DWMCI_FIFO_SHIFT) & - DWMCI_FIFO_MASK; - len = min(size, len); - for (i = 0; i < len; i++) - *buf++ = - dwmci_readl(host, DWMCI_DATA); - size = size > len ? (size - len) : 0; - } - } else if (data->flags == MMC_DATA_WRITE && - (mask & DWMCI_INTMSK_TXDR)) { - while (size) { - ret = dwmci_fifo_ready(host, - DWMCI_FIFO_FULL, - &len); - if (ret < 0) - break; - - len = fifo_depth - ((len >> - DWMCI_FIFO_SHIFT) & - DWMCI_FIFO_MASK); - len = min(size, len); - for (i = 0; i < len; i++) - dwmci_writel(host, DWMCI_DATA, - *buf++); - size = size > len ? (size - len) : 0; - } - dwmci_writel(host, DWMCI_RINTSTS, - DWMCI_INTMSK_TXDR); - } - } + ret = dwmci_data_transfer_fifo(host, data, mask); /* Data arrived correctly. */ if (mask & DWMCI_INTMSK_DTO) { From patchwork Wed May 22 23:31:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798187 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917703lte; Wed, 22 May 2024 16:33:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXcuTDPFlvbUXhLHtpl4ryKbYqq0xOifaM4bbAHJSOsWzre4gPSxQqBfaD9WCgMKPjfovS5EgdxiT/II4M9D0UY X-Google-Smtp-Source: AGHT+IG2+xiozPL2ql32+vfOPsrMdR1IOMWeQlAfB4x7Q/dvSTkf8z9n0Xmsx11kqGXswOpxzijT X-Received: by 2002:a17:906:1c8b:b0:a59:af85:17ed with SMTP id a640c23a62f3a-a623e956670mr48134566b.28.1716420794487; Wed, 22 May 2024 16:33:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420794; cv=none; d=google.com; s=arc-20160816; b=kuIH+QU6fHlcOZ6QZlJskL1MzDqg+45M6Ye9hh83KP9H8UimA9/hIPYKrkfSrEh/y7 wYLg6lp7qe3adPkwb9uu/KhI5cwEst4t/NISIWkVcfLwKMXfK2DoEhDPT8f1GHwcYmIb 0uCs4cH+TG6s4C2ixrgl+r2Na3BqMGcYE/PlOFtCpf0F0/HoPs6866pnPuOwml7yId8h X0Odphld65nfLiVes3ChbdokfgjJy3xOPTHJ7gR6bTAqkOsdvPvKuJnTtIpTZmKL2OzY i2Af6NHr1ps83P8M+oT+Q7AVdkJiatVYE/NTb13GBPPoIcF6abOuPrj/+Rek4g+YUKzk JYyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=HcY0epwhpfO0hsI44S2jc8vf2UMELxebOpqmzAF7DOw=; fh=IkWu3/Tjfg6hvE/JbIZ0JIbP67IPTpuMCe57dO98iSY=; b=l1WhopFBvQzIQ4L8jKazp/ox+2DXUoPy6zfBjuz+686rpL7+u9/f9bCUrKuwVc+S23 aVQOmtO6nyqg/42lbaQ2V8sh4ZxNGV+jxCqPxMB5D+T0c7DZvyUqrdYB1BwR1S8Bu7nk frDAB9XEdNcLsIGco5TMuwpsxicNB5s644VpeiJRmkGtDbxgws9e7nVJilPrtVMK24Ps jaH47ba17l387FiZhgQjNe69DdQbLeKdzxJ2Hq+Kae2Mfe75nMCa98ikAhgl2YZN2jpZ NJpM90IYatra+60sGprdtb9HWU02fL+opwK1jw7HMNKq1p2n51cYjxGisjQHREE7UPet WYnA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="T+jhb3/P"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- drivers/mmc/dw_mmc.c | 51 ++++++++++++++++++++++++++------------------ 1 file changed, 30 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 144f29f09240..439f8eb3fb4c 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -233,6 +233,33 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) return ret; } +static int dwmci_dma_transfer(struct dwmci_host *host, uint flags, + struct bounce_buffer *bbstate) +{ + int ret; + u32 mask, ctrl; + + if (flags == MMC_DATA_READ) + mask = DWMCI_IDINTEN_RI; + else + mask = DWMCI_IDINTEN_TI; + + ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS, + mask, true, 1000, false); + if (ret) + debug("%s: DWMCI_IDINTEN mask 0x%x timeout\n", __func__, mask); + + /* Clear interrupts */ + dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK); + + ctrl = dwmci_readl(host, DWMCI_CTRL); + ctrl &= ~DWMCI_DMA_EN; + dwmci_writel(host, DWMCI_CTRL, ctrl); + + bounce_buffer_stop(bbstate); + return ret; +} + static int dwmci_set_transfer_mode(struct dwmci_host *host, struct mmc_data *data) { @@ -275,7 +302,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, data ? DIV_ROUND_UP(data->blocks, 8) : 0); int ret = 0, flags = 0, i; u32 retry = 100000; - u32 mask, ctrl; + u32 mask; struct bounce_buffer bbstate; dwmci_wait_while_busy(host, cmd); @@ -384,26 +411,8 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, if (data) { ret = dwmci_data_transfer(host, data); - - /* only dma mode need it */ - if (!host->fifo_mode) { - if (data->flags == MMC_DATA_READ) - mask = DWMCI_IDINTEN_RI; - else - mask = DWMCI_IDINTEN_TI; - ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS, - mask, true, 1000, false); - if (ret) - debug("%s: DWMCI_IDINTEN mask 0x%x timeout.\n", - __func__, mask); - /* clear interrupts */ - dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK); - - ctrl = dwmci_readl(host, DWMCI_CTRL); - ctrl &= ~(DWMCI_DMA_EN); - dwmci_writel(host, DWMCI_CTRL, ctrl); - bounce_buffer_stop(&bbstate); - } + if (!host->fifo_mode) + ret = dwmci_dma_transfer(host, data->flags, &bbstate); } udelay(100); From patchwork Wed May 22 23:31:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798188 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917760lte; Wed, 22 May 2024 16:33:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXYM0DbQd8s38lN+a0iIuWxFWQrFreg1mpN1Zak2yyJ59fb0CUcGc1FAdUI533x3V+TNWFsNtmakQ9UhreyPRa1 X-Google-Smtp-Source: AGHT+IH8LyC1hPJKnDbG0uJpCATx6T51VueuKZdByALaUB6Iu42/1O+Dvm0bEzhmz4O0DWJCD8ED X-Received: by 2002:a17:906:260a:b0:a59:ca33:6840 with SMTP id a640c23a62f3a-a622812bb1cmr211282266b.44.1716420801788; Wed, 22 May 2024 16:33:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420801; cv=none; d=google.com; s=arc-20160816; b=V0yk/wZaW2hIEYsbjq3cx54VWkxEnBBGEbEcNwJWmMGR9FQugy/G3kXt/JT5RRpKOa GPXC3jCz6S1rmzb5rHAmfXkkrosKQBERSxBGS9Xv6KHeGzCotRTnds2QF4GepX2E5dko pzpnv6/5JHZdpblxHdJ+DCv1BVftGKxDesxszgT8fLTJ5EXHMbu5A/q6MM2aHGFe4nrY 6Wa5l4Jbzl63lEkvs2tR7S8tkYPe3++oriPzgdyzwR2tkxZBEsh9m3wk6AL+cttWT3Ef p89g43mv+KGt6uTab4PKOYsIrPgsVqQRGGBWhbFC1LspALsNmCFWgkBaghxWekzIIbw4 zu5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=j1lxjTB9anvmNkHpZIKVLikRZfWQ4H1XhJaRX5x9MRI=; fh=SpZlkQMMqAbVU8G1DZLKM9xrDGDhwONlRVHi6+qRs2U=; b=b7cGR3rrYmLYAC0VdKQtOPswnvBHTQJxmOe6UA+AqVBz38rd505z3CWX8wqKPyHH7A ukDgtldPP69RNxFrOlZlzvTUiNjNhnkMDAdrUTNMHslvb0+EXOrOIt0D87IpPrfvfzFQ MoU4+vUoRH3q5nzH1+40hz8Y8MydnStUqVrru6ExoLf1UQTJKD9SjlXek8vIOZpqQiC/ dTizid8gE2tb+evZwujzVIhRw4souB5Wby84MHLvG6e+tgSVxjT6p5tuK8Jdo17OahWo Yj6tEbQNLs9EplK9Lt0+tWJEuIXgNXRpqkagMTNyMXlKMQ5ymHsdpbXshXxlNZ8swkAd kaFQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eWyztIkB; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- drivers/mmc/dw_mmc.c | 52 ++++++++++++++++++++++++++------------------ 1 file changed, 31 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 439f8eb3fb4c..16601cacfc00 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -53,47 +53,57 @@ static void dwmci_set_idma_desc(struct dwmci_idmac *idmac, desc->next_addr = (ulong)desc + sizeof(struct dwmci_idmac); } -static void dwmci_prepare_data(struct dwmci_host *host, - struct mmc_data *data, +static void dwmci_prepare_desc(struct mmc_data *data, struct dwmci_idmac *cur_idmac, void *bounce_buffer) { - unsigned long ctrl; - unsigned int i = 0, flags, cnt, blk_cnt; + struct dwmci_idmac *desc = cur_idmac; ulong data_start, data_end; + unsigned int blk_cnt, i; - + data_start = (ulong)cur_idmac; blk_cnt = data->blocks; - dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); + for (i = 0;; i++) { + unsigned int flags, cnt; - /* Clear IDMAC interrupt */ - dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); - - data_start = (ulong)cur_idmac; - dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); - - do { - flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ; - flags |= (i == 0) ? DWMCI_IDMAC_FS : 0; + flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH; + if (i == 0) + flags |= DWMCI_IDMAC_FS; if (blk_cnt <= 8) { flags |= DWMCI_IDMAC_LD; cnt = data->blocksize * blk_cnt; } else cnt = data->blocksize * 8; - dwmci_set_idma_desc(cur_idmac, flags, cnt, - (ulong)bounce_buffer + (i * PAGE_SIZE)); + dwmci_set_idma_desc(desc, flags, cnt, + (ulong)bounce_buffer + i * PAGE_SIZE); + desc++; - cur_idmac++; if (blk_cnt <= 8) break; blk_cnt -= 8; - i++; - } while(1); + } - data_end = (ulong)cur_idmac; + data_end = (ulong)desc; flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN)); +} + +static void dwmci_prepare_data(struct dwmci_host *host, + struct mmc_data *data, + struct dwmci_idmac *cur_idmac, + void *bounce_buffer) +{ + unsigned long ctrl; + + dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); + + /* Clear IDMAC interrupt */ + dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); + + dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); + + dwmci_prepare_desc(data, cur_idmac, bounce_buffer); ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN; From patchwork Wed May 22 23:31:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798189 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp917869lte; Wed, 22 May 2024 16:33:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXR9UThL4sVQ/lZqEwssUz2AHsnlAsA+L3l3b8eGmKWms6e05a1V1eRzsV9z9NwibuIyH7apWohraPmWVj9vzIB X-Google-Smtp-Source: AGHT+IGZAwHL2TjmvFScTR/gnbMW05OBKG6cZgCX/ZI92+BQoHOwuiwqDZIm9yuqsd9floimwPaL X-Received: by 2002:a17:906:7708:b0:a5c:e240:ceb7 with SMTP id a640c23a62f3a-a6228163184mr215980866b.62.1716420815760; Wed, 22 May 2024 16:33:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420815; cv=none; d=google.com; s=arc-20160816; b=jlcJLIVxxRMTarg5ix5z23b01FDGUoo7heER+DmB2rfqoFiFeFL1QrBV3FeDLqxt5o BfInKexA6e68nle42V/WdASdxl8BHuFm16/kmiqufB6fyapyF5BkSNJciK64EZ7EXAc0 T505UyrNHay2S6fPqwlHY3sTrjbclf1rsN7sH2kvjdphHweFV8Cb3uPS9USVMbD6ZVXu metDhIb8vfoWg2IvqRo78z/pw2V9i7dyLN0ZJlyGL5RBUmTRpR/LCDA7e5yTGQ1mKLGW gp5/IPwejgMlLGUKVBE7L38d6rUXPZqarniK4GwD84kQpVsuRSWwYUyekUG5wpIoQK6r uLgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=W6pTAOnOkc9AD5gRKa3X2xjHQEQ3BujpCO7cVExN+Ro=; fh=uMNoYP5g48s0ci631csT+MYuFjTYwF6t5adQukYCVf8=; b=M3TFtcaZxFu4MMabBHaqhzXWiIhX8Q+a4REiynOfCq/lDKROVk3ucDdeU09ErBZNlP I8lB44uB+7oKtS2xKJGsDx57XXIzX8vCLKiPIBZiZNVal3LS1b6OjblM9cDn9bDz0dTf L3xYteq4wvMccQnX3t1dHLtdg8U0RE29sLeI/wL1lY5upC3H+qIkEZU2hnjPO3EGN09W +IJJYJ8lZBQXaUTtdFQ4G5qli0pjsPtkCaQROfYScCd47ululAhCaVQ/MpuAWtTIh4bM ALX0KBUX7L/COzNqZIys1NrT9/8UM9JJHRpF2age5HsPNCL1IIR+GHd+DeGcRh5MlgHl Fz/A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GavdtQn7; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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While at it, make use of virt_to_phys() to make it more obvious in which places the physical addresses have to be used. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/dw_mmc.c | 43 +++++++++++++++++++++++-------------------- 1 file changed, 23 insertions(+), 20 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 16601cacfc00..8e04ab39c2c5 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -20,11 +20,12 @@ #define PAGE_SIZE 4096 -struct dwmci_idmac { - u32 flags; - u32 cnt; - u32 addr; - u32 next_addr; +/* Internal DMA Controller (IDMAC) descriptor for 32-bit addressing mode */ +struct dwmci_idmac32 { + u32 des0; /* Control descriptor */ + u32 des1; /* Buffer size */ + u32 des2; /* Buffer physical address */ + u32 des3; /* Next descriptor physical address */ } __aligned(ARCH_DMA_MINALIGN); static int dwmci_wait_reset(struct dwmci_host *host, u32 value) @@ -42,22 +43,23 @@ static int dwmci_wait_reset(struct dwmci_host *host, u32 value) return 0; } -static void dwmci_set_idma_desc(struct dwmci_idmac *idmac, - u32 desc0, u32 desc1, u32 desc2) +static void dwmci_set_idma_desc32(struct dwmci_idmac32 *desc, u32 control, + u32 buf_size, u32 buf_addr) { - struct dwmci_idmac *desc = idmac; + phys_addr_t desc_phys = virt_to_phys(desc); + u32 next_desc_phys = desc_phys + sizeof(struct dwmci_idmac32); - desc->flags = desc0; - desc->cnt = desc1; - desc->addr = desc2; - desc->next_addr = (ulong)desc + sizeof(struct dwmci_idmac); + desc->des0 = control; + desc->des1 = buf_size; + desc->des2 = buf_addr; + desc->des3 = next_desc_phys; } static void dwmci_prepare_desc(struct mmc_data *data, - struct dwmci_idmac *cur_idmac, + struct dwmci_idmac32 *cur_idmac, void *bounce_buffer) { - struct dwmci_idmac *desc = cur_idmac; + struct dwmci_idmac32 *desc32 = cur_idmac; ulong data_start, data_end; unsigned int blk_cnt, i; @@ -65,6 +67,7 @@ static void dwmci_prepare_desc(struct mmc_data *data, blk_cnt = data->blocks; for (i = 0;; i++) { + phys_addr_t buf_phys = virt_to_phys(bounce_buffer); unsigned int flags, cnt; flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH; @@ -76,22 +79,22 @@ static void dwmci_prepare_desc(struct mmc_data *data, } else cnt = data->blocksize * 8; - dwmci_set_idma_desc(desc, flags, cnt, - (ulong)bounce_buffer + i * PAGE_SIZE); - desc++; + dwmci_set_idma_desc32(desc32, flags, cnt, + buf_phys + i * PAGE_SIZE); + desc32++; if (blk_cnt <= 8) break; blk_cnt -= 8; } - data_end = (ulong)desc; + data_end = (ulong)desc32; flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN)); } static void dwmci_prepare_data(struct dwmci_host *host, struct mmc_data *data, - struct dwmci_idmac *cur_idmac, + struct dwmci_idmac32 *cur_idmac, void *bounce_buffer) { unsigned long ctrl; @@ -308,7 +311,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, { #endif struct dwmci_host *host = mmc->priv; - ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac, + ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac32, cur_idmac, data ? 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Next changes were made: 1. Check which DMA address mode is supported in current IP-core version. HCON register (bit 27) indicates whether it's 32-bit or 64-bit addressing. Add boolean .dma_64bit_address field to struct dwmci_host and store the result there. dwmci_init_dma() function is introduced for doing so, which is called on driver's init. 2. Add 64-bit DMA descriptor (struct dwmci_idmac64) and use it in dwmci_prepare_desc() in case if .dma_64bit_address field is true. A new dwmci_set_idma_desc64() function was added for populating that descriptor. 3. Add registers for 64-bit DMA capable blocks. To make the access to IDMAC registers universal between 32-bit / 64-bit cases, a new struct dwmci_idmac_regs (and corresponding host->regs field) was introduced, which abstracts the hardware by being set to appropriate offset constants on init. All direct calls to IDMAC registers were correspondingly replaced by accessing host->regs. 4. Allocate and use 64-bit DMA descriptors buffer in case when IDMAC is 64-bit capable. Extract all the code (except for the IDMAC descriptors buffer allocation) from dwmci_send_cmd() to dwmci_send_cmd_common(), so that it's possible to keep IDMAC buffer (either 32-bit or 64-bit) on stack during send_cmd routine. The insights for this implementation were taken from Linux kernel DW MMC driver. Signed-off-by: Sam Protsenko --- drivers/mmc/dw_mmc.c | 152 ++++++++++++++++++++++++++++++++++--------- include/dwmmc.h | 39 ++++++++++- 2 files changed, 160 insertions(+), 31 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 8e04ab39c2c5..32e0e730c77b 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -28,6 +28,39 @@ struct dwmci_idmac32 { u32 des3; /* Next descriptor physical address */ } __aligned(ARCH_DMA_MINALIGN); +/* Internal DMA Controller (IDMAC) descriptor for 64-bit addressing mode */ +struct dwmci_idmac64 { + u32 des0; /* Control descriptor */ + u32 des1; /* Reserved */ + u32 des2; /* Buffer sizes */ + u32 des3; /* Reserved */ + u32 des4; /* Lower 32-bits of Buffer Address Pointer 1 */ + u32 des5; /* Upper 32-bits of Buffer Address Pointer 1 */ + u32 des6; /* Lower 32-bits of Next Descriptor Address */ + u32 des7; /* Upper 32-bits of Next Descriptor Address */ +} __aligned(ARCH_DMA_MINALIGN); + +/* Register offsets for DW MMC blocks with 32-bit IDMAC */ +static const struct dwmci_idmac_regs dwmci_idmac_regs32 = { + .dbaddrl = DWMCI_DBADDR, + .idsts = DWMCI_IDSTS, + .idinten = DWMCI_IDINTEN, + .dscaddrl = DWMCI_DSCADDR, + .bufaddrl = DWMCI_BUFADDR, +}; + +/* Register offsets for DW MMC blocks with 64-bit IDMAC */ +static const struct dwmci_idmac_regs dwmci_idmac_regs64 = { + .dbaddrl = DWMCI_DBADDRL, + .dbaddru = DWMCI_DBADDRU, + .idsts = DWMCI_IDSTS64, + .idinten = DWMCI_IDINTEN64, + .dscaddrl = DWMCI_DSCADDRL, + .dscaddru = DWMCI_DSCADDRU, + .bufaddrl = DWMCI_BUFADDRL, + .bufaddru = DWMCI_BUFADDRU, +}; + static int dwmci_wait_reset(struct dwmci_host *host, u32 value) { unsigned long timeout = 1000; @@ -55,11 +88,27 @@ static void dwmci_set_idma_desc32(struct dwmci_idmac32 *desc, u32 control, desc->des3 = next_desc_phys; } -static void dwmci_prepare_desc(struct mmc_data *data, - struct dwmci_idmac32 *cur_idmac, - void *bounce_buffer) +static void dwmci_set_idma_desc64(struct dwmci_idmac64 *desc, u32 control, + u32 buf_size, u64 buf_addr) +{ + phys_addr_t desc_phys = virt_to_phys(desc); + u64 next_desc_phys = desc_phys + sizeof(struct dwmci_idmac64); + + desc->des0 = control; + desc->des1 = 0; + desc->des2 = buf_size; + desc->des3 = 0; + desc->des4 = buf_addr & 0xffffffff; + desc->des5 = buf_addr >> 32; + desc->des6 = next_desc_phys & 0xffffffff; + desc->des7 = next_desc_phys >> 32; +} + +static void dwmci_prepare_desc(struct dwmci_host *host, struct mmc_data *data, + void *cur_idmac, void *bounce_buffer) { struct dwmci_idmac32 *desc32 = cur_idmac; + struct dwmci_idmac64 *desc64 = cur_idmac; ulong data_start, data_end; unsigned int blk_cnt, i; @@ -79,34 +128,47 @@ static void dwmci_prepare_desc(struct mmc_data *data, } else cnt = data->blocksize * 8; - dwmci_set_idma_desc32(desc32, flags, cnt, - buf_phys + i * PAGE_SIZE); - desc32++; + if (host->dma_64bit_address) { + dwmci_set_idma_desc64(desc64, flags, cnt, + buf_phys + i * PAGE_SIZE); + desc64++; + } else { + dwmci_set_idma_desc32(desc32, flags, cnt, + buf_phys + i * PAGE_SIZE); + desc32++; + } if (blk_cnt <= 8) break; blk_cnt -= 8; } - data_end = (ulong)desc32; + if (host->dma_64bit_address) + data_end = (ulong)desc64; + else + data_end = (ulong)desc32; flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN)); } static void dwmci_prepare_data(struct dwmci_host *host, struct mmc_data *data, - struct dwmci_idmac32 *cur_idmac, + void *cur_idmac, void *bounce_buffer) { + const u32 idmacl = virt_to_phys(cur_idmac) & 0xffffffff; + const u32 idmacu = (u64)virt_to_phys(cur_idmac) >> 32; unsigned long ctrl; dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); /* Clear IDMAC interrupt */ - dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); + dwmci_writel(host, host->regs->idsts, 0xffffffff); - dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); + dwmci_writel(host, host->regs->dbaddrl, idmacl); + if (host->dma_64bit_address) + dwmci_writel(host, host->regs->dbaddru, idmacu); - dwmci_prepare_desc(data, cur_idmac, bounce_buffer); + dwmci_prepare_desc(host, data, cur_idmac, bounce_buffer); ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN; @@ -257,13 +319,13 @@ static int dwmci_dma_transfer(struct dwmci_host *host, uint flags, else mask = DWMCI_IDINTEN_TI; - ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS, + ret = wait_for_bit_le32(host->ioaddr + host->regs->idsts, mask, true, 1000, false); if (ret) debug("%s: DWMCI_IDINTEN mask 0x%x timeout\n", __func__, mask); /* Clear interrupts */ - dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK); + dwmci_writel(host, host->regs->idsts, DWMCI_IDINTEN_MASK); ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl &= ~DWMCI_DMA_EN; @@ -300,20 +362,10 @@ static void dwmci_wait_while_busy(struct dwmci_host *host, struct mmc_cmd *cmd) } } -#ifdef CONFIG_DM_MMC -static int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct mmc *mmc = mmc_get_mmc_dev(dev); -#else -static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, - struct mmc_data *data) +static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, + struct mmc_data *data, void *cur_idmac) { -#endif - struct dwmci_host *host = mmc->priv; - ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac32, cur_idmac, - data ? DIV_ROUND_UP(data->blocks, 8) : 0); - int ret = 0, flags = 0, i; + int ret, flags = 0, i; u32 retry = 100000; u32 mask; struct bounce_buffer bbstate; @@ -433,6 +485,28 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, return ret; } +#if CONFIG_IS_ENABLED(DM_MMC) +static int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); +#else +static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ +#endif + struct dwmci_host *host = mmc->priv; + const size_t buf_size = data ? DIV_ROUND_UP(data->blocks, 8) : 0; + + if (host->dma_64bit_address) { + ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac64, idmac, buf_size); + return dwmci_send_cmd_common(host, cmd, data, idmac); + } else { + ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac32, idmac, buf_size); + return dwmci_send_cmd_common(host, cmd, data, idmac); + } +} + static int dwmci_control_clken(struct dwmci_host *host, bool on) { const u32 val = on ? DWMCI_CLKEN_ENABLE | DWMCI_CLKEN_LOW_PWR : 0; @@ -581,6 +655,27 @@ static void dwmci_init_fifo(struct dwmci_host *host) dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); } +static void dwmci_init_dma(struct dwmci_host *host) +{ + int addr_config; + + if (host->fifo_mode) + return; + + addr_config = (dwmci_readl(host, DWMCI_HCON) >> 27) & 0x1; + if (addr_config == 1) { + host->dma_64bit_address = true; + host->regs = &dwmci_idmac_regs64; + debug("%s: IDMAC supports 64-bit address mode\n", __func__); + } else { + host->dma_64bit_address = false; + host->regs = &dwmci_idmac_regs32; + debug("%s: IDMAC supports 32-bit address mode\n", __func__); + } + + dwmci_writel(host, host->regs->idinten, DWMCI_IDINTEN_MASK); +} + static int dwmci_init(struct mmc *mmc) { struct dwmci_host *host = mmc->priv; @@ -603,16 +698,13 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF); - dwmci_writel(host, DWMCI_IDINTEN, 0); dwmci_writel(host, DWMCI_BMOD, 1); dwmci_init_fifo(host); + dwmci_init_dma(host); dwmci_writel(host, DWMCI_CLKENA, 0); dwmci_writel(host, DWMCI_CLKSRC, 0); - if (!host->fifo_mode) - dwmci_writel(host, DWMCI_IDINTEN, DWMCI_IDINTEN_MASK); - return 0; } diff --git a/include/dwmmc.h b/include/dwmmc.h index 7e4acf096dce..de18fda68ac8 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -44,12 +44,22 @@ #define DWMCI_UHS_REG 0x074 #define DWMCI_BMOD 0x080 #define DWMCI_PLDMND 0x084 +#define DWMCI_DATA 0x200 +/* Registers to support IDMAC 32-bit address mode */ #define DWMCI_DBADDR 0x088 #define DWMCI_IDSTS 0x08C #define DWMCI_IDINTEN 0x090 #define DWMCI_DSCADDR 0x094 #define DWMCI_BUFADDR 0x098 -#define DWMCI_DATA 0x200 +/* Registers to support IDMAC 64-bit address mode */ +#define DWMCI_DBADDRL 0x088 +#define DWMCI_DBADDRU 0x08c +#define DWMCI_IDSTS64 0x090 +#define DWMCI_IDINTEN64 0x094 +#define DWMCI_DSCADDRL 0x098 +#define DWMCI_DSCADDRU 0x09c +#define DWMCI_BUFADDRL 0x0a0 +#define DWMCI_BUFADDRU 0x0a4 /* Interrupt Mask register */ #define DWMCI_INTMSK_ALL 0xffffffff @@ -142,6 +152,29 @@ /* quirks */ #define DWMCI_QUIRK_DISABLE_SMU (1 << 0) +/** + * struct dwmci_idmac_regs - Offsets of IDMAC registers + * + * @dbaddrl: Descriptor base address, lower 32 bits + * @dbaddru: Descriptor base address, upper 32 bits + * @idsts: Internal DMA status + * @idinten: Internal DMA interrupt enable + * @dscaddrl: IDMAC descriptor address, lower 32 bits + * @dscaddru: IDMAC descriptor address, upper 32 bits + * @bufaddrl: Current data buffer address, lower 32 bits + * @bufaddru: Current data buffer address, upper 32 bits + */ +struct dwmci_idmac_regs { + u32 dbaddrl; + u32 dbaddru; + u32 idsts; + u32 idinten; + u32 dscaddrl; + u32 dscaddru; + u32 bufaddrl; + u32 bufaddru; +}; + /** * struct dwmci_host - Information about a designware MMC host * @@ -157,6 +190,8 @@ * @fifoth_val: Value for FIFOTH register (or 0 to leave unset) * @mmc: Pointer to generic MMC structure for this device * @priv: Private pointer for use by controller + * @dma_64bit_address: Whether DMA supports 64-bit address mode or not + * @regs: Registers that can vary for different DW MMC block versions */ struct dwmci_host { const char *name; @@ -196,6 +231,8 @@ struct dwmci_host { /* use fifo mode to read and write data */ bool fifo_mode; + bool dma_64bit_address; + const struct dwmci_idmac_regs *regs; }; static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val) From patchwork Wed May 22 23:31:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798192 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918129lte; 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Wed, 22 May 2024 16:31:45 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 12/42] mmc: dw_mmc: Replace fifoth_val property with fifo-depth Date: Wed, 22 May 2024 18:31:05 -0500 Message-Id: <20240522233135.26835-13-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Replace fifoth_val property with its fifo-depth counterpart in all DW MMC drivers. fifo-depth is a common property used in upstream Linux kernel. The FIFOTH register value will be calculated using fifo-depth value in DW MMC core (dw_mmc.c). This change reduces code duplication in platform drivers, and pulls common FIFOTH register value calculation into core dw_mmc driver where it belongs. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/dw_mmc.c | 21 +++++++++++++-------- drivers/mmc/exynos_dw_mmc.c | 10 +++++----- drivers/mmc/ftsdc010_mci.h | 1 - drivers/mmc/hi6220_dw_mmc.c | 7 +++---- drivers/mmc/nexell_dw_mmc.c | 5 +---- drivers/mmc/rockchip_dw_mmc.c | 5 +---- drivers/mmc/snps_dw_mmc.c | 6 ++---- drivers/mmc/socfpga_dw_mmc.c | 4 ++-- include/dwmmc.h | 4 ++-- 9 files changed, 29 insertions(+), 34 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 32e0e730c77b..a1f06931b7ac 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -218,8 +218,6 @@ static unsigned int dwmci_get_timeout(struct mmc *mmc, const unsigned int size) static int dwmci_data_transfer_fifo(struct dwmci_host *host, struct mmc_data *data, u32 mask) { - const u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> - RX_WMARK_SHIFT) + 1) * 2; const u32 int_rx = mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO); const u32 int_tx = mask & DWMCI_INTMSK_TXDR; int ret = 0; @@ -254,8 +252,8 @@ static int dwmci_data_transfer_fifo(struct dwmci_host *host, if (ret < 0) break; - len = fifo_depth - ((len >> DWMCI_FIFO_SHIFT) & - DWMCI_FIFO_MASK); + len = host->fifo_depth - ((len >> DWMCI_FIFO_SHIFT) & + DWMCI_FIFO_MASK); len = min(size, len); for (i = 0; i < len; i++) dwmci_writel(host, DWMCI_DATA, *buf++); @@ -643,16 +641,23 @@ static int dwmci_set_ios(struct mmc *mmc) static void dwmci_init_fifo(struct dwmci_host *host) { - if (!host->fifoth_val) { + u32 fifo_thr, fifoth_val; + + if (!host->fifo_depth) { u32 fifo_size; + /* + * Automatically detect FIFO depth from FIFOTH register. + * Power-on value of RX_WMark is FIFO_DEPTH-1. + */ fifo_size = dwmci_readl(host, DWMCI_FIFOTH); fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; - host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | - TX_WMARK(fifo_size / 2); + host->fifo_depth = fifo_size; } - dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); + fifo_thr = host->fifo_depth / 2; + fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_thr - 1) | TX_WMARK(fifo_thr); + dwmci_writel(host, DWMCI_FIFOTH, fifoth_val); } static void dwmci_init_dma(struct dwmci_host *host) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 2f849c43b129..14cb0c05cb55 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -151,8 +151,8 @@ static int do_dwmci_init(struct dwmci_host *host) return exynos_dwmci_core_init(host); } -static int exynos_dwmci_get_config(const void *blob, int node, - struct dwmci_host *host, +static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, + int node, struct dwmci_host *host, struct dwmci_exynos_priv_data *priv) { int err = 0; @@ -201,7 +201,7 @@ static int exynos_dwmci_get_config(const void *blob, int node, priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL; } - host->fifoth_val = fdtdec_get_int(blob, node, "fifoth_val", 0); + host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0); host->div = fdtdec_get_int(blob, node, "div", 0); @@ -217,8 +217,8 @@ static int exynos_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; int err; - err = exynos_dwmci_get_config(gd->fdt_blob, dev_of_offset(dev), host, - priv); + err = exynos_dwmci_get_config(dev, gd->fdt_blob, dev_of_offset(dev), + host, priv); if (err) return err; err = do_dwmci_init(host); diff --git a/drivers/mmc/ftsdc010_mci.h b/drivers/mmc/ftsdc010_mci.h index 782d92be2f5f..36187cfa04f6 100644 --- a/drivers/mmc/ftsdc010_mci.h +++ b/drivers/mmc/ftsdc010_mci.h @@ -28,7 +28,6 @@ struct ftsdc010_chip { int dev_index; int dev_id; int buswidth; - u32 fifoth_val; struct mmc *mmc; void *priv; bool fifo_mode; diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c index dc0210402bd2..e0b473f3f55c 100644 --- a/drivers/mmc/hi6220_dw_mmc.c +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -37,7 +37,7 @@ struct hi6220_dwmmc_priv_data { struct hisi_mmc_data { unsigned int clock; bool use_fifo; - u32 fifoth_val; + u32 fifo_depth; }; static int hi6220_dwmmc_of_to_plat(struct udevice *dev) @@ -126,7 +126,7 @@ static int hi6220_dwmmc_probe(struct udevice *dev) host->mmc = &plat->mmc; host->fifo_mode = mmc_data->use_fifo; - host->fifoth_val = mmc_data->fifoth_val; + host->fifo_depth = mmc_data->fifo_depth; host->mmc->priv = &priv->host; upriv->mmc = host->mmc; host->mmc->dev = dev; @@ -159,8 +159,7 @@ static const struct hisi_mmc_data hi6220_mmc_data = { static const struct hisi_mmc_data hi3798mv2x_mmc_data = { .clock = 50000000, .use_fifo = false, - // FIFO depth is 256 - .fifoth_val = MSIZE(4) | RX_WMARK(0x7f) | TX_WMARK(0x80), + .fifo_depth = 256, }; static const struct udevice_id hi6220_dwmmc_ids[] = { diff --git a/drivers/mmc/nexell_dw_mmc.c b/drivers/mmc/nexell_dw_mmc.c index 2723e4887cf7..aad848ca2825 100644 --- a/drivers/mmc/nexell_dw_mmc.c +++ b/drivers/mmc/nexell_dw_mmc.c @@ -187,10 +187,7 @@ static int nexell_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; struct udevice *pwr_dev __maybe_unused; - host->fifoth_val = MSIZE(0x2) | - RX_WMARK(priv->fifo_size / 2 - 1) | - TX_WMARK(priv->fifo_size / 2); - + host->fifo_depth = priv->fifo_size; host->fifo_mode = priv->fifo_mode; dwmci_setup_cfg(&plat->cfg, host, priv->max_freq, priv->min_freq); diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index ad4529d6afa8..d52ae9cb6fd8 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -139,10 +139,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev) if (ret < 0) return ret; #endif - host->fifoth_val = MSIZE(0x2) | - RX_WMARK(priv->fifo_depth / 2 - 1) | - TX_WMARK(priv->fifo_depth / 2); - + host->fifo_depth = priv->fifo_depth; host->fifo_mode = priv->fifo_mode; #if CONFIG_IS_ENABLED(MMC_PWRSEQ) diff --git a/drivers/mmc/snps_dw_mmc.c b/drivers/mmc/snps_dw_mmc.c index 0134399e3934..4a72f41ef16f 100644 --- a/drivers/mmc/snps_dw_mmc.c +++ b/drivers/mmc/snps_dw_mmc.c @@ -82,7 +82,7 @@ static int snps_dwmmc_of_to_plat(struct udevice *dev) host->ioaddr = dev_read_addr_ptr(dev); /* - * If fifo-depth is unset don't set fifoth_val - we will try to + * If fifo-depth is unset don't set fifo_depth - we will try to * auto detect it. */ ret = dev_read_u32(dev, "fifo-depth", &fifo_depth); @@ -90,9 +90,7 @@ static int snps_dwmmc_of_to_plat(struct udevice *dev) if (fifo_depth < FIFO_MIN || fifo_depth > FIFO_MAX) return -EINVAL; - host->fifoth_val = MSIZE(0x2) | - RX_WMARK(fifo_depth / 2 - 1) | - TX_WMARK(fifo_depth / 2); + host->fifo_depth = fifo_depth; } host->buswidth = dev_read_u32_default(dev, "bus-width", 4); diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index 387cb8b6b50a..f795472d10f7 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -135,8 +135,8 @@ static int socfpga_dwmmc_of_to_plat(struct udevice *dev) * We only have one dwmmc block on gen5 SoCFPGA. */ host->dev_index = 0; - host->fifoth_val = MSIZE(0x2) | - RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2); + + host->fifo_depth = fifo_depth; priv->drvsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "drvsel", 3); priv->smplsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), diff --git a/include/dwmmc.h b/include/dwmmc.h index de18fda68ac8..7bb456e792b4 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -187,7 +187,7 @@ struct dwmci_idmac_regs { * @dev_index: Arbitrary device index for use by controller * @dev_id: Arbitrary device ID for use by controller * @buswidth: Bus width in bits (8 or 4) - * @fifoth_val: Value for FIFOTH register (or 0 to leave unset) + * @fifo_depth: Depth of FIFO, bytes (or 0 for automatic detection) * @mmc: Pointer to generic MMC structure for this device * @priv: Private pointer for use by controller * @dma_64bit_address: Whether DMA supports 64-bit address mode or not @@ -204,7 +204,7 @@ struct dwmci_host { int dev_index; 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No functional change. Signed-off-by: Sam Protsenko --- include/dwmmc.h | 41 ++++++++++++++++++++++------------------- 1 file changed, 22 insertions(+), 19 deletions(-) diff --git a/include/dwmmc.h b/include/dwmmc.h index 7bb456e792b4..77c8989148a1 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -182,6 +182,7 @@ struct dwmci_idmac_regs { * @ioaddr: Base I/O address of controller * @quirks: Quick flags - see DWMCI_QUIRK_... * @caps: Capabilities - see MMC_MODE_... + * @clock: Current clock frequency (after internal divider), Hz * @bus_hz: Bus speed in Hz, if @get_mmc_clk() is NULL * @div: Arbitrary clock divider value for use by controller * @dev_index: Arbitrary device index for use by controller @@ -190,6 +191,10 @@ struct dwmci_idmac_regs { * @fifo_depth: Depth of FIFO, bytes (or 0 for automatic detection) * @mmc: Pointer to generic MMC structure for this device * @priv: Private pointer for use by controller + * @clksel: (Optional) Platform function to run when speed/width is changed + * @board_init: (Optional) Platform function to run on init + * @cfg: Internal MMC configuration, for !CONFIG_BLK cases + * @fifo_mode: Use FIFO mode (not DMA) to read and write data * @dma_64bit_address: Whether DMA supports 64-bit address mode or not * @regs: Registers that can vary for different DW MMC block versions */ @@ -210,9 +215,12 @@ struct dwmci_host { int (*clksel)(struct dwmci_host *host); void (*board_init)(struct dwmci_host *host); - /** - * Get / set a particular MMC clock frequency + * @get_mmc_clk: (Optional) Platform function to get/set a particular + * MMC clock frequency + * + * @host: DWMMC host + * @freq: Frequency the host is trying to achieve * * This is used to request the current clock frequency of the clock * that drives the DWMMC peripheral. The caller will then use this @@ -220,16 +228,12 @@ struct dwmci_host { * required MMC bus clock frequency. If you want to handle the * clock external to DWMMC, use @freq to select the frequency and * return that value too. Then DWMMC will put itself in bypass mode. - * - * @host: DWMMC host - * @freq: Frequency the host is trying to achieve */ unsigned int (*get_mmc_clk)(struct dwmci_host *host, uint freq); #ifndef CONFIG_BLK struct mmc_config cfg; #endif - /* use fifo mode to read and write data */ bool fifo_mode; bool dma_64bit_address; const struct dwmci_idmac_regs *regs; @@ -267,6 +271,10 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) #ifdef CONFIG_BLK /** * dwmci_setup_cfg() - Set up the configuration for DWMMC + * @cfg: Configuration structure to fill in (generally &plat->mmc) + * @host: DWMMC host + * @max_clk: Maximum supported clock speed in Hz (e.g. 150000000) + * @min_clk: Minimum supported clock speed in Hz (e.g. 400000) * * This is used to set up a DWMMC device when you are using CONFIG_BLK. * @@ -291,28 +299,23 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) * struct rockchip_mmc_plat *plat = dev_get_plat(dev); * * See rockchip_dw_mmc.c for an example. - * - * @cfg: Configuration structure to fill in (generally &plat->mmc) - * @host: DWMMC host - * @max_clk: Maximum supported clock speed in HZ (e.g. 150000000) - * @min_clk: Minimum supported clock speed in HZ (e.g. 400000) */ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, u32 max_clk, u32 min_clk); /** * dwmci_bind() - Set up a new MMC block device + * @dev: Device to set up + * @mmc: Pointer to mmc structure (normally &plat->mmc) + * @cfg: Empty configuration structure (generally &plat->cfg). This is + * normally all zeroes at this point. The only purpose of passing + * this in is to set mmc->cfg to it. * * This is used to set up a DWMMC block device when you are using CONFIG_BLK. * It should be called from your driver's bind() method. * * See rockchip_dw_mmc.c for an example. * - * @dev: Device to set up - * @mmc: Pointer to mmc structure (normally &plat->mmc) - * @cfg: Empty configuration structure (generally &plat->cfg). This is - * normally all zeroes at this point. The only purpose of passing - * this in is to set mmc->cfg to it. * Return: 0 if OK, -ve if the block device could not be created */ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); @@ -320,12 +323,12 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); #else /** * add_dwmci() - Add a new DWMMC interface + * @host: DWMMC host structure + * @max_clk: Maximum supported clock speed in Hz (e.g. 150000000) + * @min_clk: Minimum supported clock speed in Hz (e.g. 400000) * * This is used when you are not using CONFIG_BLK. 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Wed, 22 May 2024 16:31:47 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 14/42] mmc: dw_mmc: Use CONFIG_IS_ENABLED() to check config options Date: Wed, 22 May 2024 18:31:07 -0500 Message-Id: <20240522233135.26835-15-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Use CONFIG_IS_ENABLED() macro to check config options as recommended by checkpatch, instead of checking those with just #ifdef CONFIG_... No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/dw_mmc.c | 6 +++--- include/dwmmc.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index a1f06931b7ac..ebe239547a7d 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -573,7 +573,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) return 0; } -#ifdef CONFIG_DM_MMC +#if CONFIG_IS_ENABLED(DM_MMC) static int dwmci_set_ios(struct udevice *dev) { struct mmc *mmc = mmc_get_mmc_dev(dev); @@ -713,7 +713,7 @@ static int dwmci_init(struct mmc *mmc) return 0; } -#ifdef CONFIG_DM_MMC +#if CONFIG_IS_ENABLED(DM_MMC) int dwmci_probe(struct udevice *dev) { struct mmc *mmc = mmc_get_mmc_dev(dev); @@ -738,7 +738,7 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, u32 max_clk, u32 min_clk) { cfg->name = host->name; -#ifndef CONFIG_DM_MMC +#if !CONFIG_IS_ENABLED(DM_MMC) cfg->ops = &dwmci_ops; #endif cfg->f_min = min_clk; diff --git a/include/dwmmc.h b/include/dwmmc.h index 77c8989148a1..9252bef24329 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -268,7 +268,7 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) return readb(host->ioaddr + reg); } -#ifdef CONFIG_BLK +#if CONFIG_IS_ENABLED(BLK) /** * dwmci_setup_cfg() - Set up the configuration for DWMMC * @cfg: Configuration structure to fill in (generally &plat->mmc) @@ -334,7 +334,7 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk); #endif /* !CONFIG_BLK */ -#ifdef CONFIG_DM_MMC +#if CONFIG_IS_ENABLED(DM_MMC) /* Export the operations to drivers */ int dwmci_probe(struct udevice *dev); extern const struct dm_mmc_ops dm_dwmci_ops; From patchwork Wed May 22 23:31:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798196 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918356lte; Wed, 22 May 2024 16:35:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWLQAUPH/M1XGRfdJldBmRImS5QaBc0S4kxSv3Wfppky1z/xG8CiIKHi/N8k6NhbGdwRw7kU5hZ44XnK6g396cT X-Google-Smtp-Source: AGHT+IGe1p2bhZOWiQPJcF7LylwO3jA8sS01+lcbsX0xcAUe4RZkhryIrFmhX5EHNMLJmDrKh2A5 X-Received: by 2002:a17:906:480f:b0:a59:cdf4:f93d with SMTP id a640c23a62f3a-a622812a982mr209133066b.34.1716420904061; Wed, 22 May 2024 16:35:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420904; cv=none; d=google.com; s=arc-20160816; b=gkwizlRyEO7ujllwccwDX4FUSAKKwfH02XH4Ft7ovaQNBipiviohC6tZadqCxrfs2s Pwkgv5hcJ+mJCyNCRGkSJvPqMS3ix8nKvpHz1+KjCew+Pe1L3jMeETLa/mZk+mJhYOqQ uWY/LUXjg7D+9qtrwaCWa3IiEmpqZPzKhmld2ok5UY9fCK6wRLjLMOtYpNXFC/TI/oiU ukTgvyySSs8bCZFL/ftBn2pEq1+krBOw9i0b1/OOGxU3kIKns8lQcHvK+BfS+a/Vsw7I rGNqSyG73kqIHheHIYd1tX8y/Pi1jg7CNVltvXXc2M8RM/IFZpz/JuOaKADDvTuD/NeL SRug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZRz8cXQcr+kvivL8JJ5633Z6sziegdwX5SbXoyWRgEc=; fh=NUDTorvV3LxGUMRiPf4NNjhVVv5XkF8PcYNaNt6iLMg=; b=0gbX14EOFBTAOQR7ggSCo6+uI6K87UiW9UdRYFBclVRa8+TqPURf5ro9UjAWVHcBcu pQ/9oM1hsYGDnIMwz8z+d+GGoPMq6qgCKvdLKOhuIyKmVyqHRJCc7S21S8/ZZvsJf0EB Lq2Tl1eLxMc6ZIw69oknagYt5YNRtBhbvcnWDQF7UeHGe2ZQZO4e4PQsZBxM7LyG29Wg HIevyhAGXFwblg6jP79VouJ6JBkp/98uPZc0bqN9C8ojMD3EamHuazKX5Hb/zmLq3b5e goLlck+0+IvvFN6/+XonyLU7DUMvETvj/ZutcSGJ4fDCrJJ3VHASdOlBkMvvYXcQy+A/ 7vTw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=er5dZvd3; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- drivers/mmc/dw_mmc.c | 69 ++++++++++---------- include/dwmmc.h | 149 ++++++++++++++++++++++--------------------- 2 files changed, 110 insertions(+), 108 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index ebe239547a7d..d0331550ef6b 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -125,8 +125,9 @@ static void dwmci_prepare_desc(struct dwmci_host *host, struct mmc_data *data, if (blk_cnt <= 8) { flags |= DWMCI_IDMAC_LD; cnt = data->blocksize * blk_cnt; - } else + } else { cnt = data->blocksize * 8; + } if (host->dma_64bit_address) { dwmci_set_idma_desc64(desc64, flags, cnt, @@ -150,10 +151,8 @@ static void dwmci_prepare_desc(struct dwmci_host *host, struct mmc_data *data, flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN)); } -static void dwmci_prepare_data(struct dwmci_host *host, - struct mmc_data *data, - void *cur_idmac, - void *bounce_buffer) +static void dwmci_prepare_data(struct dwmci_host *host, struct mmc_data *data, + void *cur_idmac, void *bounce_buffer) { const u32 idmacl = virt_to_phys(cur_idmac) & 0xffffffff; const u32 idmacu = (u64)virt_to_phys(cur_idmac) >> 32; @@ -277,7 +276,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) for (;;) { mask = dwmci_readl(host, DWMCI_RINTSTS); - /* Error during data transfer. */ + /* Error during data transfer */ if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) { debug("%s: DATA ERROR!\n", __func__); ret = -EINVAL; @@ -286,16 +285,15 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) ret = dwmci_data_transfer_fifo(host, data, mask); - /* Data arrived correctly. */ + /* Data arrived correctly */ if (mask & DWMCI_INTMSK_DTO) { ret = 0; break; } - /* Check for timeout. */ + /* Check for timeout */ if (get_timer(start) > timeout) { - debug("%s: Timeout waiting for data!\n", - __func__); + debug("%s: Timeout waiting for data!\n", __func__); ret = -ETIMEDOUT; break; } @@ -317,8 +315,8 @@ static int dwmci_dma_transfer(struct dwmci_host *host, uint flags, else mask = DWMCI_IDINTEN_TI; - ret = wait_for_bit_le32(host->ioaddr + host->regs->idsts, - mask, true, 1000, false); + ret = wait_for_bit_le32(host->ioaddr + host->regs->idsts, mask, true, + 1000, false); if (ret) debug("%s: DWMCI_IDINTEN mask 0x%x timeout\n", __func__, mask); @@ -334,7 +332,7 @@ static int dwmci_dma_transfer(struct dwmci_host *host, uint flags, } static int dwmci_set_transfer_mode(struct dwmci_host *host, - struct mmc_data *data) + struct mmc_data *data) { unsigned long mode; @@ -380,12 +378,12 @@ static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, } else { if (data->flags == MMC_DATA_READ) { ret = bounce_buffer_start(&bbstate, - (void*)data->dest, + (void *)data->dest, data->blocksize * data->blocks, GEN_BB_WRITE); } else { ret = bounce_buffer_start(&bbstate, - (void*)data->src, + (void *)data->src, data->blocksize * data->blocks, GEN_BB_READ); } @@ -420,9 +418,9 @@ static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, if (cmd->resp_type & MMC_RSP_CRC) flags |= DWMCI_CMD_CHECK_CRC; - flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG); + flags |= cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG; - debug("Sending CMD%d\n",cmd->cmdidx); + debug("Sending CMD%d\n", cmd->cmdidx); dwmci_writel(host, DWMCI_CMD, flags); @@ -436,7 +434,7 @@ static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, } if (i == retry) { - debug("%s: Timeout.\n", __func__); + debug("%s: Timeout\n", __func__); return -ETIMEDOUT; } @@ -449,18 +447,17 @@ static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, * below shall be debug(). eMMC cards also do not favor * CMD8, please keep that in mind. */ - debug("%s: Response Timeout.\n", __func__); + debug("%s: Response Timeout\n", __func__); return -ETIMEDOUT; } else if (mask & DWMCI_INTMSK_RE) { - debug("%s: Response Error.\n", __func__); + debug("%s: Response Error\n", __func__); return -EIO; } else if ((cmd->resp_type & MMC_RSP_CRC) && (mask & DWMCI_INTMSK_RCRC)) { - debug("%s: Response CRC Error.\n", __func__); + debug("%s: Response CRC Error\n", __func__); return -EIO; } - if (cmd->resp_type & MMC_RSP_PRESENT) { if (cmd->resp_type & MMC_RSP_136) { cmd->response[0] = dwmci_readl(host, DWMCI_RESP3); @@ -533,24 +530,24 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) unsigned long sclk; int ret; - if ((freq == host->clock) || (freq == 0)) + if (freq == host->clock || freq == 0) return 0; + /* - * If host->get_mmc_clk isn't defined, - * then assume that host->bus_hz is source clock value. - * host->bus_hz should be set by user. + * If host->get_mmc_clk isn't defined, then assume that host->bus_hz is + * source clock value. host->bus_hz should be set by user. */ - if (host->get_mmc_clk) + if (host->get_mmc_clk) { sclk = host->get_mmc_clk(host, freq); - else if (host->bus_hz) + } else if (host->bus_hz) { sclk = host->bus_hz; - else { - debug("%s: Didn't get source clock value.\n", __func__); + } else { + debug("%s: Didn't get source clock value\n", __func__); return -EINVAL; } if (sclk == freq) - div = 0; /* bypass mode */ + div = 0; /* bypass mode */ else div = DIV_ROUND_UP(sclk, 2 * freq); @@ -584,7 +581,7 @@ static int dwmci_set_ios(struct mmc *mmc) struct dwmci_host *host = (struct dwmci_host *)mmc->priv; u32 ctype, regs; - debug("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock); + debug("Bus width = %d, clock: %d\n", mmc->bus_width, mmc->clock); dwmci_setup_bus(host, mmc->clock); switch (mmc->bus_width) { @@ -698,10 +695,10 @@ static int dwmci_init(struct mmc *mmc) /* Enumerate at 400KHz */ dwmci_setup_bus(host, mmc->cfg->f_min); - dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF); + dwmci_writel(host, DWMCI_RINTSTS, 0xffffffff); dwmci_writel(host, DWMCI_INTMASK, 0); - dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF); + dwmci_writel(host, DWMCI_TMOUT, 0xffffffff); dwmci_writel(host, DWMCI_BMOD, 1); dwmci_init_fifo(host); @@ -735,7 +732,7 @@ static const struct mmc_ops dwmci_ops = { #endif void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, - u32 max_clk, u32 min_clk) + u32 max_clk, u32 min_clk) { cfg->name = host->name; #if !CONFIG_IS_ENABLED(DM_MMC) @@ -771,7 +768,7 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) dwmci_setup_cfg(&host->cfg, host, max_clk, min_clk); host->mmc = mmc_create(&host->cfg, host); - if (host->mmc == NULL) + if (!host->mmc) return -1; return 0; diff --git a/include/dwmmc.h b/include/dwmmc.h index 9252bef24329..e17884ade7e6 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -15,31 +15,31 @@ #define DWMCI_CTRL 0x000 #define DWMCI_PWREN 0x004 #define DWMCI_CLKDIV 0x008 -#define DWMCI_CLKSRC 0x00C +#define DWMCI_CLKSRC 0x00c #define DWMCI_CLKENA 0x010 #define DWMCI_TMOUT 0x014 #define DWMCI_CTYPE 0x018 -#define DWMCI_BLKSIZ 0x01C +#define DWMCI_BLKSIZ 0x01c #define DWMCI_BYTCNT 0x020 #define DWMCI_INTMASK 0x024 #define DWMCI_CMDARG 0x028 -#define DWMCI_CMD 0x02C +#define DWMCI_CMD 0x02c #define DWMCI_RESP0 0x030 #define DWMCI_RESP1 0x034 #define DWMCI_RESP2 0x038 -#define DWMCI_RESP3 0x03C +#define DWMCI_RESP3 0x03c #define DWMCI_MINTSTS 0x040 #define DWMCI_RINTSTS 0x044 #define DWMCI_STATUS 0x048 -#define DWMCI_FIFOTH 0x04C +#define DWMCI_FIFOTH 0x04c #define DWMCI_CDETECT 0x050 #define DWMCI_WRTPRT 0x054 #define DWMCI_GPIO 0x058 -#define DWMCI_TCMCNT 0x05C +#define DWMCI_TCMCNT 0x05c #define DWMCI_TBBCNT 0x060 #define DWMCI_DEBNCE 0x064 #define DWMCI_USRID 0x068 -#define DWMCI_VERID 0x06C +#define DWMCI_VERID 0x06c #define DWMCI_HCON 0x070 #define DWMCI_UHS_REG 0x074 #define DWMCI_BMOD 0x080 @@ -47,7 +47,7 @@ #define DWMCI_DATA 0x200 /* Registers to support IDMAC 32-bit address mode */ #define DWMCI_DBADDR 0x088 -#define DWMCI_IDSTS 0x08C +#define DWMCI_IDSTS 0x08c #define DWMCI_IDINTEN 0x090 #define DWMCI_DSCADDR 0x094 #define DWMCI_BUFADDR 0x098 @@ -63,94 +63,94 @@ /* Interrupt Mask register */ #define DWMCI_INTMSK_ALL 0xffffffff -#define DWMCI_INTMSK_RE (1 << 1) -#define DWMCI_INTMSK_CDONE (1 << 2) -#define DWMCI_INTMSK_DTO (1 << 3) -#define DWMCI_INTMSK_TXDR (1 << 4) -#define DWMCI_INTMSK_RXDR (1 << 5) -#define DWMCI_INTMSK_RCRC (1 << 6) -#define DWMCI_INTMSK_DCRC (1 << 7) -#define DWMCI_INTMSK_RTO (1 << 8) -#define DWMCI_INTMSK_DRTO (1 << 9) -#define DWMCI_INTMSK_HTO (1 << 10) -#define DWMCI_INTMSK_FRUN (1 << 11) -#define DWMCI_INTMSK_HLE (1 << 12) -#define DWMCI_INTMSK_SBE (1 << 13) -#define DWMCI_INTMSK_ACD (1 << 14) -#define DWMCI_INTMSK_EBE (1 << 15) - -/* Raw interrupt Regsiter */ -#define DWMCI_DATA_ERR (DWMCI_INTMSK_EBE | DWMCI_INTMSK_SBE | DWMCI_INTMSK_HLE |\ - DWMCI_INTMSK_FRUN | DWMCI_INTMSK_EBE | DWMCI_INTMSK_DCRC) -#define DWMCI_DATA_TOUT (DWMCI_INTMSK_HTO | DWMCI_INTMSK_DRTO) +#define DWMCI_INTMSK_RE BIT(1) +#define DWMCI_INTMSK_CDONE BIT(2) +#define DWMCI_INTMSK_DTO BIT(3) +#define DWMCI_INTMSK_TXDR BIT(4) +#define DWMCI_INTMSK_RXDR BIT(5) +#define DWMCI_INTMSK_RCRC BIT(6) +#define DWMCI_INTMSK_DCRC BIT(7) +#define DWMCI_INTMSK_RTO BIT(8) +#define DWMCI_INTMSK_DRTO BIT(9) +#define DWMCI_INTMSK_HTO BIT(10) +#define DWMCI_INTMSK_FRUN BIT(11) +#define DWMCI_INTMSK_HLE BIT(12) +#define DWMCI_INTMSK_SBE BIT(13) +#define DWMCI_INTMSK_ACD BIT(14) +#define DWMCI_INTMSK_EBE BIT(15) + +/* Raw interrupt register */ +#define DWMCI_DATA_ERR (DWMCI_INTMSK_EBE | DWMCI_INTMSK_SBE | \ + DWMCI_INTMSK_HLE | DWMCI_INTMSK_FRUN | \ + DWMCI_INTMSK_EBE | DWMCI_INTMSK_DCRC) +#define DWMCI_DATA_TOUT (DWMCI_INTMSK_HTO | DWMCI_INTMSK_DRTO) + /* CTRL register */ -#define DWMCI_CTRL_RESET (1 << 0) -#define DWMCI_CTRL_FIFO_RESET (1 << 1) -#define DWMCI_CTRL_DMA_RESET (1 << 2) -#define DWMCI_DMA_EN (1 << 5) -#define DWMCI_CTRL_SEND_AS_CCSD (1 << 10) -#define DWMCI_IDMAC_EN (1 << 25) +#define DWMCI_CTRL_RESET BIT(0) +#define DWMCI_CTRL_FIFO_RESET BIT(1) +#define DWMCI_CTRL_DMA_RESET BIT(2) +#define DWMCI_DMA_EN BIT(5) +#define DWMCI_CTRL_SEND_AS_CCSD BIT(10) +#define DWMCI_IDMAC_EN BIT(25) #define DWMCI_RESET_ALL (DWMCI_CTRL_RESET | DWMCI_CTRL_FIFO_RESET |\ DWMCI_CTRL_DMA_RESET) /* CMD register */ -#define DWMCI_CMD_RESP_EXP (1 << 6) -#define DWMCI_CMD_RESP_LENGTH (1 << 7) -#define DWMCI_CMD_CHECK_CRC (1 << 8) -#define DWMCI_CMD_DATA_EXP (1 << 9) -#define DWMCI_CMD_RW (1 << 10) -#define DWMCI_CMD_SEND_STOP (1 << 12) -#define DWMCI_CMD_ABORT_STOP (1 << 14) -#define DWMCI_CMD_PRV_DAT_WAIT (1 << 13) -#define DWMCI_CMD_UPD_CLK (1 << 21) -#define DWMCI_CMD_USE_HOLD_REG (1 << 29) -#define DWMCI_CMD_START (1 << 31) +#define DWMCI_CMD_RESP_EXP BIT(6) +#define DWMCI_CMD_RESP_LENGTH BIT(7) +#define DWMCI_CMD_CHECK_CRC BIT(8) +#define DWMCI_CMD_DATA_EXP BIT(9) +#define DWMCI_CMD_RW BIT(10) +#define DWMCI_CMD_SEND_STOP BIT(12) +#define DWMCI_CMD_ABORT_STOP BIT(14) +#define DWMCI_CMD_PRV_DAT_WAIT BIT(13) +#define DWMCI_CMD_UPD_CLK BIT(21) +#define DWMCI_CMD_USE_HOLD_REG BIT(29) +#define DWMCI_CMD_START BIT(31) /* CLKENA register */ -#define DWMCI_CLKEN_ENABLE (1 << 0) -#define DWMCI_CLKEN_LOW_PWR (1 << 16) +#define DWMCI_CLKEN_ENABLE BIT(0) +#define DWMCI_CLKEN_LOW_PWR BIT(16) -/* Card-type registe */ +/* Card type register */ #define DWMCI_CTYPE_1BIT 0 -#define DWMCI_CTYPE_4BIT (1 << 0) -#define DWMCI_CTYPE_8BIT (1 << 16) +#define DWMCI_CTYPE_4BIT BIT(0) +#define DWMCI_CTYPE_8BIT BIT(16) -/* Status Register */ -#define DWMCI_FIFO_EMPTY (1 << 2) -#define DWMCI_FIFO_FULL (1 << 3) -#define DWMCI_BUSY (1 << 9) +/* Status register */ +#define DWMCI_FIFO_EMPTY BIT(2) +#define DWMCI_FIFO_FULL BIT(3) +#define DWMCI_BUSY BIT(9) #define DWMCI_FIFO_MASK 0x1fff #define DWMCI_FIFO_SHIFT 17 -/* FIFOTH Register */ +/* FIFOTH register */ #define MSIZE(x) ((x) << 28) #define RX_WMARK(x) ((x) << 16) #define TX_WMARK(x) (x) #define RX_WMARK_SHIFT 16 #define RX_WMARK_MASK (0xfff << RX_WMARK_SHIFT) -#define DWMCI_IDMAC_OWN (1 << 31) -#define DWMCI_IDMAC_CH (1 << 4) -#define DWMCI_IDMAC_FS (1 << 3) -#define DWMCI_IDMAC_LD (1 << 2) +#define DWMCI_IDMAC_OWN BIT(31) +#define DWMCI_IDMAC_CH BIT(4) +#define DWMCI_IDMAC_FS BIT(3) +#define DWMCI_IDMAC_LD BIT(2) -/* Bus Mode Register */ -#define DWMCI_BMOD_IDMAC_RESET (1 << 0) -#define DWMCI_BMOD_IDMAC_FB (1 << 1) -#define DWMCI_BMOD_IDMAC_EN (1 << 7) +/* Bus Mode register */ +#define DWMCI_BMOD_IDMAC_RESET BIT(0) +#define DWMCI_BMOD_IDMAC_FB BIT(1) +#define DWMCI_BMOD_IDMAC_EN BIT(7) /* UHS register */ -#define DWMCI_DDR_MODE (1 << 16) +#define DWMCI_DDR_MODE BIT(16) /* Internal IDMAC interrupt defines */ -#define DWMCI_IDINTEN_RI BIT(1) -#define DWMCI_IDINTEN_TI BIT(0) +#define DWMCI_IDINTEN_RI BIT(1) +#define DWMCI_IDINTEN_TI BIT(0) +#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | DWMCI_IDINTEN_RI) -#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | \ - DWMCI_IDINTEN_RI) - -/* quirks */ -#define DWMCI_QUIRK_DISABLE_SMU (1 << 0) +/* Quirks */ +#define DWMCI_QUIRK_DISABLE_SMU BIT(0) /** * struct dwmci_idmac_regs - Offsets of IDMAC registers @@ -230,6 +230,7 @@ struct dwmci_host { * return that value too. Then DWMMC will put itself in bypass mode. */ unsigned int (*get_mmc_clk)(struct dwmci_host *host, uint freq); + #ifndef CONFIG_BLK struct mmc_config cfg; #endif @@ -253,6 +254,7 @@ static inline void dwmci_writeb(struct dwmci_host *host, int reg, u8 val) { writeb(val, host->ioaddr + reg); } + static inline u32 dwmci_readl(struct dwmci_host *host, int reg) { return readl(host->ioaddr + reg); @@ -269,6 +271,7 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) } #if CONFIG_IS_ENABLED(BLK) + /** * dwmci_setup_cfg() - Set up the configuration for DWMMC * @cfg: Configuration structure to fill in (generally &plat->mmc) @@ -301,7 +304,7 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) * See rockchip_dw_mmc.c for an example. */ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, - u32 max_clk, u32 min_clk); + u32 max_clk, u32 min_clk); /** * dwmci_bind() - Set up a new MMC block device @@ -321,6 +324,7 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); #else + /** * add_dwmci() - Add a new DWMMC interface * @host: DWMMC host structure @@ -332,6 +336,7 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); * Return: 0 if OK, -ve on error */ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk); + #endif /* !CONFIG_BLK */ #if CONFIG_IS_ENABLED(DM_MMC) From patchwork Wed May 22 23:31:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798194 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918249lte; Wed, 22 May 2024 16:34:41 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXLRDQtrBra6IdFk1+GqUjFFOduIkQkHrcg45bDkktRLD6nvtJONDUCOq8JnJM4AKVKeTaIhYG2A9V6dL9Ul5mu X-Google-Smtp-Source: AGHT+IFKLKDy/wy11PNMxCYUkpdT6Q28Q4NtvK4WMLWsu1kZ1FuVOO7H0cA+Pv9Mt/ZgvsJ0hEVq X-Received: by 2002:a17:906:3749:b0:a59:9a68:7283 with SMTP id a640c23a62f3a-a622806ba1fmr201542266b.12.1716420881406; Wed, 22 May 2024 16:34:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420881; cv=none; d=google.com; s=arc-20160816; b=RXiV2zMrC5wC/w73OZsTcNghtVKah1tS5cEitwZ/hkpsTqwRke0VF2qM2claH3Rzlg nty8hPrnWkwzwYC+7sOG3iREIEvCJ9DNTOEBj3shj3JGuYlCuawYe+OyVFv4KWuCIxCM 7IknII+weR5XGQGAY07vZZ1t1mV5u0GofSCzNyK5xDHX6SVEFyNpBhRYNmwLkyHAc4/G s7wMSYkzZvtTcJf2tPVvoCMhThy3SVZE9i/1EYn5A7EtNu+x6E4ArekNh399/FKnevPV TPQkcLGn1r+E+5deqJMvx1ftLWFfokvROuQOsUgBiEvXyOyEDWA4IeZffqFX1gEmGQuC EfRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=m9D3lerFK752PlADc+6gNEau9V4hSr3EplD1k2lukUI=; fh=izEje9fhAA/IMY3pA1Vi3njnr22JcTjTUnrf6tyQaNI=; b=MNkMJ8RMfuhdhMvLygEpwMpDlmykYYXQ+Ujf0YvAL8kMahLznpTndZ1fJLFBUIEPs5 56qau9pWuaG4QWVZSN7no4r3dEiBuvXiHXetbmwBc5SPH9O2fQN4+KQNS3Nds6DGiPdA e8tEKipkHM+Ntk1yDTSWXA1eyvV/lWhTiCl/wG24nlCwLG4dMqUAIyjAxOGisiggEDcR A9JEUGnxM+ivLeATKX+v0o/mOKQygwJSYSVBBNZu/7zcMmBlXbrKKUSaQrMG56nVVgyR 9iBU+YDMygz/uQqPTUQX5+cQyGZ6mNZo+E512JbXQmD8t0u00/V9A2O/d8kPI49A2kX1 18OQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pflm1lRG; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:31:48 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 16/42] arm: dts: exynos: Add upstream DW MMC properties to all Exynos dts Date: Wed, 22 May 2024 18:31:09 -0500 Message-Id: <20240522233135.26835-17-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Some device tree properties for DW MMC block were updated in Linux kernel. Let's follow its example and rework corresponding properties in all Exynos device trees. Don't remove outdated properties yet, it'll be done later once DW MMC driver is updated accordingly to read the updated properties instead of outdated ones. Next properties are added: * samsung,dw-mshc-ciu-div and samsung,dw-mshc-sdr-timing: They were derived from outdated samsung,timing property. * fifo-depth (generic replacement for fifoth_val): FIFO depth was calculated from fifoth_val (using expressions from FIFOTH register description in TRM): fifo-depth = ((fifoth_val >> 16) + 1) * 2 * bus-width: generic replacement for samsung,bus-width * clock-frequency: generic replacement for bus_hz * non-removable: generic replacement for samsung,removable = <0> No functional change. Signed-off-by: Sam Protsenko --- arch/arm/dts/exynos4210-origen.dts | 1 + arch/arm/dts/exynos4210-trats.dts | 2 ++ arch/arm/dts/exynos4210-universal_c210.dts | 2 ++ arch/arm/dts/exynos4412-odroid.dts | 6 ++++++ arch/arm/dts/exynos4412-trats2.dts | 8 ++++++++ arch/arm/dts/exynos5250-arndale.dts | 6 ++++++ arch/arm/dts/exynos5250-smdk5250.dts | 7 +++++++ arch/arm/dts/exynos5250-snow.dts | 7 +++++++ arch/arm/dts/exynos5250-spring.dts | 4 ++++ arch/arm/dts/exynos5420-smdk5420.dts | 7 +++++++ arch/arm/dts/exynos5422-odroidxu3.dts | 2 ++ arch/arm/dts/exynos54xx.dtsi | 7 +++++++ 12 files changed, 59 insertions(+) diff --git a/arch/arm/dts/exynos4210-origen.dts b/arch/arm/dts/exynos4210-origen.dts index 65a5fcd67eff..a4915de2c49c 100644 --- a/arch/arm/dts/exynos4210-origen.dts +++ b/arch/arm/dts/exynos4210-origen.dts @@ -26,6 +26,7 @@ &sdhci2 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; cd-gpios = <&gpk2 2 0>; status = "okay"; diff --git a/arch/arm/dts/exynos4210-trats.dts b/arch/arm/dts/exynos4210-trats.dts index 05989ee97e5b..4fbdf4730994 100644 --- a/arch/arm/dts/exynos4210-trats.dts +++ b/arch/arm/dts/exynos4210-trats.dts @@ -241,6 +241,7 @@ &sdhci0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 2 0>; status = "okay"; @@ -248,6 +249,7 @@ &sdhci2 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; cd-gpios = <&gpx3 4 0>; status = "okay"; diff --git a/arch/arm/dts/exynos4210-universal_c210.dts b/arch/arm/dts/exynos4210-universal_c210.dts index 610a8ad2e71e..1b3ac1fee15f 100644 --- a/arch/arm/dts/exynos4210-universal_c210.dts +++ b/arch/arm/dts/exynos4210-universal_c210.dts @@ -236,6 +236,7 @@ &sdhci0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 2 0>; status = "okay"; @@ -243,6 +244,7 @@ &sdhci2 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; cd-gpios = <&gpx3 4 0>; status = "okay"; diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts index ce08e8dc1ebb..24e96ed05868 100644 --- a/arch/arm/dts/exynos4412-odroid.dts +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -243,9 +243,15 @@ &mshc_0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <2 1 0>; + samsung,dw-mshc-ciu-div = <0>; + samsung,dw-mshc-sdr-timing = <2 1>; samsung,removable = <0>; + non-removable; fifoth_val = <0x203f0040>; + fifo-depth = <0x80>; + clock-frequency = <400000000>; bus_hz = <400000000>; div = <0x3>; index = <4>; diff --git a/arch/arm/dts/exynos4412-trats2.dts b/arch/arm/dts/exynos4412-trats2.dts index c4db137e01f6..30758ffa1ef9 100644 --- a/arch/arm/dts/exynos4412-trats2.dts +++ b/arch/arm/dts/exynos4412-trats2.dts @@ -109,6 +109,7 @@ sdhci@12510000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 4 0>; status = "disabled"; @@ -432,6 +433,7 @@ &sdhci0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 4 0>; status = "disabled"; @@ -439,6 +441,7 @@ &sdhci2 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; cd-gpios = <&gpk2 2 0>; status = "okay"; @@ -446,9 +449,14 @@ &mshc_0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <2 1 0>; + samsung,dw-mshc-ciu-div = <0>; + samsung,dw-mshc-sdr-timing = <2 1>; samsung,removable = <0>; + non-removable; fifoth_val = <0x203f0040>; + clock-frequency = <400000000>; bus_hz = <400000000>; div = <0x3>; index = <4>; diff --git a/arch/arm/dts/exynos5250-arndale.dts b/arch/arm/dts/exynos5250-arndale.dts index 60309c61f302..7f84589c97a2 100644 --- a/arch/arm/dts/exynos5250-arndale.dts +++ b/arch/arm/dts/exynos5250-arndale.dts @@ -28,7 +28,10 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; }; mmc@12210000 { @@ -37,7 +40,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; }; mmc@12230000 { diff --git a/arch/arm/dts/exynos5250-smdk5250.dts b/arch/arm/dts/exynos5250-smdk5250.dts index afe0cca48a93..882db2d1f608 100644 --- a/arch/arm/dts/exynos5250-smdk5250.dts +++ b/arch/arm/dts/exynos5250-smdk5250.dts @@ -146,8 +146,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; }; mmc@12210000 { @@ -156,7 +160,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; samsung,removable = <1>; }; diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts index e41f2d3041e2..bcf04d5c07c0 100644 --- a/arch/arm/dts/exynos5250-snow.dts +++ b/arch/arm/dts/exynos5250-snow.dts @@ -302,8 +302,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; }; mmc@12210000 { @@ -312,7 +316,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; samsung,removable = <1>; }; diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts index 77e7a6b9e45a..7270a546a795 100644 --- a/arch/arm/dts/exynos5250-spring.dts +++ b/arch/arm/dts/exynos5250-spring.dts @@ -104,8 +104,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; }; mmc@12210000 { diff --git a/arch/arm/dts/exynos5420-smdk5420.dts b/arch/arm/dts/exynos5420-smdk5420.dts index 7a5da674fbed..1f27baafebaf 100644 --- a/arch/arm/dts/exynos5420-smdk5420.dts +++ b/arch/arm/dts/exynos5420-smdk5420.dts @@ -107,8 +107,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; samsung,pre-init; }; @@ -118,7 +122,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; samsung,removable = <1>; }; diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts index 9d055d066fd3..767b3e415d58 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/dts/exynos5422-odroidxu3.dts @@ -281,10 +281,12 @@ mmc@12200000 { fifoth_val = <0x201f0020>; + fifo-depth = <0x40>; }; mmc@12220000 { fifoth_val = <0x201f0020>; + fifo-depth = <0x40>; }; emmc-reset { diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi index 221da8b4850b..fd74166c7e48 100644 --- a/arch/arm/dts/exynos54xx.dtsi +++ b/arch/arm/dts/exynos54xx.dtsi @@ -120,8 +120,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; samsung,pre-init; }; @@ -131,7 +135,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; 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Signed-off-by: Sam Protsenko --- doc/device-tree-bindings/exynos/dwmmc.txt | 46 +++++++++++++---------- 1 file changed, 27 insertions(+), 19 deletions(-) diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt index 694d1959162c..d90792be8599 100644 --- a/doc/device-tree-bindings/exynos/dwmmc.txt +++ b/doc/device-tree-bindings/exynos/dwmmc.txt @@ -12,7 +12,9 @@ SOC specific and Board specific properties are channel specific. Required SoC Specific Properties: - compatible: should be - - samsung,exynos-dwmmc: for exynos platforms + - samsung,exynos4412-dw-mshc: for Exynos4 platforms + - samsung,exynos-dwmmc: for Exynos5 platforms + - samsung,exynos7-dw-mshc-smu: for Exynos7 platforms (with SMU block) - reg: physical base address of the controller and length of memory mapped region. @@ -23,32 +25,38 @@ Required Board Specific Properties: - #address-cells: should be 1. - #size-cells: should be 0. -- samsung,bus-width: The width of the bus used to interface the devices +- bus-width: The width of the bus used to interface the devices supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO). . Typically the bus width is 4 or 8. -- samsung,timing: The timing values to be written into the - Drv/sample clock selection register of corresponding channel. - . It is comprised of 3 values corresponding to the 3 fileds - 'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register. - . SelClk_sample: Select sample clock among 8 shifted clocks. - . SelClk_drv: Select drv clock among 8 shifted clocks. - . DIVRATIO: Clock Divide ratio select. - . The above 3 values are used by the clock phase shifter. +- samsung,dw-mshc-ciu-div: The divider value for the card interface unit (ciu) + clock (0..7). +- samsung,dw-mshc-sdr-timing: The timing values for single data rate (SDR) mode + operation. + . First value is CIU clock phase shift value for TX mode (0..7). + . Second value is CIU clock phase shift value for RX mode (0..7). +- samsung,dw-mshc-ddr-timing: The timing values for double data rate (DDR) mode + operation. If missing, values from samsung,dw-mshc-sdr-timing are used. + . First value is CIU clock phase shift value for TX mode (0..7). + . Second value is CIU clock phase shift value for RX mode (0..7). Example: mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; - samsung,removable = <1>; -} + bus-width = <8>; + non-removable; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; + samsung,dw-mshc-ddr-timing = <0 2>; +}; + In the above example, . The bus width is 8 - . Timing is comprised of 3 values as explained below + . Divider value for CLKSEL register is 3. The CIU clock rate will be + calculated as SDCLKIN / (3 + 1). + . SDR and DDR timings are comprised of 2 values as explained below 1 - SelClk_sample 3 - SelClk_drv - 3 - DIVRATIO - . The 'removable' flag indicates whether the the particilar device + . The 'non-removable' flag indicates whether the particular device cannot be removed (always present) or it is a removable device. - 1 - Indicates that the device is removable. - 0 - Indicates that the device cannot be removed. + Flag is present - Indicates that the device cannot be removed. + Flag is not present - Indicates that the device is removable. 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Fixes: 77b55e8cfcee ("ARM: exynos: move SoC sources to mach-exynos") Signed-off-by: Sam Protsenko --- arch/arm/mach-exynos/include/mach/dwmmc.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-exynos/include/mach/dwmmc.h b/arch/arm/mach-exynos/include/mach/dwmmc.h index 59c28ed54c58..811e9a04c6e3 100644 --- a/arch/arm/mach-exynos/include/mach/dwmmc.h +++ b/arch/arm/mach-exynos/include/mach/dwmmc.h @@ -4,6 +4,9 @@ * Jaehoon Chung */ +#ifndef __ASM_ARM_ARCH_DWMMC_H +#define __ASM_ARM_ARCH_DWMMC_H + #define DWMCI_CLKSEL 0x09C #define DWMCI_SET_SAMPLE_CLK(x) (x) #define DWMCI_SET_DRV_CLK(x) ((x) << 16) @@ -25,3 +28,5 @@ /* CLKSEL Register */ #define DWMCI_DIVRATIO_BIT 24 #define DWMCI_DIVRATIO_MASK 0x7 + +#endif /* __ASM_ARM_ARCH_DWMMC_H */ From patchwork Wed May 22 23:31:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798201 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918649lte; Wed, 22 May 2024 16:35:56 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVMycXR0Jai8v9WHqoLfIvEDPvMj4OmJTvVcpBBuR+cqs7QN1kjhunfpjulPf8wVA0YaWBEzqP+uWMn0H3LQL8K X-Google-Smtp-Source: AGHT+IE2DotmiOYJr4Z6lIJhmZNfwaYKzf2e8y+Oox6AXqCYFmms+ZPo5+CWY6hefclPC53mW+pv X-Received: by 2002:ac2:5e7a:0:b0:522:32d1:d0e with SMTP id 2adb3069b0e04-526c1215392mr2231603e87.67.1716420956491; Wed, 22 May 2024 16:35:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420956; cv=none; d=google.com; s=arc-20160816; b=w+zk+VvPtC3v9vykkc+dREFzYZLVkeWpia/nTubqtMtQx+yBxXkAFxbzBAw7LESqd1 iyJMkHVOHLdhVmAsVF9CnKU4CyOFPJZlKxF+LaluAUPXKoSq/b+uMLDWsz2eLRQHl2yF fFJ+fifFMv//7X8RP/qPAsGcB5KXaKlCg10BunAFzj9GzRc6oB9uokzlCQQkkqyMM6N4 fECFm/KWKAKDDuZ95RoSrlT7v253TulI9/zlVpnXcCkotsXNw4bIiZ38qw0ZRj01FF53 WqzoD2+q/Uvclq/rDV8CWVCIEE6Q8abfKlRLMm5LF1ZZPd5943zaLuki0dpBWNZ/WFTL Bb9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bCjyQx/0jLeoyYpM8IqEJbONYckgIBxdTVXk9Pljolw=; fh=QB67Tyq+ci2zLoS1kWezr+8/zGGqj3C8rsopBZndhc4=; b=mJlK24tEhSPQGhZrqLQ+/4rvmaqGP4933V7Y4Xff0purBVJAZfqeb/RfO7Bd5SSwj7 nRS67gIBn/16IaPXzGD0MDAKv5lbWjAoOOOWJcw7hdgUW2GnrDprmuQFLvZFUDPwvbHL IgXkPmraV21X9ef/W13BVtzt+yyanF98G9ZJNVsARBx5PY75aCUG1nA4+ZoqLwc3uOIK R+2cqcDXBcTsfcrRgsHkZbugiPIl+N52F89dMDO5m+5pXX7qsFSZJjcZOpyRDtLNeTyd XAu3GQeHhcUvtNO6MpQaZGNTJjiO9y1SHK1PCozBnN9Fc15F/E+EPfC/Sr3FzY7mIswW QY3A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="XSIWaJl/"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Use livetree API instead (dev_read_addr_ptr()), which handles this correctly. Fixes: a082a2dde061 ("EXYNOS5: DWMMC: Added FDT support for DWMMC") Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 14cb0c05cb55..1f69e193f601 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -156,7 +156,7 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, struct dwmci_exynos_priv_data *priv) { int err = 0; - u32 base, timing[3]; + u32 timing[3]; /* Extract device id for each mmc channel */ host->dev_id = pinmux_decode_periph_id(blob, node); @@ -174,12 +174,11 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 4); /* Set the base address from the device node */ - base = fdtdec_get_addr(blob, node, "reg"); - if (!base) { + host->ioaddr = dev_read_addr_ptr(dev); + if (!host->ioaddr) { printf("DWMMC%d: Can't get base address\n", host->dev_index); return -EINVAL; } - host->ioaddr = (void *)base; /* Extract the timing info from the node */ err = fdtdec_get_int_array(blob, node, "samsung,timing", timing, 3); From patchwork Wed May 22 23:31:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798197 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918432lte; Wed, 22 May 2024 16:35:15 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUBfFcR+lYAm8mYjgkYfdZl82ckpWa0y4Y9Cip0LYkF+zP2QIfJaJU8Wl78oCtRxAxw06Ju3d+m7i4yei7QDsJW X-Google-Smtp-Source: AGHT+IFIBv8pUfjWDVBemw+zsu+ZPrIwZu7hUECMjbGJpOiBnk12j39ztMCnDwf4P8e6Sd34nrXv X-Received: by 2002:a50:9f47:0:b0:574:eb69:fadf with SMTP id 4fb4d7f45d1cf-57832c46f01mr2039564a12.36.1716420915362; Wed, 22 May 2024 16:35:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420915; cv=none; d=google.com; s=arc-20160816; b=XAnqQahef4WDvjuMMzwDtKxLZqZZ/s8MnUaT/2iLV5nCpNzlOh/xDp3AU+qnXZ0s+l w+nWvT4YoWVPWCnWdnlRVJi4RC9RYRAOwwUxUsSVibf/0uT5l4OBRbF0HhXODg3Rqjib YMruSRW1tU2rm8ExddE35tBQ6jMcnhMh0j8qNDU3LWzXts+BBMotqXwHwfuC1t9cZGjR EDHUk7O7C9LS81K0Ete2EJnRBckten1rkzDo0EnJMae/cVmOY7SVGIp2L2Lge7qbAhOy sgKRRdfQ44CEYMpjZ3tZBKRe699+WoPlcELY/FqF+U+7pk6zHLmzEPHU4srHJiPSPOId IW5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=H0FlBtORU2YphyJoC9ALjRrQBtrihTvdGD8zX7T+j5s=; fh=yBKuVf8QZHGmUgrTJgIeYBtCONuDgiv3h+nY4Er7I2k=; b=kPPBKcGU1OLuqzgSmIBswRSkgLm4S7nc7K1XzwfjlE7bl3mrScprIMZ2bM5wJaYXyh x2vqAsjT/RAw9tp0BqtQP7dGTKjNqwE8m4y7WPCUeIUqm0uYDSKdYYt2m5NRdEXB3V/9 NzmTGvJ4kk/C4N9ySAFG2TIolzNzaAKEBv37Jx3AQl8wQ2spelS22oZYJu7r4sZ/XOph 9ELnZ520tWxPLTKZuj+aA2bFBlXsmRg+/JYh1piChouP6rX/532r4umlu6PpPsQ1Ngyz 8Q1FZ8f5QT76t/vA6Kxks1m5Yi0ewx5zwp9hgdtz6SlrG6cIFhpJyEcOt+D/SpLDKXL8 mG2g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GRXLJ5XL; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:31:52 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 20/42] mmc: exynos_dw_mmc: Fix getting private data in exynos_dwmci_board_init() Date: Wed, 22 May 2024 18:31:13 -0500 Message-Id: <20240522233135.26835-21-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean In case of CONFIG_DM_MMC, host->priv actually holds (struct udevice *), and not (struct dwmci_exynos_priv_data *). This makes *priv pointer invalid and may lead to Synchronous Abort during its dereference later in exynos_dwmci_board_init(). Fix it by extracting exynos_dwmmc_get_priv() helper from exynos_dwmci_clksel() and using it for getting the private data in exynos_dwmci_board_init() Fixes: 3537ee879e04 ("mmc: exynos_dw_mmc: support the Driver mode for Exynos") Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 1f69e193f601..8e80bd6a059f 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -42,18 +42,24 @@ struct dwmci_exynos_priv_data { u32 sdr_timing; }; +static struct dwmci_exynos_priv_data *exynos_dwmmc_get_priv( + struct dwmci_host *host) +{ +#ifdef CONFIG_DM_MMC + return container_of(host, struct dwmci_exynos_priv_data, host); +#else + return host->priv; +#endif +} + /* * Function used as callback function to initialise the * CLKSEL register for every mmc channel. */ static int exynos_dwmci_clksel(struct dwmci_host *host) { -#ifdef CONFIG_DM_MMC - struct dwmci_exynos_priv_data *priv = - container_of(host, struct dwmci_exynos_priv_data, host); -#else - struct dwmci_exynos_priv_data *priv = host->priv; -#endif + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); + dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); return 0; @@ -83,7 +89,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) static void exynos_dwmci_board_init(struct dwmci_host *host) { - struct dwmci_exynos_priv_data *priv = host->priv; + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) { dwmci_writel(host, EMMCP_MPSBEGIN0, 0); From patchwork Wed May 22 23:31:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798198 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918462lte; Wed, 22 May 2024 16:35:23 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV+m1Ubj9u/R640eFCcOEEY7EQhJVNuQhrvywpPhNcnCQua7gRZCV2TkCUgyrbsaLdri8y4qpkZymm6xsQV17eH X-Google-Smtp-Source: AGHT+IHjAdb4uWbCMhDk/MmXtHw2+T6O0S9Nyr6JG/BLXBaBBfTiNaA7kLNbzYfYr2aZCAJ+JO7j X-Received: by 2002:a50:d5ca:0:b0:572:7280:89d6 with SMTP id 4fb4d7f45d1cf-578329ebc86mr1846552a12.7.1716420922951; Wed, 22 May 2024 16:35:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420922; cv=none; d=google.com; s=arc-20160816; b=Fne6EDvfDtDrbAzQbuSNdm5Gm66jGT8A7EjzY+Bw/KLPeLVCm/U3gckUGcA10L6zlI UOwl/DRcXbBkjduNxVrMrVrFpehlt2OM5FmXa67QnDtR4H+mD9/++lRFbHuJOiT7Va89 /bl1tN54lxiJact70uALMBlPvn0ZVELxT9fD6XwF13vNPlWQxyLrG9VZG0khgAMW34nv MOXmprBSjI27fchD2EUaHZe9Bzj3aRQItD34Rh+ryf99X9QLA3Urahk+d/NuKVZA6QGL BaLBMW7xzKINGi4KN81K2AADTEcGucBeRo9NhOCbHBxQk22KW3dF+KnLvn8laVr38aDU 26ow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=oHRSnBy+2BQzyt9KLJ0BUCCEWS6AC45UnPZMgtTiNDs=; fh=I9EnwDbSW87lqNTsBZQzG5LSsxEU/dSzzrzsil68KCk=; b=X/RVnrxF5VE0TQLXYf8nmlnr/SC6Co0MQo+zDmDx7J/Zaj4S0sFpzQfBDTnvMopqcX Ejq6wTs4YuyWEZnpUqIUxYDI5XJOwRayvm1qO+eGrT4rlFBSVebtzhaem5Jyj2VATa6H xLLueZvQSHNpKOu6pBImGSGF36WPuqZYvFoFgdNAsiZs97IIxk1H1UOfOMaLx1C3EprF l6ya6l+pKnyVBC1GzlQE79581R6+uauHJhv7JeyzOnD9wucOMQ8K2+BGOGlIT+A9HygO Eg7KKT2gwmbrKdyFb7crkcQnYwqaBTW28MgGJnCo06JD86lRsGis7YFUzmMbFyywdkCA ezeQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wXb3TO3O; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Instead of the latter function, use "non-removable" property from device tree to derive the dev_index value. This fixes next linking errors on ARM64 platforms: ld: drivers/mmc/exynos_dw_mmc.o: in function `exynos_dwmci_get_config': undefined reference to `pinmux_decode_periph_id' ld: drivers/mmc/exynos_dw_mmc.o: in function `do_dwmci_init': undefined reference to `exynos_pinmux_config' Fixes: a082a2dde061 ("EXYNOS5: DWMMC: Added FDT support for DWMMC") Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 8e80bd6a059f..6d0872e0df50 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -145,6 +145,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host) static int do_dwmci_init(struct dwmci_host *host) { +#if CONFIG_IS_ENABLED(CPU_V7A) int flag, err; flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; @@ -153,6 +154,7 @@ static int do_dwmci_init(struct dwmci_host *host) printf("DWMMC%d not configure\n", host->dev_index); return err; } +#endif return exynos_dwmci_core_init(host); } @@ -164,6 +166,7 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, int err = 0; u32 timing[3]; +#if CONFIG_IS_ENABLED(CPU_V7A) /* Extract device id for each mmc channel */ host->dev_id = pinmux_decode_periph_id(blob, node); @@ -175,6 +178,12 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, printf("DWMMC%d: Can't get the dev index\n", host->dev_index); return -EINVAL; } +#else + if (dev_read_bool(dev, "non-removable")) + host->dev_index = 0; /* eMMC */ + else + host->dev_index = 2; /* SD card */ +#endif /* Get the bus width from the device node (Default is 4bit buswidth) */ host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 4); From patchwork Wed May 22 23:31:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798199 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918520lte; Wed, 22 May 2024 16:35:33 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXT3uSAu8xjDbVbIVx7VNVQEeU5+lCZGnNRT7aeV4Ozg767hLP+1cRpHse3c4e8aPYGIXIWx7BzbceGDYI9PkZs X-Google-Smtp-Source: AGHT+IGW5uHSe30Vnbmm9gcn+f8h9HQ0dMlU3TO4jYC/DFsZqmN54tBZ2uY+6ETZ4aEpK/RL3Xr1 X-Received: by 2002:a50:9501:0:b0:572:d082:79fa with SMTP id 4fb4d7f45d1cf-57832a2c27bmr1702270a12.14.1716420933065; Wed, 22 May 2024 16:35:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420933; cv=none; d=google.com; s=arc-20160816; b=kotY+Z93hgebUD3lUWuT1yBboLNiV27LZCQyanNIz5ulCREEHACpg761JsGKZ8v5yH 17TKSnqveDPVHwfJ9H3EhppmpYL4ErBBPC02JYws4V0irQh9tusYbG5KF4pBEah+GPIB 1JAROX+Ll7rDGl0TAB30bvkTYCXwBJ0hf8fS1/6T+iVQk8hs09M+gUyzZ5sbPVrOoRQk ZWobnrE2YUTHiAsOy+TZCrDLPD5GzEdPR+ar1K4qAs9+uXZXd5mMUqeLo+PSZKWxKwDD ODdhV1itMH26LmMNsQyyCp7uZebM3SAQKDLRlfwB7m2UAfhOGSoNfPgBxCeuZ9lufU4H iYOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RFsfRnBUH6MHVRPiqO9BCsI1LVzb3bn4h8/9D5uegTk=; fh=X77od43HZFeXOOw7b4KBvhGF3HWBZFRd3PW4G1/IpKI=; b=gEEASMFt1/Rhvwt5ZczVItDBrNuYb8AkUrNSp2oS0GPKCuPrg27UIr6z8ltrVOpuhk IfqEQ2xGcClnAQjsYgOhhMqLjuJr2yAAA/S3wqSk5v4Sy9AA6KSOV+IJUM/C5XOl+G4L QgYaNw4WnqIZMS5Z5RlCwsuSeV3R3Twh6l83mKqnpaOvJX6qAGzuZdP4fo3m048ghcFw 4NLNqwmJyQRBk790TsKd/QMFTw56vD4s+pBs5QkbPNLr5yyYcABqsQd6hbmuEDw7/Pju SsQyggzeaY6a8KKISx4WVP0mclRqK52bsHjJcfAOi3c1AKx0dT9xcnPHVG9CF878ZGrd I3Nw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hHEy8Fxc; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:31:55 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 22/42] mmc: exynos_dw_mmc: Obtain and use CIU clock via CCF API Date: Wed, 22 May 2024 18:31:15 -0500 Message-Id: <20240522233135.26835-23-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean New Exynos chips should implement clock drivers using CCF framework. In that case corresponding CCF functions can be used to get/set the clock rates. Moreover, already existing get_mmc_clk() and set_mmc_clk() calls are only implemented for CONFIG_CPU_V7A (i.e. ARM32 chips). In case of ARM64 chips that config option is not defined, so build will crash on linking stage, with errors like these: ld: drivers/mmc/exynos_dw_mmc.o: in function `exynos_dwmci_get_sclk': undefined reference to `get_mmc_clk' ld: drivers/mmc/exynos_dw_mmc.o: in function `exynos_dwmci_set_sclk': undefined reference to `set_mmc_clk' Fix that issue by using CCF clocks API on ARM64 platforms for getting and setting the source clock (sclk = SDCLKIN = CIU) rate. To implement this, first extract the existing ARM32 clock control code into helper functions with more generic signatures to abstract getting/setting the sclk rate. Then add CCF clock support to those functions for ARM64 platforms. Fixes: a082a2dde061 ("EXYNOS5: DWMMC: Added FDT support for DWMMC") Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 87 +++++++++++++++++++++++++++++++++---- 1 file changed, 79 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 6d0872e0df50..8a3f73e3739c 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -4,6 +4,7 @@ * Jaehoon Chung */ +#include #include #include #include @@ -16,6 +17,7 @@ #include #include #include +#include #include #define DWMMC_MAX_CH_NUM 4 @@ -39,6 +41,7 @@ struct dwmci_exynos_priv_data { #ifdef CONFIG_DM_MMC struct dwmci_host host; #endif + struct clk clk; u32 sdr_timing; }; @@ -52,6 +55,61 @@ static struct dwmci_exynos_priv_data *exynos_dwmmc_get_priv( #endif } +/** + * exynos_dwmmc_get_sclk - Get source clock (SDCLKIN) rate + * @host: MMC controller object + * @rate: Will contain clock rate, Hz + * + * Return: 0 on success or negative value on error + */ +static int exynos_dwmmc_get_sclk(struct dwmci_host *host, unsigned long *rate) +{ +#if CONFIG_IS_ENABLED(CPU_V7A) + *rate = get_mmc_clk(host->dev_index); +#else + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); + + *rate = clk_get_rate(&priv->clk); +#endif + + if (IS_ERR_VALUE(*rate)) + return *rate; + + return 0; +} + +/** + * exynos_dwmmc_set_sclk - Set source clock (SDCLKIN) rate + * @host: MMC controller object + * @rate: Desired clock rate, Hz + * + * Return: 0 on success or negative value on error + */ +static int exynos_dwmmc_set_sclk(struct dwmci_host *host, unsigned long rate) +{ + int err; + +#if CONFIG_IS_ENABLED(CPU_V7A) + unsigned long sclk; + unsigned int div; + + err = exynos_dwmmc_get_sclk(host, &sclk); + if (err) + return err; + + div = DIV_ROUND_UP(sclk, rate); + set_mmc_clk(host->dev_index, div); +#else + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); + + err = clk_set_rate(&priv->clk, rate); + if (err < 0) + return err; +#endif + + return 0; +} + /* * Function used as callback function to initialise the * CLKSEL register for every mmc channel. @@ -69,6 +127,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) { unsigned long sclk; int8_t clk_div; + int err; /* * Since SDCLKIN is divided inside controller by the DIVRATIO @@ -78,7 +137,13 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) */ clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) & DWMCI_DIVRATIO_MASK) + 1; - sclk = get_mmc_clk(host->dev_index); + + err = exynos_dwmmc_get_sclk(host, &sclk); + if (err) { + printf("DWMMC%d: failed to get clock rate (%d)\n", + host->dev_index, err); + return 0; + } /* * Assume to know divider value. @@ -108,19 +173,19 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) static int exynos_dwmci_core_init(struct dwmci_host *host) { - unsigned int div; - unsigned long freq, sclk; + unsigned long freq; + int err; if (host->bus_hz) freq = host->bus_hz; else freq = DWMMC_MAX_FREQ; - /* request mmc clock vlaue of 52MHz. */ - sclk = get_mmc_clk(host->dev_index); - div = DIV_ROUND_UP(sclk, freq); - /* set the clock divisor for mmc */ - set_mmc_clk(host->dev_index, div); + err = exynos_dwmmc_set_sclk(host, freq); + if (err) { + printf("DWMMC%d: failed to set clock rate on probe (%d); " + "continue anyway\n", host->dev_index, err); + } host->name = "EXYNOS DWMMC"; #ifdef CONFIG_EXYNOS5420 @@ -231,6 +296,12 @@ static int exynos_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; int err; +#if !CONFIG_IS_ENABLED(CPU_V7A) + err = clk_get_by_index(dev, 1, &priv->clk); /* ciu */ + if (err) + return err; +#endif + err = exynos_dwmci_get_config(dev, gd->fdt_blob, dev_of_offset(dev), host, priv); if (err) From patchwork Wed May 22 23:31:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798202 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918689lte; Wed, 22 May 2024 16:36:06 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWPRRwrHIBcmS5H7S+3uG2TSrurUkF7Ua0jpYCbSifzFXwO5UL2MZlsdFS3xPo9rY8cGO2/k+6jlza8z9VgJ/yr X-Google-Smtp-Source: AGHT+IGBuFkfuDCDRfYM1fuLOdkbYhsVB4lxcYvxM2ZeC+KMv/7izyuFASvBc31z9KhvzY4XjUBB X-Received: by 2002:a17:906:7708:b0:a5c:e240:ceb7 with SMTP id a640c23a62f3a-a6228163184mr216163066b.62.1716420966057; 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Make use of .of_to_plat driver callback instead, and convert exynos_dwmci_get_config() to match its signature. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 8a3f73e3739c..34485311c107 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -224,10 +224,12 @@ static int do_dwmci_init(struct dwmci_host *host) return exynos_dwmci_core_init(host); } -static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, - int node, struct dwmci_host *host, - struct dwmci_exynos_priv_data *priv) +static int exynos_dwmmc_of_to_plat(struct udevice *dev) { + const void *blob = gd->fdt_blob; + struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; + int node = dev_of_offset(dev); int err = 0; u32 timing[3]; @@ -302,10 +304,6 @@ static int exynos_dwmmc_probe(struct udevice *dev) return err; #endif - err = exynos_dwmci_get_config(dev, gd->fdt_blob, dev_of_offset(dev), - host, priv); - if (err) - return err; err = do_dwmci_init(host); if (err) return err; @@ -336,6 +334,7 @@ U_BOOT_DRIVER(exynos_dwmmc_drv) = { .name = "exynos_dwmmc", .id = UCLASS_MMC, .of_match = exynos_dwmmc_ids, + .of_to_plat = exynos_dwmmc_of_to_plat, .bind = exynos_dwmmc_bind, .ops = &dm_dwmci_ops, .probe = exynos_dwmmc_probe, From patchwork Wed May 22 23:31:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798204 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918775lte; Wed, 22 May 2024 16:36:26 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUG17Xjf714xoEvVTY4jV110E0Rfsq7IzVK68fXLgt8mJy60gn7pfa2u9+xybDrKs8LcT117oVjAHVmCwGnhdW7 X-Google-Smtp-Source: AGHT+IGhplvoMryDiEUNkeqBFtn4wf5ve1nzfJDVQfbfHgzG0luDAyl/JAy+PX098slgLneyIUlI X-Received: by 2002:a17:907:cc90:b0:a59:9eab:162b with SMTP id a640c23a62f3a-a62280b51f8mr164981766b.35.1716420986347; Wed, 22 May 2024 16:36:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420986; cv=none; d=google.com; s=arc-20160816; b=C66M6zOS3m35JYlCg08HNkc9nYx5VVbr7ceCeG2L3p0NIbV/owTsOC+IZ03luzPaPb SCz6TikNZUc6lJXuWUFFdp64XCc4lvY/jTyYYeT2YBFp01Cr3WH1RYHCe0UPisjB53SZ 3Ag2WyOVjKW1xQIUt2Co4jUZirQNrSwhh6JmUa0+z/NTrKER7qRM241f6p0OAF8eL8on Z+OWHI4wGZIJbmBA9EEJ3mrXbg9J0ut0FjmU3SRTFhfuG+aXDO27iFtMWH/ZbfVtJz3x pF7rLsTq7o9trfqC5bzk4qBHrL/6iks9db6VgB8Jlm5PU5rpGxhW8pEown0tPkUbQ8TK Jweg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=sISNUoerHOAo3xxswhYPELGlcEVeYbVIN5eV2B3jZRM=; fh=Tq4B3RkZ7sziwmfvNpzveZxJw1UFgKXiOW6nCA/Llck=; b=Krml7rHVp3gsKMd8goTWAKV5ryvj6sm2D1ZaA0GPbIQ9+cKPbNASFpqXZPV642rhyS cKztko/ec6tT6CLF0WjG8eFz9/iViXuVIK8rMvuIPFCD/16miAdz8cDU9IlSAD/TAhqu Ua5SBYztmC+N/An6w6QfjLccdgA7HCkf3GD7EyPSELFkjagyZ64PhAgOZmVjBPubpQ1r aexFgaCK0Krfv0CSaYY1RLWO1ybF2liprLwqLLJIFFUYw/OiITTjtWQDqQPDUH/neFx1 X302E7Yo2kGXtk8msdWTXNSH9RZWDqjq1mGgbkxQjRBdQTgM+MsGCP5W4QDuodGnclHE MmUA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=npLkz7fB; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 34485311c107..84382c606a1f 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -7,9 +7,7 @@ #include #include #include -#include #include -#include #include #include #include @@ -226,18 +224,19 @@ static int do_dwmci_init(struct dwmci_host *host) static int exynos_dwmmc_of_to_plat(struct udevice *dev) { - const void *blob = gd->fdt_blob; struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; - int node = dev_of_offset(dev); int err = 0; u32 timing[3]; #if CONFIG_IS_ENABLED(CPU_V7A) + const void *blob = gd->fdt_blob; + int node = dev_of_offset(dev); + /* Extract device id for each mmc channel */ host->dev_id = pinmux_decode_periph_id(blob, node); - host->dev_index = fdtdec_get_int(blob, node, "index", host->dev_id); + host->dev_index = dev_read_u32_default(dev, "index", host->dev_id); if (host->dev_index == host->dev_id) host->dev_index = host->dev_id - PERIPH_ID_SDMMC0; @@ -253,7 +252,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) #endif /* Get the bus width from the device node (Default is 4bit buswidth) */ - host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 4); + host->buswidth = dev_read_u32_default(dev, "samsung,bus-width", 4); /* Set the base address from the device node */ host->ioaddr = dev_read_addr_ptr(dev); @@ -263,7 +262,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) } /* Extract the timing info from the node */ - err = fdtdec_get_int_array(blob, node, "samsung,timing", timing, 3); + err = dev_read_u32_array(dev, "samsung,timing", timing, 3); if (err) { printf("DWMMC%d: Can't get sdr-timings for devider\n", host->dev_index); @@ -283,8 +282,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) } host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); - host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0); - host->div = fdtdec_get_int(blob, node, "div", 0); + host->bus_hz = dev_read_u32_default(dev, "bus_hz", 0); + host->div = dev_read_u32_default(dev, "div", 0); return 0; } From patchwork Wed May 22 23:31:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798203 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918718lte; Wed, 22 May 2024 16:36:16 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVFNcq39xjVyCrBtncvCkRcWEcfyF5hKXMoiMlxx6fs4qmJlYEkd9KlHtWgzTUHLiOMS+Qo/G+g+zN37UYb/of0 X-Google-Smtp-Source: AGHT+IHSBUeiqhYyOMuijIsiiROqQ2D9UoD7HvnoscOrVR8qI2F9j/Hc2SicDBpTXBw9OflBPTpE X-Received: by 2002:a7b:c84c:0:b0:41b:a8e8:3ff6 with SMTP id 5b1f17b1804b1-420fd303b7fmr29667645e9.11.1716420976492; Wed, 22 May 2024 16:36:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420976; cv=none; d=google.com; s=arc-20160816; b=wxmILdSlXki/nYx7EdW+W1BToKqZsS485DA7ooYk/PDNelGlbixrBKqfv/WkVRw//W 2pqEXwHjtuh3WnR2Sb/VRF72lXNxjum42QYNq0UmMsNH8S3I1fE3aPh0rauCA4GMq/IN 3DWLrnFPElpncJM2OVynmH4Z4XJwIx2yLQxcc/kW+QsNDH/eYfYi5BmpYHiD/jgrxlHb bDi1NxBUSHPTVK1JAFnN+eiwsi9qzzCoinfxwpfLSC3kmibgUxp2DJdwaKBarzWQixdm M7C8zJnE58k5JpYXBkmE23HdxGw3q+9ThU0NMd7/IfkRB+UmabuahlNZn1jCndDusTWQ n5Rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MJLdvwL8E0+ySxUpD2v1xdJRwuuyDQMbvYUmEzU68+Y=; fh=3gai9pLnrPrI4stCpx20m8DiJBoylGaS5wMPszBLhCE=; b=xz45LIPF2BfGQIr+zBe8NYyP6qKrnOZDRRjklfOIkLWm2GwJ5oqYb5RP2/figbHWFq sddTVuyi1bfjajBvPgHJ7OOSXEDGjsYpLXBsE35SuAlAeiRcFQT7k7LTuOlrA1UYKTro +O7bt245lXXyB4JZqHISWn3mTZtS2hljxHnROL/JJly6l6FyViBqPJSepSdgVPgIlQhJ iH84LvwouEni7mrlexGh1bFtnXRNl0AtA1z6pORFmnjJfYMHWRL17NZTJGHHsf26EdoG uxJ/9ONMLsZD+T7Ec22Mb7BtH4TG6lI4NH+J+4Mpec04mb0Db9rJbdhimGtOYp1GBLll vu4w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NJYjCwBN; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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b=CeZvpDdrsHjdUn0pewzHCMgF+KbQ2VFT+JlnzHBNYTFW1waQpXu9WvPRS5UlU+W3OW wJpWKr4sR97y31lQ5vSE1SP9Ao69PUXtvVdXL47V36hKKafiosFRA4/XbqalYgEBxbGF cYT1+Kiv0gGQeogaZsKpsGVRBabGKzTnvcf7d2iZPFF6lyKbHzfl6ieW30kfoJyr3+Dv HPVd1oFzOtI/ffuhccsnMf+sA2KDzYQp8+Nmy60H3ogbPe4vo7SehhzgzrnVxZG5xduJ s9izbA0/F0uKNayXvmnP0WHLV0Ls25U82u0QIoSD17Mtx8EVT6JHgJj40+qN8obAV8MG Y00w== X-Forwarded-Encrypted: i=1; AJvYcCWMUHkwCu4rBhekaKYXuIc8yR3BVTO/kdCodc15y3DzbtSfYttJJFBaQNZ59svHgZLeaaODVtx+2GbWPqb/8qnWsMWUrw== X-Gm-Message-State: AOJu0Yzg95MAxNCk/iKp18krCzqn95kKKD5tT8lO5kHrq3hdRf3OnbPg 08BjOagXLH7+zfjebOlTUAbN9wKI1YblH5B84h0GawYf0cYM7JjYhztqMApPXfA= X-Received: by 2002:a05:6808:15aa:b0:3c9:66dc:7624 with SMTP id 5614622812f47-3d04201b34amr354710b6e.0.1716420718471; Wed, 22 May 2024 16:31:58 -0700 (PDT) Received: from localhost ([136.62.192.75]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3c9a5f0e6cfsm3861648b6e.2.2024.05.22.16.31.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 May 2024 16:31:58 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 25/42] mmc: exynos_dw_mmc: Read upstream SDR timing properties Date: Wed, 22 May 2024 18:31:18 -0500 Message-Id: <20240522233135.26835-26-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The obsolete "samsung,timing" dts property is now split into "samsung,dw-mshc-ciu-div" (for holding the internal DW MMC divider value) and "samsung,dw-mshc-sdr-timing" (for actual timing values) in upstream Linux kernel. Rework the driver to make use of new properties instead of the old one. All affected dts files were already updated accordingly. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 84382c606a1f..788587b622ca 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -227,7 +227,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; int err = 0; - u32 timing[3]; + u32 div, timing[2]; #if CONFIG_IS_ENABLED(CPU_V7A) const void *blob = gd->fdt_blob; @@ -262,16 +262,16 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) } /* Extract the timing info from the node */ - err = dev_read_u32_array(dev, "samsung,timing", timing, 3); + div = dev_read_u32_default(dev, "samsung,dw-mshc-ciu-div", 0); + err = dev_read_u32_array(dev, "samsung,dw-mshc-sdr-timing", timing, 2); if (err) { - printf("DWMMC%d: Can't get sdr-timings for devider\n", - host->dev_index); + printf("DWMMC%d: Can't get sdr-timings\n", host->dev_index); return -EINVAL; } - priv->sdr_timing = (DWMCI_SET_SAMPLE_CLK(timing[0]) | - DWMCI_SET_DRV_CLK(timing[1]) | - DWMCI_SET_DIV_RATIO(timing[2])); + priv->sdr_timing = DWMCI_SET_SAMPLE_CLK(timing[0]) | + DWMCI_SET_DRV_CLK(timing[1]) | + DWMCI_SET_DIV_RATIO(div); /* sdr_timing didn't assigned anything, use the default value */ if (!priv->sdr_timing) { From patchwork Wed May 22 23:31:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798205 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918834lte; Wed, 22 May 2024 16:36:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUJb72TOYd8XRzlShjziMf5j7phe7DrAvSquAHc8wY9MCDDiAJ8A3cpsoGVEDZw0mC1iTaK69x1ywzDnJe3KqT5 X-Google-Smtp-Source: AGHT+IHYK0e9v7OVDY/sDn+Y2VK2Dn4LT27yUYxSwrEt3kUn5wNOD/J5A9ECBIFK9aOLI0rfvCsN X-Received: by 2002:a17:906:4ec1:b0:a5a:15f6:157e with SMTP id a640c23a62f3a-a62280b08famr292198066b.11.1716420996314; Wed, 22 May 2024 16:36:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716420996; cv=none; d=google.com; s=arc-20160816; b=hsqfgYhlE6XKWNzxRPV3fGVZwWWTeHvyK0zebH8MC1vRv0EoMEX29OZgnZkMBIvc/o qXEadTYQW0+aGwJb6ECzNt2vQPXUSRgyREk8LZN730lKjkYxrink4TLS1a5WGoUl/GBL XLme3K1dxOUJ/8ymhyNNPhL3BGpcN1OL41/rzeoYCgIxX9aTbDSZl2nq20yspV7gJ7LZ HDkyldvZPaUhdIpj/SkZtUJ7Jn7UzDK0aglkBJAJFDmxVG0+Jcw0VFebOoEMj4Oh+JPz FVdxsiDZL0DacVnGWXpdcw/KQH5zg0ZrSwqREll3LUiuOqrBqKgL7Km2wVzMTguNwtlK JGrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=EVZjnsTBktbiyyGF1ZIr1VHss5LEPFxyM9ht7HU14tw=; fh=TSWq5POPRRIMZxs/J2YqJPI8f+mtGOJbB3E2hQF7Qs4=; b=QZh1GBFtduiVCBlHxDjIWXv3BFC4VduaR/DPGXILO3Iy2zf1N4kCLXFclhvKw83tho urwBsphXzKtmYKbhC7EOhu1fDCAlHbCWRPrZ1WMp9bcUbxevAoy0afteBhuwOVFXCz9T 8AmxtbpinGdU0rcDRdYOrty1qKBvk4ExzbM2ID20K7i02dLHQlIhzj1fUiT/2ID5zj0+ 8ybFcTeL3tXwOkGye9tK+1QSGGierdDq6QpN5K+ibymD8ZJd9gZT4x4GfPqp0RlFryRb mAZDABX1AM7PShFTg4qTZxA+lsisypk6WZumZimr+JaBdJOxcTCgVhoO+YvUr2LbskBz tEcA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YJZhXVIH; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Provide a way to specify its offset value for each compatible instead of hard-coding its value in read/write calls. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 788587b622ca..edf8fbc7d734 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -34,6 +34,11 @@ struct exynos_mmc_plat { }; #endif +/* Chip specific data */ +struct exynos_dwmmc_variant { + u32 clksel; /* CLKSEL register offset */ +}; + /* Exynos implmentation specific drver private data */ struct dwmci_exynos_priv_data { #ifdef CONFIG_DM_MMC @@ -41,6 +46,7 @@ struct dwmci_exynos_priv_data { #endif struct clk clk; u32 sdr_timing; + const struct exynos_dwmmc_variant *chip; }; static struct dwmci_exynos_priv_data *exynos_dwmmc_get_priv( @@ -116,13 +122,14 @@ static int exynos_dwmci_clksel(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); - dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); + dwmci_writel(host, priv->chip->clksel, priv->sdr_timing); return 0; } unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) { + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); unsigned long sclk; int8_t clk_div; int err; @@ -133,7 +140,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) * clock value to calculate the CLKDIV value. * as per user manual:cclk_in = SDCLKIN / (DIVRATIO + 1) */ - clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) + clk_div = ((dwmci_readl(host, priv->chip->clksel) >> DWMCI_DIVRATIO_BIT) & DWMCI_DIVRATIO_MASK) + 1; err = exynos_dwmmc_get_sclk(host, &sclk); @@ -229,6 +236,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) int err = 0; u32 div, timing[2]; + priv->chip = (struct exynos_dwmmc_variant *)dev_get_driver_data(dev); + #if CONFIG_IS_ENABLED(CPU_V7A) const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); @@ -323,9 +332,22 @@ static int exynos_dwmmc_bind(struct udevice *dev) return dwmci_bind(dev, &plat->mmc, &plat->cfg); } +static const struct exynos_dwmmc_variant exynos4_drv_data = { + .clksel = DWMCI_CLKSEL, +}; + +static const struct exynos_dwmmc_variant exynos5_drv_data = { + .clksel = DWMCI_CLKSEL, +}; + static const struct udevice_id exynos_dwmmc_ids[] = { - { .compatible = "samsung,exynos4412-dw-mshc" }, - { .compatible = "samsung,exynos-dwmmc" }, + { + .compatible = "samsung,exynos4412-dw-mshc", + .data = (ulong)&exynos4_drv_data, + }, { + .compatible = "samsung,exynos-dwmmc", + .data = (ulong)&exynos5_drv_data, + }, { } }; From patchwork Wed May 22 23:31:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798206 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp918883lte; Wed, 22 May 2024 16:36:45 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUW1uEhGUB9JbietDHsujoA86C3BVPBEqfBJPvFba00FA7gOVAu7kf6VSmxMdCW8RD7lT+Dq2QXY6UBe9HdZUVm X-Google-Smtp-Source: AGHT+IFA0Xq2VLHTsmXY7P9V9WroaHcrFCKo4ZyzVX1puE/QDVmpC4R/xFlO4WS/JXc3IOTKsOHq X-Received: by 2002:a50:9f67:0:b0:573:50a6:d3b0 with SMTP id 4fb4d7f45d1cf-57832a07e05mr1948073a12.3.1716421005613; Wed, 22 May 2024 16:36:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421005; cv=none; d=google.com; s=arc-20160816; b=a0cburZWD18PLOMleAaeFFDDDW3srj4i0v8USCTsoUxYqoOOWntAHFL0Ys5lIYs65e PDDIdD79IB1mprE+7JCa6TEPMlMZ4be1VwwqcbxzwwSUtWEYIm+Px9xSEpgS1CCYatFG E9E78KEGteDw37b4bqDcJD5CcODoAbyvmv3hPHWfswEFjwVKUdvlFAx8RhIcGZjTW4NB /NSHITWP+YWJ3NiAE2ryP3Gi0JiBwQjVjKD0UO4rGh1rCi5o4A6EAW00Kd0YMa/IndvB G19d6JdpiLqeLAsyhtEoXDnqC6FK4C++CknVHSnaDN9USmQTB5Sl92JJ+iYyKcXWoZg8 OpHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9bPB5iVsb6KzOxID/n5oPa03MYxpAV5lI+UKN35eg2Y=; fh=e+WDby77KkV7h+p4USpL7DedAQdwqd15ymDZibQCBSg=; b=HpSdUS57WfMlOIZPgI8yVZbMTJyiICc6sm6xPLbQgJdyKiCqgqwU8mWikyh/A0jRzS EVQUpB9WuMSWKMX+tNk/ShG/5tnNhOr1svOVTn5j2BAjODpFflM1y6XXUPKOPCU8ZxYP IU15zivVhg2ySe8dLvX3Btca/Uuc3Q4DkMUcmKs0w8tP8O0lCL2HhOVmykdUfQB0g6rr g882gEF/taLKi6RaFISCUqTuKvACN2jNvbwpzUE/95i6eUCmnbbeZIN1ED+B9uhaWKKS 57y+VWD6+lZjy1hvV18uzFVhlOfueglIOsmZxYGZHdQT+Vxa/zidOn1B0KveRZiEt7dd Ytlg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ze4EMNtO; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:31:59 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 27/42] mmc: exynos_dw_mmc: Refactor fixed CIU clock divider Date: Wed, 22 May 2024 18:31:20 -0500 Message-Id: <20240522233135.26835-28-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Some chips like Exynos4412 have fixed internal CIU clock divider. Instead of reading it from non-standard "div" dts property, store its value in the driver internally, in static chip data associated with corresponding compatible. This makes it possible to avoid using host->div for storing it, so the latter can be removed safely. Also create a helper function called exynos_dwmmc_get_ciu_div() for getting the current div value: in case the fixed div is provided in the chip data it will be used, otherwise the current div value is being read from CLKSEL register. The insights for this change were taken from dw_mmc-exynos.c driver in Linux kernel. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/ca_dw_mmc.c | 2 +- drivers/mmc/exynos_dw_mmc.c | 43 +++++++++++++++++++++++++------------ include/dwmmc.h | 2 -- 3 files changed, 30 insertions(+), 17 deletions(-) diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c index a17ed8c11cbe..342e09d02306 100644 --- a/drivers/mmc/ca_dw_mmc.c +++ b/drivers/mmc/ca_dw_mmc.c @@ -87,7 +87,7 @@ unsigned int ca_dwmci_get_mmc_clock(struct dwmci_host *host, uint freq) clk_div = 1; } - return SD_SCLK_MAX / clk_div / (host->div + 1); + return SD_SCLK_MAX / clk_div; } static int ca_dwmmc_of_to_plat(struct udevice *dev) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index edf8fbc7d734..646302f54ae6 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -24,6 +24,8 @@ #define DWMMC_MMC0_SDR_TIMING_VAL 0x03030001 #define DWMMC_MMC2_SDR_TIMING_VAL 0x03020001 +#define EXYNOS4412_FIXED_CIU_CLK_DIV 4 + #ifdef CONFIG_DM_MMC #include DECLARE_GLOBAL_DATA_PTR; @@ -37,6 +39,7 @@ struct exynos_mmc_plat { /* Chip specific data */ struct exynos_dwmmc_variant { u32 clksel; /* CLKSEL register offset */ + u8 div; /* (optional) fixed clock divider value: 0..7 */ }; /* Exynos implmentation specific drver private data */ @@ -127,12 +130,18 @@ static int exynos_dwmci_clksel(struct dwmci_host *host) return 0; } -unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) +/** + * exynos_dwmmc_get_ciu_div - Get internal clock divider value + * @host: MMC controller object + * + * Returns: Divider value, in range of 1..8 + */ +static u8 exynos_dwmmc_get_ciu_div(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); - unsigned long sclk; - int8_t clk_div; - int err; + + if (priv->chip->div) + return priv->chip->div + 1; /* * Since SDCLKIN is divided inside controller by the DIVRATIO @@ -140,9 +149,17 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) * clock value to calculate the CLKDIV value. * as per user manual:cclk_in = SDCLKIN / (DIVRATIO + 1) */ - clk_div = ((dwmci_readl(host, priv->chip->clksel) >> DWMCI_DIVRATIO_BIT) - & DWMCI_DIVRATIO_MASK) + 1; + return ((dwmci_readl(host, priv->chip->clksel) >> DWMCI_DIVRATIO_BIT) + & DWMCI_DIVRATIO_MASK) + 1; +} +unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) +{ + unsigned long sclk; + u8 clk_div; + int err; + + clk_div = exynos_dwmmc_get_ciu_div(host); err = exynos_dwmmc_get_sclk(host, &sclk); if (err) { printf("DWMMC%d: failed to get clock rate (%d)\n", @@ -150,11 +167,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) return 0; } - /* - * Assume to know divider value. - * When clock unit is broken, need to set "host->div" - */ - return sclk / clk_div / (host->div + 1); + return sclk / clk_div; } static void exynos_dwmci_board_init(struct dwmci_host *host) @@ -270,8 +283,10 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) return -EINVAL; } - /* Extract the timing info from the node */ - div = dev_read_u32_default(dev, "samsung,dw-mshc-ciu-div", 0); + if (priv->chip->div) + div = priv->chip->div; + else + div = dev_read_u32_default(dev, "samsung,dw-mshc-ciu-div", 0); err = dev_read_u32_array(dev, "samsung,dw-mshc-sdr-timing", timing, 2); if (err) { printf("DWMMC%d: Can't get sdr-timings\n", host->dev_index); @@ -292,7 +307,6 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); host->bus_hz = dev_read_u32_default(dev, "bus_hz", 0); - host->div = dev_read_u32_default(dev, "div", 0); return 0; } @@ -334,6 +348,7 @@ static int exynos_dwmmc_bind(struct udevice *dev) static const struct exynos_dwmmc_variant exynos4_drv_data = { .clksel = DWMCI_CLKSEL, + .div = EXYNOS4412_FIXED_CIU_CLK_DIV - 1, }; static const struct exynos_dwmmc_variant exynos5_drv_data = { diff --git a/include/dwmmc.h b/include/dwmmc.h index e17884ade7e6..c69c7952b930 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -184,7 +184,6 @@ struct dwmci_idmac_regs { * @caps: Capabilities - see MMC_MODE_... * @clock: Current clock frequency (after internal divider), Hz * @bus_hz: Bus speed in Hz, if @get_mmc_clk() is NULL - * @div: Arbitrary clock divider value for use by controller * @dev_index: Arbitrary device index for use by controller * @dev_id: Arbitrary device ID for use by controller * @buswidth: Bus width in bits (8 or 4) @@ -205,7 +204,6 @@ struct dwmci_host { unsigned int caps; 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Wed, 22 May 2024 16:32:00 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 28/42] mmc: exynos_dw_mmc: Read common bus-width property Date: Wed, 22 May 2024 18:31:21 -0500 Message-Id: <20240522233135.26835-29-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Instead of using non-standard "samsung,bus-width" dts property, read common "bus-width" property used in upstream Linux kernel. It's safe to do so, as "bus-width" property was already added to corresponding nodes in all affected Exynos device tree files. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 2 +- drivers/mmc/s5p_sdhci.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 646302f54ae6..b046ac6c55ea 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -274,7 +274,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) #endif /* Get the bus width from the device node (Default is 4bit buswidth) */ - host->buswidth = dev_read_u32_default(dev, "samsung,bus-width", 4); + host->buswidth = dev_read_u32_default(dev, "bus-width", 4); /* Set the base address from the device node */ host->ioaddr = dev_read_addr_ptr(dev); diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 3b74feae68c7..0b49a9c5f2a9 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -167,7 +167,7 @@ static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host) host->index = dev_id - PERIPH_ID_SDMMC0; /* Get bus width */ - bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0); + bus_width = fdtdec_get_int(blob, node, "bus-width", 0); if (bus_width <= 0) { debug("MMC: Can't get bus-width\n"); return -EINVAL; From patchwork Wed May 22 23:31:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798208 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919012lte; Wed, 22 May 2024 16:37:06 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUKA0JMOZJgrCT5gVGS2CSv0H6SdqkCK4pL5pfqiDKkJmj4KRpQ2IMS9kmw6hZcPsuD6j4YlbyjQREIXilKqc7q X-Google-Smtp-Source: AGHT+IFidLQO7YKVwMvXFd6Da26kJ3kA0KIJdXUWHysAmwXFcz+0Bk3e/D6jOaAsC6xbFpN8eGSf X-Received: by 2002:a17:906:2b53:b0:a59:a977:a154 with SMTP id a640c23a62f3a-a622818fa42mr199909466b.64.1716421026047; Wed, 22 May 2024 16:37:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421026; cv=none; d=google.com; s=arc-20160816; b=VITNQoATtmHndMLq51FRLMQ1FepYJPGkrV0ty6pfu0SngT8bFTVECYMsnI6LqGJ0tQ R7V9HsCLRddwNqObj2Wf0ku9kABY7vDivYHSUG4nY43xLLZfiJiy97CE2oMj433ttAbN vfYS6KGmw66zW7WQBLXuhya8lVoJOGFaOSE3kbr2ugyZTSGBQ4cXSzy9dOKaQsRhJafw cfHkcYsSvLcV84RoomjYE1LT+gdMJ0f6tDdLIjni7u1PP1tHQ0IahkI/r9yFjfMWAgBE ElU4GEUeNLOHdpDIROCXlBoFAvGd9wLC9Z49xLNaEeZBTzB0JAZnaNYh9fou4B0pbqBj sKPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zcH+hdIdUCPobv7oA3xIfa7qmTWGmaI58Zz2CMx7/uo=; fh=51qtoUbPSTS08JoPCPpWRyEY6CauPsGpXYitMizttt8=; b=Ohz4rFLjmIf3wBKg3ImE1/YwLFSUgpL7Sarv8zfaYgIc5R5eTUrB3tlZ4ORPdnIxdZ tVp9dYZB1FnWgIcqq1a40Kww+ZUPy9gJb0JWUzZY64CMsGgJ2zpInmhfzaa/VlNmubYY Ki1locqd704bugOn3C92OzjMcXhQ7PceWqZmLzbTebtQPxgnRMBu1l/1vjsiIXe8CFNc /5mDgsenF6XhdoUBGqB/6iC5xI6EpGCFn/uvPYvjEZCNGh54J0XMJ/eh8NRg9ugppV7R 4damHe9jefaxiyC99lQ8Ja1GkaEwB2LHqw/Tv18iaf4HJOxzHaXkE07aWq0RMCtZu9/Z Ok0A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AUbQEJ0C; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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It's safe to do so, as "clock-frequency" property was already added to corresponding nodes in all affected Exynos device tree files. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index b046ac6c55ea..8a307c9c123b 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -306,7 +306,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) } host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); - host->bus_hz = dev_read_u32_default(dev, "bus_hz", 0); + host->bus_hz = dev_read_u32_default(dev, "clock-frequency", 0); return 0; } From patchwork Wed May 22 23:31:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798209 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919080lte; Wed, 22 May 2024 16:37:17 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUSFB1If4/owBlQ8sy6Jxs6C/NRbATxbkun3jlwTiQR5F0E+fvbqwFrKt/MxOL/TpIlqO3Ajw+wi9yPAmvIrMfa X-Google-Smtp-Source: AGHT+IFhIowFDMWAzXAMcv6yxlgcXTFXhRaRIsLLpWPx6eJ8y6RvThjsFVV9enF87Cr8OmIIw3R+ X-Received: by 2002:a50:d69b:0:b0:574:ffb1:eb52 with SMTP id 4fb4d7f45d1cf-57832c56a14mr1869998a12.34.1716421036964; Wed, 22 May 2024 16:37:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421036; cv=none; d=google.com; s=arc-20160816; b=CC6x3QFgWBDd7F+U5FQewxMiVEayyoflpHmqKygqGVlDQRbskZxIZlMVlACyagIX8w Jhaa0+XN2Axhrv1x3Txu4lAqic29DsNTpMJHRQUF1v3Scz3zWX2OB0zX5abYxSRY8xdI 4XidRfjo9D2I9tRh7qUObk2LFeoJus7pwlZUSr4kk2+oswcWmjEnIEs/Qpqx0mL7jkOt QqlFWw4Exvex8fTQaYMugQugkfq6iUmgQIAsqfRlEXM7Uy98cz2TisL4Ioe+w9pcB3He dKt5ATp6k9zFVZ+L3rbrlPjw/w29Y+ZeltdAaDcSVyZzVZcwIa01pzgxzbGMizgK/jAu WDsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=yowz9gtF+7MQm8ABe2CZE8QGkTQU0AboL0IOpqT329E=; fh=cnaBkNLfZbQ0po8LSt3aRM0ZAjNrdOnv8vGn2hCkNDo=; b=SFjtuRzUhZMCRjDHnRLwI72zgyzkHxmFEqcMXq8EQm+9KXfu1si3+hcjkLSU+GdWy6 RYH1vyGcw7wJ8K7pFLJM+fnH6JiHMb/tNpHYqVeHe1unWe1g5Kz8HdjzQgMx9k/sBD2X iroMXh62RxZVlZd6z6HuwMUQUWpfQiS2yo4pqr2rUH5ki5NqbhRu+dxychlXYDUJQy5a UgWM3H53tRsCLbhVfV0vIPetdm7kATHLpNdT6cvqIKVvCTfiPuhxYc1mhCj/db0CAUf2 OX79arQw9q73KI5kZMgMG0038jJvg3wPuWPEkbs10kNGkXNdhwWPu7PgNrFmQRHnSLkM oSwQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TYiCG2g3; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:32:01 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 30/42] mmc: exynos_dw_mmc: Move quirks from struct dwmci_host to chip data Date: Wed, 22 May 2024 18:31:23 -0500 Message-Id: <20240522233135.26835-31-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean host->quirks field is only used internally in exynos_dw_mmc.c driver. To avoid cluttering the scope of struct dwmci_host, move quirks field into Exynos driver's chip data, where it can be statically defined. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 13 ++++++++----- include/dwmmc.h | 5 ----- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 8a307c9c123b..91300f67b9fe 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -26,6 +26,9 @@ #define EXYNOS4412_FIXED_CIU_CLK_DIV 4 +/* Quirks */ +#define DWMCI_QUIRK_DISABLE_SMU BIT(0) + #ifdef CONFIG_DM_MMC #include DECLARE_GLOBAL_DATA_PTR; @@ -40,6 +43,7 @@ struct exynos_mmc_plat { struct exynos_dwmmc_variant { u32 clksel; /* CLKSEL register offset */ u8 div; /* (optional) fixed clock divider value: 0..7 */ + u32 quirks; /* quirk flags - see DWMCI_QUIRK_... */ }; /* Exynos implmentation specific drver private data */ @@ -174,7 +178,7 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); - if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) { + if (priv->chip->quirks & DWMCI_QUIRK_DISABLE_SMU) { dwmci_writel(host, EMMCP_MPSBEGIN0, 0); dwmci_writel(host, EMMCP_SEND0, 0); dwmci_writel(host, EMMCP_CTRL0, @@ -206,11 +210,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host) } host->name = "EXYNOS DWMMC"; -#ifdef CONFIG_EXYNOS5420 - host->quirks = DWMCI_QUIRK_DISABLE_SMU; -#endif host->board_init = exynos_dwmci_board_init; - host->caps = MMC_MODE_DDR_52MHz; host->clksel = exynos_dwmci_clksel; host->get_mmc_clk = exynos_dwmci_get_clk; @@ -353,6 +353,9 @@ static const struct exynos_dwmmc_variant exynos4_drv_data = { static const struct exynos_dwmmc_variant exynos5_drv_data = { .clksel = DWMCI_CLKSEL, +#if CONFIG_IS_ENABLED(EXYNOS5420) + .quirks = DWMCI_QUIRK_DISABLE_SMU, +#endif }; static const struct udevice_id exynos_dwmmc_ids[] = { diff --git a/include/dwmmc.h b/include/dwmmc.h index c69c7952b930..a7e8709b7b05 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -149,9 +149,6 @@ #define DWMCI_IDINTEN_TI BIT(0) #define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | DWMCI_IDINTEN_RI) -/* Quirks */ -#define DWMCI_QUIRK_DISABLE_SMU BIT(0) - /** * struct dwmci_idmac_regs - Offsets of IDMAC registers * @@ -180,7 +177,6 @@ struct dwmci_idmac_regs { * * @name: Device name * @ioaddr: Base I/O address of controller - * @quirks: Quick flags - see DWMCI_QUIRK_... * @caps: Capabilities - see MMC_MODE_... * @clock: Current clock frequency (after internal divider), Hz * @bus_hz: Bus speed in Hz, if @get_mmc_clk() is NULL @@ -200,7 +196,6 @@ struct dwmci_idmac_regs { struct dwmci_host { const char *name; void *ioaddr; - unsigned int quirks; unsigned int caps; unsigned int clock; unsigned int bus_hz; From patchwork Wed May 22 23:31:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798210 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919129lte; Wed, 22 May 2024 16:37:26 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVFcWJQCVHiRdtP3Axhp0rAw1UEfugr3AJufXQ0X17LjeqEYn8nJMo412jnqKj95zjZgk5ziAfw3vpvlVvmxLKB X-Google-Smtp-Source: AGHT+IHr9Xwo8/CQDZS+MDROP0N2GefpM9smkIN5aCVmNDTmpX4B6S1vkWw/4jihLyilPRtH+oA/ X-Received: by 2002:a17:906:4f82:b0:a62:df4:fa24 with SMTP id a640c23a62f3a-a6228095d05mr188788266b.21.1716421046700; Wed, 22 May 2024 16:37:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421046; cv=none; d=google.com; s=arc-20160816; b=GG4x9B1S+Aw2jErN9w7MV6WsZcJyTtIxNAkUYQNBW/eUAOzpud5K7fFrMSqp+FDzKo a6n4dxaUPvMeZkqtYpGbPg6eBKvvqwYVrDCcp0+1XSdD2K+CERge11xFw3j8yCQr/O9l 5E9Mge/ayYhwNqnC7OjYqsVK4Ish7y40vpfMYjRvJHY/G7wGcxYdD9iM7Y+4oLNwKuB2 MQhOeL39W5jmwPO+np9vXm4uT3BcIvKsRmtt8n7rjCJvmiX5j0A2v7DRY79Sg3OrjXy/ YKI3R91tDevDzDewwctMeDukvSPutcLzfwZ5lLb6WlrMxTeIm6btZWE5E4s6zs+ES5Va vHKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=leXg5M9IJZvGZQdRki2akuLu9l5aNtTu1JiIhuyNyJg=; fh=rKABKwMqMrICn6k61SEJ840hlRdVBwJYoqW24UL9gFM=; b=XOPsqTXSv32uoaGl9XCFwgyxOwDH4mueLakVlRVWvrgAzhQ7ImvdWwNm58Z7chpfyl zKpunYYyicn0l88FNYFlHYHZCj/DXvSBK8CYaM8bA1fdVvmUpEUj6l0Ke1j9E6C0Nwg6 4QTuM1EOynJ5HxDGgRiiLdTrUeOEdNGuoJj3+PIdhr3SxRNHczubsAzl11c27klFnV+h AJ/r4fB7pFctUP4OVdcV8s16lBsXyGMzWdsmLNLVSYJ2fuUVsle9pFJHygd7rSUmEkcH P6bJqOEwuu36icVsHu+ZFXPYVRmGZL7ZESs5UGFxUh9Rex59wvyAj4CGVbqGvpKLnwbh zT0w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H9ztOLXi; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:32:02 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 31/42] mmc: exynos_dw_mmc: Read and use DDR timing when available Date: Wed, 22 May 2024 18:31:24 -0500 Message-Id: <20240522233135.26835-32-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean DDR timing values should be defined in "samsung,dw-mshc-ddr-timing" dts property, and used when DDR MMC mode is selected. Read that value from dts and use it. If it's not available, use SDR timing values instead. This change is following upstream Linux kernel implementation. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 91300f67b9fe..d3708ecb6407 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -53,6 +53,7 @@ struct dwmci_exynos_priv_data { #endif struct clk clk; u32 sdr_timing; + u32 ddr_timing; const struct exynos_dwmmc_variant *chip; }; @@ -128,8 +129,14 @@ static int exynos_dwmmc_set_sclk(struct dwmci_host *host, unsigned long rate) static int exynos_dwmci_clksel(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); + u32 timing; - dwmci_writel(host, priv->chip->clksel, priv->sdr_timing); + if (host->mmc->selected_mode == MMC_DDR_52) + timing = priv->ddr_timing; + else + timing = priv->sdr_timing; + + dwmci_writel(host, priv->chip->clksel, timing); return 0; } @@ -305,6 +312,17 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL; } + err = dev_read_u32_array(dev, "samsung,dw-mshc-ddr-timing", timing, 2); + if (err) { + debug("DWMMC%d: Can't get ddr-timings, using sdr-timings\n", + host->dev_index); + priv->ddr_timing = priv->sdr_timing; + } else { + priv->ddr_timing = DWMCI_SET_SAMPLE_CLK(timing[0]) | + DWMCI_SET_DRV_CLK(timing[1]) | + DWMCI_SET_DIV_RATIO(div); + } + host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); host->bus_hz = dev_read_u32_default(dev, "clock-frequency", 0); From patchwork Wed May 22 23:31:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798211 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919203lte; Wed, 22 May 2024 16:37:37 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV3idEBoH+e0ELUC7V1lV065EDHncjBOPFISVNNFeDaeh3YhYPpdMIVcBF617r+fxBicqCTD+yGlJaT2Fy3bfUL X-Google-Smtp-Source: AGHT+IGZxUS5HC8Gh3hjEHioejCO4u0bcGY8i/gZ6bgSHWIi/wvsycFeUBqBu5ZlxfTtGRe3tNi/ X-Received: by 2002:a05:6512:2099:b0:51d:8756:33f3 with SMTP id 2adb3069b0e04-526bf35cc0dmr1873360e87.32.1716421056912; Wed, 22 May 2024 16:37:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421056; cv=none; d=google.com; s=arc-20160816; b=E8uHHxmvNvb5h4dMwVgZfT01s4kjJsx/1xEXDF2cCA4JHklg563YvpKIIh5FGRz7wh OAaIMHSiugzK6e12zKmBEyxdDMARKKCq/N/q8nmCZXiUZJfnQuUkFpVNbretT/xvF2z2 i/IMTlREidpxRMUURhlXvCMLImSYkkjY/3hvx3yViejRzrOAuzBou+Qq6X8Bna7B3ykA fxUi7xmmZtaecKSz1y6spRiVjIbm0f3GcrOfRuBMyKXRP3gU4uReYt0WnvyUrImMuVBT Rg0c3njKwpgOkuZDlbDBiD1zb1L2XJm25gzgp5M1i2LxmgAV/ZQklMENytN84BmWk/pu pQZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=EFUZEz59WZt7THpMWPnZBiu5col5B90eUJjjXBJTJnU=; fh=jMVJWH+cJtkki9SZvjf0I5krpj7Kd70smD8kKa8H8vk=; b=PiITob3GKsIoFnEnaUf01bVikRUP+bX6OETMse/jx5MOkW5kakcJabRFehQW02CV+1 /qECxg3WJ2XQtSx9aAnD/Q7bytUOHjAdEa/m+RgEtZ0UVTnpIYLNuDU4VGWx+Dr9n8FH MgVSrZSJjw+H4AA6ThCHJgv2ou/Lzl7nnQ8LiubvgnXUvoEBUquaDFdyczfoZX5OQ/41 xgmvIgaARyD+BJwznHsqFPOD6fX+RpZtoYLwNS7dCf8rpe0S+2lQTY3CIq+anfjo3XiX aR35ztQwu/JGokKSZ8CiZnwlq1gs73gf7Ezmft3VUyl1AWNbvVzeqkK0KGTVNv1E4l/C pq8g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RGnfh5vy; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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But dw_mmc core is actually trying to change CIU clock rate dynamically, on init and in set_ios() callback, which it's requesting via host->get_mmc_clk() callback (the name is misleading: although it's called "get_mmc_clk()", it can actually request both get and set operations). Implement setting the requested rate for CIU clock in Exynos driver to achieve the correct dw_mmc core driver operation at all times. DDR mode requires the clock to be twice as fast (when 8 bit bus is used), so handle this too, to make DDR function properly. This change makes the eMMC throughput on E850-96 board twice as fast. That's because "clock-frequency" is set to 800 MHz in E850-96 device tree, but for DDR52 mode it should be 416 MHz (and TRM states it should be 400 MHz for DDR50/8bit mode). The dw_mmc core is requesting 52 MHz bus_hz for DDR52 mode, and DDR+8bit mode means it should be x2 fast, so: f_ciu = 2 * ciu_div * f_bus = 2 * 4 * 52e6 = 416 MHz, where f_ciu - freq of clock fed to DW MMC block from CMU (SDCLKIN), Hz f_bus - freq of clock fed to the card (CCLKIN), Hz ciu_div - value of internal divider (in DW MMC block). Another way to work that around would be overriding the "clock-frequency" property in corresponding dts. But setting the clock frequency dynamically as it's done here looks much neater. This implementation follows what's done in Linux kernel dw_mmc-exynos driver in .set_ios() callback for MMC_TIMING_MMC_DDR52 case. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index d3708ecb6407..938fd51a2ac6 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -170,7 +170,17 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) u8 clk_div; int err; + /* Should be double rate for DDR mode */ + if (host->mmc->selected_mode == MMC_DDR_52 && host->mmc->bus_width == 8) + freq *= 2; + clk_div = exynos_dwmmc_get_ciu_div(host); + err = exynos_dwmmc_set_sclk(host, freq * clk_div); + if (err) { + printf("DWMMC%d: failed to set clock rate (%d); " + "continue anyway\n", host->dev_index, err); + } + err = exynos_dwmmc_get_sclk(host, &sclk); if (err) { printf("DWMMC%d: failed to get clock rate (%d)\n", From patchwork Wed May 22 23:31:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798212 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919257lte; Wed, 22 May 2024 16:37:48 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUKfdikCa46rf1k6xs68L7RXxH5Wob/zLX5c2DupWBz9pxzEZdS9ug+CukGyftJBdmm5GHj5hY7AO4gyI2LI8BJ X-Google-Smtp-Source: AGHT+IHp79/UqKbm8NLlnTV1D39Z12yBVth6yuQ67F94lUASZDvDkdE0NvIh3qHMtWI7UDBVRpA4 X-Received: by 2002:a50:8e14:0:b0:570:d85:f296 with SMTP id 4fb4d7f45d1cf-57832bedb2bmr2677960a12.26.1716421067957; Wed, 22 May 2024 16:37:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421067; cv=none; d=google.com; s=arc-20160816; b=gKBsae+NlJT0Zc/YejXsB3mjtvXP+SeNrBnr1Q9WS/DvFjm6NK9GBdWcKrZWgoLlbg 6aqqmnfbn5I4JyRC7IJ/eOmYYn5YKjjMkkhuR7BHXL2ycusBpPN1Q9RVa/nwu448jZly AYnY61K1TKCxauyibJoA1un5vuSHvfY65G6wWd742YikbTC4f1iS5CrVMmVGolKlxy1c zbJIiRGGSdbp/tUFz47GCzrzoDK5AXN5logjdYXp8O3hl6iRHQFMyn3eVi5ozCOlX1QZ eMILHolQ4jl6ofEm0jv3uL0coFZmBKxSxVyE9+2HYElpBQTalQAk7ioi2JowDVXdHz4v l2jA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=e3I+qziADukJZPXKQtX4Z43+D4uHEu+EXcXUTJu4VN0=; fh=mqq7nE8w6cXlBTzaUAnHRLGwqLrbEIJXpeqL3VEa8zo=; b=UezuzshQnpGjBtuXWiWuddzPNgLij7Y7foGy9Ycr+LQo4W+hhUPZYsUT5wvMQEwsep yHuqELiG6VVeDwBLI5g4L1EUyKn3JqGrpsd3cUKMhmSEyKHaYJCzjVS7ysw1pEmlydID rDjwNj2iZ/biRZ9YuBmVX/n2GU6MjcX5fShcjvT4F4Oy0F2eZm0NxpvvnWI0JD5Tlz5a 1/aidNUmqqTueHoJF15PXiaM7VWmtU5sohBN7Q8clwcFZH+wNxPkNuPzDIDZTlFXU5W/ NW1mOkMkdYAy4xfsGwhWpz5qoQsb3F62fX6ce7rGe8X9By6ZsSJlJepCgWhRZcwopE54 Eicg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ww3aDiu7; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:32:04 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 33/42] mmc: exynos_dw_mmc: Add support for ARM64 Exynos chips Date: Wed, 22 May 2024 18:31:26 -0500 Message-Id: <20240522233135.26835-34-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add the compatible entry and corresponding chip data for Exynos7 compatible chips, which covers modern ARM64 based Exynos chips. They have some differences w.r.t. old ARM32 Exynos chips: - CLKSEL register offset is different - 64-bit IDMAC descriptor and 64-bit IDMAC registers are used (implemented in dw_mmc core driver) In terms of the driver implementation, the CIU clock is obtained via CCF framework (as opposed to ad-hoc clock driver implementation for ARM32 chips). Signed-off-by: Sam Protsenko --- arch/arm/mach-exynos/include/mach/dwmmc.h | 1 + drivers/mmc/exynos_dw_mmc.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm/mach-exynos/include/mach/dwmmc.h b/arch/arm/mach-exynos/include/mach/dwmmc.h index 811e9a04c6e3..7cb71be0d9fd 100644 --- a/arch/arm/mach-exynos/include/mach/dwmmc.h +++ b/arch/arm/mach-exynos/include/mach/dwmmc.h @@ -8,6 +8,7 @@ #define __ASM_ARM_ARCH_DWMMC_H #define DWMCI_CLKSEL 0x09C +#define DWMCI_CLKSEL64 0x0a8 #define DWMCI_SET_SAMPLE_CLK(x) (x) #define DWMCI_SET_DRV_CLK(x) ((x) << 16) #define DWMCI_SET_DIV_RATIO(x) ((x) << 24) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 938fd51a2ac6..ac1a1784b440 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -386,6 +386,11 @@ static const struct exynos_dwmmc_variant exynos5_drv_data = { #endif }; +static const struct exynos_dwmmc_variant exynos7_smu_drv_data = { + .clksel = DWMCI_CLKSEL64, + .quirks = DWMCI_QUIRK_DISABLE_SMU, +}; + static const struct udevice_id exynos_dwmmc_ids[] = { { .compatible = "samsung,exynos4412-dw-mshc", @@ -393,6 +398,9 @@ static const struct udevice_id exynos_dwmmc_ids[] = { }, { .compatible = "samsung,exynos-dwmmc", .data = (ulong)&exynos5_drv_data, + }, { + .compatible = "samsung,exynos7-dw-mshc-smu", + .data = (ulong)&exynos7_smu_drv_data, }, { } }; From patchwork Wed May 22 23:31:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798213 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919338lte; Wed, 22 May 2024 16:37:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUS0RT2naYgCC9G326n8FFh/6+8w/Q8L0/Nc+/6yVPB/D3r31pU4P162QDR2DzOojIc/LbCEahg6ZhigUY92/To X-Google-Smtp-Source: AGHT+IHD6TntaA88D8xfJnheN2FA3hcSL9r/4TsDiCLJnmjRPS9C/exN4F4oQg+OQT6R10lBw6C+ X-Received: by 2002:adf:e709:0:b0:351:d2ea:d1f4 with SMTP id ffacd0b85a97d-354d8d853a6mr2736338f8f.50.1716421078492; Wed, 22 May 2024 16:37:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421078; cv=none; d=google.com; s=arc-20160816; b=AJ7+O8iKJEoXjXJ6+Q2cN3RK9e+b+4dYnMW2jCoxgvdWPp6PAWy1dQxyC/7KaIr1bM C37DJdaiGVruKPnvGwf5fhLtfHbagD4ENz8HEqHh+RN/1jICoGCdkxF7EoXDCJv0xRV7 AHszogEltLIWd3p6NiQAK81Us+9x8KpDh0QNBMn5BxV3b/KEMMg8n1SFLnh1FHonX56q UmkaDmBp4ot6YAXiF5XZLLQ8Uwhmoe9p7BvWMWScxpqyVLrjdblo8pCRAdQbHzXpRh0w 3MUx4KllZ+tYrWXCAG6XwP+bad9BkGjyxKV5hSx4UN4zP9plWCxMAM9wpLvWEXiDKYPO jibw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=hwybiIurhrdGzoKP/gtQzM2IqX52A1zjBO4NGrKx40c=; fh=4TwoBYn91WoPbgDSHBZebo8vI6inq3EYxYAG7/+hMCY=; b=YQ/H3CfJJWckMdqnynTUhEqWdjePKSyjJw8/Y3s5E7jwcdT00wANS+9GyMBHD/u/8V eSQmSp4CERhOvwqDw+v4h2S8i2PZVMM/0i3DYhTmIzQ6Hx4GMuyc/13i0j+7xm6A+S+R i4BTdq+uk5UpyzgzSI8/uHTj+POpLRm3/ejxyH3b8SdNY1v7NyEW7Oq2bBREdar7fpXb +3PYqpLfXRbVdj5UYQg0usYbB8qCaeI9BCqlHFdWxs5EScDdFbohxoWaCD6oA44AGn6C RSAWew9qfQtSGJKgKIn3g5N3AVLUzZeq/a0RuU7X2V5QhiSNPf2RFOutOLvdMNFiDP8u ndiw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SZ739skE; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Remove it from Exynos DW MMC driver. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index ac1a1784b440..e416fbe5397a 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include From patchwork Wed May 22 23:31:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798214 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919380lte; Wed, 22 May 2024 16:38:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVdV85ByIcULiftURgarDKe0Vj7jja+k4oqkSIxtzfQ5huSu5UnOP1uoTREgSr6owWGP65/9Kc6RctiQDh29giO X-Google-Smtp-Source: AGHT+IGq0BkJb+Js5y89AFNUvbhlSQXMd8aX+w0oXpYqpHW9az9ps1vi+c/g4RnEYcEvdmbJd/EY X-Received: by 2002:a05:651c:93:b0:2dc:d2c5:ed0 with SMTP id 38308e7fff4ca-2e94946b3dbmr18502281fa.12.1716421089538; Wed, 22 May 2024 16:38:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421089; cv=none; d=google.com; s=arc-20160816; b=cV3ngw8/SQajhJgmFJsryoOPvJlMeOO0vPpZ1Wm6WBjC2ZfiiTDKkwMjwiV4jIGF80 0UHZtry917Y4P9dU6NI1x/0DRmxgB5rVr7RWvu6EupKjTI2K3yX4+fV1fwQnsQhPdmf8 VRGASv8qoE2fVlsR7mmwus5bVJRAtaEh0pHgwhGmNy2dv2FgyZ3K0u4t3K9h3vU6KmOq sFOpirkczaatxQeHV/H8jOEejLlF+GsorlsvbF/nkVg1f9E1JmexfbjYLVi2lujp1SZ8 HTipnw9T89rrWSRhrYq24ERUoXFQ8fISafIRets2s9dgkoUwlBgrZBwnCQxm8KUVDB+6 sj5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=USy/FxJoc3CcVXZRxjRE8i0H1uQ2k9nCv79T/rPzTVI=; fh=xDt6eOQ1/8Ulq+1ZnRvSunGuFAoA9S7XhPtP0Z2BoXM=; b=puZ5ibVolXlyY3CxpPziXXtod7tHNWE8gl24uK7bduhZkmTlUrVtLrCsqnZ96W0Whd x4fAoDauMdDbLu1Iqx91DLRdssmpOdxmUVPnO5p/Xmf9ynpEAK5zxj8Ex/vVVfnzKRnA DECA/CrECIpxtHHYUhrFFZsXJE72FGCBpGY5U57LCjToP2hxYBwy/e1lk5k+Khh+y3IO Hkg0oShuQcuXa5At+CF1WpnAx8mWLey3fFcTXmBCZ/iLJ7QMbS2p8si9ylUu+uEM5WkA Da6wDmokflT7X6AVY079YoFtoh780tfZHu1fQwXlGoYK3zgHCpIWqhEo0EpHeptAwcZZ +Hjw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=enFOo9bB; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index e416fbe5397a..b7c3b356f0ac 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -28,7 +28,7 @@ /* Quirks */ #define DWMCI_QUIRK_DISABLE_SMU BIT(0) -#ifdef CONFIG_DM_MMC +#if CONFIG_IS_ENABLED(DM_MMC) #include DECLARE_GLOBAL_DATA_PTR; @@ -47,7 +47,7 @@ struct exynos_dwmmc_variant { /* Exynos implmentation specific drver private data */ struct dwmci_exynos_priv_data { -#ifdef CONFIG_DM_MMC +#if CONFIG_IS_ENABLED(DM_MMC) struct dwmci_host host; #endif struct clk clk; @@ -59,7 +59,7 @@ struct dwmci_exynos_priv_data { static struct dwmci_exynos_priv_data *exynos_dwmmc_get_priv( struct dwmci_host *host) { -#ifdef CONFIG_DM_MMC +#if CONFIG_IS_ENABLED(DM_MMC) return container_of(host, struct dwmci_exynos_priv_data, host); #else return host->priv; @@ -231,7 +231,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host) host->clksel = exynos_dwmci_clksel; host->get_mmc_clk = exynos_dwmci_get_clk; -#ifndef CONFIG_DM_MMC +#if !CONFIG_IS_ENABLED(DM_MMC) /* Add the mmc channel to be registered with mmc core */ if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { printf("DWMMC%d registration failed\n", host->dev_index); @@ -338,7 +338,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) return 0; } -#ifdef CONFIG_DM_MMC +#if CONFIG_IS_ENABLED(DM_MMC) static int exynos_dwmmc_probe(struct udevice *dev) { struct exynos_mmc_plat *plat = dev_get_plat(dev); From patchwork Wed May 22 23:31:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798215 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919430lte; Wed, 22 May 2024 16:38:19 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWaxzDaYUh6aINdHILjjM9sUi/9nZ9JgGcN4ZYOW5x4jQfUI8dBlJdAOQ0KB0dSJ0EkluXlzd3yk6X9kSIHoAQd X-Google-Smtp-Source: AGHT+IFqfCA0Znap5xl2rrjZMiWse5F2iPrbf42aTrp6WxlYtXCQLowOp4YbJBFrRylafcXoqn+L X-Received: by 2002:a05:6512:3ee:b0:518:9cbf:cd6b with SMTP id 2adb3069b0e04-526bd69494fmr1943106e87.13.1716421099531; Wed, 22 May 2024 16:38:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421099; cv=none; d=google.com; s=arc-20160816; b=gLJ3xgKFrp2YQ2xL94SzHWz4jAUi4mNLBq+lbWbWlW4dqA3IdCOm8RJBKOqH/L/DjL v8G1rb0GpKqy2m4vGHuYrbyB/Po9I//feD4LVq09q4SEaMplzO+BMu80KkyeHQVBrIUO E122D/yvSg9zxiUlbpctgnJZ3Qq19dDBlpj5zDij6I06AIEnYBgyabQ5897ZoXDuTJTK x8twiObL+6S/lyaNRjNsaKbZWCHcr3I+dX0q0ECheeHparojdz7z9CmOianUVtBi79zM Y4jnRuYSOt2phImKC0YoL1zR62YDk0mJopfEmLcwGnKmcJQ9QZei/H7K9jSgKqerRnWK 8Nyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=tNm3zxNnxTGzaQjFGzkTXRPolvlW1D8U3GEIccFIC28=; fh=Ci8EqorOeKb248YuId9kzFezoyw/H9f6qYJUVIxx3Dk=; b=MZnQOTiyX7zhwGkPMMAaxuKrc6JfDn7W83qq7meZbdJRpElsQUSRxRpUCFX0GyA5eS uuTy3ajVMSdNtdusfkHZIb9r6vpWZrNtrCAttfJj440mxknTZ3WHuZyWKT7Z71cZPNwL 23Kt1sOq61Gr1bX1/w/tAonJw0yIK4kGj8f7+Riqt026kKOG/rYTgQ4rQoDZ+OZmdkg3 2KxQvuFD8VEimVb9bed+lz954M964P1Y2HKPnb3aC5M7RWCulWf3zIWB/1NaWK8piKRj UEx09u9klSDSPzGqR530H3XJt92G3st81t9lsoFZp53YefFnV3VEek231FZb5wkdqmaN S0nA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tYhm4UnK; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:32:06 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 36/42] mmc: exynos_dw_mmc: Pull all init code into probe function Date: Wed, 22 May 2024 18:31:29 -0500 Message-Id: <20240522233135.26835-37-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean There is no logical sense to split the initialization code between multiple functions. Pull both do_dwmci_init() and exynos_dwmci_core_init() into exynos_dwmmc_probe() to make the code more simple and obvious. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 86 +++++++++++++++---------------------- 1 file changed, 35 insertions(+), 51 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index b7c3b356f0ac..19793e7ad460 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -209,55 +209,6 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) exynos_dwmci_clksel(host); } -static int exynos_dwmci_core_init(struct dwmci_host *host) -{ - unsigned long freq; - int err; - - if (host->bus_hz) - freq = host->bus_hz; - else - freq = DWMMC_MAX_FREQ; - - err = exynos_dwmmc_set_sclk(host, freq); - if (err) { - printf("DWMMC%d: failed to set clock rate on probe (%d); " - "continue anyway\n", host->dev_index, err); - } - - host->name = "EXYNOS DWMMC"; - host->board_init = exynos_dwmci_board_init; - host->caps = MMC_MODE_DDR_52MHz; - host->clksel = exynos_dwmci_clksel; - host->get_mmc_clk = exynos_dwmci_get_clk; - -#if !CONFIG_IS_ENABLED(DM_MMC) - /* Add the mmc channel to be registered with mmc core */ - if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { - printf("DWMMC%d registration failed\n", host->dev_index); - return -1; - } -#endif - - return 0; -} - -static int do_dwmci_init(struct dwmci_host *host) -{ -#if CONFIG_IS_ENABLED(CPU_V7A) - int flag, err; - - flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; - err = exynos_pinmux_config(host->dev_id, flag); - if (err) { - printf("DWMMC%d not configure\n", host->dev_index); - return err; - } -#endif - - return exynos_dwmci_core_init(host); -} - static int exynos_dwmmc_of_to_plat(struct udevice *dev) { struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); @@ -345,6 +296,7 @@ static int exynos_dwmmc_probe(struct udevice *dev) struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; + unsigned long freq; int err; #if !CONFIG_IS_ENABLED(CPU_V7A) @@ -353,9 +305,41 @@ static int exynos_dwmmc_probe(struct udevice *dev) return err; #endif - err = do_dwmci_init(host); - if (err) +#if CONFIG_IS_ENABLED(CPU_V7A) + int flag; + + flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; + err = exynos_pinmux_config(host->dev_id, flag); + if (err) { + printf("DWMMC%d not configure\n", host->dev_index); return err; + } +#endif + + if (host->bus_hz) + freq = host->bus_hz; + else + freq = DWMMC_MAX_FREQ; + + err = exynos_dwmmc_set_sclk(host, freq); + if (err) { + printf("DWMMC%d: failed to set clock rate on probe (%d); " + "continue anyway\n", host->dev_index, err); + } + + host->name = "EXYNOS DWMMC"; + host->board_init = exynos_dwmci_board_init; + host->caps = MMC_MODE_DDR_52MHz; + host->clksel = exynos_dwmci_clksel; + host->get_mmc_clk = exynos_dwmci_get_clk; + +#if !CONFIG_IS_ENABLED(DM_MMC) + /* Add the mmc channel to be registered with mmc core */ + if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { + printf("DWMMC%d registration failed\n", host->dev_index); + return -1; + } +#endif dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); host->mmc = &plat->mmc; From patchwork Wed May 22 23:31:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798216 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919493lte; Wed, 22 May 2024 16:38:30 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWDnlPU0hIYee4HJiswYbUVPM9DRsqFPFHr7YCBGUUwTFrOfW7rgIx3woRVnUGPifGXzCP2C1WSfE80mEIfb7/u X-Google-Smtp-Source: AGHT+IGP3mWf3jzmpmnwuaZ9zxutGBX/CnzL9Xvjhmqitx+8Tgu3t3DWcqfhoeSKg5ztkm5W1pXj X-Received: by 2002:a17:906:6d85:b0:a5a:84f9:df73 with SMTP id a640c23a62f3a-a62280a12e6mr208184766b.38.1716421110550; Wed, 22 May 2024 16:38:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421110; cv=none; d=google.com; s=arc-20160816; b=dt2qxAk48tc5N6VstLza4MrwP7A5WAXLAZa95JneV6upWFZ/sksHrF2MzX1jp7pDTT nIFYIE38oFeDya3EJBPq2Ayz2pCvQrDhJlt4w/0amIc+4kJvpEBLtRf+BfqHzNHsE94k wUtJ9Crqd8n6zJqr8ho2SXgAkzKrLQxv+fwKYf9B2+/XkJehO93171VpHsgefdjVYTif W32VBD2udgj1o2HOVTWtgMCe07zFoqReDAnoQV1GkG7JqmbVnewjMvLWK6p4yQnJEcu7 OJXzQmXwOOIoT/cvejqNWSC6WvlMu+NVT6t/rWgOuIohZC76MEu+wEu13GNtqjVboz5P +lVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=BAbT09mQMrVOW56Q4+Gpj2H/+bzDkARKpMavwrkd33w=; fh=J7jrBMz3BDkeZSKMZJRLQLipOOrM02H0ckApFIv1PS8=; b=nIKei86H9jDA5vBodZKq6S1KNw7weNPQqvwFrqvj5qo3B3Dslz+POjmE27CYUNTo6l 46iaZAKKmIsV+PlB8UTc3ic2r4aMVPYikP/W+goidM0x5eFkCjsrTAIaUzal+pb0ZleJ SVpU2bzMC/wGI4BZdY+VzEnTxcQSz/mX9I6hXB4oOKAdX16fwnufftJKsrePAxVyLX7v yz3+hxt0aZ0NQB3413ostbphhIYD91QDzwe+boks9pEza2o2u0Zm3bTQ32t2ZuueSxUw wkUYneHcmEvx1LbuxVBD11cMClM4wTZbh1zKdKwaAuXU2i5yxUc+3E/WT4Nk6hA4fOg7 Zn1w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SIthj08h; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:32:06 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 37/42] mmc: exynos_dw_mmc: Don't call dwmci_setup_cfg() after add_dwmci() Date: Wed, 22 May 2024 18:31:30 -0500 Message-Id: <20240522233135.26835-38-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean add_dwmci() is already calling dwmci_setup_cfg() internally, there is no needed to call dwmci_setup_cfg() again in case when add_dwmci() is used (for non-DM cases). Fix it by calling dwmci_setup_cfg() only in DM cases, when add_dwmci() wasn't called. Also, this assignment: host->mmc = &plat->mmc; is wrong in non-DM case when add_dwmci() was called, as it's creating mmc object internally. Fix that by pulling that assignment into DM case, when add_dwmci() isn't called. While at it, add also this missing assignment: host->mmc->dev = dev; Fixes: 3537ee879e04 ("mmc: exynos_dw_mmc: support the Driver mode for Exynos") Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 19793e7ad460..373dd2df206e 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -333,19 +333,21 @@ static int exynos_dwmmc_probe(struct udevice *dev) host->clksel = exynos_dwmci_clksel; host->get_mmc_clk = exynos_dwmci_get_clk; -#if !CONFIG_IS_ENABLED(DM_MMC) - /* Add the mmc channel to be registered with mmc core */ - if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { +#if CONFIG_IS_ENABLED(BLK) + dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); + host->mmc = &plat->mmc; +#else + err = add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); + if (err) { printf("DWMMC%d registration failed\n", host->dev_index); - return -1; + return err; } #endif - dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); - host->mmc = &plat->mmc; host->mmc->priv = &priv->host; - host->priv = dev; upriv->mmc = host->mmc; + host->mmc->dev = dev; + host->priv = dev; return dwmci_probe(dev); } From patchwork Wed May 22 23:31:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798217 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919549lte; Wed, 22 May 2024 16:38:40 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWRzxsaVhyztJWmeyQTgJQ0pQQmnAqc07j2/n4os8QPTGbA2lkJHtkRPp18qE6NEBqPnQGwtVdjbNVIdXo4S4eM X-Google-Smtp-Source: AGHT+IFbw9MCyNxHEmNNk5F+LVWbSa47vBRAn5yhA0oT4gkc9qgynGy/f64NtuhstagwOZFoja8o X-Received: by 2002:a17:906:1296:b0:a59:adf8:a6e1 with SMTP id a640c23a62f3a-a62281435a3mr179011466b.47.1716421120403; Wed, 22 May 2024 16:38:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421120; cv=none; d=google.com; s=arc-20160816; b=dpwWv6En8fCVsB7xiWeakC4WWpp6qM69NXi8wmkXGzPcaShIWsc8swIEXwmfCRhX4q Xu/UpXMe3hBBb7E//oroJnGau70lrPUMAHHA7eqdHu2c0DiuuXDM+pS97hm4Tc6saj3g wkTHgVl+iH2oce4UkvnxBJ1grOtpOhcSlr3w6bP+HL8iuV2Cy/q0Bi0UqHL9qoeanvzZ c8JttwkdgGZnWx2SDaNknpvGJE7F4j7Iv4OwMHiUzR/7gYeH6bAYMJthUTvHkeWeWxwd IFIA+r4fmuETdNzhbanpeW3Rap8xJcEjtX/nBF/s3J3+4SPavPr41plWuo2xMdx4Tkd8 ZhXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=YzAlt0nt8nijIC8dJO5yduLfiDFKIZnuxjP1HyL3So8=; fh=lUBWH7tGoz+N4Es7y0lTUgKCzlHxxau3uvK2w7hEBos=; b=SoCmujzkkbExT27SSN5RYV6DMbVlR6ixF8Gf1fiAKF7m/4KEQ6RaXDdosQCJK0HFfI DeavgOVceHqisrq29Z1cq4I89hygUoBanoRnq0cBaD/Zefq7tNdCnaMHF6aedcFt2X9v zQ+EDdE1PHJDwr4mc1VaQP6k8Zx3ERx9uk7GRyOLC6U8Z8OIsdArCcLZm3x8o4vBy6Ct pKQxX+dZfC5DsUL3Adlz22NO3lbvmV3igYuGQ5xPRsaI1uGOvzV2c0ZLcEYQBijxmIoB v58n8C+GSD/GsCtPqADjvCxm0i5fYnPFDqosXMdey/wbYydiZNeXRA8IGAH5BCQrOHhy Qq7A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eYFRtchp; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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This changes boot device name (and "mmc info" output) from "EXYNOS DWMMC" to something like "mmc@12100000". Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 373dd2df206e..84a079256bca 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -327,7 +327,7 @@ static int exynos_dwmmc_probe(struct udevice *dev) "continue anyway\n", host->dev_index, err); } - host->name = "EXYNOS DWMMC"; + host->name = dev->name; host->board_init = exynos_dwmci_board_init; host->caps = MMC_MODE_DDR_52MHz; host->clksel = exynos_dwmci_clksel; From patchwork Wed May 22 23:31:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798218 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919616lte; Wed, 22 May 2024 16:38:51 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX/TyJo00VFWuTxArQYhUTKxEindTOdSGqYAC77cJ+SWxu6v7J9sl7mS9j7aXZkyrzrNX4Nzo/DzN6G46lnRWGn X-Google-Smtp-Source: AGHT+IHsz3eqhhQOxgAZwKxtwWEzMuuiwoDRSDdNTonkNB8ahXkKwz5uArZQE9ySCTmbV6Sov74f X-Received: by 2002:a17:906:3a91:b0:a5a:7a4e:7e80 with SMTP id a640c23a62f3a-a622814ea8amr230044366b.72.1716421131248; Wed, 22 May 2024 16:38:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421131; cv=none; d=google.com; s=arc-20160816; b=fFgtpE1hDsLalxbL6f4jGNyGP+d89VFm5YKzU5W8iznIpqkS+yZlHhL4mjE26XcS/A U+uRgY2wKY+i6oJgD6uR2q4Yp6+yV6eOEJLQhno2ZN1QbJtu1VeMvVL+zbTbrS6/Rd23 Qo75vq68d3HZmWvNpFXQqDo6wWzkjyu/Ra5Cqpw/VVKArJ9Z3aMO+BFaq2KVHUBY6QRU Mvl9WnYtEAvy6Nkax3TnNqnFA+PXEfEv9mKr8+p+NWDfUX65gds9g4jYO2kmxGIziM2F e9VTjfNQqLC7fmN1J34RKXQecq6e3YOR8ZoXScRgUkeU1tckxGNYVG3P3HOAli6NluNz CKAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NrHtaMBDHJR9aT0CWDtEtqeHz25SGu4FJ1HlrmVY3os=; fh=LidAL8oAHdHDssIhXjaj//ejyjtg99+OLqR/5w0RDJM=; b=GNG0Fu2QswyOgXBO4ell+bPkpKvQblurCqs88OdU3IxYiMfebI+NhEpS8OQYGKKxQS prelxMM0SmS9KMfA8RQQfLAqUY8LgtFb06jzilGZYV+jDcTHkxsG/+4qP62vZr9p8Ppm Z1SsnOvqXYg+00AeJWxm5+49nk5l84NaTFxf0WfsLFgBAufZX7BBh/z4/0hCjcYgjgWI qNUG6oAhE+aRyMf67BSbm1xz7on2oMBW93hD/c2GVIdZNOqlJAnBY3EbmD4G6DtbQb73 uxGeVceUBbARoFZlbGnmgo8VkEcO3RCbzBojnUQkq5527earNM3bwiXwsYQEB6maOLcL IiUw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=k9BmqNzx; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko --- arch/arm/mach-exynos/include/mach/dwmmc.h | 36 +++++++++++++---------- drivers/mmc/exynos_dw_mmc.c | 26 ++++++---------- 2 files changed, 29 insertions(+), 33 deletions(-) diff --git a/arch/arm/mach-exynos/include/mach/dwmmc.h b/arch/arm/mach-exynos/include/mach/dwmmc.h index 7cb71be0d9fd..75d84988b7d6 100644 --- a/arch/arm/mach-exynos/include/mach/dwmmc.h +++ b/arch/arm/mach-exynos/include/mach/dwmmc.h @@ -7,24 +7,28 @@ #ifndef __ASM_ARM_ARCH_DWMMC_H #define __ASM_ARM_ARCH_DWMMC_H -#define DWMCI_CLKSEL 0x09C -#define DWMCI_CLKSEL64 0x0a8 -#define DWMCI_SET_SAMPLE_CLK(x) (x) -#define DWMCI_SET_DRV_CLK(x) ((x) << 16) -#define DWMCI_SET_DIV_RATIO(x) ((x) << 24) +#include -#define EMMCP_MPSBEGIN0 0x1200 -#define EMMCP_SEND0 0x1204 -#define EMMCP_CTRL0 0x120C +#define DWMCI_CLKSEL 0x09c +#define DWMCI_CLKSEL64 0x0a8 +#define DWMCI_SET_SAMPLE_CLK(x) (x) +#define DWMCI_SET_DRV_CLK(x) ((x) << 16) +#define DWMCI_SET_DIV_RATIO(x) ((x) << 24) -#define MPSCTRL_SECURE_READ_BIT (0x1<<7) -#define MPSCTRL_SECURE_WRITE_BIT (0x1<<6) -#define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5) -#define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4) -#define MPSCTRL_USE_FUSE_KEY (0x1<<3) -#define MPSCTRL_ECB_MODE (0x1<<2) -#define MPSCTRL_ENCRYPTION (0x1<<1) -#define MPSCTRL_VALID (0x1<<0) +/* Protector Register */ +#define DWMCI_EMMCP_BASE 0x1000 +#define EMMCP_MPSBEGIN0 (DWMCI_EMMCP_BASE + 0x0200) +#define EMMCP_SEND0 (DWMCI_EMMCP_BASE + 0x0204) +#define EMMCP_CTRL0 (DWMCI_EMMCP_BASE + 0x020c) + +#define MPSCTRL_SECURE_READ_BIT BIT(7) +#define MPSCTRL_SECURE_WRITE_BIT BIT(6) +#define MPSCTRL_NON_SECURE_READ_BIT BIT(5) +#define MPSCTRL_NON_SECURE_WRITE_BIT BIT(4) +#define MPSCTRL_USE_FUSE_KEY BIT(3) +#define MPSCTRL_ECB_MODE BIT(2) +#define MPSCTRL_ENCRYPTION BIT(1) +#define MPSCTRL_VALID BIT(0) /* CLKSEL Register */ #define DWMCI_DIVRATIO_BIT 24 diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 84a079256bca..9ac0c21216a1 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -45,7 +45,7 @@ struct exynos_dwmmc_variant { u32 quirks; /* quirk flags - see DWMCI_QUIRK_... */ }; -/* Exynos implmentation specific drver private data */ +/* Exynos implementation specific driver private data */ struct dwmci_exynos_priv_data { #if CONFIG_IS_ENABLED(DM_MMC) struct dwmci_host host; @@ -121,10 +121,7 @@ static int exynos_dwmmc_set_sclk(struct dwmci_host *host, unsigned long rate) return 0; } -/* - * Function used as callback function to initialise the - * CLKSEL register for every mmc channel. - */ +/* Configure CLKSEL register with chosen timing values */ static int exynos_dwmci_clksel(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); @@ -163,7 +160,7 @@ static u8 exynos_dwmmc_get_ciu_div(struct dwmci_host *host) & DWMCI_DIVRATIO_MASK) + 1; } -unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) +static unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) { unsigned long sclk; u8 clk_div; @@ -204,7 +201,6 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID); } - /* Set to timing value at initial time */ if (priv->sdr_timing) exynos_dwmci_clksel(host); } @@ -213,8 +209,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) { struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; - int err = 0; u32 div, timing[2]; + int err; priv->chip = (struct exynos_dwmmc_variant *)dev_get_driver_data(dev); @@ -222,9 +218,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); - /* Extract device id for each mmc channel */ + /* Obtain device ID for current MMC channel */ host->dev_id = pinmux_decode_periph_id(blob, node); - host->dev_index = dev_read_u32_default(dev, "index", host->dev_id); if (host->dev_index == host->dev_id) host->dev_index = host->dev_id - PERIPH_ID_SDMMC0; @@ -240,10 +235,6 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) host->dev_index = 2; /* SD card */ #endif - /* Get the bus width from the device node (Default is 4bit buswidth) */ - host->buswidth = dev_read_u32_default(dev, "bus-width", 4); - - /* Set the base address from the device node */ host->ioaddr = dev_read_addr_ptr(dev); if (!host->ioaddr) { printf("DWMMC%d: Can't get base address\n", host->dev_index); @@ -254,17 +245,17 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) div = priv->chip->div; else div = dev_read_u32_default(dev, "samsung,dw-mshc-ciu-div", 0); + err = dev_read_u32_array(dev, "samsung,dw-mshc-sdr-timing", timing, 2); if (err) { printf("DWMMC%d: Can't get sdr-timings\n", host->dev_index); return -EINVAL; } - priv->sdr_timing = DWMCI_SET_SAMPLE_CLK(timing[0]) | DWMCI_SET_DRV_CLK(timing[1]) | DWMCI_SET_DIV_RATIO(div); - /* sdr_timing didn't assigned anything, use the default value */ + /* sdr_timing wasn't set, use the default value */ if (!priv->sdr_timing) { if (host->dev_index == 0) priv->sdr_timing = DWMMC_MMC0_SDR_TIMING_VAL; @@ -283,6 +274,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) DWMCI_SET_DIV_RATIO(div); } + host->buswidth = dev_read_u32_default(dev, "bus-width", 4); host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); host->bus_hz = dev_read_u32_default(dev, "clock-frequency", 0); @@ -396,8 +388,8 @@ U_BOOT_DRIVER(exynos_dwmmc_drv) = { .of_match = exynos_dwmmc_ids, .of_to_plat = exynos_dwmmc_of_to_plat, .bind = exynos_dwmmc_bind, - .ops = &dm_dwmci_ops, .probe = exynos_dwmmc_probe, + .ops = &dm_dwmci_ops, .priv_auto = sizeof(struct dwmci_exynos_priv_data), .plat_auto = sizeof(struct exynos_mmc_plat), }; From patchwork Wed May 22 23:31:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798219 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919668lte; Wed, 22 May 2024 16:39:02 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXPVopWpIyIypoBtcqE4o7mQqQejxomwXJaROKKg457tDhpXWckP0L6mNFUpQgbobs+R5SDmDseIYPWPhhRkgg0 X-Google-Smtp-Source: AGHT+IFQ0AAGjuEZMKLCBXQzAOjUa4W/rL4F6OpMbKVu09q7iUuS9flLPrm0EacvGNBYEO855uKy X-Received: by 2002:a17:906:170e:b0:a59:ca9c:4de9 with SMTP id a640c23a62f3a-a6228191800mr207178966b.76.1716421141965; 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Wed, 22 May 2024 16:32:09 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 40/42] arm: dts: exynos: Remove outdated DW MMC properties in all Exynos dts Date: Wed, 22 May 2024 18:31:33 -0500 Message-Id: <20240522233135.26835-41-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Upstream properties were added to device trees to follow current Linux kernel. DW MMC driver was updated accordingly. Safely remove outdated MMC properties. Details on removed properties are as follows: * samsung,removable: replaced by non-removable * samsung,bus-width: replaced by bus-width * samsung,timing: - replaced by samsung,dw-mshc-ciu-div and samsung,dw-mshc-sdr-timing in dw_mmc nodes - removed from sdhci nodes (it's neither described in bindings, nor it's used in s5p_sdhci.c driver) * fifoth_val: replaced by fifo-depth * bus_hz: replaced by clock-frequency * div: the fixed CIU clock divider value was moved to the chip data in exynos_dw_mmc.c driver No functional change. Signed-off-by: Sam Protsenko --- arch/arm/dts/exynos4210-origen.dts | 2 -- arch/arm/dts/exynos4210-trats.dts | 4 ---- arch/arm/dts/exynos4210-universal_c210.dts | 4 ---- arch/arm/dts/exynos4412-odroid.dts | 8 -------- arch/arm/dts/exynos4412-trats2.dts | 12 ------------ arch/arm/dts/exynos5250-arndale.dts | 4 ---- arch/arm/dts/exynos5250-smdk5250.dts | 6 ------ arch/arm/dts/exynos5250-snow.dts | 6 ------ arch/arm/dts/exynos5250-spring.dts | 3 --- arch/arm/dts/exynos5420-smdk5420.dts | 6 ------ arch/arm/dts/exynos5422-odroidxu3.dts | 2 -- arch/arm/dts/exynos54xx.dtsi | 6 ------ 12 files changed, 63 deletions(-) diff --git a/arch/arm/dts/exynos4210-origen.dts b/arch/arm/dts/exynos4210-origen.dts index a4915de2c49c..40289c8c4aaf 100644 --- a/arch/arm/dts/exynos4210-origen.dts +++ b/arch/arm/dts/exynos4210-origen.dts @@ -25,9 +25,7 @@ }; &sdhci2 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; cd-gpios = <&gpk2 2 0>; status = "okay"; }; diff --git a/arch/arm/dts/exynos4210-trats.dts b/arch/arm/dts/exynos4210-trats.dts index 4fbdf4730994..88e9c0ed2bb0 100644 --- a/arch/arm/dts/exynos4210-trats.dts +++ b/arch/arm/dts/exynos4210-trats.dts @@ -240,17 +240,13 @@ }; &sdhci0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 2 0>; status = "okay"; }; &sdhci2 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; cd-gpios = <&gpx3 4 0>; status = "okay"; }; diff --git a/arch/arm/dts/exynos4210-universal_c210.dts b/arch/arm/dts/exynos4210-universal_c210.dts index 1b3ac1fee15f..c87b92be609d 100644 --- a/arch/arm/dts/exynos4210-universal_c210.dts +++ b/arch/arm/dts/exynos4210-universal_c210.dts @@ -235,17 +235,13 @@ }; &sdhci0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 2 0>; status = "okay"; }; &sdhci2 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; cd-gpios = <&gpx3 4 0>; status = "okay"; }; diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts index 24e96ed05868..6822c6aaaa8a 100644 --- a/arch/arm/dts/exynos4412-odroid.dts +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -234,26 +234,18 @@ }; &sdhci2 { - samsung,bus-width = <4>; - samsung,timing = <1 2 3>; cd-inverted; cd-gpios = <&gpk2 2 0>; status = "okay"; }; &mshc_0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <2 1 0>; samsung,dw-mshc-ciu-div = <0>; samsung,dw-mshc-sdr-timing = <2 1>; - samsung,removable = <0>; non-removable; - fifoth_val = <0x203f0040>; fifo-depth = <0x80>; clock-frequency = <400000000>; - bus_hz = <400000000>; - div = <0x3>; index = <4>; status = "okay"; }; diff --git a/arch/arm/dts/exynos4412-trats2.dts b/arch/arm/dts/exynos4412-trats2.dts index 30758ffa1ef9..2b71d328cd0e 100644 --- a/arch/arm/dts/exynos4412-trats2.dts +++ b/arch/arm/dts/exynos4412-trats2.dts @@ -108,9 +108,7 @@ }; sdhci@12510000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 4 0>; status = "disabled"; }; @@ -432,33 +430,23 @@ }; &sdhci0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 4 0>; status = "disabled"; }; &sdhci2 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; cd-gpios = <&gpk2 2 0>; status = "okay"; }; &mshc_0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <2 1 0>; samsung,dw-mshc-ciu-div = <0>; samsung,dw-mshc-sdr-timing = <2 1>; - samsung,removable = <0>; non-removable; - fifoth_val = <0x203f0040>; clock-frequency = <400000000>; - bus_hz = <400000000>; - div = <0x3>; index = <4>; fifo-depth = <0x80>; status = "okay"; diff --git a/arch/arm/dts/exynos5250-arndale.dts b/arch/arm/dts/exynos5250-arndale.dts index 7f84589c97a2..4c894f1712fa 100644 --- a/arch/arm/dts/exynos5250-arndale.dts +++ b/arch/arm/dts/exynos5250-arndale.dts @@ -27,9 +27,7 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; }; @@ -39,9 +37,7 @@ }; mmc@12220000 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 2>; }; diff --git a/arch/arm/dts/exynos5250-smdk5250.dts b/arch/arm/dts/exynos5250-smdk5250.dts index 882db2d1f608..f9f54cb63871 100644 --- a/arch/arm/dts/exynos5250-smdk5250.dts +++ b/arch/arm/dts/exynos5250-smdk5250.dts @@ -145,12 +145,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; }; @@ -159,12 +156,9 @@ }; mmc@12220000 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 2>; - samsung,removable = <1>; }; mmc@12230000 { diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts index bcf04d5c07c0..ab7b5212ba7c 100644 --- a/arch/arm/dts/exynos5250-snow.dts +++ b/arch/arm/dts/exynos5250-snow.dts @@ -301,12 +301,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; }; @@ -315,12 +312,9 @@ }; mmc@12220000 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 2>; - samsung,removable = <1>; }; mmc@12230000 { diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts index 7270a546a795..9c478837ba44 100644 --- a/arch/arm/dts/exynos5250-spring.dts +++ b/arch/arm/dts/exynos5250-spring.dts @@ -103,12 +103,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; }; diff --git a/arch/arm/dts/exynos5420-smdk5420.dts b/arch/arm/dts/exynos5420-smdk5420.dts index 1f27baafebaf..6ba1306e862a 100644 --- a/arch/arm/dts/exynos5420-smdk5420.dts +++ b/arch/arm/dts/exynos5420-smdk5420.dts @@ -106,12 +106,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; samsung,pre-init; }; @@ -121,12 +118,9 @@ }; mmc@12220000 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 2>; - samsung,removable = <1>; }; mmc@12230000 { diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts index 767b3e415d58..ef25cf774470 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/dts/exynos5422-odroidxu3.dts @@ -280,12 +280,10 @@ }; mmc@12200000 { - fifoth_val = <0x201f0020>; fifo-depth = <0x40>; }; mmc@12220000 { - fifoth_val = <0x201f0020>; fifo-depth = <0x40>; }; diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi index fd74166c7e48..5915ed697791 100644 --- a/arch/arm/dts/exynos54xx.dtsi +++ b/arch/arm/dts/exynos54xx.dtsi @@ -119,12 +119,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; samsung,pre-init; }; @@ -134,12 +131,9 @@ }; mmc@12220000 { - samsung,bus-width = <4>; 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Wed, 22 May 2024 16:32:09 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 41/42] configs: e850-96: Enable MMC Date: Wed, 22 May 2024 18:31:34 -0500 Message-Id: <20240522233135.26835-42-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Enable MMC subsystem and DW MMC driver support to make eMMC functional. Also enable a couple of related commands so the user can make use of eMMC from U-Boot shell. Signed-off-by: Sam Protsenko --- configs/e850-96_defconfig | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/configs/e850-96_defconfig b/configs/e850-96_defconfig index bb41635ff784..17054f25fe6b 100644 --- a/configs/e850-96_defconfig +++ b/configs/e850-96_defconfig @@ -9,11 +9,19 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xf8c00000 CONFIG_DEFAULT_DEVICE_TREE="exynos850-e850-96" CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_AUTOBOOT is not set # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_CMD_ABOOTIMG=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_TIME=y # CONFIG_NET is not set CONFIG_CLK_EXYNOS850=y -# CONFIG_MMC is not set +CONFIG_MMC_DW=y CONFIG_SOC_SAMSUNG=y CONFIG_EXYNOS_PMU=y CONFIG_EXYNOS_USI=y From patchwork Wed May 22 23:31:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 798221 Delivered-To: patch@linaro.org Received: by 2002:ab3:6414:0:b0:267:d849:ee76 with SMTP id j20csp919764lte; Wed, 22 May 2024 16:39:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVrYEI8g1h3nFaxu5maQkOb+2sne4fOhx+uzL/6zXWhHwm2IjSqY6iSOQBUiN8ujKcW/NCQ+QToZWi2NeXfHcch X-Google-Smtp-Source: AGHT+IHZ228rEFbehkW0vzwwDiL2RoefsM0M6D/hFbXcnUSg5/QuEzGn8OzfvUgtjgHZIKx6g0GO X-Received: by 2002:a50:aa9a:0:b0:570:3b8:a990 with SMTP id 4fb4d7f45d1cf-57832c7e7a9mr2416793a12.39.1716421164950; Wed, 22 May 2024 16:39:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1716421164; cv=none; d=google.com; s=arc-20160816; b=RRswlOyH8xpMipWoF+9aDC5xaMy8esZNFQqaZkI2sY87VEF1RGkHBldBgBuBbUvsI2 kY/xt2G/MrkZs0jZaf73WgHmKJvF6hkXfIWft18iVXNTccpXmr09mESEuxo5vjRFzkFa t2weKncDk83lcY/KPt4vkhZLhJsngM9D6CONecaALPGhgnCsst0skuRHAIebbsJUAOWS Rm+i/6p9opt5u9PEu8wK4NZgVuCFzSW6RpIdRaFcUJshOYerdbMtywmFf3zKuzHsKNWV I6rcB+i4aKDnw5+BuDLCkngK9IBa6pt5uhgoalbOLR7meUrvKRPrmDizdO7qCDW080I3 g0bQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=2jMeGLO1IlJDYqTIdTf9GhLx78Z2YsLiJBjEhU1B4nI=; fh=9MQiTdPoSI0/lLKIc3ZCMqZQ4P4fmjZshS1YS9kKW/M=; b=PO+KwiqsdbrRm0I7+i0WnbqMkMUs+88MUYuL3BPJQw+13KjrzLDeqrhniJXphuBmU4 rsMrtJEN7odzqGKqaPUjYRFbm84DuS3cenZrZqsE15qgBTgD7IeS5LfiIXOXMAGhI778 U5mN494/wNLNJVGgU54/kQvHEkwYxCb+0ebGjLwMjg21jxz9aXhvinqT9A3sp3RFtK1V ArgeipT/YIICMO5lcWYKivaP2hBELWljD95aKFOgMtn6XFhnXW6obfiUgkTdlp1QzAYu vaQlS+9rkA82EtMW7tN63+pMmLwyXwl7bF85SW9dPEHLcNDc8sZq/8JDiZfzulYDy7Gt EmrA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="wysd/7B9"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Wed, 22 May 2024 16:32:10 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH 42/42] doc: samsung: Mention enabled eMMC in E850-96 board doc Date: Wed, 22 May 2024 18:31:35 -0500 Message-Id: <20240522233135.26835-43-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240522233135.26835-1-semen.protsenko@linaro.org> References: <20240522233135.26835-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean eMMC is enabled on E850-96 board now. Mention that in the board documentation. Signed-off-by: Sam Protsenko --- doc/board/samsung/e850-96.rst | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/doc/board/samsung/e850-96.rst b/doc/board/samsung/e850-96.rst index 0cb95473e536..0a7b6fc0c9dd 100644 --- a/doc/board/samsung/e850-96.rst +++ b/doc/board/samsung/e850-96.rst @@ -47,12 +47,13 @@ Build Procedure --------------- .. warning:: - At the moment both eMMC and USB features are not enabled in U-Boot. Flashing + At the moment USB is not enabled in U-Boot for this board. Although eMMC is + enabled, you won't be able to flash images over USB (fastboot). So flashing U-Boot binary **WILL** effectively brick your board. The ``dltool`` [8]_ can be used then to perform USB boot and flash LittleKernel bootloader binary [7]_ to unbrick and revive the board. Flashing U-Boot binary might be helpful for developers or anybody who want to check current state of U-Boot enablement on - E850-96 (which is mostly serial console and related blocks). + E850-96 (which is mostly serial console, eMMC and related blocks). Build U-Boot binary from source code (using AArch64 baremetal GCC toolchain):