From patchwork Fri May 17 09:09:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Bonnefille X-Patchwork-Id: 797741 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87F761EB36; Fri, 17 May 2024 09:10:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715937024; cv=none; b=E3Zt7J9up5qJ13VDYLtCP7Vr+4PGiUmXP2kWJTdHSGTm3e39vz2CQfyvnjYB0zzDVcbSHjZoo+k90AZxi2LYCMedSVp/xLkR2MOuNTQ4MBLwJ+WEeKeaaruhfQTBTXtx8m+RTLOF4HJp4jDSNgwZeiPO0P3SOo6gp8Alqom3rGc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715937024; c=relaxed/simple; bh=ouKIBpi5DYo1XABOvnKixxJKfzciW99XiYkqpTOzoHY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BBgSAZRIkOQ36wYV101wxZZCu4nwntgiD9BlanVGQcrlSXMN3WFx39G3Qoe+wzBK8a//bYvgXVXqveN92oYW9UnKUmbZf2s1PAJwlHvtkQO9NHBI+M7e5mBEiJI1kgd00Ohkax1iSsDTZ1I0b5na6Lj7dNFrIg9eJ9G50Ujcijg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=RoDudsoI; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="RoDudsoI" Received: by mail.gandi.net (Postfix) with ESMTPSA id 9411620002; Fri, 17 May 2024 09:10:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1715937014; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Pq7XQqi3/Cq4U6P2JcpzcOtiqC8L/GBHpBIFcU2OyKc=; b=RoDudsoI7xov79JDbeurmxUGeYsvpgvRxon//txTj24ZV2L0u4uzM1nR5+Y5Iiqqih6Ko8 vqNiDTGAqptva1IncZcFl4S+k6TyYzy95kbSq7TrqOiwCmpW5whLqjub6viKuiRbpLrOIv 6f1KeBJC42jK1kcPbMmO6d6ZZTMZPdbBAzoc9kGAFdPULscbEzGsvUKTrpZKEx2Ezw7kGg uWh6GLX/Psx1ZRiu3cIobHPZB/LVKqYQWbS7QBrTccXQOlZW/2/TmCK04OqAnnipXy3ebG kVUQTwM777C6oFcW3H+newyr1fjdd9eQVSF4iEu7dnE5HE/Ozxlhk0fUuHBYcA== From: Thomas Bonnefille Date: Fri, 17 May 2024 11:09:53 +0200 Subject: [PATCH v2 1/3] dt-bindings: i2c: dw: Document compatible thead,th1520-i2c Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240517-i2c-th1520-v2-1-d364d135ccc6@bootlin.com> References: <20240517-i2c-th1520-v2-0-d364d135ccc6@bootlin.com> In-Reply-To: <20240517-i2c-th1520-v2-0-d364d135ccc6@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Guo Ren , Fu Wei , Drew Fustini , Emil Renner Berthing , Conor Dooley Cc: Palmer Dabbelt , Albert Ou , Paul Walmsley , Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_Ray?= =?utf-8?q?nal?= , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Thomas Bonnefille X-Mailer: b4 0.13.0 X-GND-Sasl: thomas.bonnefille@bootlin.com Add documentation for compatible string thead,th1520-i2c which can be used specifically for the TH1520 SoC. Signed-off-by: Thomas Bonnefille --- Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml index d9293c57f573..60035a787e5c 100644 --- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml @@ -33,6 +33,10 @@ properties: - const: snps,designware-i2c - description: Baikal-T1 SoC System I2C controller const: baikal,bt1-sys-i2c + - description: T-HEAD TH1520 SoCs I2C controller + items: + - const: thead,th1520-i2c + - const: snps,designware-i2c reg: minItems: 1 From patchwork Fri May 17 09:09:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Bonnefille X-Patchwork-Id: 797541 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97B661EB5E; Fri, 17 May 2024 09:10:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715937025; cv=none; b=hpbIsIE6YaW7QTMO2heqnMT9WAfJBzEmL861l7wdHnjEGBISDq8sjWsoumijTN/c0o6i7D510LJ3P3e+QKoCFN+W5hN09GhXjuKA8yQUfzg+K8eff8W8Nb46Db1iUZCiUgFC/4UeF58C0UPnZ2FIRz0J7yzQmXdV8cln63cYKfs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715937025; c=relaxed/simple; bh=hVTKaOdFd5y5mLvWZP8L+mL1dgZD08ji4w/qOVYb6SQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nrGWh5iejTZ3b4BNUdDWUoZtoAA+fdP6PWkUMc2qIsTCuwUlrsFB9Xoa9XVhnx9ZpXJ3ro7KTGN7kegj94TLMp8xUUIRFfmTZwpu3bX6Ki0dPg9iGN7sP3ajvdjyIokOvR1xsSuO6vreqHSOJQW9r6M3Ss+CfSDvN2dKPcrm5a4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=A7Sibcpp; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="A7Sibcpp" Received: by mail.gandi.net (Postfix) with ESMTPSA id CBE952000D; Fri, 17 May 2024 09:10:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1715937015; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EwF/BXW9VuWyeGGtBGV6L8qqYk6pudzw8mEgBwrvKoE=; b=A7Sibcpp7VdAE4eFezK6+SgcyDBETp+BQszGyTDm2sWcMBlnnD3GRRTuWhGwo+/epLz1VF 8h0LOHICpOrlxlkh8oUUETFz6ZsRpAaRFadsD4pq9AqPRWfJ2z36uf2LV4A9FRbfyvO6ez G6QOU5slbuubU5awFaKUIIh3svrzWLcQ+GGAXN/2MXEXrMWf/pZ8jYMx97PQBd5lU04Ezl JJdr+5nrQQ93mXee+/ZzayLREv9CvA477djVCbZOjc0J2FLcM24BuOuqNR1DYk57L5Rx4u SPcGNFFdY/KvgK5sJ7ZiYlfUAwfJWPKHSVlGSwzXkdQUll80OHDpWjxFgUruyA== From: Thomas Bonnefille Date: Fri, 17 May 2024 11:09:54 +0200 Subject: [PATCH v2 2/3] riscv: dts: thead: Add TH1520 I2C nodes Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240517-i2c-th1520-v2-2-d364d135ccc6@bootlin.com> References: <20240517-i2c-th1520-v2-0-d364d135ccc6@bootlin.com> In-Reply-To: <20240517-i2c-th1520-v2-0-d364d135ccc6@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Guo Ren , Fu Wei , Drew Fustini , Emil Renner Berthing , Conor Dooley Cc: Palmer Dabbelt , Albert Ou , Paul Walmsley , Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_Ray?= =?utf-8?q?nal?= , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Thomas Bonnefille X-Mailer: b4 0.13.0 X-GND-Sasl: thomas.bonnefille@bootlin.com Add nodes for the five I2C on the T-Head TH1520 RISCV SoC. Signed-off-by: Thomas Bonnefille --- arch/riscv/boot/dts/thead/th1520.dtsi | 50 +++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index de7116290ca4..ae6cf4c441cf 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -252,6 +252,36 @@ gpio2: gpio-controller@0 { }; }; + i2c0: i2c@ffe7f20000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xe7f20000 0x0 0x4000>; + interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@ffe7f24000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xe7f24000 0x0 0x4000>; + interrupts = <45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@ffe7f28000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xe7f28000 0x0 0x4000>; + interrupts = <48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C4>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gpio@ffe7f38000 { compatible = "snps,dw-apb-gpio"; reg = <0xff 0xe7f38000 0x0 0x1000>; @@ -342,6 +372,16 @@ uart2: serial@ffec010000 { status = "disabled"; }; + i2c3: i2c@ffec014000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xec014000 0x0 0x4000>; + interrupts = <47 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + dmac0: dma-controller@ffefc00000 { compatible = "snps,axi-dma-1.01a"; reg = <0xff 0xefc00000 0x0 0x1000>; @@ -416,6 +456,16 @@ uart5: serial@fff7f0c000 { status = "disabled"; }; + i2c5: i2c@fff7f2c000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xf7f2c000 0x0 0x4000>; + interrupts = <49 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C5>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + timer4: timer@ffffc33000 { compatible = "snps,dw-apb-timer"; reg = <0xff 0xffc33000 0x0 0x14>; From patchwork Fri May 17 09:09:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Bonnefille X-Patchwork-Id: 797740 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BF0E23754; Fri, 17 May 2024 09:10:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715937027; cv=none; b=Nyt9+Q7fwO0tfWKkZUzMqHOVFmVW7lPdV5/lAlf/Kjz1N3kuqSIhYuVBGVdXzkdf9s3D6i8jTEQy7dYFdFsMRbIuKYN+eUgGRNc7DCyXF9ab0e4HEb5vm2RlOqMmst+QQ/spVGtSxNst8kqXv7E54bcTT/n333LyYu67z6a1lYk= ARC-Message-Signature: i=1; a=rsa-sha256; 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Fri, 17 May 2024 09:10:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1715937016; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=AFbldK+YrNkPHEp7U+iGoJtDTLbUW/U0B2C/LsdOF6E=; b=klGl0Tyc1SJDCTEgSMqT8gslZT1WoMIsRul91Fj6KHTBRJAkMGueFNTsdogwc9TTIuKN1+ q7MjMuwS4DRHn+A+7S93UAu0hDz7p60u9KHYUu4C+CjzctkD7KJTabkjw+07ZaR7IsMYee IQ8irHYV5w9J6dpkCjfXIDwwmKfPp7xT4Xd/oeA+5FXtbzeV6q2VGsqdvUqIFA3PhMk4ZU mFE1jtlJWKqLHOU7tYAliU5uHyctDNJZZzcUkIeEar5nTNNM7U4vNUV8jVs1E9x2VqOgjj qke6aaFRTiGT27xsBgU8+f48uqusnMcjyFeBQ0uLuXNsYFleQ6awAvYkBr7vfw== From: Thomas Bonnefille Date: Fri, 17 May 2024 11:09:55 +0200 Subject: [PATCH v2 3/3] riscv: dts: thead: Enable I2C on the BeagleV-Ahead Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240517-i2c-th1520-v2-3-d364d135ccc6@bootlin.com> References: <20240517-i2c-th1520-v2-0-d364d135ccc6@bootlin.com> In-Reply-To: <20240517-i2c-th1520-v2-0-d364d135ccc6@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Guo Ren , Fu Wei , Drew Fustini , Emil Renner Berthing , Conor Dooley Cc: Palmer Dabbelt , Albert Ou , Paul Walmsley , Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_Ray?= =?utf-8?q?nal?= , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Thomas Bonnefille X-Mailer: b4 0.13.0 X-GND-Sasl: thomas.bonnefille@bootlin.com This commit enables the I2C0 controller of the TH1520, together with the FT24C32A EEPROM that is connected to it. In addition, this commit also enables the I2C controllers I2C2, I2C4 and I2C5 as they are all three exposed on headers (P9 19 and 20 for I2C2, P9 17 and 18 for I2C5 and MikroBus 7 and 5 for I2C4). It also defined the required pinctrl nodes. Signed-off-by: Thomas Bonnefille --- arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts index 57a2578123eb..aeb04f5159d5 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -121,6 +121,47 @@ led-pins { }; }; +&padctrl1_apsys { + i2c0_pins: i2c0-0 { + i2c-pins { + pins = "I2C0_SDA", + "I2C0_SCL"; + function = "i2c"; + bias-pull-up = <2100>; + drive-strength = <7>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + + i2c4_pins: i2c4-0 { + i2c-pins { + pins = "GPIO0_19", /*I2C4_SDA*/ + "GPIO0_18"; /*I2C4_SCL*/ + function = "i2c"; + bias-pull-up = <2100>; + drive-strength = <7>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + + i2c5_pins: i2c5-0 { + i2c-pins { + pins = "QSPI1_D0_MOSI", /*I2C5_SDA*/ + "QSPI1_CSN0"; /*I2C5_SCL*/ + function = "i2c"; + bias-pull-up = <2100>; + drive-strength = <7>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; +}; + &padctrl0_apsys { uart0_pins: uart0-0 { tx-pins { @@ -143,6 +184,19 @@ rx-pins { slew-rate = <0>; }; }; + + i2c2_pins: i2c2-0 { + i2c-pins { + pins = "I2C2_SDA", + "I2C2_SCL"; + function = "i2c"; + bias-pull-up = <2100>; + drive-strength = <7>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; }; &uart0 { @@ -150,3 +204,33 @@ &uart0 { pinctrl-0 = <&uart0_pins>; status = "okay"; }; + +&i2c0 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + +&i2c4 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; +}; + +&i2c5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_pins>; +};