From patchwork Tue May 14 17:42:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796745 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611214wra; Tue, 14 May 2024 10:44:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWZYHCHpLDayrn0KGqXPOn/9k7TJS0Hj3U4MCqGivgUcgH3lzskKZigNQ7Awzb+OCS2VQwjrnOz32prsAtk9RUB X-Google-Smtp-Source: AGHT+IHfhH2F/LKWM/68QUK6B8MMEdTZuntQBxZBzeI9rHARPQYKADA1xjJgbcXDpJ/CzF+xXcBT X-Received: by 2002:a05:6214:3990:b0:6a0:ce3b:b4a6 with SMTP id 6a1803df08f44-6a16819f4c7mr126187566d6.11.1715708679353; Tue, 14 May 2024 10:44:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708679; cv=none; d=google.com; s=arc-20160816; b=lSWNBfnTmhJRjdq1mlVnxSGMSSIhbr+3ccG+l2xjmI0yuQ9A7+fYARmt2O9FQ1/Yw5 YNaoRvLcILEPQkHefTzkYpJQwuSH1wPoGYx1vC86LXoBSNN1Jayk3DLiUdMA90e+aQY8 H0CcAvMA95VDblqB2GzMjp2swrkkngBytrI5Zq0ZjSmF4n7O1oaoNDYTA2PMxsJgsmWM mla6hXvy3gzDcVcNeK/TG2Ohux7n5gZvrZe86Gr+6+zVQ9c68P0kWkqY9LASFMJ7CVRW eGS29fNwAkeQlXgM0lx6NNHnDyLc15Cc0JnO5QAnvCKIzYAhtrnE7HdRd04VkmeEiOhl NLGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=3SGXtYjHPhRPb+FEejg3JUt/LMp+FdVDAbFVCCpIL84=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=T7uiO6BQVGZvQOcSZazPV7UK6dc01vi8iEvV0C+5cHa9OCljMcct3ComsFIbIqTvdp K7k03pRzCuvLxWAHGUwdurJp78shoffc1iv2ZFEjem23UKG4XJuLfq9mdbiy+B/6PpIL cSsGZ+0Xnj5Fvaa70PkCVzHd84ciHkhASN9M66jLEqoSxGmLSYi6zAiDo5T6pgZkJMJt GfEGPXcjHtA1k0pkxCVjCHLfPpaFB2AE0bwCAbooqZK0x61/bW89/S0r7pcMUw2513t/ qF55IfHb9TNFln7WqbI+nvMIWKSD7O05IMl8AGg7yUYU4VYsFTVmz1E2iX4iPg0/ZMjR s1bQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CTMoFzUG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6a15f1d5ed3si126531196d6.111.2024.05.14.10.44.39 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:44:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CTMoFzUG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBl-0004wU-Vm; Tue, 14 May 2024 13:43:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBP-0004pw-I6 for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:29 -0400 Received: from mail-ej1-x631.google.com ([2a00:1450:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wB2-0004tC-Kc for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:16 -0400 Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-a59a352bbd9so77038466b.1 for ; Tue, 14 May 2024 10:42:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708576; x=1716313376; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3SGXtYjHPhRPb+FEejg3JUt/LMp+FdVDAbFVCCpIL84=; b=CTMoFzUGl3qUcgomgI4RcY/lMFCmBEPf64YUQ6ofsWr7HxL4KssHzhgi6OmX2++3ZJ 18RyrAl3hXT/qhJ9VufcmgcA8x9bdGujyIqc3BX+17Ba2fKFeqx6xhCpWbniO6mkv//z ly42mW/AW8NxK9cEjFP0lNTBNx8C4l/Mf2Oi/MZDrGpYpnvnVv1UzZVhEmsPNabnvyKx Jwp5j3gHf8NUGEe/2VBuy9u0juRCARddpoGtCnlus420O0FGgnDVDLe2Lh8FC+MBzs5y FGHUbTs3NjEHvvoMwhfpI3zIndF2kzb3r27GMmoQyBOLLoKTqK0rZP/wzxuUsOEAKwwb ipoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708576; x=1716313376; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3SGXtYjHPhRPb+FEejg3JUt/LMp+FdVDAbFVCCpIL84=; b=n9c/JzKUYLoUuluZ/oHno/ZYtH3Lxn13p2nIomy6+i1QK0lHzrA8pTzcbgG4w0jy8G WQkn5KeUXLgEkBQjgQrIUTgW0NyE6RjxG4Si6ty+ntq6WCfltV5dHl85iRuD1q6S3uCJ oEv1xb6hh5gRsHx0aJUPVhuU7B+qO1RvsNKqDtDQHJJN32jYMoqEN03s7Oj1c8GXDywX CC4TTuL8TkdO7bDJ9QRvE3L94MadM8tb4UXF96VsjQwZggpv291eNVMXGlRlXHHhZoab lAZ0pvJmCZSM3d0D3L03y3RtteJcwIp9izpuOUeaDsWu2TS/gsoG2vPa/2uFJp2GNxLQ yxpw== X-Gm-Message-State: AOJu0YwsoJ9iDokMWj9VwvXOakWa15U4F0CweBWVbgTDFI3a4N0XU4zA XS/jpFMNh22G4/HVUBJXGF293vWrbHsxKsL+sI2btGr/+XJA1ozuY9b7QSvdN4g= X-Received: by 2002:a17:906:2b9a:b0:a58:b479:8fdc with SMTP id a640c23a62f3a-a5a1155b441mr1298791266b.1.1715708576496; Tue, 14 May 2024 10:42:56 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a1781cf70sm743626566b.30.2024.05.14.10.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:54 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 072245FA18; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 01/11] tests/tcg: don't append QEMU_OPTS for armv6m-undef test Date: Tue, 14 May 2024 18:42:43 +0100 Message-Id: <20240514174253.694591-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We don't want to build on the default machine setup here but define a custom one for the microbit. Signed-off-by: Alex Bennée Reviewed-by: Pierrick Bouvier --- tests/tcg/arm/Makefile.softmmu-target | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/tcg/arm/Makefile.softmmu-target b/tests/tcg/arm/Makefile.softmmu-target index 4c9264057f..39e01ce49d 100644 --- a/tests/tcg/arm/Makefile.softmmu-target +++ b/tests/tcg/arm/Makefile.softmmu-target @@ -16,7 +16,7 @@ test-armv6m-undef: test-armv6m-undef.S $< -o $@ -nostdlib -N -static \ -T $(ARM_SRC)/$@.ld -run-test-armv6m-undef: QEMU_OPTS+=-semihosting -M microbit -kernel +run-test-armv6m-undef: QEMU_OPTS=-semihosting-config enable=on,target=native,chardev=output -M microbit -kernel ARM_TESTS+=test-armv6m-undef From patchwork Tue May 14 17:42:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796748 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611411wra; Tue, 14 May 2024 10:45:12 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW+VwvqjyWXonX57M76I39kiMZZgUTnJxwQvueQT3i4bcSDHVmgW2QfWYHTr4b/hVTSyJV9aOkopYB9Bdz3DXsE X-Google-Smtp-Source: AGHT+IFpu5dCGcr43fDGj+4UJ0ycJtrCEnezrZIV8YPeyKVyxkjoZWIn9TWzfKmpCH4O2vWVTUkO X-Received: by 2002:a05:6214:3a86:b0:6a0:8511:98e0 with SMTP id 6a1803df08f44-6a168150295mr158084166d6.22.1715708712487; Tue, 14 May 2024 10:45:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708712; cv=none; d=google.com; s=arc-20160816; b=RQwcEzS9CWKgsRsC2buLBwlZBZt4cRJs672MHkRjowfmEyfviyCm1KaNBepZl23WyL tPHhsKLsbUOAsplXl+g544aVvYY2FiTDSUu6qKuJpdmuRGsvDis/kbYyZ0ZasX4XBwi4 CrfkGoYOBJOWh94290JVun+qSaEPAXO9tilW/cH7ez5bbXbBzJWOoxAlPq+zAOjy/159 3Aa4/ngDCt9EEykHU8cvRHRVn1i0hBy/lUxXEvNZmQKf8iqeP/NuC055ymc2YU0wsunN bz7CWzJDncu56FW2q0TvSfrc/stkDsltWgVemKeJX/GHYnR6YS1kuRSZkdfxxiAeJ3TZ wpPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XPxY0E7yxbX5pVQ4/Szl3Q5MOqxhGDVnE0r/P4HexYI=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=jQXV55o5GHUcuWbhAZjC7VNo4uGWiv1mDQqoCqVeOAfmdHtoFBZRELypJY32JF122G jIzZGe4G0cMAZGHWk0hK2r/61pCWYphGXNGxEztghHPomWZyocmbSCrAgi43fas3W8e+ xh4qPlQS7CYqg1BPtAmBfZNP6sSSuPytpudX7pNUSn+IQqmYhedNu4pGbd9x3+2t6f+l 7Ipcg4fQYB1WiAqXrEKCvAtTkHiYAaQizRgRbeZt+S1ud/7KlfvwPsCr/8BVG/rzv+Zw akwtWoVYjyLuJxJuranIneIpPKlJTD5j6Zb3j+pSqW9n3LbAvhIZMni0eP4nO9CkzUVZ vqzw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pswhmI1u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6a15f1d705csi122287556d6.59.2024.05.14.10.45.12 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:45:12 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pswhmI1u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBp-0004zd-Ef; Tue, 14 May 2024 13:43:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBP-0004pz-J2 for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:32 -0400 Received: from mail-ej1-x62a.google.com ([2a00:1450:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wB0-0004sy-2R for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:01 -0400 Received: by mail-ej1-x62a.google.com with SMTP id a640c23a62f3a-a59a609dd3fso68255166b.0 for ; Tue, 14 May 2024 10:42:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708575; x=1716313375; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XPxY0E7yxbX5pVQ4/Szl3Q5MOqxhGDVnE0r/P4HexYI=; b=pswhmI1uyauhZKJvJDi23y4NcHuYpU4yG1KpHHRrdEBjXh/gzzioBJPEMkNUJRpxNc SbiWGKToGpgfmKY0bfdSXtLa5Rarp3IXF5XJQOPpStUdnu2kS1hJtyNxYc9NMV/0eLZi VaBdmiCxrmZeUV+ExCyAReLMNn2Ts3dUKwAESZPtSiYZKvNg2da7a93uzgPQpnIWnCaF rcmZKw/TPbNsm/W8Ck4NyXiGDzIfiGkVbiTtSxxmay5uLk3vVrq5ypnAIbjmlHj1buhl 4indqUJEZlqBnTynUaTNoOvmeNqu8ZA6cGeS+NpkXVbmqSC7kooG+L4HK8sy/vuWdxQq 6P6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708575; x=1716313375; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XPxY0E7yxbX5pVQ4/Szl3Q5MOqxhGDVnE0r/P4HexYI=; b=csMy+DeYpDu5KZ7PdOzLFo9I0xFiYVZqvOe0W7/WGDAtnMH+jbM4LpHkMsdXmMK0jC TcvwHKUW7htjHi3sGGjWGNumL2FWie/hAU9Dd5vW3cR84deDFxAJVsW5v1Qj2yBb2yQf x2cIFBcqhiCGZ6V4qy7tPiQFjY/un6rsBawPpjmvUuIu082LGjsBiIzAAQeHsQjj+2B6 +27cJfcClt+YPIb+cL8k88gQyNqz8zSjlY+4Lbb7OWWgl0UDQJYYZD+FXW+hCFvdvrPe 6/tjU4ZDfEn55hePIu4aBiGyASTUryR0nkAtXWWDhOZEqJLu6Ibz7c/LlMqtiChwCWzV BbGg== X-Gm-Message-State: AOJu0YxyoxkQfqFnG5DnGHSnczUpBLuwRQ/nWrVHeh6fc2Mcml1svc4k qZZh+1T/CbCNYRiz7sjxLC9PWBmSSdhHo6guZ2FnZCx+BfruhEdE/SwVG+CTt2M= X-Received: by 2002:a17:906:3815:b0:a58:7172:1ab0 with SMTP id a640c23a62f3a-a5a2d1b0fe2mr1268419166b.16.1715708574915; Tue, 14 May 2024 10:42:54 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a17b17865sm737840166b.204.2024.05.14.10.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:54 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 1E3A05FA19; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 02/11] scripts/update-linux-header.sh: be more src tree friendly Date: Tue, 14 May 2024 18:42:44 +0100 Message-Id: <20240514174253.694591-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Running "install_headers" in the Linux source tree is fairly unfriendly as out-of-tree builds will start complaining about the kernel source being non-pristine. As we have a temporary directory for the install we should also do the build step here. So now we have: $tmpdir/ $blddir/ $hdrdir/ Signed-off-by: Alex Bennée Message-Id: <20240510111802.241284-1-alex.bennee@linaro.org> Reviewed-by: Pierrick Bouvier --- scripts/update-linux-headers.sh | 80 +++++++++++++++++---------------- 1 file changed, 41 insertions(+), 39 deletions(-) diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh index 36f3e91fe4..8963c39189 100755 --- a/scripts/update-linux-headers.sh +++ b/scripts/update-linux-headers.sh @@ -27,6 +27,8 @@ # types like "__u64". This work is done in the cp_portable function. tmpdir=$(mktemp -d) +hdrdir="$tmpdir/headers" +blddir="$tmpdir/build" linux="$1" output="$2" @@ -110,56 +112,56 @@ for arch in $ARCHLIST; do arch_var=ARCH fi - make -C "$linux" INSTALL_HDR_PATH="$tmpdir" $arch_var=$arch headers_install + make -C "$linux" O="$blddir" INSTALL_HDR_PATH="$hdrdir" $arch_var=$arch headers_install rm -rf "$output/linux-headers/asm-$arch" mkdir -p "$output/linux-headers/asm-$arch" for header in kvm.h unistd.h bitsperlong.h mman.h; do - cp "$tmpdir/include/asm/$header" "$output/linux-headers/asm-$arch" + cp "$hdrdir/include/asm/$header" "$output/linux-headers/asm-$arch" done if [ $arch = mips ]; then - cp "$tmpdir/include/asm/sgidefs.h" "$output/linux-headers/asm-mips/" - cp "$tmpdir/include/asm/unistd_o32.h" "$output/linux-headers/asm-mips/" - cp "$tmpdir/include/asm/unistd_n32.h" "$output/linux-headers/asm-mips/" - cp "$tmpdir/include/asm/unistd_n64.h" "$output/linux-headers/asm-mips/" + cp "$hdrdir/include/asm/sgidefs.h" "$output/linux-headers/asm-mips/" + cp "$hdrdir/include/asm/unistd_o32.h" "$output/linux-headers/asm-mips/" + cp "$hdrdir/include/asm/unistd_n32.h" "$output/linux-headers/asm-mips/" + cp "$hdrdir/include/asm/unistd_n64.h" "$output/linux-headers/asm-mips/" fi if [ $arch = powerpc ]; then - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-powerpc/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-powerpc/" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-powerpc/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-powerpc/" fi rm -rf "$output/include/standard-headers/asm-$arch" mkdir -p "$output/include/standard-headers/asm-$arch" if [ $arch = s390 ]; then - cp_portable "$tmpdir/include/asm/virtio-ccw.h" "$output/include/standard-headers/asm-s390/" - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-s390/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-s390/" + cp_portable "$hdrdir/include/asm/virtio-ccw.h" "$output/include/standard-headers/asm-s390/" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-s390/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-s390/" fi if [ $arch = arm ]; then - cp "$tmpdir/include/asm/unistd-eabi.h" "$output/linux-headers/asm-arm/" - cp "$tmpdir/include/asm/unistd-oabi.h" "$output/linux-headers/asm-arm/" - cp "$tmpdir/include/asm/unistd-common.h" "$output/linux-headers/asm-arm/" + cp "$hdrdir/include/asm/unistd-eabi.h" "$output/linux-headers/asm-arm/" + cp "$hdrdir/include/asm/unistd-oabi.h" "$output/linux-headers/asm-arm/" + cp "$hdrdir/include/asm/unistd-common.h" "$output/linux-headers/asm-arm/" fi if [ $arch = arm64 ]; then - cp "$tmpdir/include/asm/sve_context.h" "$output/linux-headers/asm-arm64/" + cp "$hdrdir/include/asm/sve_context.h" "$output/linux-headers/asm-arm64/" fi if [ $arch = x86 ]; then - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x86/" - cp "$tmpdir/include/asm/unistd_x32.h" "$output/linux-headers/asm-x86/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-x86/" - cp_portable "$tmpdir/include/asm/kvm_para.h" "$output/include/standard-headers/asm-$arch" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x86/" + cp "$hdrdir/include/asm/unistd_x32.h" "$output/linux-headers/asm-x86/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-x86/" + cp_portable "$hdrdir/include/asm/kvm_para.h" "$output/include/standard-headers/asm-$arch" # Remove everything except the macros from bootparam.h avoiding the # unnecessary import of several video/ist/etc headers sed -e '/__ASSEMBLY__/,/__ASSEMBLY__/d' \ - "$tmpdir/include/asm/bootparam.h" > "$tmpdir/bootparam.h" - cp_portable "$tmpdir/bootparam.h" \ + "$hdrdir/include/asm/bootparam.h" > "$hdrdir/bootparam.h" + cp_portable "$hdrdir/bootparam.h" \ "$output/include/standard-headers/asm-$arch" - cp_portable "$tmpdir/include/asm/setup_data.h" \ + cp_portable "$hdrdir/include/asm/setup_data.h" \ "$output/standard-headers/asm-x86" fi if [ $arch = riscv ]; then - cp "$tmpdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/" + cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/" fi done arch= @@ -169,13 +171,13 @@ mkdir -p "$output/linux-headers/linux" for header in const.h stddef.h kvm.h vfio.h vfio_ccw.h vfio_zdev.h vhost.h \ psci.h psp-sev.h userfaultfd.h memfd.h mman.h nvme_ioctl.h \ vduse.h iommufd.h bits.h; do - cp "$tmpdir/include/linux/$header" "$output/linux-headers/linux" + cp "$hdrdir/include/linux/$header" "$output/linux-headers/linux" done rm -rf "$output/linux-headers/asm-generic" mkdir -p "$output/linux-headers/asm-generic" for header in unistd.h bitsperlong.h mman-common.h mman.h hugetlb_encode.h; do - cp "$tmpdir/include/asm-generic/$header" "$output/linux-headers/asm-generic" + cp "$hdrdir/include/asm-generic/$header" "$output/linux-headers/asm-generic" done if [ -L "$linux/source" ]; then @@ -210,23 +212,23 @@ EOF rm -rf "$output/include/standard-headers/linux" mkdir -p "$output/include/standard-headers/linux" -for i in "$tmpdir"/include/linux/*virtio*.h \ - "$tmpdir/include/linux/qemu_fw_cfg.h" \ - "$tmpdir/include/linux/fuse.h" \ - "$tmpdir/include/linux/input.h" \ - "$tmpdir/include/linux/input-event-codes.h" \ - "$tmpdir/include/linux/udmabuf.h" \ - "$tmpdir/include/linux/pci_regs.h" \ - "$tmpdir/include/linux/ethtool.h" \ - "$tmpdir/include/linux/const.h" \ - "$tmpdir/include/linux/kernel.h" \ - "$tmpdir/include/linux/vhost_types.h" \ - "$tmpdir/include/linux/sysinfo.h" \ - "$tmpdir/include/misc/pvpanic.h"; do +for i in "$hdrdir"/include/linux/*virtio*.h \ + "$hdrdir/include/linux/qemu_fw_cfg.h" \ + "$hdrdir/include/linux/fuse.h" \ + "$hdrdir/include/linux/input.h" \ + "$hdrdir/include/linux/input-event-codes.h" \ + "$hdrdir/include/linux/udmabuf.h" \ + "$hdrdir/include/linux/pci_regs.h" \ + "$hdrdir/include/linux/ethtool.h" \ + "$hdrdir/include/linux/const.h" \ + "$hdrdir/include/linux/kernel.h" \ + "$hdrdir/include/linux/vhost_types.h" \ + "$hdrdir/include/linux/sysinfo.h" \ + "$hdrdir/include/misc/pvpanic.h"; do cp_portable "$i" "$output/include/standard-headers/linux" done mkdir -p "$output/include/standard-headers/drm" -cp_portable "$tmpdir/include/drm/drm_fourcc.h" \ +cp_portable "$hdrdir/include/drm/drm_fourcc.h" \ "$output/include/standard-headers/drm" cat <$output/include/standard-headers/linux/types.h From patchwork Tue May 14 17:42:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796751 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611620wra; Tue, 14 May 2024 10:45:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUYKtkldcZMa3NfKgTcaFlV7jfN+EMoSi4uI55PyGX/hg9no+cCP6BKuqkrhFegn+59NDZCJ5hE1W+QRz1gLTxv X-Google-Smtp-Source: AGHT+IFpAFAupuhi6BcVBb0kMTd1WCrh9r61qcJxBDp4WTOZdMh1dL0oJ3z4jjqohEGPGVXjPRgA X-Received: by 2002:a9d:5d06:0:b0:6f0:3ab5:7c6b with SMTP id 46e09a7af769-6f0e92ebdc5mr13120416a34.34.1715708739350; Tue, 14 May 2024 10:45:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708739; cv=none; d=google.com; s=arc-20160816; b=pCXyFt95hIJXM8zQSAdlOkJlemMTygggAPrDGTaPegpfY4rpseeHnhdtbASKqRuq2Q z8fQh4EHRldR9RsuVHD3ixO/rspWGmsCtiOi2AACMHEORQSaH0cw5ZIHtQYGlao1cfbQ eAlBm88u68a2CunKgZ/OEpZQ1M5XgU3Zbw+lvE0WUDWDlLa3Jx9xMYnWFnMHP36U6kU6 L0nmhq8hYaNbkByDHBHrIYvCRezv3Fp3QztMEjVblo0J9Rt9qADenpHXB3UVjVZ+FKuK TLyFdNASTxX+PoGfLr6qI6507rtLnMp0KVUIRFS0Vw0DNKVnatUcvuPBwxqk8o4GA9uq go+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zexNE7+uW9d8NGaakrN2CoV9FHrOXshpTBEtpvAtcDk=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=t158JHT/6zPGnm580kv1mFa4QwCyRy8qIQZxPjLXRn8bXflg9+BWz+8hXnuKn3eMyq k3Yp5yzQ6/cEBlg6tj8VDnDAIw0KkPsYEUlaGcrMRK/a+BTdqsrAFhx72HMuDWyoxulL BIj61z09b/S9Ccw9WL29FmG/QZwTmTowuS2/2z391+NqCKh8cdnUmzSujrvS7omovl/z GixxaNhffrG0q6TQKjWSz+34PlvmTk+Wpzf/hZTOF/gASuawhh0Y1sz4itJDg7We2R+K 6CpHGCjQMln2jEtM4NC0yYtiRtdqogchQeKwo1sFnzMK6KxPgnV7bWoZpTLhv98OQggY wreA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=k2TCqUdL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-43df56c5630si121239511cf.623.2024.05.14.10.45.39 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:45:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=k2TCqUdL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBq-00050D-Cn; Tue, 14 May 2024 13:43:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBP-0004pv-IE for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:29 -0400 Received: from mail-ej1-x62b.google.com ([2a00:1450:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wB4-0004tI-UZ for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:18 -0400 Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-a59a5f81af4so53742666b.3 for ; Tue, 14 May 2024 10:42:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708577; x=1716313377; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zexNE7+uW9d8NGaakrN2CoV9FHrOXshpTBEtpvAtcDk=; b=k2TCqUdLVAnTNyysHznG7uoK+s7XR0QBP1CMF/bv9CDfQGR5Eqe1YNC5tZeq12Ruqf 1a3vOmnR2KPBh7HszGWEQVLGDmq3zIxHw1CE1Zq9FafANmxWm8f2jswbXXmaa5hWGXzu QfEA1x5ecaWk561lqdDSC879MUI4F3CPSon6C+aiAjL9jTxRN830NKuyjYPc3jrbnrzU xCTkGhmfMqUwXM+slJqX2KyvP+AA/7eIBRQ9Is32/f+7xsJhz4NCgYWuGGMfNc0Id7+u PfGIZB96NwocyoCNLCgdaVyjePGBPDrczAuO3hiUgxqJ3MDAUCdY4Y99n+l+UzYCGJGM xKGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708577; x=1716313377; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zexNE7+uW9d8NGaakrN2CoV9FHrOXshpTBEtpvAtcDk=; b=QIgyOgcqqs+x0/+ZA633KdsL16IxgV97byE9BnA52whp8WQwIfEjI2B/rJ1VYif1B9 0yMI/yRv603+Dn53zjnoBy0qHqfsgyg65en8XVjJ1JqROp0MaXqqjHLCBWFFYkLhJJYx /jNIhjtpRSvun9tNgHOiflq+xwEpuOY2EkDRVLV1OEw5MnbSyJtnGpP24NXXyfyO36VG HEon+6Y+bI+O7Cyyn9cA3sQGaTRVwMk+zAlPt2fvORD5R896dBtp7xYCLroA1xqCx5UV c6CVpEFiyYMXiGqGxIr38FeoUfhDj9NJ08Ut+SU67o/H4EiERvlU37077sz6nUvB62D8 b5ew== X-Gm-Message-State: AOJu0YwYMtSHBwxZxNstmw16ys9Z74Z1yNgzJ3hud45n5OsV5XjWXbPq S0M/pP1Gj4EjUqlTMlJUy0e7wZyJJmsWGLGWCPauM7+4fdcqVKTSWNxF612aG/8= X-Received: by 2002:a17:906:6bd8:b0:a59:a977:a157 with SMTP id a640c23a62f3a-a5a2d6a38f6mr991890066b.73.1715708576681; Tue, 14 May 2024 10:42:56 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a51eea36dsm493937566b.58.2024.05.14.10.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:54 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 373635FA1A; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 03/11] plugins: prepare introduction of new inline ops Date: Tue, 14 May 2024 18:42:45 +0100 Message-Id: <20240514174253.694591-4-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Until now, only add_u64 was available, and all functions assumed this or were named uniquely. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-2-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- include/qemu/plugin.h | 2 +- accel/tcg/plugin-gen.c | 6 +++--- plugins/core.c | 14 ++++++++++++-- 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index b535bfd5de..93da98b76c 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -69,7 +69,7 @@ union qemu_plugin_cb_sig { enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, PLUGIN_CB_MEM_REGULAR, - PLUGIN_CB_INLINE, + PLUGIN_CB_INLINE_ADD_U64, }; /* diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 49f5d1c2e4..4069d51daf 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -113,7 +113,7 @@ static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_i32(cpu_index); } -static void gen_inline_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) { GArray *arr = cb->inline_insn.entry.score->data; size_t offset = cb->inline_insn.entry.offset; @@ -158,8 +158,8 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_REGULAR: gen_udata_cb(cb); break; - case PLUGIN_CB_INLINE: - gen_inline_cb(cb); + case PLUGIN_CB_INLINE_ADD_U64: + gen_inline_add_u64_cb(cb); break; default: g_assert_not_reached(); diff --git a/plugins/core.c b/plugins/core.c index 1e58a57bf1..59771eda8f 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -316,6 +316,16 @@ static struct qemu_plugin_dyn_cb *plugin_get_dyn_cb(GArray **arr) return &g_array_index(cbs, struct qemu_plugin_dyn_cb, cbs->len - 1); } +static enum plugin_dyn_cb_type op_to_cb_type(enum qemu_plugin_op op) +{ + switch (op) { + case QEMU_PLUGIN_INLINE_ADD_U64: + return PLUGIN_CB_INLINE_ADD_U64; + default: + g_assert_not_reached(); + } +} + void plugin_register_inline_op_on_entry(GArray **arr, enum qemu_plugin_mem_rw rw, enum qemu_plugin_op op, @@ -326,7 +336,7 @@ void plugin_register_inline_op_on_entry(GArray **arr, dyn_cb = plugin_get_dyn_cb(arr); dyn_cb->userp = NULL; - dyn_cb->type = PLUGIN_CB_INLINE; + dyn_cb->type = op_to_cb_type(op); dyn_cb->rw = rw; dyn_cb->inline_insn.entry = entry; dyn_cb->inline_insn.op = op; @@ -551,7 +561,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, cb->regular.f.vcpu_mem(cpu->cpu_index, make_plugin_meminfo(oi, rw), vaddr, cb->userp); break; - case PLUGIN_CB_INLINE: + case PLUGIN_CB_INLINE_ADD_U64: exec_inline_op(cb, cpu->cpu_index); break; default: From patchwork Tue May 14 17:42:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796744 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611040wra; Tue, 14 May 2024 10:44:02 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW4KshbmZZwMr/5wABc0g1oDH8yOTR0eycJZpD4k4kffDESsreRl1GnmNqn55qCk715HIDuJWO2xjT+Dzz4KXP/ X-Google-Smtp-Source: AGHT+IENPFt87WtA+XZphzvXqxOyitezekjkEmT49yxeQIHqdbSG7k6yE/hkddbvCakbJrmEOu+3 X-Received: by 2002:a05:622a:105:b0:43d:e8cb:e283 with SMTP id d75a77b69052e-43dfd9e0345mr161304471cf.0.1715708642241; Tue, 14 May 2024 10:44:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708642; cv=none; d=google.com; s=arc-20160816; b=VWXbGVxEA4coMs9uG7UcOaFUMeG3FLnBOtprQBr8uuCNoIZVI5b8ZnPkpao+ShCtp5 3bqfdTz+lW2Cl/4yaarBAOR6dw7Wx8k1HQLVMVGGiXwySEdc8syimMO1XD494VZX7u5+ Na7NZp6H1mBU/l6ZyU1srpUIjj752pi9iI77ZLQzoPIgfIkHatbMtdVWN08D34Ki1xpD qgsxFR0lW/tAw9Y1cnhIXB+uG5MwhD4QTNKaiIsBQR5rFO/C6jNSaz/ul0DqJaiNChrM dNrdrpV5RuDefnI9/9/TgJZXU4+45hmBgx4hY2WPK6aqKqvrLAsJ856JsvrWIRGAqCrm nBLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=twX/8e3VB4vFn+Ywb8v/U/pjCAfPckcQOZEEgaIZtXs=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=GHgcKpjn36beBO2POmFS1h6jnSpjZJBk94H9fC7lPUMIDf6evCN3EmKZSSMl8iNhgC pcYIofUl8pqcZq1XQJeL0blBbDq2LIsteZSwM/33zM/iI+4C97Ld5Sf0l6hGW3Z90wPP JeCbchL7xfs8lESN9iVBUMHBtEqY7sHkWxizatS4pAACKS7fpSCdpzldT4aK4RAJYi2B edeg+Cs2qF5xjrzuBE5g/RuZ3nczRebDdg3msJVIAEGtpnuGkI3iD2r0sZmGUbaGvjI6 0T5AU//ZVrfZCRZPPRlU0u2q0KM7LvorzNG3p9qYzvq6vmExnUyfALDW+CREvoVXuOqH R0Ow==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Lnin70D6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-43df549c742si122429591cf.119.2024.05.14.10.44.02 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:44:02 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Lnin70D6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBq-00050d-LF; Tue, 14 May 2024 13:43:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBY-0004s3-8v for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:39 -0400 Received: from mail-ed1-x529.google.com ([2a00:1450:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wBH-0004td-8X for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:24 -0400 Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-56e69888a36so545771a12.3 for ; Tue, 14 May 2024 10:42:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708578; x=1716313378; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=twX/8e3VB4vFn+Ywb8v/U/pjCAfPckcQOZEEgaIZtXs=; b=Lnin70D690uYXX73jV5V8DKsFcZiZEOwc2XmpzfPPmtgTDW+YY1O0vsDJUbabfsn8E TC/a//OFE8wwiOdRSM2WFzT4lVCww+9OgfqFB1Sq7xw/LdtN2aaCdNkI0uVPEYErH0iQ 3+pGFI+yZx1UmRikp6HNZaVp0qEdUWW4T99KG28vqtlbej4SfXaeDcoVe5uq2FflaPpQ AHIcLl4Qcd3Korw1Y4e2ZhI6Hx/CT0qFaGI3kVJXOs0DhPLZLR2tgcJNQpyuoQG1UR06 D6gzLrtV9lQkWvcB59uHcyXE4M4WkRUMHdW4VCLn7uIbuTvMjy1zjxs8vBX3iMWBLv/L pNNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708578; x=1716313378; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=twX/8e3VB4vFn+Ywb8v/U/pjCAfPckcQOZEEgaIZtXs=; b=wYbLcP229itou4MPXH33YWHOvzkBJQbEbJ5nvMztDsMDHXCVq07Pb7+HDEDbpQlFFp svCwTMApuKe9DYnavnhJ+Uv+tVCKc80ulbQBlb9dvKsLPvVGpybi5yQwAXuf4WhknxM6 N2MGqhKv+PneXyCUFTzDonA8H0lQzCICdzZqNDBjq0ZC8kDQ/tL3KAwzdb8nzVGNLnaw p5dV3x1i5vGhTcanTkqx7UwZits4/Yjlo+LbMDlHSv6Ea81VH+0NXf0X6tLyMp3ry78f OC5Z48+TFxBZV2NatT7qDFh0F/zx1mgH/xQ389PpROPoTS2YrsdBaVmrRvAFcqoqbrke NiPQ== X-Gm-Message-State: AOJu0YwWX75ynRq8RN5qi8/CEBiD/pfN4XZMXctfF9LQscoqfLzeEr6I sALDC+4TgJ8eHfuIvCMvXF/h5AWL66rt0GzfR+QYu1ffqym1Ql/lWWn9/vMj/h4= X-Received: by 2002:a50:aa94:0:b0:572:a731:dd14 with SMTP id 4fb4d7f45d1cf-5734d6edacemr9923609a12.28.1715708578095; Tue, 14 May 2024 10:42:58 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-574d8f5501esm1666982a12.75.2024.05.14.10.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:56 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 4D8C45FA1B; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 04/11] plugins: extract generate ptr for qemu_plugin_u64 Date: Tue, 14 May 2024 18:42:46 +0100 Message-Id: <20240514174253.694591-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Plugin operations can access a scoreboard. This function factorizes code generation for accessing entry associated to a given vcpu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-3-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- accel/tcg/plugin-gen.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 4069d51daf..97868781fe 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -113,24 +113,33 @@ static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_i32(cpu_index); } -static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) { - GArray *arr = cb->inline_insn.entry.score->data; - size_t offset = cb->inline_insn.entry.offset; - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - TCGv_i64 val = tcg_temp_ebb_new_i64(); TCGv_ptr ptr = tcg_temp_ebb_new_ptr(); + GArray *arr = entry.score->data; + char *base_ptr = arr->data + entry.offset; + size_t entry_size = g_array_get_element_size(arr); + + TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - tcg_gen_muli_i32(cpu_index, cpu_index, g_array_get_element_size(arr)); + tcg_gen_muli_i32(cpu_index, cpu_index, entry_size); tcg_gen_ext_i32_ptr(ptr, cpu_index); tcg_temp_free_i32(cpu_index); + tcg_gen_addi_ptr(ptr, ptr, (intptr_t) base_ptr); + + return ptr; +} + +static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_i64 val = tcg_temp_ebb_new_i64(); - tcg_gen_addi_ptr(ptr, ptr, (intptr_t)arr->data); - tcg_gen_ld_i64(val, ptr, offset); + tcg_gen_ld_i64(val, ptr, 0); tcg_gen_addi_i64(val, val, cb->inline_insn.imm); - tcg_gen_st_i64(val, ptr, offset); + tcg_gen_st_i64(val, ptr, 0); tcg_temp_free_i64(val); tcg_temp_free_ptr(ptr); From patchwork Tue May 14 17:42:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796749 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611430wra; Tue, 14 May 2024 10:45:15 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVfV8u1qgjkJN/k6HkLaoRzwu6dSOGObG59WUyuUo1qyM/pfldnTpYbNMU7OXOMO3JbV88iSRKwbfVB7vlWqK3U X-Google-Smtp-Source: AGHT+IGNn1RH2gCFAXTCbhg1Z21aBQ6kiZZ9PeXaYGLj2ncn0yujFy1l46ReXA1CX0cipafXTWos X-Received: by 2002:a05:622a:1109:b0:43a:ee41:f581 with SMTP id d75a77b69052e-43dfdba95eemr141598681cf.57.1715708714961; Tue, 14 May 2024 10:45:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708714; cv=none; d=google.com; s=arc-20160816; b=rXdlqX3jbVnfeTTR6o92siBLTQ0nKRN3rFJBTExAW3jBtfhOLc9b/otZiia9mkcpOS yMuJUSGGDNek5LG07QUE03a4b8evt9lyiuMKYmaPya4iAyzmCeQVOpEMvVwAk1xU++Px iB5PVfmYGXYdNYfrsF4RxoY+E5xVG4gopDkydN4gWk4iS5pG36mDtF82QAaMl4tkRbFy xUM2uoLmzpheiJ7/OLIAZA0wJYftfW4llUsbmpGHf3h0EbXfcjX9oK4niaJoXzcF0lAH iyRN2rekbrWPl6z6LtXrw016faG5kQN+06eCvODM6MEJ2ioucXdZhm7c/lgR4+loJ6Vb FOWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/zg7uO0Rw5DQZHLZd3hROnnvwozpRBqkVuZQLTUMEUA=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=JdMEWmYkBNh42tyE9zx2df3m5DbV9CmsWqo7hp+tJoSz1n0oVRDQtZyb95R7UBRcVX hesM0A/3FQpZvH17hEvfMFAJSco6BEE/GtWwZ3BtyKLTGW79QqFunY9Yl0uYk0bPao95 vHj621m/65wiH5P6vGnx0htIlNF3zokt0oo1W+u6V/ACNgtgxIvVLzyYUXfpaY7wLwPg htNgJ33LCkUf0eDQrMWyY1OoFaE2bH0djLZcU7ACsCLe8GVmg+bIWVORQqiAn1IZVRjY hUEbZSVQ9anVr7DJVyT5KIqp4nf1TavXaUlbYrshS0G7ynvBBBCvJctRe9CpNmP038N6 K8IQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=myzcTwcQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-43e0d0a6585si72682621cf.186.2024.05.14.10.45.14 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:45:14 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=myzcTwcQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBo-0004yf-7s; Tue, 14 May 2024 13:43:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBY-0004s2-8l for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:39 -0400 Received: from mail-lf1-x135.google.com ([2a00:1450:4864:20::135]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wBN-0004tg-Dk for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:24 -0400 Received: by mail-lf1-x135.google.com with SMTP id 2adb3069b0e04-51ffff16400so9766354e87.2 for ; Tue, 14 May 2024 10:43:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708578; x=1716313378; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/zg7uO0Rw5DQZHLZd3hROnnvwozpRBqkVuZQLTUMEUA=; b=myzcTwcQqS+F1Kj28V6Zh/ZflK3ZgAQiq/9KRfwFLuGllEjtqAN/I2zItqC6do1hot u2JoO4Ie90PcXAksKjqS+UcuEg532qUdbyaNnWwRzzDa3l3KgD3DyX7sOUKCmbE0RRGW RWAlsq4Nvt33LkfZ4ClHgBDtEvu0oFv6OpXchWtmNOWVzjNpmhpRC7MbiMlk7tS6bblO QHiCwkcw+mz2bblGsXbVxhrHJtDGcCu00y22HZGjQHJmR9FKdOlEBT6W1KA1FIIqDePl CCnWBJT8KJ5aXirOHmO8BW1/Xp3zUkIpeF811lZY/lL1w/Iouo7DohB3Hm2L8S5ffskw 77Rw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708578; x=1716313378; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/zg7uO0Rw5DQZHLZd3hROnnvwozpRBqkVuZQLTUMEUA=; b=HOzAyf1hA48D371iXTHxYXy6gZ7HZQPeK4qJFW1oeTuvwzdn4KrRswS1joBp/PW0UN BTB5cy1cQgCCUyuTAnd8d2AKPw+8ezPrIDxG67DNiqzAKTXvRetYYD89068AxvNLK/fy qpbYAkxWbhBVGFl4jKUBSSoTWFTdnYrhuWPYVk99PQw+IaZcd1j2D37W1FaaZRbDFUxI 1VPtD/+zfRVM7hL5sKeK4tQmYZsNk79P411jLHZqyRopfCY3vjcZSesj7UikNdli/8te E7hD1AM7aCDbLUumxt6wPgEVHjfq7R1C9PUzip89puLJZmrF0W5N4mlsc80Chz5qyGxU eIAQ== X-Gm-Message-State: AOJu0YwOkA2KXQ6fK3lK5cjamoowZjiqd0uXXNCLj1Q8GND4Pcp7xWll z/sUsleehViNJ5+szGE9vluoMp7NKJPvJcb0HXUuczU5go7xVOkl8uOCvxToe7c= X-Received: by 2002:ac2:4a84:0:b0:51d:9aa7:23e with SMTP id 2adb3069b0e04-52210475801mr10982112e87.65.1715708578415; Tue, 14 May 2024 10:42:58 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a17b0125bsm755843566b.143.2024.05.14.10.42.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:56 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 66CF15FA1C; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 05/11] plugins: add new inline op STORE_U64 Date: Tue, 14 May 2024 18:42:47 +0100 Message-Id: <20240514174253.694591-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier This new operation can store an immediate u64 value to a given scoreboard. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- include/qemu/plugin.h | 1 + include/qemu/qemu-plugin.h | 4 ++-- accel/tcg/plugin-gen.c | 13 +++++++++++++ plugins/core.c | 6 ++++++ 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 93da98b76c..6c21a30105 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -70,6 +70,7 @@ enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, PLUGIN_CB_MEM_REGULAR, PLUGIN_CB_INLINE_ADD_U64, + PLUGIN_CB_INLINE_STORE_U64, }; /* diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index 4fc6c3739b..c5cac897a0 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -305,12 +305,12 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_plugin_tb *tb, * enum qemu_plugin_op - describes an inline op * * @QEMU_PLUGIN_INLINE_ADD_U64: add an immediate value uint64_t - * - * Note: currently only a single inline op is supported. + * @QEMU_PLUGIN_INLINE_STORE_U64: store an immediate value uint64_t */ enum qemu_plugin_op { QEMU_PLUGIN_INLINE_ADD_U64, + QEMU_PLUGIN_INLINE_STORE_U64, }; /** diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 97868781fe..88976289eb 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -145,6 +145,16 @@ static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_ptr(ptr); } +static void gen_inline_store_u64_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_i64 val = tcg_constant_i64(cb->inline_insn.imm); + + tcg_gen_st_i64(val, ptr, 0); + + tcg_temp_free_ptr(ptr); +} + static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { @@ -170,6 +180,9 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_INLINE_ADD_U64: gen_inline_add_u64_cb(cb); break; + case PLUGIN_CB_INLINE_STORE_U64: + gen_inline_store_u64_cb(cb); + break; default: g_assert_not_reached(); } diff --git a/plugins/core.c b/plugins/core.c index 59771eda8f..848d482fc4 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -321,6 +321,8 @@ static enum plugin_dyn_cb_type op_to_cb_type(enum qemu_plugin_op op) switch (op) { case QEMU_PLUGIN_INLINE_ADD_U64: return PLUGIN_CB_INLINE_ADD_U64; + case QEMU_PLUGIN_INLINE_STORE_U64: + return PLUGIN_CB_INLINE_STORE_U64; default: g_assert_not_reached(); } @@ -535,6 +537,9 @@ void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) case QEMU_PLUGIN_INLINE_ADD_U64: *val += cb->inline_insn.imm; break; + case QEMU_PLUGIN_INLINE_STORE_U64: + *val = cb->inline_insn.imm; + break; default: g_assert_not_reached(); } @@ -562,6 +567,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, vaddr, cb->userp); break; case PLUGIN_CB_INLINE_ADD_U64: + case PLUGIN_CB_INLINE_STORE_U64: exec_inline_op(cb, cpu->cpu_index); break; default: From patchwork Tue May 14 17:42:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796754 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2612153wra; Tue, 14 May 2024 10:47:07 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUFJlLZhHxoxSZBqu6u5OA2m/0ReYnDb/4Jv32GyHnToRieXrFImV+bcPS4jSyFjc7accgQDS79tgCZt/nxJju0 X-Google-Smtp-Source: AGHT+IEe2LHfzLyZsgQcrxY+hyO16Kjplbk37hERFk8chdM3aYY78OIYEtXlCwUXUiskzID2r9PR X-Received: by 2002:a05:620a:248c:b0:790:c15b:e192 with SMTP id af79cd13be357-792bbe66992mr2876004985a.32.1715708827591; Tue, 14 May 2024 10:47:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708827; cv=none; d=google.com; s=arc-20160816; b=fSvUGS7wKvUAygYwiGDebXqSe5s3aK2qtDMlHu/mhrP49+8R0la+aftBUmsgRqK/36 PzUBpR+AbECjppauLxv9y+ipdOYSKWSl0lRteVecrJ/m2ZBH+5Kz2nzpOrvmlAMfu21c /pbW18qfaGE0zavZHiqL9mxEMihKB2O52jBeoHcMGmnluJyNTITIifMjH1CmglQvRo79 Zu44767WCl/YaE40MpnTetbZQVA/t612amRMrHRy+G3VuYvjAsp7P6GVEWEGXe/L0gDh Z9FBFOuJvwJ+M/Ux5u3AWR04XthQ1Yoab7aCuUe1Op87ATLd1f47onWj7nJSWFvLAzbh kLTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FZhvGQJLCzvceDPyZ67XElIegSjy3JPT1fqbqptrVHU=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=0rcoP+cUblVQ0G5KNrxaHFKHJIJySRE7vvzVh4WzzVnqkItNI1XASIrfsdbXR9rOEZ xiAzGCRCfK4VDGbflq9pT8ht6Udvl2vWxlQ0uu4nxgOG45xn5yF7ec8apKpBe5mneXFO ug+dEaDVeNeVdvZ7x6CV9WbPm56y6Jd7DZbBu3dx5Optozw9+3DYOxDfXE1LT+VxecDB 1/0uUmdjlMGY3NdNuxV6IZ5bUDQTlvLo6JrhAMR/UJ8ggS/td3g97qoAZ4txBwXGY+tb SgHqfXDRkdulinrDde2DwywQ4yzirvxbsav9yZFxsFEyOfVM7OLT/UKfvoMCj7U7TVVg O8NA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QH6n3tAa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-792bf38efd8si1176723185a.759.2024.05.14.10.47.07 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:47:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QH6n3tAa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBr-00050i-La; Tue, 14 May 2024 13:43:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBh-0004u4-GO for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:43 -0400 Received: from mail-lf1-x129.google.com ([2a00:1450:4864:20::129]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wBY-0004u1-1O for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:40 -0400 Received: by mail-lf1-x129.google.com with SMTP id 2adb3069b0e04-51f71e4970bso7001363e87.2 for ; Tue, 14 May 2024 10:43:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708580; x=1716313380; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FZhvGQJLCzvceDPyZ67XElIegSjy3JPT1fqbqptrVHU=; b=QH6n3tAa51o7Sa6+MDixlnPUCQsw92AKi0Y26I+lobhnEbBuOj/QGdgmi3JIXwLktN a7IXnErjRfYBKDgKgyox2mNBO0rdJnuUc6Vr7yDAKkKPaRI5LKVl9uM688KMtcrSgfBb ie8KLPtQeNocgAaKqtNZ3LDNkeIAVy1sZOQZSOX54yNQd2ZkjF1WBv9NTJgWye4LQkFK clUf4Jjqip7yJTuLTEH7Wic7rzxa6tHO+Z6lnDJkP+kNcJKxOizgK4l6hjmfk4RUiXBY /zd3p9UwnQFvTpds0rCuznkbCKIno2KKET5OpGFHfkeratxbjAoDGiVoB77kV7zDNUmV 1BzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708580; x=1716313380; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FZhvGQJLCzvceDPyZ67XElIegSjy3JPT1fqbqptrVHU=; b=PABq63bzTkPMwuCG7LlzhajCGF6PlbSobRyEDzYH/08E7eBNv8P9sABShLcHoNmXBC 4PNGuSDlBYn1icyd8Jezt/PTbL3GoQ8guLFK2fX46X2dXxumwKZtLqCwr5FXJUOh+wMW LgetmJB3q7+GoYhnsT5dKuNiSty5HLDbSCxCm6iGzOnNQyUyhEF/JWDyJb/2ab9OLIKd 4kEwLD2AVxhv64Om3eqIhmjLhZWBK51/HZrwCZKWJ+nqiEdz38j4PrCxU4loQFExawwm DNZzfs73bDVo6VGm0n+9Vt18LldYcfmTtenZ5dNis5eZBoj8cysq8rRY1G7xjoz42iNB W+sQ== X-Gm-Message-State: AOJu0Yyhv7RcffTYemm/NW7J7xbshleb09SXtFeHUg6NGEXWe6panEDU DJbSiuJdtWuaOmPRmBIzStutxeawLGU1pd/T1cLBZDiIGvJpAYawwYIMrrS414X8f1ffyy3PyVJ s7Vk= X-Received: by 2002:a05:6512:e81:b0:518:c69b:3a04 with SMTP id 2adb3069b0e04-5220f770e6dmr13898358e87.0.1715708579748; Tue, 14 May 2024 10:42:59 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a1781cf7bsm741293766b.40.2024.05.14.10.42.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:56 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 7E0885FA28; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 06/11] tests/plugin/inline: add test for STORE_U64 inline op Date: Tue, 14 May 2024 18:42:48 +0100 Message-Id: <20240514174253.694591-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::129; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x129.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- tests/plugin/inline.c | 41 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 37 insertions(+), 4 deletions(-) diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c index 0163e9b51c..103c3a22f6 100644 --- a/tests/plugin/inline.c +++ b/tests/plugin/inline.c @@ -22,6 +22,12 @@ typedef struct { uint64_t count_mem_inline; } CPUCount; +typedef struct { + uint64_t data_insn; + uint64_t data_tb; + uint64_t data_mem; +} CPUData; + static struct qemu_plugin_scoreboard *counts; static qemu_plugin_u64 count_tb; static qemu_plugin_u64 count_tb_inline; @@ -29,6 +35,10 @@ static qemu_plugin_u64 count_insn; static qemu_plugin_u64 count_insn_inline; static qemu_plugin_u64 count_mem; static qemu_plugin_u64 count_mem_inline; +static struct qemu_plugin_scoreboard *data; +static qemu_plugin_u64 data_insn; +static qemu_plugin_u64 data_tb; +static qemu_plugin_u64 data_mem; static uint64_t global_count_tb; static uint64_t global_count_insn; @@ -109,11 +119,13 @@ static void plugin_exit(qemu_plugin_id_t id, void *udata) stats_mem(); qemu_plugin_scoreboard_free(counts); + qemu_plugin_scoreboard_free(data); } static void vcpu_tb_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_tb, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_tb, cpu_index) == (uintptr_t) udata); g_mutex_lock(&tb_lock); max_cpu_index = MAX(max_cpu_index, cpu_index); global_count_tb++; @@ -123,6 +135,7 @@ static void vcpu_tb_exec(unsigned int cpu_index, void *udata) static void vcpu_insn_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_insn, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_insn, cpu_index) == (uintptr_t) udata); g_mutex_lock(&insn_lock); global_count_insn++; g_mutex_unlock(&insn_lock); @@ -131,9 +144,10 @@ static void vcpu_insn_exec(unsigned int cpu_index, void *udata) static void vcpu_mem_access(unsigned int cpu_index, qemu_plugin_meminfo_t info, uint64_t vaddr, - void *userdata) + void *udata) { qemu_plugin_u64_add(count_mem, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_mem, cpu_index) == (uintptr_t) udata); g_mutex_lock(&mem_lock); global_count_mem++; g_mutex_unlock(&mem_lock); @@ -141,20 +155,34 @@ static void vcpu_mem_access(unsigned int cpu_index, static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) { + void *tb_store = tb; + qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( + tb, QEMU_PLUGIN_INLINE_STORE_U64, data_tb, (uintptr_t) tb_store); qemu_plugin_register_vcpu_tb_exec_cb( - tb, vcpu_tb_exec, QEMU_PLUGIN_CB_NO_REGS, 0); + tb, vcpu_tb_exec, QEMU_PLUGIN_CB_NO_REGS, tb_store); qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( tb, QEMU_PLUGIN_INLINE_ADD_U64, count_tb_inline, 1); for (int idx = 0; idx < qemu_plugin_tb_n_insns(tb); ++idx) { struct qemu_plugin_insn *insn = qemu_plugin_tb_get_insn(tb, idx); + void *insn_store = insn; + void *mem_store = (char *)insn_store + 0xff; + + qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( + insn, QEMU_PLUGIN_INLINE_STORE_U64, data_insn, + (uintptr_t) insn_store); qemu_plugin_register_vcpu_insn_exec_cb( - insn, vcpu_insn_exec, QEMU_PLUGIN_CB_NO_REGS, 0); + insn, vcpu_insn_exec, QEMU_PLUGIN_CB_NO_REGS, insn_store); qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( insn, QEMU_PLUGIN_INLINE_ADD_U64, count_insn_inline, 1); + + qemu_plugin_register_vcpu_mem_inline_per_vcpu( + insn, QEMU_PLUGIN_MEM_RW, + QEMU_PLUGIN_INLINE_STORE_U64, + data_mem, (uintptr_t) mem_store); qemu_plugin_register_vcpu_mem_cb(insn, &vcpu_mem_access, QEMU_PLUGIN_CB_NO_REGS, - QEMU_PLUGIN_MEM_RW, 0); + QEMU_PLUGIN_MEM_RW, mem_store); qemu_plugin_register_vcpu_mem_inline_per_vcpu( insn, QEMU_PLUGIN_MEM_RW, QEMU_PLUGIN_INLINE_ADD_U64, @@ -179,6 +207,11 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info, counts, CPUCount, count_insn_inline); count_mem_inline = qemu_plugin_scoreboard_u64_in_struct( counts, CPUCount, count_mem_inline); + data = qemu_plugin_scoreboard_new(sizeof(CPUData)); + data_insn = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_insn); + data_tb = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_tb); + data_mem = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_mem); + qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); From patchwork Tue May 14 17:42:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796746 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611280wra; Tue, 14 May 2024 10:44:50 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWifOlT1xxFDtU/DLlNAQWr9RFPTer+g6GfbzbTFw1uNrMUgSAHzGQ0OvoUhEH81m2VWwwC0e1mqdruBWzgaW/k X-Google-Smtp-Source: AGHT+IH0nMgqXolGC43H8fJH9yhibuF+GlcLyhPseJbaORPtHd1wVAKWhBpcvnyRhKEU1KLwTMHY X-Received: by 2002:a05:6808:4cb:b0:3c7:3b1d:bb59 with SMTP id 5614622812f47-3c997023d1amr14013855b6e.2.1715708690104; Tue, 14 May 2024 10:44:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708690; cv=none; d=google.com; s=arc-20160816; b=xvsjp6UO1wVZ2Y+eYoAyhxNlY7PwM5FWaKQzoGZT+uAkOy20WXQTmRRXMyiqovM+h0 zQO2sctcMHyaGPNL9Du2xCtbGkJuEpEoqFKZL5KmykSnABo5l2t7bFztL0G89QTTnpHE t3lwaHonGyo0yUOVxVrmYvrhGCL+oI2/LbrJCBaZVNqF4RyDglfn7i5DiETNM1rM0U/E /Ven1lEWhbgHHbltJLrMYHjzlFPRgUhiFmuPisplOwlahNB6tSy7I9CMK6WfxOFTVyun t0/gncEgh3WOLaiaCa5BNyFo2rm4OPiCPBlYp2PidDisOm16AU7/hMC6hiMnmZl59oak 6+/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=CpXGDrDaU3v8CuYey6WWvviUaP5ygTOXLMDZqxqwCIk=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=ejFqrXwpSvkkWB6y3nDhBmT7nYfpoIR77uDOSkE2q575x2YFD5iFFhdiG5iFynohDP b37LTasfcG8VqEdbvcoQF5K4xSGHW0GEkyKf6Ssv3zscL3vAbbwnmUn2x7a18Qtx5ZzY HxWh2PG4dpVme+mdMYUOY/3xIN6koQomst8P2IDPH7kj1y5wLZeM3OGpadrp5nxUUver mEtYwaPQNyszx3Kx7RguISrqBx8tKGCy0ks0M1jj0vZfGR60VD+yU6449SXCiufWm7Ho waBVWjl2GZ1V5Dmnzj2dHP3qQdhFGZJqpJ7+tqF0HYMjmviHmJP4MIlWU9Lcad/BJ0kI tm7A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uk8h7NHl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-792bf297440si1224935285a.176.2024.05.14.10.44.49 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:44:50 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uk8h7NHl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBn-0004yB-5C; Tue, 14 May 2024 13:43:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBh-0004u9-Ms for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:43 -0400 Received: from mail-lf1-x12f.google.com ([2a00:1450:4864:20::12f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wBY-0004uE-0e for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:41 -0400 Received: by mail-lf1-x12f.google.com with SMTP id 2adb3069b0e04-52388d9ca98so405718e87.0 for ; Tue, 14 May 2024 10:43:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708580; x=1716313380; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CpXGDrDaU3v8CuYey6WWvviUaP5ygTOXLMDZqxqwCIk=; b=uk8h7NHlUOXp2iYzbZ3MXFe07fa1Le7oxw8zuM2Rl3PmVRqNJ9whxAnFbwG/dFB5l/ JnmFo7ZLIRFwyjnN7kPxpJDKN/01X4V2naHPFUgbpFFQlsBATfivLsLYuxzu28AEp7HO UNejfjTkDoEBP8VM3laqnjO9rVXOe1+yh7GqL1iTnFweXBxX0PX5/v3DNzPvjHFBhRmz w0JEe+4LeDJ1Sp9A8K74E8+5cQ3TJ/FIyu9vqvZoVWZozAoHLKXhDHt2Nyz9julAwqgr 3Xu+MiMkdTQF13udhXDCRLy2yh/CLomJagAf+lpg+hy1l6xmQd4BcNIiECcpV8TEeaBb FeFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708580; x=1716313380; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CpXGDrDaU3v8CuYey6WWvviUaP5ygTOXLMDZqxqwCIk=; b=kwTi/cd5UIvvtyPvkoHtj4KeTFScOu73VhTu/VusUAnrKMZAespkv1A4j+6A//Vh7v gqk5yeZgS35tebc2sXA5bQe0JT5iFPfucC70bL+Ift0Jf4OXQNSQhH7WAaSm6ge31m52 Dsz/+s5VZTHWc50AUFkZ98oH0PzxeTlfZ/U0tj3LbuHQTeTDpWILTwLdZj5ssxkoiL15 jHjrcrRLeH7FKno96Swb8TYIpG29Ri5JGJky59RuBKVw78aeup7UM6AxFlW5DNTJu1oF Ar+QOocbvMO1nOAz6BT6RO/yq8LMAM7GvyT5uOtOO/lXcru7vqozR6P2Eydtp9gBGY22 z+Ww== X-Gm-Message-State: AOJu0YwjCGEpks+OW8r5+KgnXiaUT+1yRoN9OVOt0yRxci1W6Y4TOklL xnkNRoDs6F/CsSK2yfcM+NYPFjvqMwHDAM+gaPlbx5B4pKVSb3nU+rH6bOjKoNQ= X-Received: by 2002:a05:6512:3b0d:b0:523:1d16:6499 with SMTP id 2adb3069b0e04-5231d166ad2mr7688647e87.23.1715708580467; Tue, 14 May 2024 10:43:00 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a1781ce5dsm738431366b.42.2024.05.14.10.42.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:58 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 9BA235FA29; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 07/11] plugins: conditional callbacks Date: Tue, 14 May 2024 18:42:49 +0100 Message-Id: <20240514174253.694591-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12f; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x12f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Extend plugins API to support callback called with a given criteria (evaluated inline). Added functions: - qemu_plugin_register_vcpu_tb_exec_cond_cb - qemu_plugin_register_vcpu_insn_exec_cond_cb They expect as parameter a condition, a qemu_plugin_u64_t (op1) and an immediate (op2). Callback is called if op1 |cond| op2 is true. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-6-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- include/qemu/plugin.h | 8 ++++ include/qemu/qemu-plugin.h | 76 ++++++++++++++++++++++++++++++++++++ plugins/plugin.h | 8 ++++ accel/tcg/plugin-gen.c | 48 +++++++++++++++++++++++ plugins/api.c | 39 ++++++++++++++++++ plugins/core.c | 32 +++++++++++++++ plugins/qemu-plugins.symbols | 2 + 7 files changed, 213 insertions(+) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 6c21a30105..c7b3b1cd66 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -68,6 +68,7 @@ union qemu_plugin_cb_sig { enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, + PLUGIN_CB_COND, PLUGIN_CB_MEM_REGULAR, PLUGIN_CB_INLINE_ADD_U64, PLUGIN_CB_INLINE_STORE_U64, @@ -89,6 +90,13 @@ struct qemu_plugin_dyn_cb { union qemu_plugin_cb_sig f; TCGHelperInfo *info; } regular; + struct { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + qemu_plugin_u64 entry; + enum qemu_plugin_cond cond; + uint64_t imm; + } cond; struct { qemu_plugin_u64 entry; enum qemu_plugin_op op; diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index c5cac897a0..337de25ece 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -262,6 +262,29 @@ enum qemu_plugin_mem_rw { QEMU_PLUGIN_MEM_RW, }; +/** + * enum qemu_plugin_cond - condition to enable callback + * + * @QEMU_PLUGIN_COND_NEVER: false + * @QEMU_PLUGIN_COND_ALWAYS: true + * @QEMU_PLUGIN_COND_EQ: is equal? + * @QEMU_PLUGIN_COND_NE: is not equal? + * @QEMU_PLUGIN_COND_LT: is less than? + * @QEMU_PLUGIN_COND_LE: is less than or equal? + * @QEMU_PLUGIN_COND_GT: is greater than? + * @QEMU_PLUGIN_COND_GE: is greater than or equal? + */ +enum qemu_plugin_cond { + QEMU_PLUGIN_COND_NEVER, + QEMU_PLUGIN_COND_ALWAYS, + QEMU_PLUGIN_COND_EQ, + QEMU_PLUGIN_COND_NE, + QEMU_PLUGIN_COND_LT, + QEMU_PLUGIN_COND_LE, + QEMU_PLUGIN_COND_GT, + QEMU_PLUGIN_COND_GE, +}; + /** * typedef qemu_plugin_vcpu_tb_trans_cb_t - translation callback * @id: unique plugin id @@ -301,6 +324,32 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_plugin_tb *tb, enum qemu_plugin_cb_flags flags, void *userdata); +/** + * qemu_plugin_register_vcpu_tb_exec_cond_cb() - register conditional callback + * @tb: the opaque qemu_plugin_tb handle for the translation + * @cb: callback function + * @cond: condition to enable callback + * @entry: first operand for condition + * @imm: second operand for condition + * @flags: does the plugin read or write the CPU's registers? + * @userdata: any plugin data to pass to the @cb? + * + * The @cb function is called when a translated unit executes if + * entry @cond imm is true. + * If condition is QEMU_PLUGIN_COND_ALWAYS, condition is never interpreted and + * this function is equivalent to qemu_plugin_register_vcpu_tb_exec_cb. + * If condition QEMU_PLUGIN_COND_NEVER, condition is never interpreted and + * callback is never installed. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_tb_exec_cond_cb(struct qemu_plugin_tb *tb, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *userdata); + /** * enum qemu_plugin_op - describes an inline op * @@ -344,6 +393,33 @@ void qemu_plugin_register_vcpu_insn_exec_cb(struct qemu_plugin_insn *insn, enum qemu_plugin_cb_flags flags, void *userdata); +/** + * qemu_plugin_register_vcpu_insn_exec_cond_cb() - conditional insn execution cb + * @insn: the opaque qemu_plugin_insn handle for an instruction + * @cb: callback function + * @flags: does the plugin read or write the CPU's registers? + * @cond: condition to enable callback + * @entry: first operand for condition + * @imm: second operand for condition + * @userdata: any plugin data to pass to the @cb? + * + * The @cb function is called when an instruction executes if + * entry @cond imm is true. + * If condition is QEMU_PLUGIN_COND_ALWAYS, condition is never interpreted and + * this function is equivalent to qemu_plugin_register_vcpu_insn_exec_cb. + * If condition QEMU_PLUGIN_COND_NEVER, condition is never interpreted and + * callback is never installed. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_insn_exec_cond_cb( + struct qemu_plugin_insn *insn, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *userdata); + /** * qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu() - insn exec inline op * @insn: the opaque qemu_plugin_insn handle for an instruction diff --git a/plugins/plugin.h b/plugins/plugin.h index 7c34f23cfc..7d4b4e21f7 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -93,6 +93,14 @@ plugin_register_dyn_cb__udata(GArray **arr, qemu_plugin_vcpu_udata_cb_t cb, enum qemu_plugin_cb_flags flags, void *udata); +void +plugin_register_dyn_cond_cb__udata(GArray **arr, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata); void plugin_register_vcpu_mem_cb(GArray **arr, void *cb, diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 88976289eb..f2190f3511 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -132,6 +132,51 @@ static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) return ptr; } +static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_cond cond) +{ + switch (cond) { + case QEMU_PLUGIN_COND_EQ: + return TCG_COND_EQ; + case QEMU_PLUGIN_COND_NE: + return TCG_COND_NE; + case QEMU_PLUGIN_COND_LT: + return TCG_COND_LTU; + case QEMU_PLUGIN_COND_LE: + return TCG_COND_LEU; + case QEMU_PLUGIN_COND_GT: + return TCG_COND_GTU; + case QEMU_PLUGIN_COND_GE: + return TCG_COND_GEU; + default: + /* ALWAYS and NEVER conditions should never reach */ + g_assert_not_reached(); + } +} + +static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->cond.entry); + TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); + TCGv_i64 val = tcg_temp_ebb_new_i64(); + TCGLabel *after_cb = gen_new_label(); + + /* Condition should be negated, as calling the cb is the "else" path */ + TCGCond cond = tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond.cond)); + + tcg_gen_ld_i64(val, ptr, 0); + tcg_gen_brcondi_i64(cond, val, cb->cond.imm, after_cb); + tcg_gen_ld_i32(cpu_index, tcg_env, + -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + tcg_gen_call2(cb->cond.f.vcpu_udata, cb->cond.info, NULL, + tcgv_i32_temp(cpu_index), + tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + gen_set_label(after_cb); + + tcg_temp_free_i64(val); + tcg_temp_free_i32(cpu_index); + tcg_temp_free_ptr(ptr); +} + static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) { TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); @@ -177,6 +222,9 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_REGULAR: gen_udata_cb(cb); break; + case PLUGIN_CB_COND: + gen_udata_cond_cb(cb); + break; case PLUGIN_CB_INLINE_ADD_U64: gen_inline_add_u64_cb(cb); break; diff --git a/plugins/api.c b/plugins/api.c index 2144da1fe8..bfab72610c 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -96,6 +96,25 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_plugin_tb *tb, } } +void qemu_plugin_register_vcpu_tb_exec_cond_cb(struct qemu_plugin_tb *tb, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + if (cond == QEMU_PLUGIN_COND_NEVER || tb->mem_only) { + return; + } + if (cond == QEMU_PLUGIN_COND_ALWAYS) { + qemu_plugin_register_vcpu_tb_exec_cb(tb, cb, flags, udata); + return; + } + plugin_register_dyn_cond_cb__udata(&tb->cbs, cb, flags, + cond, entry, imm, udata); +} + void qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( struct qemu_plugin_tb *tb, enum qemu_plugin_op op, @@ -117,6 +136,26 @@ void qemu_plugin_register_vcpu_insn_exec_cb(struct qemu_plugin_insn *insn, } } +void qemu_plugin_register_vcpu_insn_exec_cond_cb( + struct qemu_plugin_insn *insn, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + if (cond == QEMU_PLUGIN_COND_NEVER || insn->mem_only) { + return; + } + if (cond == QEMU_PLUGIN_COND_ALWAYS) { + qemu_plugin_register_vcpu_insn_exec_cb(insn, cb, flags, udata); + return; + } + plugin_register_dyn_cond_cb__udata(&insn->insn_cbs, cb, flags, + cond, entry, imm, udata); +} + void qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( struct qemu_plugin_insn *insn, enum qemu_plugin_op op, diff --git a/plugins/core.c b/plugins/core.c index 848d482fc4..332474a5bc 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -371,6 +371,38 @@ void plugin_register_dyn_cb__udata(GArray **arr, dyn_cb->regular.info = &info[flags]; } +void plugin_register_dyn_cond_cb__udata(GArray **arr, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + static TCGHelperInfo info[3] = { + [QEMU_PLUGIN_CB_NO_REGS].flags = TCG_CALL_NO_RWG, + [QEMU_PLUGIN_CB_R_REGS].flags = TCG_CALL_NO_WG, + /* + * Match qemu_plugin_vcpu_udata_cb_t: + * void (*)(uint32_t, void *) + */ + [0 ... 2].typemask = (dh_typemask(void, 0) | + dh_typemask(i32, 1) | + dh_typemask(ptr, 2)) + }; + + struct qemu_plugin_dyn_cb *dyn_cb = plugin_get_dyn_cb(arr); + dyn_cb->userp = udata; + dyn_cb->type = PLUGIN_CB_COND; + dyn_cb->cond.f.vcpu_udata = cb; + dyn_cb->cond.cond = cond; + dyn_cb->cond.entry = entry; + dyn_cb->cond.imm = imm; + + assert((unsigned)flags < ARRAY_SIZE(info)); + dyn_cb->cond.info = &info[flags]; +} + void plugin_register_vcpu_mem_cb(GArray **arr, void *cb, enum qemu_plugin_cb_flags flags, diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols index a9fac056c7..aa0a77a319 100644 --- a/plugins/qemu-plugins.symbols +++ b/plugins/qemu-plugins.symbols @@ -27,6 +27,7 @@ qemu_plugin_register_vcpu_idle_cb; qemu_plugin_register_vcpu_init_cb; qemu_plugin_register_vcpu_insn_exec_cb; + qemu_plugin_register_vcpu_insn_exec_cond_cb; qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu; qemu_plugin_register_vcpu_mem_cb; qemu_plugin_register_vcpu_mem_inline_per_vcpu; @@ -34,6 +35,7 @@ qemu_plugin_register_vcpu_syscall_cb; qemu_plugin_register_vcpu_syscall_ret_cb; qemu_plugin_register_vcpu_tb_exec_cb; + qemu_plugin_register_vcpu_tb_exec_cond_cb; qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu; qemu_plugin_register_vcpu_tb_trans_cb; qemu_plugin_reset; From patchwork Tue May 14 17:42:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796747 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611306wra; Tue, 14 May 2024 10:44:54 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVDofpy8zgF9r4GcIR3Hoc4TfStyvCQaUflE/jAYsXFxzOpMgKc7ovX+BX+UJdoOY+z50NYB0nhypeb5u9Oe8on X-Google-Smtp-Source: AGHT+IG/u8tOs7i3sHBBmo5iqAy7WKeBWzsYWgh3S7V/nQP/ZSuw4PEN1uxjman8XgapTNWwzWtG X-Received: by 2002:a05:6214:534a:b0:6a0:cc6b:14da with SMTP id 6a1803df08f44-6a168224d3dmr175174186d6.47.1715708694510; Tue, 14 May 2024 10:44:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708694; cv=none; d=google.com; s=arc-20160816; b=qkzVeAhsqNkmitIUv+2Q3fIdtVjSztaotMBEO4P/RNn/6DZVT5g67fgJBi8Yf4goxS MXbZI/gjx2O1qK8ia1JPUlY6d25MnCJ0HI6kAxV9N0gIg9tiU1ipO/UHND1/byRbYEdv MV8fFW59IVJT4oWrsYD0kqtSXeK40jXisZctgBbxeYGBe3vv9F7aavom75g1CmDRh6lO MuvO5+Ef91oEYrWbVoMcMsIF2pM1UjWD5CsS1Oh5Z8L4f377u12vaelni3oiA58yE7VK QsnUp9ZZla23wmQr7YH7yr0Zde7d4JWaaYJRK5HfYjel1fzIYw910UMPOfwGtqx8i2B2 QS/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=gtJemHI4dVOUtgdJBkMgGs/0X+EAiROwnScRw4g9+Yo=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=FKODTAXu5RwbS8eFl1OxL892f6IUd5RUX0fVLlOtjGq7o48OHWkshmPvKPX+IchCap R3svHR/fK2x7nbW7Szypck7VNz9p366a1JxgPfOwCB9bTVfBUCxDIMCWbtoJaHejmIUt htVShRTA1tXJwkdlS8ZjwrFyBlAmmwbhKu3tLzDRc1wkAmFaT710wp7KD9DuqWuNSqO7 oa/v4D+TUW8/VrjlCJaEmfu+pju2zP3xb/HkLpC4QE0kLP6UBUH/k8gvMJMtRPJNNarA ZIRdG2EiccNN84F40ZRVYSjwNBQlX/BJYitcZU+g/lOueDqKw/5C5AzxEE4krbtTgmdk CtSg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="imBUdW/z"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6a15f133ffcsi124481946d6.0.2024.05.14.10.44.54 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:44:54 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="imBUdW/z"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBp-0004zh-T7; Tue, 14 May 2024 13:43:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBb-0004sL-NU for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:39 -0400 Received: from mail-lf1-x130.google.com ([2a00:1450:4864:20::130]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wBP-0004u2-7M for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:30 -0400 Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-51f2ebbd8a7so6675277e87.2 for ; Tue, 14 May 2024 10:43:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708580; x=1716313380; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gtJemHI4dVOUtgdJBkMgGs/0X+EAiROwnScRw4g9+Yo=; b=imBUdW/z2/zowQcH6P1erkAOhZlOhMxNIZ+H5wVETS7MUD2WMaNQtnqY3qWkuoaFJ6 xWsLomJYcK9ITdwiR5bhwh4Mr0Jzu31LwiZtDx+QpWuVVKn3hk0DWitc+/8kq+yz0rIp 1lYu7G95uK/SulsjWLTySPoAlM79odb/L9E14hjD3sNcNrS7sWrbEsLVi/RDzdJwct7j 53GTlo1bB/V+d0E1F+JG+qYgaQX56LQxTwQNkzGIxPyFToHyUbwS+Uzmv/Y9PWotVyBc 8CwAwR+8RLDL0AgO5KVWwKsmwOE1+md6OY6CZo1vKyc6omPnwqBnAIihnkYG5BqRxzTW crTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708580; x=1716313380; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gtJemHI4dVOUtgdJBkMgGs/0X+EAiROwnScRw4g9+Yo=; b=i8yO+XafZuATQ74ewtQU3YLfrzWApZlzHaqI2AKvrOFBhD045kh4guIprXFDA0zBRz Wy3R83WmkXjYKsWPb3uxHLjaP1OhnHTUvEwIlGt5sxRqUZKMcIIz9gRHZkZnNnxS3JMs 3R6HP/5P0b93zaeqHM5tL9WR/kQjtsvpcbYWA2qnxxZUskz6o0FXHmdNGP2gn7sTWuVG tiR91uoNDArNOKOIk6w6Druiu7pRC3Gw8yvV1afb0Afsle9ghUG0EArGqU9gZ8qso4Rq HvfnmXRh7o2I8CMILlpV34HjQPwDVNMaFI2Ir+QH5Z7AH3BCqs5fZQ3VKMY61OzsJPVA 9PAQ== X-Gm-Message-State: AOJu0Yw/7EPa6+a7uYsl0mQwjPsjJjppwRnZwakiSzIih+sWQqjdE0Ao bmz/b+6sWbEp8QTyNI7yg5/yaqhewYpVA+aPY0yJ9aDYn+rGx5gbSn6MiJu3Jtk= X-Received: by 2002:a05:6512:3457:b0:51a:fac3:416d with SMTP id 2adb3069b0e04-5220ff72f59mr8753744e87.43.1715708579884; Tue, 14 May 2024 10:42:59 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-574ebdf46cesm520817a12.37.2024.05.14.10.42.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:58 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id B1B565FA2A; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 08/11] tests/plugin/inline: add test for conditional callback Date: Tue, 14 May 2024 18:42:50 +0100 Message-Id: <20240514174253.694591-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Count number of tb and insn executed using a conditional callback. We ensure the callback has been called expected number of time (per vcpu). Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-7-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- tests/plugin/inline.c | 89 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 86 insertions(+), 3 deletions(-) diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c index 103c3a22f6..cd63827b7d 100644 --- a/tests/plugin/inline.c +++ b/tests/plugin/inline.c @@ -20,8 +20,14 @@ typedef struct { uint64_t count_insn_inline; uint64_t count_mem; uint64_t count_mem_inline; + uint64_t tb_cond_num_trigger; + uint64_t tb_cond_track_count; + uint64_t insn_cond_num_trigger; + uint64_t insn_cond_track_count; } CPUCount; +static const uint64_t cond_trigger_limit = 100; + typedef struct { uint64_t data_insn; uint64_t data_tb; @@ -35,6 +41,10 @@ static qemu_plugin_u64 count_insn; static qemu_plugin_u64 count_insn_inline; static qemu_plugin_u64 count_mem; static qemu_plugin_u64 count_mem_inline; +static qemu_plugin_u64 tb_cond_num_trigger; +static qemu_plugin_u64 tb_cond_track_count; +static qemu_plugin_u64 insn_cond_num_trigger; +static qemu_plugin_u64 insn_cond_track_count; static struct qemu_plugin_scoreboard *data; static qemu_plugin_u64 data_insn; static qemu_plugin_u64 data_tb; @@ -56,12 +66,19 @@ static void stats_insn(void) const uint64_t per_vcpu = qemu_plugin_u64_sum(count_insn); const uint64_t inl_per_vcpu = qemu_plugin_u64_sum(count_insn_inline); + const uint64_t cond_num_trigger = + qemu_plugin_u64_sum(insn_cond_num_trigger); + const uint64_t cond_track_left = qemu_plugin_u64_sum(insn_cond_track_count); + const uint64_t conditional = + cond_num_trigger * cond_trigger_limit + cond_track_left; printf("insn: %" PRIu64 "\n", expected); printf("insn: %" PRIu64 " (per vcpu)\n", per_vcpu); printf("insn: %" PRIu64 " (per vcpu inline)\n", inl_per_vcpu); + printf("insn: %" PRIu64 " (cond cb)\n", conditional); g_assert(expected > 0); g_assert(per_vcpu == expected); g_assert(inl_per_vcpu == expected); + g_assert(conditional == expected); } static void stats_tb(void) @@ -70,12 +87,18 @@ static void stats_tb(void) const uint64_t per_vcpu = qemu_plugin_u64_sum(count_tb); const uint64_t inl_per_vcpu = qemu_plugin_u64_sum(count_tb_inline); + const uint64_t cond_num_trigger = qemu_plugin_u64_sum(tb_cond_num_trigger); + const uint64_t cond_track_left = qemu_plugin_u64_sum(tb_cond_track_count); + const uint64_t conditional = + cond_num_trigger * cond_trigger_limit + cond_track_left; printf("tb: %" PRIu64 "\n", expected); printf("tb: %" PRIu64 " (per vcpu)\n", per_vcpu); printf("tb: %" PRIu64 " (per vcpu inline)\n", inl_per_vcpu); + printf("tb: %" PRIu64 " (conditional cb)\n", conditional); g_assert(expected > 0); g_assert(per_vcpu == expected); g_assert(inl_per_vcpu == expected); + g_assert(conditional == expected); } static void stats_mem(void) @@ -104,14 +127,35 @@ static void plugin_exit(qemu_plugin_id_t id, void *udata) const uint64_t insn_inline = qemu_plugin_u64_get(count_insn_inline, i); const uint64_t mem = qemu_plugin_u64_get(count_mem, i); const uint64_t mem_inline = qemu_plugin_u64_get(count_mem_inline, i); - printf("cpu %d: tb (%" PRIu64 ", %" PRIu64 ") | " - "insn (%" PRIu64 ", %" PRIu64 ") | " + const uint64_t tb_cond_trigger = + qemu_plugin_u64_get(tb_cond_num_trigger, i); + const uint64_t tb_cond_left = + qemu_plugin_u64_get(tb_cond_track_count, i); + const uint64_t insn_cond_trigger = + qemu_plugin_u64_get(insn_cond_num_trigger, i); + const uint64_t insn_cond_left = + qemu_plugin_u64_get(insn_cond_track_count, i); + printf("cpu %d: tb (%" PRIu64 ", %" PRIu64 + ", %" PRIu64 " * %" PRIu64 " + %" PRIu64 + ") | " + "insn (%" PRIu64 ", %" PRIu64 + ", %" PRIu64 " * %" PRIu64 " + %" PRIu64 + ") | " "mem (%" PRIu64 ", %" PRIu64 ")" "\n", - i, tb, tb_inline, insn, insn_inline, mem, mem_inline); + i, + tb, tb_inline, + tb_cond_trigger, cond_trigger_limit, tb_cond_left, + insn, insn_inline, + insn_cond_trigger, cond_trigger_limit, insn_cond_left, + mem, mem_inline); g_assert(tb == tb_inline); g_assert(insn == insn_inline); g_assert(mem == mem_inline); + g_assert(tb_cond_trigger == tb / cond_trigger_limit); + g_assert(tb_cond_left == tb % cond_trigger_limit); + g_assert(insn_cond_trigger == insn / cond_trigger_limit); + g_assert(insn_cond_left == insn % cond_trigger_limit); } stats_tb(); @@ -132,6 +176,24 @@ static void vcpu_tb_exec(unsigned int cpu_index, void *udata) g_mutex_unlock(&tb_lock); } +static void vcpu_tb_cond_exec(unsigned int cpu_index, void *udata) +{ + g_assert(qemu_plugin_u64_get(tb_cond_track_count, cpu_index) == + cond_trigger_limit); + g_assert(qemu_plugin_u64_get(data_tb, cpu_index) == (uintptr_t) udata); + qemu_plugin_u64_set(tb_cond_track_count, cpu_index, 0); + qemu_plugin_u64_add(tb_cond_num_trigger, cpu_index, 1); +} + +static void vcpu_insn_cond_exec(unsigned int cpu_index, void *udata) +{ + g_assert(qemu_plugin_u64_get(insn_cond_track_count, cpu_index) == + cond_trigger_limit); + g_assert(qemu_plugin_u64_get(data_insn, cpu_index) == (uintptr_t) udata); + qemu_plugin_u64_set(insn_cond_track_count, cpu_index, 0); + qemu_plugin_u64_add(insn_cond_num_trigger, cpu_index, 1); +} + static void vcpu_insn_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_insn, cpu_index, 1); @@ -163,6 +225,12 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( tb, QEMU_PLUGIN_INLINE_ADD_U64, count_tb_inline, 1); + qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( + tb, QEMU_PLUGIN_INLINE_ADD_U64, tb_cond_track_count, 1); + qemu_plugin_register_vcpu_tb_exec_cond_cb( + tb, vcpu_tb_cond_exec, QEMU_PLUGIN_CB_NO_REGS, + QEMU_PLUGIN_COND_EQ, tb_cond_track_count, cond_trigger_limit, tb_store); + for (int idx = 0; idx < qemu_plugin_tb_n_insns(tb); ++idx) { struct qemu_plugin_insn *insn = qemu_plugin_tb_get_insn(tb, idx); void *insn_store = insn; @@ -176,6 +244,13 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( insn, QEMU_PLUGIN_INLINE_ADD_U64, count_insn_inline, 1); + qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( + insn, QEMU_PLUGIN_INLINE_ADD_U64, insn_cond_track_count, 1); + qemu_plugin_register_vcpu_insn_exec_cond_cb( + insn, vcpu_insn_cond_exec, QEMU_PLUGIN_CB_NO_REGS, + QEMU_PLUGIN_COND_EQ, insn_cond_track_count, cond_trigger_limit, + insn_store); + qemu_plugin_register_vcpu_mem_inline_per_vcpu( insn, QEMU_PLUGIN_MEM_RW, QEMU_PLUGIN_INLINE_STORE_U64, @@ -207,6 +282,14 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info, counts, CPUCount, count_insn_inline); count_mem_inline = qemu_plugin_scoreboard_u64_in_struct( counts, CPUCount, count_mem_inline); + tb_cond_num_trigger = qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, tb_cond_num_trigger); + tb_cond_track_count = qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, tb_cond_track_count); + insn_cond_num_trigger = qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, insn_cond_num_trigger); + insn_cond_track_count = qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, insn_cond_track_count); data = qemu_plugin_scoreboard_new(sizeof(CPUData)); data_insn = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_insn); data_tb = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_tb); From patchwork Tue May 14 17:42:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796752 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611659wra; Tue, 14 May 2024 10:45:45 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXvvOT2oiAeH4paq0NnKgik3ysZR/DadeUeduBBA1k8cxqpHZHYspKy6wto0i7uIF2oaFBQ50ObCPzWtHzB6Rge X-Google-Smtp-Source: AGHT+IFarMhEPQIHMZf6jJoumAqj5lzu2oSqLqYrvW7mMAveuoRCFhc9VrFYtr9F4CPhjuGc+3zs X-Received: by 2002:a05:622a:2288:b0:43a:9715:9e17 with SMTP id d75a77b69052e-43dfdb0800bmr138995871cf.14.1715708745565; Tue, 14 May 2024 10:45:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708745; cv=none; d=google.com; s=arc-20160816; b=cYgkv3Iv6aQpRKBhVFhkvHmgTuMq6HB/fnYDXeA6TzWB0av2UL4NCSLXR8IsFb0KMh krYFatHi0+Xg85rN7mCNLG9+ldd/WivkvhjY6b3y/dt29H4vlkujIHx+bpybUB7xibiL dxwP6GTvbyhgvHp3BlrJvrH2lDzYSUs0BRiuib04SL1VvQsfGa0kta10k2ErYnSL/77V mdVt1tWeYMPyNffKDMn0xiiAw2XlHnd+NMWD5lk6I/1foNLUVPiPWiN3yzZnGxmsMXC3 aNSLdOxsMTFEwbnldVmZT0Qwck1fKPT2Z0GaPGZI1UQBz/KgH/f18G4arIymBIj4CGoG CPKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wX54r7jCIt7Ntr/JPAUQCG6KDcJXp0GRrKzlLq1dFvc=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=tso0E4gu9wN9B+aptFZY00srew+/c14mI0ltLCwp4qRo4qFBGxkBG3UZqtek7GDv8Y 8WQfSKfxrZIea54Q2BZqacNAUIZCRKyYzl5zigIPzuah7Huqn6ip6OpcOhCYfpUIjT3c dQDwRrkVYucAlD/60THVOXcssKRDAjbHbmOn6XnIKY7pSikj0o4BO011XDscLtKai76/ CXPc47RE5nqmmh4x6OzWnLw/IWwydDess633JpBXBMHRn1BUaRau3cAlx9sLjRuT1Rv6 fwnxQejRThhLkh/bWk+PEgRDyhnL1UMOF7U+ryWGVMEmAzC0qziluvGpklj3PAA3jNUl mtwA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BuHoXIdw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-43e04c99fddsi96566101cf.453.2024.05.14.10.45.45 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:45:45 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BuHoXIdw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBt-000527-IS; Tue, 14 May 2024 13:43:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBg-0004tA-Vz for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:41 -0400 Received: from mail-ej1-x62f.google.com ([2a00:1450:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wBP-0004up-9C for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:32 -0400 Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-a5a8cd78701so76615266b.2 for ; Tue, 14 May 2024 10:43:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708583; x=1716313383; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wX54r7jCIt7Ntr/JPAUQCG6KDcJXp0GRrKzlLq1dFvc=; b=BuHoXIdw7RIL+66Pzf8odZaT4ne55f0wOOcF8sAzRc/aqRURtuGTBAcPcqDzsrGLBO vyXExiH2uU23ITl2WyQwv4gFq6V1UlZhZ7/wCOvsjx87tVRFQMHlLYTM4fmkqmTD+TuD KSJxQy1iWXrgqeD26bPAYElM6ITtFNZHx6Sd3vlwhYlhJB32euMquGEu2WMFaF4ao7Z6 8+ihyoCnb9D+HKASlu9IugVPQsNhyeOGOIGilqWZGCL3C8PziCyQy4iTdJ7P52NbPnWA AnY2y7rJgTX/M3vgPA9XVOL5ZidjuxDnAM0w22NvLav3I4A6PMcqf229bdcXBiFUyWfi VVvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708583; x=1716313383; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wX54r7jCIt7Ntr/JPAUQCG6KDcJXp0GRrKzlLq1dFvc=; b=uneFTjaibJtMkJJ9yYI+yGkwUg4mdZaNYbGW5B7dXArbhPLZ2Hb3CNcD4L5gEv4cbX /kHiGWLu78cK3b4kyity0walh0Kn+hzAOO/Lw0TPYrjGMZhiCj0xOOKOrQGLpez8ec4O NtKHl+3KKh4aFA9fdEAfwWeMUI6wKeA14qC93hWC9QHd0rSKhEefNjoDhCpn8TfsouLZ tfcJxLThFABhWFwdwKT3XQvJ7pJebsrYDDEZm3iDChGzuwkv4yCDcE00gThBsVumJEeQ Hao3CvYi8IAIuyIPFw2E4k1B+TJATlAH9w2O31RoO0nJm29gcN91r3Tbqir1KWRGqdXT O2og== X-Gm-Message-State: AOJu0Yy8GIsa1STq5BlvTaOdd9hcsVtWlIpcEGsDYu9MOkEc4sJgVGND EuPZWd7UpPTV800TC0bhd+QOj9wvkCvR8UyxRFTKZ0AZNwysEIj7SaS2c4O1wFU= X-Received: by 2002:a17:907:6d12:b0:a59:6fab:afee with SMTP id a640c23a62f3a-a5a2d65f2aamr1125993166b.62.1715708582838; Tue, 14 May 2024 10:43:02 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a1781cfa7sm743009466b.33.2024.05.14.10.42.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:59 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id CCB095FA2B; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 09/11] plugins: distinct types for callbacks Date: Tue, 14 May 2024 18:42:51 +0100 Message-Id: <20240514174253.694591-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier To prevent errors when writing new types of callbacks or inline operations, we split callbacks data to distinct types. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-8-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- include/qemu/plugin.h | 46 ++++++++++++++----------- plugins/plugin.h | 2 +- accel/tcg/plugin-gen.c | 58 +++++++++++++++++--------------- plugins/core.c | 76 ++++++++++++++++++++++-------------------- 4 files changed, 98 insertions(+), 84 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index c7b3b1cd66..98d27dded9 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -74,34 +74,40 @@ enum plugin_dyn_cb_type { PLUGIN_CB_INLINE_STORE_U64, }; +struct qemu_plugin_regular_cb { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + void *userp; + enum qemu_plugin_mem_rw rw; +}; + +struct qemu_plugin_inline_cb { + qemu_plugin_u64 entry; + enum qemu_plugin_op op; + uint64_t imm; + enum qemu_plugin_mem_rw rw; +}; + +struct qemu_plugin_conditional_cb { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + void *userp; + qemu_plugin_u64 entry; + enum qemu_plugin_cond cond; + uint64_t imm; +}; + /* * A dynamic callback has an insertion point that is determined at run-time. * Usually the insertion point is somewhere in the code cache; think for * instance of a callback to be called upon the execution of a particular TB. */ struct qemu_plugin_dyn_cb { - void *userp; enum plugin_dyn_cb_type type; - /* @rw applies to mem callbacks only (both regular and inline) */ - enum qemu_plugin_mem_rw rw; - /* fields specific to each dyn_cb type go here */ union { - struct { - union qemu_plugin_cb_sig f; - TCGHelperInfo *info; - } regular; - struct { - union qemu_plugin_cb_sig f; - TCGHelperInfo *info; - qemu_plugin_u64 entry; - enum qemu_plugin_cond cond; - uint64_t imm; - } cond; - struct { - qemu_plugin_u64 entry; - enum qemu_plugin_op op; - uint64_t imm; - } inline_insn; + struct qemu_plugin_regular_cb regular; + struct qemu_plugin_conditional_cb cond; + struct qemu_plugin_inline_cb inline_insn; }; }; diff --git a/plugins/plugin.h b/plugins/plugin.h index 7d4b4e21f7..80d5daa917 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -108,7 +108,7 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); -void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index); +void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index); int plugin_num_vcpus(void); diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index f2190f3511..e018728573 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -101,13 +101,13 @@ static void gen_disable_mem_helper(void) offsetof(ArchCPU, env)); } -static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) { TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - tcg_gen_call2(cb->regular.f.vcpu_udata, cb->regular.info, NULL, + tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); tcg_temp_free_i32(cpu_index); @@ -153,21 +153,21 @@ static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_cond cond) } } -static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) { - TCGv_ptr ptr = gen_plugin_u64_ptr(cb->cond.entry); + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); TCGv_i64 val = tcg_temp_ebb_new_i64(); TCGLabel *after_cb = gen_new_label(); /* Condition should be negated, as calling the cb is the "else" path */ - TCGCond cond = tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond.cond)); + TCGCond cond = tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond)); tcg_gen_ld_i64(val, ptr, 0); - tcg_gen_brcondi_i64(cond, val, cb->cond.imm, after_cb); + tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - tcg_gen_call2(cb->cond.f.vcpu_udata, cb->cond.info, NULL, + tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); gen_set_label(after_cb); @@ -177,37 +177,37 @@ static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_ptr(ptr); } -static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_add_u64_cb(struct qemu_plugin_inline_cb *cb) { - TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); TCGv_i64 val = tcg_temp_ebb_new_i64(); tcg_gen_ld_i64(val, ptr, 0); - tcg_gen_addi_i64(val, val, cb->inline_insn.imm); + tcg_gen_addi_i64(val, val, cb->imm); tcg_gen_st_i64(val, ptr, 0); tcg_temp_free_i64(val); tcg_temp_free_ptr(ptr); } -static void gen_inline_store_u64_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_store_u64_cb(struct qemu_plugin_inline_cb *cb) { - TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); - TCGv_i64 val = tcg_constant_i64(cb->inline_insn.imm); + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); + TCGv_i64 val = tcg_constant_i64(cb->imm); tcg_gen_st_i64(val, ptr, 0); tcg_temp_free_ptr(ptr); } -static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, +static void gen_mem_cb(struct qemu_plugin_regular_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - tcg_gen_call4(cb->regular.f.vcpu_mem, cb->regular.info, NULL, + tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)), tcgv_i64_temp(addr), @@ -220,16 +220,16 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) { switch (cb->type) { case PLUGIN_CB_REGULAR: - gen_udata_cb(cb); + gen_udata_cb(&cb->regular); break; case PLUGIN_CB_COND: - gen_udata_cond_cb(cb); + gen_udata_cond_cb(&cb->cond); break; case PLUGIN_CB_INLINE_ADD_U64: - gen_inline_add_u64_cb(cb); + gen_inline_add_u64_cb(&cb->inline_insn); break; case PLUGIN_CB_INLINE_STORE_U64: - gen_inline_store_u64_cb(cb); + gen_inline_store_u64_cb(&cb->inline_insn); break; default: g_assert_not_reached(); @@ -240,15 +240,21 @@ static void inject_mem_cb(struct qemu_plugin_dyn_cb *cb, enum qemu_plugin_mem_rw rw, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { - if (cb->rw & rw) { - switch (cb->type) { - case PLUGIN_CB_MEM_REGULAR: - gen_mem_cb(cb, meminfo, addr); - break; - default: + switch (cb->type) { + case PLUGIN_CB_MEM_REGULAR: + if (rw && cb->regular.rw) { + gen_mem_cb(&cb->regular, meminfo, addr); + } + break; + case PLUGIN_CB_INLINE_ADD_U64: + case PLUGIN_CB_INLINE_STORE_U64: + if (rw && cb->inline_insn.rw) { inject_cb(cb); - break; } + break; + default: + g_assert_not_reached(); + break; } } diff --git a/plugins/core.c b/plugins/core.c index 332474a5bc..1c85edc5e5 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -336,13 +336,13 @@ void plugin_register_inline_op_on_entry(GArray **arr, { struct qemu_plugin_dyn_cb *dyn_cb; + struct qemu_plugin_inline_cb inline_cb = { .rw = rw, + .entry = entry, + .op = op, + .imm = imm }; dyn_cb = plugin_get_dyn_cb(arr); - dyn_cb->userp = NULL; dyn_cb->type = op_to_cb_type(op); - dyn_cb->rw = rw; - dyn_cb->inline_insn.entry = entry; - dyn_cb->inline_insn.op = op; - dyn_cb->inline_insn.imm = imm; + dyn_cb->inline_insn = inline_cb; } void plugin_register_dyn_cb__udata(GArray **arr, @@ -361,14 +361,14 @@ void plugin_register_dyn_cb__udata(GArray **arr, dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); struct qemu_plugin_dyn_cb *dyn_cb = plugin_get_dyn_cb(arr); - dyn_cb->userp = udata; + struct qemu_plugin_regular_cb regular_cb = { .f.vcpu_udata = cb, + .userp = udata, + .info = &info[flags] }; dyn_cb->type = PLUGIN_CB_REGULAR; - dyn_cb->regular.f.vcpu_udata = cb; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->regular.info = &info[flags]; + dyn_cb->regular = regular_cb; } void plugin_register_dyn_cond_cb__udata(GArray **arr, @@ -390,17 +390,17 @@ void plugin_register_dyn_cond_cb__udata(GArray **arr, dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); struct qemu_plugin_dyn_cb *dyn_cb = plugin_get_dyn_cb(arr); - dyn_cb->userp = udata; + struct qemu_plugin_conditional_cb cond_cb = { .userp = udata, + .f.vcpu_udata = cb, + .cond = cond, + .entry = entry, + .imm = imm, + .info = &info[flags] }; dyn_cb->type = PLUGIN_CB_COND; - dyn_cb->cond.f.vcpu_udata = cb; - dyn_cb->cond.cond = cond; - dyn_cb->cond.entry = entry; - dyn_cb->cond.imm = imm; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->cond.info = &info[flags]; + dyn_cb->cond = cond_cb; } void plugin_register_vcpu_mem_cb(GArray **arr, @@ -432,15 +432,15 @@ void plugin_register_vcpu_mem_cb(GArray **arr, dh_typemask(i64, 3) | dh_typemask(ptr, 4)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); struct qemu_plugin_dyn_cb *dyn_cb = plugin_get_dyn_cb(arr); - dyn_cb->userp = udata; + struct qemu_plugin_regular_cb regular_cb = { .userp = udata, + .rw = rw, + .f.vcpu_mem = cb, + .info = &info[flags] }; dyn_cb->type = PLUGIN_CB_MEM_REGULAR; - dyn_cb->rw = rw; - dyn_cb->regular.f.vcpu_mem = cb; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->regular.info = &info[flags]; + dyn_cb->regular = regular_cb; } /* @@ -557,20 +557,20 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } -void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) +void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) { - char *ptr = cb->inline_insn.entry.score->data->data; + char *ptr = cb->entry.score->data->data; size_t elem_size = g_array_get_element_size( - cb->inline_insn.entry.score->data); - size_t offset = cb->inline_insn.entry.offset; + cb->entry.score->data); + size_t offset = cb->entry.offset; uint64_t *val = (uint64_t *)(ptr + offset + cpu_index * elem_size); - switch (cb->inline_insn.op) { + switch (cb->op) { case QEMU_PLUGIN_INLINE_ADD_U64: - *val += cb->inline_insn.imm; + *val += cb->imm; break; case QEMU_PLUGIN_INLINE_STORE_U64: - *val = cb->inline_insn.imm; + *val = cb->imm; break; default: g_assert_not_reached(); @@ -590,17 +590,19 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, struct qemu_plugin_dyn_cb *cb = &g_array_index(arr, struct qemu_plugin_dyn_cb, i); - if (!(rw & cb->rw)) { - break; - } switch (cb->type) { case PLUGIN_CB_MEM_REGULAR: - cb->regular.f.vcpu_mem(cpu->cpu_index, make_plugin_meminfo(oi, rw), - vaddr, cb->userp); + if (rw && cb->regular.rw) { + cb->regular.f.vcpu_mem(cpu->cpu_index, + make_plugin_meminfo(oi, rw), + vaddr, cb->regular.userp); + } break; case PLUGIN_CB_INLINE_ADD_U64: case PLUGIN_CB_INLINE_STORE_U64: - exec_inline_op(cb, cpu->cpu_index); + if (rw && cb->inline_insn.rw) { + exec_inline_op(&cb->inline_insn, cpu->cpu_index); + } break; default: g_assert_not_reached(); From patchwork Tue May 14 17:42:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796750 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2611565wra; Tue, 14 May 2024 10:45:32 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUhmeAczNI5Ojs/mhT1NyYaIxvUrKUU/969dLJEgSTy50irhURInxvBae9h6J7nvpfrlio45Q3TA8uh0TAtYaHi X-Google-Smtp-Source: AGHT+IFIQEgSF3W1eKL+qG96yOX8Ax5NdBfLOj88XOVZpizFHEOzOmT9x9E76GUXTL4YiyatD8y8 X-Received: by 2002:a05:6808:9b7:b0:3c9:9640:7ee2 with SMTP id 5614622812f47-3c9970d9d7fmr12724906b6e.57.1715708731888; Tue, 14 May 2024 10:45:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708731; cv=none; d=google.com; s=arc-20160816; b=PSS0xJsC0Eryl2zxRQHoK1x/IohWvVW8ov8qyQx6gufRiWXqL15PhKmp7376fe1eAi AEcNNzgdBwaxMkwaqKaabnvH8o4RMB+uHj7hYcBphMh4yE3cYS3LiuU2TqREm+fpxNFn 6RMqvKkEme5tSki77HGrg8RGGt3Uy6sR8/1kDg1t/BlB739zPho9yW7WIMr7CNQUGsSW 8qWxyBMtiKktUbiFxWQj+keek3eOw7sLqE8NhGgDbhsw6RIfE1j0odwVlPchvBYPW+C1 AUpD8Xj9XV/2BzOlcWl6vCTIaCW3vQ5qswQfr6meMimjPQTc4RrxIh8se0lDC4p1n0ZR dTLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FWnBwMuw66Zw+u1x4hTmI03qXiyp3WcyiBkWmxW0plY=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=NSYBQxlPkP2WyLxmZ+ZBreZquhJ3sEH/zE92i6QEwjmDUnFF2fML4ufu5RcxhbOmQc kFeglaZTzzsJu4kOr1tqq+IzT1U8MDJVkG7tL3/Xe0UgTDryWl4suui1jGutUrGMhIiP wGZSU5EVf8rtCFUhJbdXW47PtPuQbD1pkzblUlg9WSg8WPJ6acY5uUZss9+yT5cAsxcc BEkEnOM4CTi75/xGwuKlEXQKmGbMgM1lgXLamRwR3v9nV+PEQ8Hal2hQxJt1SgC0YizS whdziRHtqG6v6WSpBC+izcK4ebnbt5fOI1oWWrs91slEDmqah9G6ry2YegS1tjSFTuDh dG3w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=d92fBC7H; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-792bf277985si1363465185a.97.2024.05.14.10.45.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:45:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=d92fBC7H; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBp-0004zb-9w; Tue, 14 May 2024 13:43:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBk-0004ui-Bs for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:45 -0400 Received: from mail-lf1-x136.google.com ([2a00:1450:4864:20::136]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wBh-0004ul-8v for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:44 -0400 Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-52192578b95so6897609e87.2 for ; Tue, 14 May 2024 10:43:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708583; x=1716313383; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FWnBwMuw66Zw+u1x4hTmI03qXiyp3WcyiBkWmxW0plY=; b=d92fBC7HRihQA36v5zU67jB2OjDjrCSSalP1AXpaREvbTBPg+InedPaO3Uc5Gs1SER Ut0CfQKSP2okJzoVyUTyht857ZEU1r+d4r1zCYu82ByDl2DiahGomjj6Oi/X39K0rgr5 Z9FTOlC2HN2DzoOhAfFaOBa98YG2/7HMkajxnmeJqUCLGuu5/rpVHme5eMVE/P1217D+ IzipvCl3Df3gatdgrQr8jSMtBWozhrB0a0Tt8YwHd2MfSe+6G3R0HKBKTTpPu4R/GxXH EOxMjJdGW7g/gfBxTfEyHJHeqUMnjLduWXs+MD6fWKDGrjIcyPZDoQSjkpClDDJFRei7 sqBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708583; x=1716313383; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FWnBwMuw66Zw+u1x4hTmI03qXiyp3WcyiBkWmxW0plY=; b=Pwq29iFy8dZhlM8BsQKXICCpu8VWVfYDiNlCa3tP+vTM3VgVjPjI5tZN8tjYb+jlkY qYipg7ALYgcIv0PIDg3+iBep2OZ/xem1n66b5NoNhl7dxIHxnVmz/gpGSy0NjB+k16DP 3Ue7o0JPTFe3G8HWQr7SbE9+o+JKsvqzo2rGWnEoUF/BXMTylFHiUg+DFJKhJpQdGa2N tItD7FYHmoD33B27wD5VU/m1CY0YtaieN2bZ4cl4XOo1WOWxrIbpYaJJLujXL2AkjDVf v3IlrgPRSAcoZWBhHR5TVwUs9wUy0DRuOKvmcNuFk3p8xFdpsBsLSECzJTzYWdEg0lTx rV8Q== X-Gm-Message-State: AOJu0YwLLU4foldnrUa24sliNTn7Im96jS3zcsEt9kvbhykPtcLN908f m08F5g/xI/rU/KIGd9Gt1lAIeO5B+JUrw86hdm5fxcPb7mNYs9OF8n/t19Mqd1s= X-Received: by 2002:a05:6512:3283:b0:51f:1bf8:610e with SMTP id 2adb3069b0e04-5220fc6d559mr8340465e87.37.1715708582637; Tue, 14 May 2024 10:43:02 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57421480d99sm5758823a12.8.2024.05.14.10.42.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:59 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id E419C5FA2C; Tue, 14 May 2024 18:42:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 10/11] plugins: extract cpu_index generate Date: Tue, 14 May 2024 18:42:52 +0100 Message-Id: <20240514174253.694591-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x136.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Factorizes function to access current cpu index for a given vcpu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-9-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- accel/tcg/plugin-gen.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index e018728573..c9b298667f 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -101,12 +101,17 @@ static void gen_disable_mem_helper(void) offsetof(ArchCPU, env)); } -static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) +static TCGv_i32 gen_cpu_index(void) { TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + return cpu_index; +} + +static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) +{ + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); @@ -121,9 +126,7 @@ static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) char *base_ptr = arr->data + entry.offset; size_t entry_size = g_array_get_element_size(arr); - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_muli_i32(cpu_index, cpu_index, entry_size); tcg_gen_ext_i32_ptr(ptr, cpu_index); tcg_temp_free_i32(cpu_index); @@ -156,7 +159,6 @@ static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_cond cond) static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) { TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); TCGv_i64 val = tcg_temp_ebb_new_i64(); TCGLabel *after_cb = gen_new_label(); @@ -165,15 +167,14 @@ static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) tcg_gen_ld_i64(val, ptr, 0); tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + tcg_temp_free_i32(cpu_index); gen_set_label(after_cb); tcg_temp_free_i64(val); - tcg_temp_free_i32(cpu_index); tcg_temp_free_ptr(ptr); } @@ -203,10 +204,7 @@ static void gen_inline_store_u64_cb(struct qemu_plugin_inline_cb *cb) static void gen_mem_cb(struct qemu_plugin_regular_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)), From patchwork Tue May 14 17:42:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796755 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp2612718wra; Tue, 14 May 2024 10:48:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV2+j+zOYqcOFPqjICMZVgmUZQHSXjC1CxWzcmxVQIGMfvAhB3ZiO6rp1qRSPdmzidTpoaLQZpkN966en3AiHhu X-Google-Smtp-Source: AGHT+IEkZlOIrQwj/AbM9vWuSv6zXa94jS0CJmlP5O+Zar91YAvaiMZmlF1CpUhXBEmuZ2mu/ixO X-Received: by 2002:a05:622a:1887:b0:43d:fffe:2d15 with SMTP id d75a77b69052e-43dfffe2ec7mr161241981cf.43.1715708919276; Tue, 14 May 2024 10:48:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715708919; cv=none; d=google.com; s=arc-20160816; b=XOUWw28uWcfzdWdrvimikOy07o+l8crVoPgfKxoKBl7DxeNX1izPe/vw89xILx4xAo U05zchOO88XK1JhVwo7e1HPjJvsRaLVxTkEnqpB8G0ClN47ANsKePm+M65Wg2ZWLCdZd mz74o3HCWnWsW7+pLplmpnmM1PUURogsB3n/r/Pfb5q7aBkGQsgRr0zOfzWOGB/d5Wiq +tuTfkyHTYWGGEGuLTWvvo8RMxlDKEinvpH+oEV5CGARpESbpMRHehNU545V5IkPpLVG hQvJqSr6hW4S1MRcJBed2C2DE+caCEIiElcGHRC5pRV6TP2OpMzKG5xO/m5Y9pV7kpZi 7eRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=eV/zf5lPaGHYQYWT03Xfqb/pBXEE5bjNOFAW4VPpOm0=; fh=AUhhMvfuqYV1WD/1Jx7Q0Z0LnvlruScCfdPWYDT2uE8=; b=poxp5KdY4t4oF6olXf72emxNGNVOwmN647fSBsE+hlI73KUWsMep5myhZBjYoWlv9z S4rCVmZwOtHRI1ojCzLy9FPposAsKhn0yR8qoXyvQ1/5KS3wSJakvd3e+/HbzYwKCdk1 QQ5chpffkJdNsrE3cOvlm0z9VTkf5HmqY2hX4dys9fHpJ+L+7rIK6htJrmzwOknHrUZI JcTgwGFoV1dznNKfCN6e5laZ1jbzVHnVZS+84JEXzu+FJ4KzzYKzuWJXNIqZy3LOIqUD ffX4kAM0cZegyACbzSFNo6m7R3fwwhFZxeWBSCJSQwNrxfcYQrARuBWif5gaqfp9Z/Cx Af0g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=K6C7F8Mm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-43e086dc93esi85301981cf.779.2024.05.14.10.48.39 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2024 10:48:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=K6C7F8Mm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6wBm-0004xd-NH; Tue, 14 May 2024 13:43:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6wBY-0004s5-9j for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:39 -0400 Received: from mail-ed1-x534.google.com ([2a00:1450:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s6wBP-0004uL-7z for qemu-devel@nongnu.org; Tue, 14 May 2024 13:43:29 -0400 Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-572baf393ddso1731835a12.1 for ; Tue, 14 May 2024 10:43:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715708581; x=1716313381; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eV/zf5lPaGHYQYWT03Xfqb/pBXEE5bjNOFAW4VPpOm0=; b=K6C7F8MmKE4Ov8CCttiljURFvP1yzM0kb5aTbhu0/PH+p1l7gzsoZrOZ4EodxUb1pv sOfm80xatt+PSGTvmyrTw80VokDeThm0O/UA6navlavQZRHqeLqn4Ouq88FyVOFctrRG 7n6/TmgL0QsLfHemW40TgM6ukc/UpR2Hr0hjVZgLJizOfO0a2MTKPzb7Sn+lKmMOhdyQ NT6pq0Ck33jAM+sl4T+8aqPIolhxjgllY4J8wfiFwkkGDVcb/aNYig8yp5gEXkWuymbt ZCxs16P9vvoNDbIUQOd3CeW9NpFKaAzkjdQrgtxnxmHRmkpZgFVgCRoX530cZKFYwC8P I8aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715708581; x=1716313381; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eV/zf5lPaGHYQYWT03Xfqb/pBXEE5bjNOFAW4VPpOm0=; b=VWnrx6j3VgdWPp2nfWk/ktaEN/MSEY7utiXepHPuGVFmiFDbBjBA28RnwC0t6C8LzF jukcgBZ2dQrzZp6NmkJvsbZgdhe8uJtghsXW+g5KsLaBj7f9cwwTgt0VK3sGLDB2sBCq dirbmXIlvdRZQ0X/r3xPL9pP+i/JMAURyAdtu5sYPZ+HPUWlDwVLj+T8RRw4LL7a+k2L bKfA+iAsJHBe/JhDVu/4RztvYS2FijXWA3bz/lJcJLTWMLtMzGU8pHHHeFYqEq4V20L8 fYcRXjSPyC+rXlZAOxdqd1mH5HD4XyPN80MDXK0jxo7qe5NZZkSbnwW+VY8I34+mbi7I taXA== X-Gm-Message-State: AOJu0YxgpUZeoxRUB+CO3ecycIquuTQlc7Lw28stJAPTik03SeYeZQed k1UjCUfEHzRK7P4gu/D0XDn9b4Sn1H6RSILWLx3hU6tf8FgCEWgq5xmtd8aDikQ= X-Received: by 2002:a17:907:9950:b0:a59:b5a6:65c7 with SMTP id a640c23a62f3a-a5a1155e921mr1460896466b.3.1715708580956; Tue, 14 May 2024 10:43:00 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a179c7fcfsm738917166b.119.2024.05.14.10.42.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 May 2024 10:42:59 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 0ABD65FA2D; Tue, 14 May 2024 18:42:55 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 11/11] plugins: remove op from qemu_plugin_inline_cb Date: Tue, 14 May 2024 18:42:53 +0100 Message-Id: <20240514174253.694591-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier This field is not needed as the callback type already holds this information. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-10-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- include/qemu/plugin.h | 1 - plugins/plugin.h | 4 +++- plugins/core.c | 13 +++++++------ 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 98d27dded9..796fc13706 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -83,7 +83,6 @@ struct qemu_plugin_regular_cb { struct qemu_plugin_inline_cb { qemu_plugin_u64 entry; - enum qemu_plugin_op op; uint64_t imm; enum qemu_plugin_mem_rw rw; }; diff --git a/plugins/plugin.h b/plugins/plugin.h index 80d5daa917..30e2299a54 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -108,7 +108,9 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); -void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index); +void exec_inline_op(enum plugin_dyn_cb_type type, + struct qemu_plugin_inline_cb *cb, + int cpu_index); int plugin_num_vcpus(void); diff --git a/plugins/core.c b/plugins/core.c index 1c85edc5e5..0726bc7f25 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -338,7 +338,6 @@ void plugin_register_inline_op_on_entry(GArray **arr, struct qemu_plugin_inline_cb inline_cb = { .rw = rw, .entry = entry, - .op = op, .imm = imm }; dyn_cb = plugin_get_dyn_cb(arr); dyn_cb->type = op_to_cb_type(op); @@ -557,7 +556,9 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } -void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) +void exec_inline_op(enum plugin_dyn_cb_type type, + struct qemu_plugin_inline_cb *cb, + int cpu_index) { char *ptr = cb->entry.score->data->data; size_t elem_size = g_array_get_element_size( @@ -565,11 +566,11 @@ void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) size_t offset = cb->entry.offset; uint64_t *val = (uint64_t *)(ptr + offset + cpu_index * elem_size); - switch (cb->op) { - case QEMU_PLUGIN_INLINE_ADD_U64: + switch (type) { + case PLUGIN_CB_INLINE_ADD_U64: *val += cb->imm; break; - case QEMU_PLUGIN_INLINE_STORE_U64: + case PLUGIN_CB_INLINE_STORE_U64: *val = cb->imm; break; default: @@ -601,7 +602,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, case PLUGIN_CB_INLINE_ADD_U64: case PLUGIN_CB_INLINE_STORE_U64: if (rw && cb->inline_insn.rw) { - exec_inline_op(&cb->inline_insn, cpu->cpu_index); + exec_inline_op(cb->type, &cb->inline_insn, cpu->cpu_index); } break; default: