From patchwork Wed May 8 22:15:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 795512 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp54050wra; Wed, 8 May 2024 15:16:01 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWnzX1z8ht6W9PGlrBvi78hERW/yt6AiMLYlBdY2VtLlN/VzTW41ALNJNFpZSZrqKkOhhQG54teZVrsuyNPMK8x X-Google-Smtp-Source: AGHT+IEa47GhAOnhg1CihLXUUEoEn4T3HBqggG80fSdK0OB6wIhqY3i0C4xMScEcrMNGTpyy6UB2 X-Received: by 2002:a67:f98c:0:b0:47f:1ad0:2b12 with SMTP id ada2fe7eead31-47f3c39036emr4162903137.22.1715206561277; Wed, 08 May 2024 15:16:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715206561; cv=none; d=google.com; s=arc-20160816; b=sLJlYsTuy6ZY61fcb/serG+AGzU41nq9kPUDQrxEAOXjaOioOBHyx8Oy698Y7Yo1uL 0TTdbpd1XFZeq3rQVLPlzyS8sysHQAf9plybJSfRV4D1ogc/8211TsB2NwvUlWrAFQX8 raSo7+2r5CCP0mQWyhPZBE1th788pp/37DAy0NLi3mRltYn7JJ2cnQo1+NPcsFSUF2p1 d8bneUkPZQHl1yEGI0ev9nF3byJwic4/PovdTNh8AXW/xqwK9B+Vocwk9X15RCp94jfz GVAhCEO6omMD7ifsks10pl0Sp4Az3Y2y72LqrlU/H90xdpP9diF1+iunGImome/YZrVf u3PQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8mkrQbTSDfr6usqNAQCgkl4RFyC7PF3bv4H4UAYJ3WU=; fh=pGYVoKmEbmBJXedzdvuKSuqi1EMwZm5z032l2+Fj52I=; b=yGqr3Ad+2ex1l+PFmg70jdX6v2sKBVButf7ifqOVXpRDUNCUfUXEiAsGFvnL2JcU74 18KUaNSUNGBIXG6NlkV6eR7pham8Dj1AyBjHFcfKxEW2esYgCUUERjYb8KVSPUu5KvlZ yV+pw1CiPje9llJ2vX4rWTd2JZbW1mQZnQdrcBL93gxSEENdkaqoELiLFOWSBUiwOV+8 rABMylJBrImWnyySWeiFaX5891eIGv5j/QRn3uukvlq1kkfjrisc9yR0yUeLRMHua2nG 8d1QJ9m5agv1+g7B7f8wxLaqsK6ke8NL/z6iHbzKrAR7sAOuA7UFqvxlzs5NsMAO5Dhs qz3g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="XBgHEMu/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6a15f2ed1a0si659426d6.476.2024.05.08.15.16.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 08 May 2024 15:16:01 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="XBgHEMu/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s4pZT-0006Wt-Qm; Wed, 08 May 2024 18:15:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s4pZR-0006WV-Ha for qemu-devel@nongnu.org; Wed, 08 May 2024 18:15:29 -0400 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s4pZP-0003jK-OD for qemu-devel@nongnu.org; Wed, 08 May 2024 18:15:29 -0400 Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-41b782405d5so2799305e9.2 for ; Wed, 08 May 2024 15:15:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715206526; x=1715811326; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8mkrQbTSDfr6usqNAQCgkl4RFyC7PF3bv4H4UAYJ3WU=; b=XBgHEMu/3A0Picc9eb2FRA925ew+GAwNkOXWpsxlRh22oCDyYmR0SUmyTDAzdxs1A4 u3FdNuebcy4NZzcsumfmBzr1nlKIfwDqMJ0/ji4dV2SqHQuEF4Wt1QwPDirVE3HmQQlb owQ9GhMZH0voj8m3zE0gX9D8QnvNC6LmHIp/4Xxx47GhfJ6MaBdQTIwj7DOY6JuFn76M 0Z3inD1YWVwjGzXnHn3s7N6APG50G78Dm3hGEog+kM6dS8Sf1y2Fe74zTNF3QCA/lzur iDcmkqbEWZtM4LmFzIGdcMf+A28eq0DSBHIJUMEl7Om9/5HDZzHlt9G63wOVSYYegcjm 6euQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715206526; x=1715811326; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8mkrQbTSDfr6usqNAQCgkl4RFyC7PF3bv4H4UAYJ3WU=; b=MvdDD2CEfQdqTI4Q59K05X3kXFc01KVEC4K6AtiUcXoEJKma12CvCfrNjtx6oyyUK3 KYbHw2nIoDBNsSTWFBUiSSdCR4FuFBaMe8tjPFmhtjlYorE/QHoCrbqRFLN2JoCvoaDe kJ/+Br3hLmLUD+qffn9bZzVuIIKswEDkBNje8nArr49PdzgTCIoqHvc9AtZ3qA5NezWM s8zrRvg9QU7jBeFqIzld6rb+0vdU9DdYlf02ayFCDeQR5lqtYwxOcdANWsGxt8234dZS p28jEBjCrVr8HbYtLZFcTEnENSl8q7vIQSsbF6DM62e3lZCmhX8i8WrkPKK0Cd76htmm zP1Q== X-Gm-Message-State: AOJu0Yzs5PlJdWcHRdak2e0CbSIyZLJxD/y+sZF6mMshHPdIw3h28mP+ BhR29WiieYrNxUzy3Mv2HaDysXLPHbX85nvWYOUGA0pLOkdtvFNnMqU22QLTz8jnbJPAriFYCd4 5 X-Received: by 2002:a05:600c:1f81:b0:419:a3f:f4f6 with SMTP id 5b1f17b1804b1-41f71302dbdmr33632955e9.8.1715206526068; Wed, 08 May 2024 15:15:26 -0700 (PDT) Received: from m1x-phil.lan (sar95-h02-176-184-10-250.dsl.sta.abo.bbox.fr. [176.184.10.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3502b8a7884sm10068f8f.57.2024.05.08.15.15.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 08 May 2024 15:15:25 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL v2 14/28] hw/i386/x86: Don't leak "isa-bios" memory regions Date: Thu, 9 May 2024 00:15:16 +0200 Message-ID: <20240508221518.72350-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240508221518.72350-1-philmd@linaro.org> References: <20240508221518.72350-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bernhard Beschow Fix the leaking in x86_bios_rom_init() and pc_isa_bios_init() by adding an "isa_bios" attribute to X86MachineState. Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow Message-ID: <20240508175507.22270-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/x86.h | 7 +++++++ hw/i386/pc_sysfw.c | 7 +++---- hw/i386/x86.c | 9 ++++----- 3 files changed, 14 insertions(+), 9 deletions(-) diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index cb07618d19..a07de79167 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -18,6 +18,7 @@ #define HW_I386_X86_H #include "exec/hwaddr.h" +#include "exec/memory.h" #include "hw/boards.h" #include "hw/intc/ioapic.h" @@ -52,6 +53,12 @@ struct X86MachineState { GMappedFile *initrd_mapped_file; HotplugHandler *acpi_dev; + /* + * Map the upper 128 KiB of the BIOS just underneath the 1 MiB address + * boundary. + */ + MemoryRegion isa_bios; + /* RAM information (sizes, addresses, configuration): */ ram_addr_t below_4g_mem_size, above_4g_mem_size; diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 59c7a81692..82d37cb376 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -40,11 +40,10 @@ #define FLASH_SECTOR_SIZE 4096 -static void pc_isa_bios_init(MemoryRegion *rom_memory, +static void pc_isa_bios_init(MemoryRegion *isa_bios, MemoryRegion *rom_memory, MemoryRegion *flash_mem) { int isa_bios_size; - MemoryRegion *isa_bios; uint64_t flash_size; void *flash_ptr, *isa_bios_ptr; @@ -52,7 +51,6 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory, /* map the last 128KB of the BIOS in ISA space */ isa_bios_size = MIN(flash_size, 128 * KiB); - isa_bios = g_malloc(sizeof(*isa_bios)); memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size, &error_fatal); memory_region_add_subregion_overlap(rom_memory, @@ -136,6 +134,7 @@ void pc_system_flash_cleanup_unused(PCMachineState *pcms) static void pc_system_flash_map(PCMachineState *pcms, MemoryRegion *rom_memory) { + X86MachineState *x86ms = X86_MACHINE(pcms); hwaddr total_size = 0; int i; BlockBackend *blk; @@ -185,7 +184,7 @@ static void pc_system_flash_map(PCMachineState *pcms, if (i == 0) { flash_mem = pflash_cfi01_get_memory(system_flash); - pc_isa_bios_init(rom_memory, flash_mem); + pc_isa_bios_init(&x86ms->isa_bios, rom_memory, flash_mem); /* Encrypt the pflash boot ROM */ if (sev_enabled()) { diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 6d3c72f124..457e8a34a5 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -1133,7 +1133,7 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, { const char *bios_name; char *filename; - MemoryRegion *bios, *isa_bios; + MemoryRegion *bios; int bios_size, isa_bios_size; ssize_t ret; @@ -1173,14 +1173,13 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, /* map the last 128KB of the BIOS in ISA space */ isa_bios_size = MIN(bios_size, 128 * KiB); - isa_bios = g_malloc(sizeof(*isa_bios)); - memory_region_init_alias(isa_bios, NULL, "isa-bios", bios, + memory_region_init_alias(&x86ms->isa_bios, NULL, "isa-bios", bios, bios_size - isa_bios_size, isa_bios_size); memory_region_add_subregion_overlap(rom_memory, 0x100000 - isa_bios_size, - isa_bios, + &x86ms->isa_bios, 1); - memory_region_set_readonly(isa_bios, !isapc_ram_fw); + memory_region_set_readonly(&x86ms->isa_bios, !isapc_ram_fw); /* map all the bios at the top of memory */ memory_region_add_subregion(rom_memory, From patchwork Wed May 8 22:15:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 795511 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp54027wra; Wed, 8 May 2024 15:15:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX230Tj5qIjzrQUxmg7rTzqXz3FnQAMbpYqjlt3A40zhnwDcdUokAl8BWNKKL2j++pSNWJO/BZyhLkI3Xqxpu55 X-Google-Smtp-Source: AGHT+IGl2TPfMPqKPCkrAhc+IRu7HEmtrJggdgfV3PsN4IrTD1bjAJ4GKkx7+qu38oQ/+re64aGC X-Received: by 2002:a05:622a:1aa9:b0:437:b7bd:368a with SMTP id d75a77b69052e-43dec074ac9mr18928541cf.19.1715206558278; Wed, 08 May 2024 15:15:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715206558; cv=none; d=google.com; s=arc-20160816; b=FgGNcBI2qiC7IxFvc4C9X8UIGyrvluoC4fns69lvTZ+NsDgL6icxTuweuL+E/oBbwk neIg9xexWuy80nOYkvz6MBwicy3RRO7EWGRmBdEvyJClSM8v9brpxj7Y+6Ig+kTwTv5n pExlY9HgPtRU+rFDHI3xhgbmM1+FdIP3nniStASbLrD1Ce3fEZMs+BETWvh0r1r1OqJe ADx5U6Mp9f9SDtX6rYB+xHcXsfRM2ET13hW1dkamnMWnxEomuFBOfCAy33+cCpFL8ski BVZ3EKEC8x0Ds1ivjtJfLd58Y6kTRT8/837IxYrc4cc2UCfkohnhZwQjGBlYXPaMfGBn Zb4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=7whZLzg21d/liml4UNZ34ou/FOI3IC4dYsrPvQ2r0tc=; fh=pGYVoKmEbmBJXedzdvuKSuqi1EMwZm5z032l2+Fj52I=; b=if1xRsqhkXay8X6USu7yzzMow4/dj0DfpCJeq5bRmrmVSsi61mTzi6/AymhtvCbZyL A5Iuwtfwz2SJPOBcLnXgrzjoBrfFLAwj0QZJUyfHPe0i4yB2iu8Uen8sOzw/KIPJpnEl ogIIckkH5bXnrhr2c18gXCWSb2pkDDyFdcfVsIoVpiZ/Y4hcoCoufCfxDFZC5SuUkV4U UYT/mcfBbOGt6UXHb6LNvZ/Rb4sxVDkNXZxlieCcbV85YWcQKJ+4kQgk7qMxzDer0Tnq dQN6jMgwOSFoc6THWABS0ElRDAARbcWsjjhlm7t3WNMkEKfFkQD1Mv4BtuY41YR0FoU3 lipg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P4IBk4l7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-43df56ad1d8si167461cf.530.2024.05.08.15.15.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 08 May 2024 15:15:58 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P4IBk4l7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s4pZb-0006bU-K7; Wed, 08 May 2024 18:15:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s4pZX-0006b5-MV for qemu-devel@nongnu.org; Wed, 08 May 2024 18:15:37 -0400 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s4pZV-0003ke-Vy for qemu-devel@nongnu.org; Wed, 08 May 2024 18:15:35 -0400 Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-41b79450f8cso1624485e9.3 for ; Wed, 08 May 2024 15:15:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715206531; x=1715811331; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7whZLzg21d/liml4UNZ34ou/FOI3IC4dYsrPvQ2r0tc=; b=P4IBk4l7tT993IicnohPjhkY1kfl0f+uBRvxzeNyCBH7BmVof/CA7U7hVzpwPKIsjr gnIZIPCPql7zD6GIvv6EzhzwhZfL+DPhs+9lD92/DATH7KNXIign0CSvD7jz2CaSy/fc DgAcYUSeLgwWwZTnd2OfFmU4fE+rG1yrHsznOTgqygFQINKAv+oefR/smK+cZQLWTjNW Vg7RJhzC0aZf6OMlq3BfflUx4cOWocVhs2pxQi+LFbq0AEa6/0Wi8vJvep/qdDte5cYn R3W4ve3S0qYWMpJjamsx9mnnjjjIa4OIhTJRmcbKfVl79lDtiAXc7q0RfZvlMqAh+qxF mJPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715206531; x=1715811331; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7whZLzg21d/liml4UNZ34ou/FOI3IC4dYsrPvQ2r0tc=; b=gRaOTuSsdUWVfZieE91pd10dobPnd/JXgp2+Euc9kaMiVU52RQN4hj93c8R1T6hEJF urOC6yyVqg2ydc9nMV9aNhX3s8noYy9BJP0IlLUMnAxnDAFSsT7ss0BiB1+UcurPgDV7 BioEofDhjBVxLGeCBANBc0QnlP1JjZsBlWuNtx3ATWTaEW9SaCtJFYohXxT04EFE5wr6 GN1uwrYmsnjJzwUJi3kgogJ1kE28WzFRPjpyLdNjgQP8SZ1cqaxM4ihUsyiyN95hk5QC ak8c3hPC1W4IjItZ/ZSjwkw4hThPohv+yEtBrBbTtU/f5hicRijiPoRRgOr3FMyVgeta h6KQ== X-Gm-Message-State: AOJu0YwLUz7T+/KkCqQlleybwWsufRy1kOAYwtt99ILw8Xk4cRuzCApD 76Y+auuY9ueh2p4iBeIIsCfImd5FD5xUz93GF9doqaQq+MHNEKRKO+CM7DGPUYWiemNEzwMYDQp I X-Received: by 2002:a05:600c:3b22:b0:41b:55b1:6cfc with SMTP id 5b1f17b1804b1-41f71cc14famr27983225e9.1.1715206531458; Wed, 08 May 2024 15:15:31 -0700 (PDT) Received: from m1x-phil.lan (sar95-h02-176-184-10-250.dsl.sta.abo.bbox.fr. [176.184.10.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41f87c254bfsm36821865e9.17.2024.05.08.15.15.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 08 May 2024 15:15:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL v2 15/28] hw/i386/x86: Don't leak "pc.bios" memory region Date: Thu, 9 May 2024 00:15:17 +0200 Message-ID: <20240508221518.72350-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240508221518.72350-1-philmd@linaro.org> References: <20240508221518.72350-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bernhard Beschow Fix the leaking in x86_bios_rom_init() by adding a "bios" attribute to X86MachineState. Note that it is only used in the -bios case. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow Message-ID: <20240508175507.22270-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/x86.h | 6 ++++++ hw/i386/x86.c | 13 ++++++------- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index a07de79167..55c6809ae0 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -53,6 +53,12 @@ struct X86MachineState { GMappedFile *initrd_mapped_file; HotplugHandler *acpi_dev; + /* + * Map the whole BIOS just underneath the 4 GiB address boundary. Only used + * in the ROM (-bios) case. + */ + MemoryRegion bios; + /* * Map the upper 128 KiB of the BIOS just underneath the 1 MiB address * boundary. diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 457e8a34a5..29167de97d 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -1133,7 +1133,6 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, { const char *bios_name; char *filename; - MemoryRegion *bios; int bios_size, isa_bios_size; ssize_t ret; @@ -1149,8 +1148,8 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, (bios_size % 65536) != 0) { goto bios_error; } - bios = g_malloc(sizeof(*bios)); - memory_region_init_ram(bios, NULL, "pc.bios", bios_size, &error_fatal); + memory_region_init_ram(&x86ms->bios, NULL, "pc.bios", bios_size, + &error_fatal); if (sev_enabled()) { /* * The concept of a "reset" simply doesn't exist for @@ -1159,11 +1158,11 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, * the firmware as rom to properly re-initialize on reset. * Just go for a straight file load instead. */ - void *ptr = memory_region_get_ram_ptr(bios); + void *ptr = memory_region_get_ram_ptr(&x86ms->bios); load_image_size(filename, ptr, bios_size); x86_firmware_configure(ptr, bios_size); } else { - memory_region_set_readonly(bios, !isapc_ram_fw); + memory_region_set_readonly(&x86ms->bios, !isapc_ram_fw); ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size), -1); if (ret != 0) { goto bios_error; @@ -1173,7 +1172,7 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, /* map the last 128KB of the BIOS in ISA space */ isa_bios_size = MIN(bios_size, 128 * KiB); - memory_region_init_alias(&x86ms->isa_bios, NULL, "isa-bios", bios, + memory_region_init_alias(&x86ms->isa_bios, NULL, "isa-bios", &x86ms->bios, bios_size - isa_bios_size, isa_bios_size); memory_region_add_subregion_overlap(rom_memory, 0x100000 - isa_bios_size, @@ -1184,7 +1183,7 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, /* map all the bios at the top of memory */ memory_region_add_subregion(rom_memory, (uint32_t)(-bios_size), - bios); + &x86ms->bios); return; bios_error: From patchwork Wed May 8 22:15:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 795513 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp54203wra; Wed, 8 May 2024 15:16:30 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXU9SXpKITD726RAwBo++0AFPDOychd6+Vi6UcWKVfWOceaiNkabbIVq2CkTGof0riD3a76tP3U5B5uqgJiT1gA X-Google-Smtp-Source: AGHT+IGaPc2ySYrOc/IQ753KHVq8gNL65opQPqlf7me9zHIEeTNyQUDitERwSYgn3yvcrKDTrsw7 X-Received: by 2002:a05:620a:4907:b0:792:9332:c25 with SMTP id af79cd13be357-792bbd0e310mr157935285a.0.1715206589959; Wed, 08 May 2024 15:16:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715206589; cv=none; d=google.com; s=arc-20160816; b=FAKdB67L4a60/fHAXDQ0+SIe7AOf52EbNnU8J/gWVBtNiLVxmPhUtv3X/Q1NKGVMUd U+ipeAVYj88ZU4bwFvZos32Pfq75JEK3UegU8LPhDcDB2xzBprrnwCHxKW8G4EOyaNbm y6gQsnPk5bgUPgDjyNR4BPYwAtGRvYhho9DucbgNw9ivt1vPZGOuzgNpJf/EPNOxTxvQ /bLPcpnK+63Eh2neXd7OvKSezz9tHXsGZ5SEVG8xCM/vvSO2VDhYxl5S9OkwzRP/FKG/ RmhGhqnmAlTqaUWqSqCa5wDP6TTNjfvjGQFok/BxHeGx377pk5x75+RLvHtUw8uRin79 ki+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4D66cNAv7qIHWiiTBuwSDDuqQfsTkK/hRZN0LCYj6aY=; fh=pGYVoKmEbmBJXedzdvuKSuqi1EMwZm5z032l2+Fj52I=; b=rqqWYYpRHNw2ztyd+8QDDhTV937hBGK6ju70HfbCRL+aZpyWAXpCZNDZbHCAiOIzwX Jnmm2yIOfCKgBtkutA80p2UfkTwT8FGDSjNbNlyVC2Tmd60CR8vyffjHDfSa/BUuxsM5 7Katz+MkmBoBdS0iDJt2p+so7cm0KyhcG/24Nd/FF7Go4hh5/l0LTtELmAzckYCPUtDH sdMYVHmW5v+eBr/17hhnJ+Dt+uZDGrO3GIWjATZlcYdqpkO5rHzOjMaPyE6kPRmsCbBt +PabSFg0Jb7S2fAK5P5N9r8A7ZknckfO/LwIxv7Tyy2Kx1+Oki5kEL+7TXtpjdVy3oPj ToEA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Wfkd+b8r; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id yf6-20020a05620a3bc600b00792ba2f19e7si1194680qkn.139.2024.05.08.15.16.29 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 08 May 2024 15:16:29 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Wfkd+b8r; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s4pZl-0006h1-EU; Wed, 08 May 2024 18:15:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s4pZd-0006bh-GH for qemu-devel@nongnu.org; Wed, 08 May 2024 18:15:47 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s4pZa-0003m6-JM for qemu-devel@nongnu.org; Wed, 08 May 2024 18:15:41 -0400 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-41b7a26326eso2013565e9.3 for ; Wed, 08 May 2024 15:15:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715206537; x=1715811337; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4D66cNAv7qIHWiiTBuwSDDuqQfsTkK/hRZN0LCYj6aY=; b=Wfkd+b8rfi5hPnJGLyqGtsO6ya9AUFiCOTNAuCAFG7YcIltzpNmmcT1DMlM0jz10IT qfKHknx1qpV9J7lCr1m2kHUThQ+DthNtlFztm5V3PQI+1HQV7j21gIudOj+zM09c7uH0 OdcnTa97stz3i4u5nYT6T6rO4knHXMb8ApylPahaYEEMzeAJ8IALpvjaYqsyQooYT/42 8CWKEh+fJkcw3eITa3xcmLDWvyhAzzfrR+Za6sfIPmOvRZ7kb7Mb4VZ6ENENMIZiaXLX tQKslZ/j/1CKYzdBxVEglQ9/FZj6rVXr54PuQHkYGQTjJ3ygUasfvnwkz7HmKCM2giKb H+yQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715206537; x=1715811337; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4D66cNAv7qIHWiiTBuwSDDuqQfsTkK/hRZN0LCYj6aY=; b=s5D2tVqfkH/YM4ty/1I6CljKTbIC9dtCCNvJXakaI4dF8m+zbnxrxr3GpHvLMoWEP1 GqDIX6Ub/32IivNXRO+J/lSudzg+nW/KOAHTT6mA0q/2nLXcgZiOfUmISavdfPTmAEZi ilWONmIFrj/sFQuL8lyDLL/gxYvH2kHbDDEpBBCdnoKpn4eeVwAGtSLfCM3k5fPlZr2P i/KxFgjqNcvdQ4czlNeSBfazHRi60YKtr5DAr7bs2+/Im46qVjeWF24bztNi8wwZWO+G rYbm/TMiAI0t6pxKDRZ7xmNr8D8Rh16CD8radOCCDEYmid1m62Ao42vG9+aiktHMmdCS vteg== X-Gm-Message-State: AOJu0YxLxwD2hSixYsHeGzfzSArcNX8iOTaLJe0L4vS9BnhJoeEyK8lw En4p4FchouSWBAfI9NInZO3Bx8K7PFKb1okIbEYWe7gRMOBHpa+majfxUPynW8ar0Z8J3wHxO9k V X-Received: by 2002:a7b:c45a:0:b0:41b:d4a3:ad6a with SMTP id 5b1f17b1804b1-41f71ec1adcmr35196295e9.17.1715206536948; Wed, 08 May 2024 15:15:36 -0700 (PDT) Received: from m1x-phil.lan (sar95-h02-176-184-10-250.dsl.sta.abo.bbox.fr. [176.184.10.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41f87c254bfsm36824835e9.17.2024.05.08.15.15.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 08 May 2024 15:15:36 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL v2 16/28] hw/i386/x86: Extract x86_isa_bios_init() from x86_bios_rom_init() Date: Thu, 9 May 2024 00:15:18 +0200 Message-ID: <20240508221518.72350-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240508221518.72350-1-philmd@linaro.org> References: <20240508221518.72350-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bernhard Beschow The function is inspired by pc_isa_bios_init() and should eventually replace it. Using x86_isa_bios_init() rather than pc_isa_bios_init() fixes pflash commands to work in the isa-bios region. While at it convert the magic number 0x100000 (== 1MiB) to increase readability. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow Message-ID: <20240508175507.22270-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/x86.h | 2 ++ hw/i386/x86.c | 25 ++++++++++++++++--------- 2 files changed, 18 insertions(+), 9 deletions(-) diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 55c6809ae0..d7b7d3f3ce 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -129,6 +129,8 @@ void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp); +void x86_isa_bios_init(MemoryRegion *isa_bios, MemoryRegion *isa_memory, + MemoryRegion *bios, bool read_only); void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, MemoryRegion *rom_memory, bool isapc_ram_fw); diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 29167de97d..c61f4ebfa6 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -1128,12 +1128,25 @@ void x86_load_linux(X86MachineState *x86ms, nb_option_roms++; } +void x86_isa_bios_init(MemoryRegion *isa_bios, MemoryRegion *isa_memory, + MemoryRegion *bios, bool read_only) +{ + uint64_t bios_size = memory_region_size(bios); + uint64_t isa_bios_size = MIN(bios_size, 128 * KiB); + + memory_region_init_alias(isa_bios, NULL, "isa-bios", bios, + bios_size - isa_bios_size, isa_bios_size); + memory_region_add_subregion_overlap(isa_memory, 1 * MiB - isa_bios_size, + isa_bios, 1); + memory_region_set_readonly(isa_bios, read_only); +} + void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, MemoryRegion *rom_memory, bool isapc_ram_fw) { const char *bios_name; char *filename; - int bios_size, isa_bios_size; + int bios_size; ssize_t ret; /* BIOS load */ @@ -1171,14 +1184,8 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, g_free(filename); /* map the last 128KB of the BIOS in ISA space */ - isa_bios_size = MIN(bios_size, 128 * KiB); - memory_region_init_alias(&x86ms->isa_bios, NULL, "isa-bios", &x86ms->bios, - bios_size - isa_bios_size, isa_bios_size); - memory_region_add_subregion_overlap(rom_memory, - 0x100000 - isa_bios_size, - &x86ms->isa_bios, - 1); - memory_region_set_readonly(&x86ms->isa_bios, !isapc_ram_fw); + x86_isa_bios_init(&x86ms->isa_bios, rom_memory, &x86ms->bios, + !isapc_ram_fw); /* map all the bios at the top of memory */ memory_region_add_subregion(rom_memory,