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[209.51.188.17]) by mx.google.com with ESMTPS id y7-20020ae9f407000000b0078edc1974b6si2594263qkl.455.2024.05.03.00.20.36 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 03 May 2024 00:20:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dcYmfF/E"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s2nDY-0000mz-J3; Fri, 03 May 2024 03:20:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s2nDW-0000mW-JX for qemu-devel@nongnu.org; Fri, 03 May 2024 03:20:26 -0400 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s2nDU-0001Ev-Rj for qemu-devel@nongnu.org; Fri, 03 May 2024 03:20:26 -0400 Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-41dc9c83e57so9514845e9.0 for ; Fri, 03 May 2024 00:20:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714720822; x=1715325622; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oukcdiVQUJdJhgIgSZBe2+14jjl41PU9P9dpGWfTjTk=; b=dcYmfF/EtOphQuIq3jWxJ4YtudV6e9gc1wVOLZUax7vj+JMabRayq4zCf2rGDUFita jUzjy/iREpX0tU6pJ1XXlKYLCol3kVXa1+Dlv+wvnbLRlquwDB7Zj163FYEZIm2YTy9S tPC4BSxU2Fn9jeJJPuzLdc21j2KTLSPjCLaKdKKzSDFDVFe6oSZcutl5AgL7aJ3mBno2 m0o9nPUDJFPZeJeqpIZ9BdPoS10NgmPrXzbv65haxukKaLRLW7ZXtQII2IwqA7OTZw7t Sx+IE95540L3saj0RxjEUmZ4RjKyAj/wZ83ScvwY+N4KoqGvb/BCoIWBE8mbP3J14EEX MlmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714720822; x=1715325622; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oukcdiVQUJdJhgIgSZBe2+14jjl41PU9P9dpGWfTjTk=; b=noPATPhO+EKAVJbSjBCcqf3hF9Y/YfPmhUrjMBv6lM2ZuTd2XX2bJfNvb0y4cTvzu/ XZJaH5TlAX73gNNqWRhDVtJVmuiS+iA70FGg8hBwBtes26lcoE7ae8+RjKCSWiSh/sQe v9S/spyB5utKxoYOcw5Iga+ZIe31YBuv7DL4Vq2yuv0+n8rjCMJxGnlG32yFANUCP/WU CvbZlRhBwIN9hX7RuEQSPy5KZH1Gl/juGbmPtRwV6Nt/b/svgY/0U+f55noL5AlCE0mF Zz7kpmHDOGz3mFnkWMKz7cigiJ6XxZA6RDvP01C7kNJUpawB949ogalKUdPF3VXojJUK O8dQ== X-Gm-Message-State: AOJu0YwuWyvd1FEv2Loek9lUVsoiyqGwiQcs0mAfrrkX0NwIv7kSBf68 Q9lSkE2Xr+qEyD2TzlWXNxcW0c7UBC+WPhVvU422VlREmgYyYNWyAiLdQOxkQMZhQ0edKeqUzKm K X-Received: by 2002:a05:600c:4508:b0:417:eb5d:281b with SMTP id t8-20020a05600c450800b00417eb5d281bmr4361515wmo.17.1714720822399; Fri, 03 May 2024 00:20:22 -0700 (PDT) Received: from m1x-phil.lan ([176.176.179.187]) by smtp.gmail.com with ESMTPSA id s7-20020a05600c384700b0041c12324eb6sm8377191wmr.22.2024.05.03.00.20.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 03 May 2024 00:20:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU Date: Fri, 3 May 2024 09:20:05 +0200 Message-ID: <20240503072014.24751-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240503072014.24751-1-philmd@linaro.org> References: <20240503072014.24751-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson ALPHA_CPU has a dynamic object type assert, which is unnecessary considering that these are all class hooks. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 15 ++++++--------- target/alpha/helper.c | 8 ++++---- 2 files changed, 10 insertions(+), 13 deletions(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 05f9ee41e9..f98d022671 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -28,25 +28,22 @@ static void alpha_cpu_set_pc(CPUState *cs, vaddr value) { - AlphaCPU *cpu = ALPHA_CPU(cs); - - cpu->env.pc = value; + CPUAlphaState *env = cpu_env(cs); + env->pc = value; } static vaddr alpha_cpu_get_pc(CPUState *cs) { - AlphaCPU *cpu = ALPHA_CPU(cs); - - return cpu->env.pc; + CPUAlphaState *env = cpu_env(cs); + return env->pc; } static void alpha_restore_state_to_opc(CPUState *cs, const TranslationBlock *tb, const uint64_t *data) { - AlphaCPU *cpu = ALPHA_CPU(cs); - - cpu->env.pc = data[0]; + CPUAlphaState *env = cpu_env(cs); + env->pc = data[0]; } static bool alpha_cpu_has_work(CPUState *cs) diff --git a/target/alpha/helper.c b/target/alpha/helper.c index d6d4353edd..c5e4958f8b 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -124,7 +124,7 @@ void alpha_cpu_record_sigsegv(CPUState *cs, vaddr address, MMUAccessType access_type, bool maperr, uintptr_t retaddr) { - AlphaCPU *cpu = ALPHA_CPU(cs); + CPUAlphaState *env = cpu_env(cs); target_ulong mmcsr, cause; /* Assuming !maperr, infer the missing protection. */ @@ -155,9 +155,9 @@ void alpha_cpu_record_sigsegv(CPUState *cs, vaddr address, } /* Record the arguments that PALcode would give to the kernel. */ - cpu->env.trap_arg0 = address; - cpu->env.trap_arg1 = mmcsr; - cpu->env.trap_arg2 = cause; + env->trap_arg0 = address; + env->trap_arg1 = mmcsr; + env->trap_arg2 = cause; } #else /* Returns the OSF/1 entMM failure indication, or -1 on success. */ From patchwork Fri May 3 07:20:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 794361 Delivered-To: patch@linaro.org Received: by 2002:adf:a153:0:b0:34d:5089:5a9e with SMTP id r19csp609742wrr; Fri, 3 May 2024 00:21:41 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX8HFqoEw5Gp6Bu9fFUlnz61Cl7+DwOKN2m+PpRZYzHoISi7yzYbFccNlThDksGaUjIfaxK4RQhaK8IutjAYv7u X-Google-Smtp-Source: AGHT+IGWxdExkCzNW17ELoQ/gh2K/QKlTWBCvKyNQSi8cELwrkoM56H5suE/7zl6TyQ1UUSKCk0e X-Received: by 2002:a05:620a:56c1:b0:78e:d2a8:b4de with SMTP id wh1-20020a05620a56c100b0078ed2a8b4demr1775557qkn.20.1714720901385; Fri, 03 May 2024 00:21:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714720901; cv=none; d=google.com; s=arc-20160816; b=ZRBgYPgha7NAaIZNmASko1amKQshh+NHDvgOZyv0UwMuLkDxlrrUj2H+Ao8/xHG3tk 7IHDULw/F6ogIaOXzzvzC3mHhX+gnWyfik8jbsi/M6y9dgVnfSAkFU0iSeaM4v4CeRLQ x4g1CU4382gjfSor/9irrHGaRqmIMxXvUcQrgR084xzRY+/hIT+S8BDgjn8KPHEuEehU r1VWa/CrQRWQEjpy/JfVHFv+jEvUL8f7vyiPdaQKT3i5ztSd25qf9lFFEu3iYZDDSu8l tFqac/f6GrV327+BdHO8VQT6e61vduFe3XiaNIE41V9dhDK6ncere9koVVRCnlUw7lNh YuwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8EARN2QjxHRUGZxuseUERnN42PxuL4o+f6Wcb9HZQWs=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=RxQ+bps2RzKQt5I+JcW7KkivAxR/Td/pX39rczr3CFpjM9cnm9rWIt3ZBxJwb57tRx rZ6OTfo1BuXGeBPjG6g7TVBzCNWNTsohLNrRVtJiajclcKVpXuuGh7CSewizVnatBEUf G/Fmso4d7/Iv8xWGGw7ARDWBxMmCpcVZaF5kXvaYPJ8l7myusTu5iOaQyuoleh8lzpD4 eDozRrjeQfdcrn5mwjbc3d6p+3xHuOVe4Zw21PnUdYyeIGHKG60wNSD59E/AJ03aJ4q5 CRVKls4qjvJTbIPFqr/Dd8mphZuM3HgJOk1F7MEO7j+kZ54cDDtHB/hHujlmXxPLhaWW PKbg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DkBYiH55; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 03 May 2024 00:20:27 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 2/9] target/alpha: Hoist branch shift to initial decode Date: Fri, 3 May 2024 09:20:06 +0200 Message-ID: <20240503072014.24751-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240503072014.24751-1-philmd@linaro.org> References: <20240503072014.24751-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index a97cd54f0c..52c2e6248b 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -432,7 +432,7 @@ static bool use_goto_tb(DisasContext *ctx, uint64_t dest) static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) { - uint64_t dest = ctx->base.pc_next + (disp << 2); + uint64_t dest = ctx->base.pc_next + disp; if (ra != 31) { tcg_gen_movi_i64(ctx->ir[ra], ctx->base.pc_next); @@ -455,7 +455,7 @@ static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, TCGv cmp, uint64_t imm, int32_t disp) { - uint64_t dest = ctx->base.pc_next + (disp << 2); + uint64_t dest = ctx->base.pc_next + disp; TCGLabel *lab_true = gen_new_label(); if (use_goto_tb(ctx, dest)) { @@ -1382,7 +1382,7 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn) real_islit = islit = extract32(insn, 12, 1); lit = extract32(insn, 13, 8); - disp21 = sextract32(insn, 0, 21); + disp21 = sextract32(insn, 0, 21) * 4; disp16 = sextract32(insn, 0, 16); disp12 = sextract32(insn, 0, 12); From patchwork Fri May 3 07:20:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 794355 Delivered-To: patch@linaro.org Received: by 2002:adf:a153:0:b0:34d:5089:5a9e with SMTP id r19csp609546wrr; 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Fri, 03 May 2024 00:20:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 3/9] target/alpha: Use DISAS_NEXT definition instead of magic '0' value Date: Fri, 3 May 2024 09:20:07 +0200 Message-ID: <20240503072014.24751-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240503072014.24751-1-philmd@linaro.org> References: <20240503072014.24751-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20240424234436.995410-4-richard.henderson@linaro.org> [PMD: Split bigger patch, part 1/5] Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/translate.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 52c2e6248b..9ad7bf6e5f 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -440,8 +440,10 @@ static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) /* Notice branch-to-next; used to initialize RA with the PC. */ if (disp == 0) { - return 0; - } else if (use_goto_tb(ctx, dest)) { + return DISAS_NEXT; + } + + if (use_goto_tb(ctx, dest)) { tcg_gen_goto_tb(0); tcg_gen_movi_i64(cpu_pc, dest); tcg_gen_exit_tb(ctx->base.tb, 0); From patchwork Fri May 3 07:20:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 794362 Delivered-To: patch@linaro.org Received: by 2002:adf:a153:0:b0:34d:5089:5a9e with SMTP id r19csp609777wrr; Fri, 3 May 2024 00:21:49 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXCeK/Q9o7B8WkshBl7dTNtiqskwxbyQ2a0pzSRPBebhSXtiXWyYNzSyPMSrd5sLS6AdmOYw5RDmdRtw8bGDRTM X-Google-Smtp-Source: AGHT+IHbzcH+0k6fdOxeraWGGNKiXb2V/iyeGLaqhSfaj2okRBYYcEY+erC3wKYIUiSMCwCEbdM+ X-Received: by 2002:a05:622a:13cd:b0:43c:5d8c:f854 with SMTP id p13-20020a05622a13cd00b0043c5d8cf854mr2051201qtk.11.1714720909615; Fri, 03 May 2024 00:21:49 -0700 (PDT) ARC-Seal: i=1; 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Fri, 03 May 2024 00:20:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 4/9] target/alpha: Inline DISAS_PC_UPDATED and return DISAS_NORETURN Date: Fri, 3 May 2024 09:20:08 +0200 Message-ID: <20240503072014.24751-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240503072014.24751-1-philmd@linaro.org> References: <20240503072014.24751-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Inline DISAS_PC_UPDATED switch case from alpha_tr_tb_stop(): switch (ctx->base.is_jmp) { ... case DISAS_PC_UPDATED: tcg_gen_lookup_and_goto_ptr(); break; Signed-off-by: Richard Henderson Message-Id: <20240424234436.995410-4-richard.henderson@linaro.org> [PMD: Split bigger patch, part 2/5] Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/translate.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 9ad7bf6e5f..01914e7b56 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -450,7 +450,8 @@ static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) return DISAS_NORETURN; } else { tcg_gen_movi_i64(cpu_pc, dest); - return DISAS_PC_UPDATED; + tcg_gen_lookup_and_goto_ptr(); + return DISAS_NORETURN; } } @@ -479,7 +480,8 @@ static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, TCGv_i64 p = tcg_constant_i64(ctx->base.pc_next); tcg_gen_movcond_i64(cond, cpu_pc, cmp, i, d, p); - return DISAS_PC_UPDATED; + tcg_gen_lookup_and_goto_ptr(); + return DISAS_NORETURN; } } From patchwork Fri May 3 07:20:09 2024 Content-Type: text/plain; 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Signed-off-by: Richard Henderson Message-Id: <20240424234436.995410-4-richard.henderson@linaro.org> [PMD: Split bigger patch, part 3/5] Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/translate.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 01914e7b56..41151f002e 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -447,12 +447,12 @@ static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) tcg_gen_goto_tb(0); tcg_gen_movi_i64(cpu_pc, dest); tcg_gen_exit_tb(ctx->base.tb, 0); - return DISAS_NORETURN; } else { tcg_gen_movi_i64(cpu_pc, dest); tcg_gen_lookup_and_goto_ptr(); - return DISAS_NORETURN; } + + return DISAS_NORETURN; } static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, @@ -472,8 +472,6 @@ static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, tcg_gen_goto_tb(1); tcg_gen_movi_i64(cpu_pc, dest); tcg_gen_exit_tb(ctx->base.tb, 1); - - return DISAS_NORETURN; } else { TCGv_i64 i = tcg_constant_i64(imm); TCGv_i64 d = tcg_constant_i64(dest); @@ -481,8 +479,9 @@ static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, tcg_gen_movcond_i64(cond, cpu_pc, cmp, i, d, p); tcg_gen_lookup_and_goto_ptr(); - return DISAS_NORETURN; } + + return DISAS_NORETURN; } static DisasJumpType gen_bcond(DisasContext *ctx, TCGCond cond, int ra, From patchwork Fri May 3 07:20:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 794356 Delivered-To: patch@linaro.org Received: by 2002:adf:a153:0:b0:34d:5089:5a9e with SMTP id r19csp609612wrr; Fri, 3 May 2024 00:21:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXPeMsIi59ymHFb5UsFxYm3I2qQ2oEp+q/h05xjXh3AFlwRO1VKXvr8wS+Of/NnbujFpZK+Ik/K3jdpVLTqJNNn X-Google-Smtp-Source: AGHT+IFoifaP0bXEDX/szQsP/jH3S0riWC7N5AIVQhl3ROcBxpfuvmbhfdkSpw5IeSfVafV2EbQW X-Received: by 2002:ad4:5c68:0:b0:6a0:b4f3:d344 with SMTP id i8-20020ad45c68000000b006a0b4f3d344mr2141710qvh.35.1714720874356; Fri, 03 May 2024 00:21:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714720874; cv=none; d=google.com; s=arc-20160816; b=VrGxATh2A/FjOw9cN0RKr0ku41ppdxzoHCJr8hXBr+4yHgT8k5IskKc/mbAbjLd9Do zXiXf4Q/C4H9vu4b3amiSLB7QE9eXeMNb3G64glCKEY4X1bWJ2OQ33HAx1IBbuvh/6zE 8ClaW4LLAAP1VNpdPdFwawjvQIVx2d6hbH+MMTV6yGjnsvCmKeKA2uslzSxsGzwYgfDX ybYY8H0H5xlkpfrOvI05o6zP3ARcF4v8Z7EAUTpsCkMH04bZ9Ntc9AS9wBcfc5EKpk4u 1E2T7DTsdrwiGFi1FWAr6bQD1d3iz4rafg6OHVMX+QBWkR8GbiqbXiO9XwZwgsyiFlly DA2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LEwRBwaFx3imllc5jSpZeArCH45vOi4quQKo4jZx97Y=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=oF7PrhB033FXi0FRf7yU+QU7JuaT8j+qzPxlWmu0vdAZZVs/DVXehtu9gHMcl3cgI5 PczBuZGfGjRkchCWdGt6PQ+TVB7FRpMzJgP6n0A9x4F6tF0rYsodhj66kCyGUuwfKMfQ vG0/zgf6cFfYvGhavjR98eLP2G8dztfLvAM2jjz9Poy57kD0wbkaHcP9WXLx+wpG8qJ/ JrGLI32T3pO7TXH18/fvd37N9oT80Fl4tzmKHqWEocB6AcJ0o0um2XpWCjXdwoGedfzh 8DjA9ataLnWypvYunY6YYQO2ACBpnFLidZpU7BGTuTAIfleCMfnBNF+Z5nlc25ictBi5 5TIw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AukzeALr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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But it's perfectly fine for e.g. the branch fallthrough to use_goto_tb, and the branch destination to use an indirect branch. Signed-off-by: Richard Henderson Message-Id: <20240424234436.995410-4-richard.henderson@linaro.org> [PMD: Split bigger patch, part 4/5] Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/translate.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 41151f002e..079bd5d3fd 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -461,23 +461,20 @@ static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, uint64_t dest = ctx->base.pc_next + disp; TCGLabel *lab_true = gen_new_label(); - if (use_goto_tb(ctx, dest)) { - tcg_gen_brcondi_i64(cond, cmp, imm, lab_true); - + tcg_gen_brcondi_i64(cond, cmp, imm, lab_true); + if (use_goto_tb(ctx, ctx->base.pc_next)) { tcg_gen_goto_tb(0); tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next); tcg_gen_exit_tb(ctx->base.tb, 0); - - gen_set_label(lab_true); + } + /* FALLTHRU */ + gen_set_label(lab_true); + if (use_goto_tb(ctx, dest)) { tcg_gen_goto_tb(1); tcg_gen_movi_i64(cpu_pc, dest); tcg_gen_exit_tb(ctx->base.tb, 1); } else { - TCGv_i64 i = tcg_constant_i64(imm); - TCGv_i64 d = tcg_constant_i64(dest); - TCGv_i64 p = tcg_constant_i64(ctx->base.pc_next); - - tcg_gen_movcond_i64(cond, cpu_pc, cmp, i, d, p); + tcg_gen_movi_i64(cpu_pc, dest); tcg_gen_lookup_and_goto_ptr(); } From patchwork Fri May 3 07:20:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 794357 Delivered-To: patch@linaro.org Received: by 2002:adf:a153:0:b0:34d:5089:5a9e with SMTP id r19csp609656wrr; Fri, 3 May 2024 00:21:20 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUSm1oBuyEQLdlA3PO4MPq0mDfmzDHUkMVKew7T+M++mnjzr762ht7F4v/2bU5h2JIV5cpsMka6Mty5xk6vS7aN X-Google-Smtp-Source: AGHT+IHhbuctOF25gpRj0JCKBrkyxfCcfHuh5OikkxAwU7NGhyBzGVJ0chmUIWdxuoUaPH6V6lW6 X-Received: by 2002:a05:6214:d63:b0:6a0:c117:372e with SMTP id 3-20020a0562140d6300b006a0c117372emr2073296qvs.12.1714720880752; Fri, 03 May 2024 00:21:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714720880; cv=none; d=google.com; s=arc-20160816; b=QyFSyKIJE7BuQ/S1dCpnmgKma+7qKefYcbZTIoz5cehs0vbjV+pH0szZfYmQrBN6+L V4ad1i4pg0ovaTRKV9ATIsxO3TfcR0QZhtmyUlIwfOhkqfM0QChxmExeUTHfA8A+vjeT aUKUDFN6cgp5ufzSv8yArDGPxQaMoiBrR7+ebhhW8+alt+uDXn6dvPn9V9z+Db1UVJvL X1ax4Rl7GFovg9IRxvIdvkDmmu9o77Vn0/KGkuW/l4tHNv+WxB1IHVhpkY/BpBQ7lW46 IJefD46+Gsmw3FWja2soye9zW8qvy1Q14yz3tGj0X+QmTfFwu5myfA9B0Na0CiThCQOp 0mIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=0lknL/ATTWgGI9RKDIzgYaRoy5BVwYjHb6qLBuptERQ=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=ZjQJZSJC2GsqKCuHKrKh/oBX+y45CJ5MthJ7tCRIvjz3vF3eB5h90CI6Y6TzFNc1Ke fHnvQoC0zoHyJBsZacIy+QhRKG+JVqUKVY6QAN3drinFa6lyohlrf6Ye/PY5Mx07sDFg K55jlOSKbIN38W9QKxC6UZdO75J3NYCv8RuMwX8picfKq01ZJsKs8miXx4rtUDaabP9x wkDDr1sMdUyhjwzcCBVc3qQkNxzGdJLO42OX5KVtTkwAd3th5oZ50RoYvtLmrcBfzMai 94oRGrlHG+k6ChYSYkMlgZiU6Aqf/tRohEb72E45IJdpQ+1zl8Tank7y72PKhQKdABEh jZ7g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gmvnklvd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 03 May 2024 00:20:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 7/9] target/alpha: Split out gen_goto_tb Date: Fri, 3 May 2024 09:20:11 +0200 Message-ID: <20240503072014.24751-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240503072014.24751-1-philmd@linaro.org> References: <20240503072014.24751-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Message-Id: <20240424234436.995410-4-richard.henderson@linaro.org> [PMD: Split bigger patch, part 5/5] Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé --- target/alpha/translate.c | 51 +++++++++++++--------------------------- 1 file changed, 16 insertions(+), 35 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 079bd5d3fd..c1a55e5153 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -425,15 +425,22 @@ static DisasJumpType gen_store_conditional(DisasContext *ctx, int ra, int rb, return DISAS_NEXT; } -static bool use_goto_tb(DisasContext *ctx, uint64_t dest) +static void gen_goto_tb(DisasContext *ctx, int idx, int32_t disp) { - return translator_use_goto_tb(&ctx->base, dest); + uint64_t dest = ctx->base.pc_next + disp; + + if (translator_use_goto_tb(&ctx->base, dest)) { + tcg_gen_goto_tb(idx); + tcg_gen_movi_i64(cpu_pc, dest); + tcg_gen_exit_tb(ctx->base.tb, idx); + } else { + tcg_gen_movi_i64(cpu_pc, dest); + tcg_gen_lookup_and_goto_ptr(); + } } static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) { - uint64_t dest = ctx->base.pc_next + disp; - if (ra != 31) { tcg_gen_movi_i64(ctx->ir[ra], ctx->base.pc_next); } @@ -442,41 +449,19 @@ static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) if (disp == 0) { return DISAS_NEXT; } - - if (use_goto_tb(ctx, dest)) { - tcg_gen_goto_tb(0); - tcg_gen_movi_i64(cpu_pc, dest); - tcg_gen_exit_tb(ctx->base.tb, 0); - } else { - tcg_gen_movi_i64(cpu_pc, dest); - tcg_gen_lookup_and_goto_ptr(); - } - + gen_goto_tb(ctx, 0, disp); return DISAS_NORETURN; } static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, TCGv cmp, uint64_t imm, int32_t disp) { - uint64_t dest = ctx->base.pc_next + disp; TCGLabel *lab_true = gen_new_label(); tcg_gen_brcondi_i64(cond, cmp, imm, lab_true); - if (use_goto_tb(ctx, ctx->base.pc_next)) { - tcg_gen_goto_tb(0); - tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next); - tcg_gen_exit_tb(ctx->base.tb, 0); - } - /* FALLTHRU */ + gen_goto_tb(ctx, 0, 0); gen_set_label(lab_true); - if (use_goto_tb(ctx, dest)) { - tcg_gen_goto_tb(1); - tcg_gen_movi_i64(cpu_pc, dest); - tcg_gen_exit_tb(ctx->base.tb, 1); - } else { - tcg_gen_movi_i64(cpu_pc, dest); - tcg_gen_lookup_and_goto_ptr(); - } + gen_goto_tb(ctx, 1, disp); return DISAS_NORETURN; } @@ -2920,12 +2905,8 @@ static void alpha_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) case DISAS_NORETURN: break; case DISAS_TOO_MANY: - if (use_goto_tb(ctx, ctx->base.pc_next)) { - tcg_gen_goto_tb(0); - tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next); - tcg_gen_exit_tb(ctx->base.tb, 0); - } - /* FALLTHRU */ + gen_goto_tb(ctx, 0, 0); + break; case DISAS_PC_STALE: tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next); /* FALLTHRU */ From patchwork Fri May 3 07:20:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 794358 Delivered-To: patch@linaro.org Received: by 2002:adf:a153:0:b0:34d:5089:5a9e with SMTP id r19csp609683wrr; Fri, 3 May 2024 00:21:26 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXp1QuvWpZhCLmJxYTXjAwr1JoMvoUx+sftUpY02lkaGWZXSMHUs/yA+9fPUfrA/Iw2ixVfBwc8uONDTBUVWYm8 X-Google-Smtp-Source: AGHT+IFhRjNhl7fGJuWXHsb1XMOdNY3SG5LKsc4klCd2eTxdsUGCRQ4zpEN28HqmV1wf5io+j7th X-Received: by 2002:a05:620a:2724:b0:790:8926:a69e with SMTP id b36-20020a05620a272400b007908926a69emr2065221qkp.74.1714720886473; Fri, 03 May 2024 00:21:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714720886; cv=none; d=google.com; s=arc-20160816; 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Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/translate.c | 41 ++++++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index c1a55e5153..86402d96d5 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -252,6 +252,11 @@ static void st_flag_byte(TCGv val, unsigned shift) tcg_gen_st8_i64(val, tcg_env, get_flag_ofs(shift)); } +static void gen_pc_disp(DisasContext *ctx, TCGv dest, int32_t disp) +{ + tcg_gen_movi_i64(dest, ctx->base.pc_next + disp); +} + static void gen_excp_1(int exception, int error_code) { TCGv_i32 tmp1, tmp2; @@ -263,7 +268,7 @@ static void gen_excp_1(int exception, int error_code) static DisasJumpType gen_excp(DisasContext *ctx, int exception, int error_code) { - tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next); + gen_pc_disp(ctx, cpu_pc, 0); gen_excp_1(exception, error_code); return DISAS_NORETURN; } @@ -427,14 +432,12 @@ static DisasJumpType gen_store_conditional(DisasContext *ctx, int ra, int rb, static void gen_goto_tb(DisasContext *ctx, int idx, int32_t disp) { - uint64_t dest = ctx->base.pc_next + disp; - - if (translator_use_goto_tb(&ctx->base, dest)) { + if (translator_use_goto_tb(&ctx->base, ctx->base.pc_next + disp)) { tcg_gen_goto_tb(idx); - tcg_gen_movi_i64(cpu_pc, dest); + gen_pc_disp(ctx, cpu_pc, disp); tcg_gen_exit_tb(ctx->base.tb, idx); } else { - tcg_gen_movi_i64(cpu_pc, dest); + gen_pc_disp(ctx, cpu_pc, disp); tcg_gen_lookup_and_goto_ptr(); } } @@ -442,7 +445,7 @@ static void gen_goto_tb(DisasContext *ctx, int idx, int32_t disp) static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) { if (ra != 31) { - tcg_gen_movi_i64(ctx->ir[ra], ctx->base.pc_next); + gen_pc_disp(ctx, ctx->ir[ra], 0); } /* Notice branch-to-next; used to initialize RA with the PC. */ @@ -1091,7 +1094,7 @@ static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode) } /* Allow interrupts to be recognized right away. */ - tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next); + gen_pc_disp(ctx, cpu_pc, 0); return DISAS_PC_UPDATED_NOCHAIN; case 0x36: @@ -1138,19 +1141,17 @@ static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode) #else { TCGv tmp = tcg_temp_new(); - uint64_t exc_addr = ctx->base.pc_next; - uint64_t entry = ctx->palbr; + uint64_t entry; + gen_pc_disp(ctx, tmp, 0); if (ctx->tbflags & ENV_FLAG_PAL_MODE) { - exc_addr |= 1; + tcg_gen_ori_i64(tmp, tmp, 1); } else { - tcg_gen_movi_i64(tmp, 1); - st_flag_byte(tmp, ENV_FLAG_PAL_SHIFT); + st_flag_byte(tcg_constant_i64(1), ENV_FLAG_PAL_SHIFT); } - - tcg_gen_movi_i64(tmp, exc_addr); tcg_gen_st_i64(tmp, tcg_env, offsetof(CPUAlphaState, exc_addr)); + entry = ctx->palbr; entry += (palcode & 0x80 ? 0x2000 + (palcode - 0x80) * 64 : 0x1000 + palcode * 64); @@ -2344,9 +2345,13 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn) /* JMP, JSR, RET, JSR_COROUTINE. These only differ by the branch prediction stack action, which of course we don't implement. */ vb = load_gpr(ctx, rb); - tcg_gen_andi_i64(cpu_pc, vb, ~3); if (ra != 31) { - tcg_gen_movi_i64(ctx->ir[ra], ctx->base.pc_next); + tmp = tcg_temp_new(); + tcg_gen_andi_i64(tmp, vb, ~3); + gen_pc_disp(ctx, ctx->ir[ra], 0); + tcg_gen_mov_i64(cpu_pc, tmp); + } else { + tcg_gen_andi_i64(cpu_pc, vb, ~3); } ret = DISAS_PC_UPDATED; break; @@ -2908,7 +2913,7 @@ static void alpha_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) gen_goto_tb(ctx, 0, 0); break; case DISAS_PC_STALE: - tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next); + gen_pc_disp(ctx, cpu_pc, 0); /* FALLTHRU */ case DISAS_PC_UPDATED: tcg_gen_lookup_and_goto_ptr(); From patchwork Fri May 3 07:20:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 794359 Delivered-To: patch@linaro.org Received: by 2002:adf:a153:0:b0:34d:5089:5a9e with SMTP id r19csp609738wrr; Fri, 3 May 2024 00:21:41 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWoNHMB6ACTug1TIbyUrgV3lqT7nIQNYVpUWIey9wrsWFYd4SMqcKVmpMtn6kW9ffLXW2eBIyMSxEgHi0pCkzdR X-Google-Smtp-Source: AGHT+IG/03s30gQCT7I1iejMlyD5567iFjFyB/HDqtgBdeUxRoGMK4aXqbQD8UJJ/xOxkgr/ANoC X-Received: by 2002:a37:ef13:0:b0:790:c7f6:597b with SMTP id j19-20020a37ef13000000b00790c7f6597bmr1768087qkk.50.1714720900946; Fri, 03 May 2024 00:21:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714720900; cv=none; d=google.com; s=arc-20160816; b=rLl/Xa1Tv+iPhPMyZkRSXYAORnt6UAQ1s5+CvcKNOgSU9J/VkU1CRraT/cWSSVb27g XLLqKNytRsjHAgWMkDhQOwkg00W9Ks45kAYjrS5P1gDuglAY6JTdI090xgib86OBCwl8 rViJt0ThVEvKW2L+6e83fbaB62oP8dzLVP8o2T8p03jsYqTutoTdoWG8gnmX1rLFMUI7 zN+kvDDPhvcKLlU6DBdLXHCgBNKZ98408si1YfWlWBhiWmVWj8vGMZdlDo78jamNWEt1 lNtk14AE/rqd8umIR7SaQkUDmBAZ4JB7xxCMvI8B+GQ2CWv8wAmw1rQ50+IhmnehNChx Cxiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=EQCp32MhwULxErW3cF6VE6b6u1RptQVLJu9xOLH0dkQ=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=rIphov0tKIfxfj6QvmH/NR6+idOcSNPUEX4RaHc0PYpwXDxwtkf2lP9Ui6j+XA9m0A j3O01mnwygNJuuvn41+ooCvpiINL8xSqrG8VX4OyHojT8yE5bN6Q7URHb7l9o6rgs86n 5csLy6BLAXmToRG5Bvq2wzihjLZGODFw+9dLv/LjJVMpnLOTOTUPOpFLpxJ6wfHo58bp Uq+fVmNGqQYXnM5UOLz4bjShMXg4t1b0LyWClcVBguA+yPOtms/rIqBV3AhQPKiU9gzi hK5CLfNkTJ1eyxQTfj9rqmkMvXtL4IuONJ6mxCv0E59g61Utd7rrLMuPKn4jVyDTeaIv AzAw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=d4r9X6kQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 03 May 2024 00:21:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 9/9] target/alpha: Implement CF_PCREL Date: Fri, 3 May 2024 09:20:13 +0200 Message-ID: <20240503072014.24751-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240503072014.24751-1-philmd@linaro.org> References: <20240503072014.24751-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 23 ++++++++++++++++++++++- target/alpha/translate.c | 29 +++++++++++++++++++++++++---- 2 files changed, 47 insertions(+), 5 deletions(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index f98d022671..0e2fbcb397 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -38,12 +38,27 @@ static vaddr alpha_cpu_get_pc(CPUState *cs) return env->pc; } +static void alpha_cpu_synchronize_from_tb(CPUState *cs, + const TranslationBlock *tb) +{ + /* The program counter is always up to date with CF_PCREL. */ + if (!(tb_cflags(tb) & CF_PCREL)) { + CPUAlphaState *env = cpu_env(cs); + env->pc = tb->pc; + } +} + static void alpha_restore_state_to_opc(CPUState *cs, const TranslationBlock *tb, const uint64_t *data) { CPUAlphaState *env = cpu_env(cs); - env->pc = data[0]; + + if (tb_cflags(tb) & CF_PCREL) { + env->pc = (env->pc & TARGET_PAGE_MASK) | data[0]; + } else { + env->pc = data[0]; + } } static bool alpha_cpu_has_work(CPUState *cs) @@ -78,6 +93,11 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev); Error *local_err = NULL; +#ifndef CONFIG_USER_ONLY + /* Use pc-relative instructions in system-mode */ + cs->tcg_cflags |= CF_PCREL; +#endif + cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); @@ -190,6 +210,7 @@ static const struct SysemuCPUOps alpha_sysemu_ops = { static const TCGCPUOps alpha_tcg_ops = { .initialize = alpha_translate_init, + .synchronize_from_tb = alpha_cpu_synchronize_from_tb, .restore_state_to_opc = alpha_restore_state_to_opc, #ifdef CONFIG_USER_ONLY diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 86402d96d5..db847e7a23 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -54,6 +54,9 @@ struct DisasContext { uint32_t tbflags; int mem_idx; + /* True if generating pc-relative code. */ + bool pcrel; + /* implver and amask values for this CPU. */ int implver; int amask; @@ -254,7 +257,12 @@ static void st_flag_byte(TCGv val, unsigned shift) static void gen_pc_disp(DisasContext *ctx, TCGv dest, int32_t disp) { - tcg_gen_movi_i64(dest, ctx->base.pc_next + disp); + uint64_t addr = ctx->base.pc_next + disp; + if (ctx->pcrel) { + tcg_gen_addi_i64(dest, cpu_pc, addr - ctx->base.pc_first); + } else { + tcg_gen_movi_i64(dest, addr); + } } static void gen_excp_1(int exception, int error_code) @@ -433,8 +441,14 @@ static DisasJumpType gen_store_conditional(DisasContext *ctx, int ra, int rb, static void gen_goto_tb(DisasContext *ctx, int idx, int32_t disp) { if (translator_use_goto_tb(&ctx->base, ctx->base.pc_next + disp)) { - tcg_gen_goto_tb(idx); - gen_pc_disp(ctx, cpu_pc, disp); + /* With PCREL, PC must always be up-to-date. */ + if (ctx->pcrel) { + gen_pc_disp(ctx, cpu_pc, disp); + tcg_gen_goto_tb(idx); + } else { + tcg_gen_goto_tb(idx); + gen_pc_disp(ctx, cpu_pc, disp); + } tcg_gen_exit_tb(ctx->base.tb, idx); } else { gen_pc_disp(ctx, cpu_pc, disp); @@ -2852,6 +2866,7 @@ static void alpha_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) ctx->tbflags = ctx->base.tb->flags; ctx->mem_idx = alpha_env_mmu_index(env); + ctx->pcrel = ctx->base.tb->cflags & CF_PCREL; ctx->implver = env->implver; ctx->amask = env->amask; @@ -2887,7 +2902,13 @@ static void alpha_tr_tb_start(DisasContextBase *db, CPUState *cpu) static void alpha_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) { - tcg_gen_insn_start(dcbase->pc_next); + DisasContext *ctx = container_of(dcbase, DisasContext, base); + + if (ctx->pcrel) { + tcg_gen_insn_start(dcbase->pc_next & ~TARGET_PAGE_MASK); + } else { + tcg_gen_insn_start(dcbase->pc_next); + } } static void alpha_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)