From patchwork Mon Apr 29 10:23:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 793587 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8FF937719; Mon, 29 Apr 2024 10:25:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386326; cv=none; b=DsoXlDsffy9QGzEZKl5WdgcxFHG6ZkjgUd+o1y7UZZ0GK3ndXgjvhHVH5PVwAdFIjT0FTn5RPoLtE1fcbDoVnkZtqjACiNYJZ0DRfXCaQBw8lGngcAmH/Z0DAlhG6rCQ+b/3wshWjrBYDy/hUoYVINDkWRf6tGPsBfPF5jeZEmo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386326; c=relaxed/simple; bh=/87+Jpunp1P/a+YS0O7wEX1PysDjoquFgBulttW7SNk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=AY6ReBXChz+diq/FYZLkvsP8WU6F0FEa+yetBOA6KvG7IirFk0ZG1TtdK/ssRCFXtMea8sTVfpDeNwTanNZQpq+muENdZ5XtD9ilHAnKDvue8E1WGpmz303v5J/8yp5fQ52nNnvpr9lyXIyrZNtPWfnAueD4mASztCNIvrSIR3o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=d+2uC1Nk; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="d+2uC1Nk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714386325; x=1745922325; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/87+Jpunp1P/a+YS0O7wEX1PysDjoquFgBulttW7SNk=; b=d+2uC1NkvB/nTto0oUwSzg6Gn+0uuTqkAUe/Llg2+i7m4TV6sHAPRMt1 Pho0wT9El1Q4TX1dboGTdKrySkbcoo48I4SRfYV9vzkKW4IRQsJwVSi0t xzrwvznN1vfL9Ynho/hVIN7PgwV885ZUINo4QvuaJjF2psQiO+JoVtSBP wcKYqtPtpAciKDToMulVpHGVW/8iWWc9iPZgo2bvkPVh0yg0f4T/qTzXh AmlIIdZ7vvzFLKfKZExBf46qHw8YRiE2i2Jt7NsTUY1ONoZUr3tmwpB3S 2dEWB+ybZM6HqgAne+Slh0Bn3QnEIVozLNf6WnzVWb2c+Qwaf3KX9fHZm Q==; X-CSE-ConnectionGUID: yxSQwe3hQXaTFOJVHUznNw== X-CSE-MsgGUID: Vkn94p6RRJCX0sFfbl+S/g== X-IronPort-AV: E=McAfee;i="6600,9927,11057"; a="13827942" X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="13827942" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2024 03:25:22 -0700 X-CSE-ConnectionGUID: aWnvLQKuQtOqZY6wYM1MvA== X-CSE-MsgGUID: bPFGkKK8S6CWF7cZGoE+BQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="26475174" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa006.jf.intel.com with ESMTP; 29 Apr 2024 03:25:13 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9324BCB; Mon, 29 Apr 2024 13:25:11 +0300 (EEST) From: Andy Shevchenko To: Manivannan Sadhasivam , Frank Li , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Andy Shevchenko , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Yue Wang , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Xiaowei Song , Binghui Wang , Thierry Reding , Jonathan Hunter , Thomas Petazzoni , =?utf-8?q?Pali_Roh=C3=A1r?= Subject: [PATCH v3 1/5] PCI: dra7xx: Add missing header inclusion Date: Mon, 29 Apr 2024 13:23:18 +0300 Message-ID: <20240429102510.2665280-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> References: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Driver is using chained_irq_*() APIs, add the respective inclusion. Signed-off-by: Andy Shevchenko --- drivers/pci/controller/dwc/pci-dra7xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c index d2d17d37d3e0..b67071a63f8a 100644 --- a/drivers/pci/controller/dwc/pci-dra7xx.c +++ b/drivers/pci/controller/dwc/pci-dra7xx.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include From patchwork Mon Apr 29 10:23:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 793201 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C065C3BBFE; Mon, 29 Apr 2024 10:25:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386327; cv=none; b=XaLcB5HA7TH0D2jERcXBVFKwypf/mKUPzubxXIPIyDLM8nq8GdWU71i2s4KsdfIdA4tBVRh0Xuoy7b9iFI69op9yf5hJAC4HliK4ybHpVBeokmGOx3Q9jGQWK4r45wMMFHMkIEIpkOEeabbsgibaUPst/dyjyCCGPIXFxZRqn9s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386327; c=relaxed/simple; bh=mnVWFiBfYUU2lpuKyQVuWsMjv4lrzOkciv18t8WSb+Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nQu8Qi2ps+Z0ZFKAyQOWoZoHxYGProVdpfPs/p+8Iwmmii/hpWNqllKE7Or2JkdXvI63V/0D27p0Yqxe1axA8/2mX2BWq6bSRPwMJ7xTc391OCResQfdrNvISyZC8+exjsjfP8UV+6f6uOjQ8piuE73ziQ46obkzKC5VRO4cVCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=h3p1vvH2; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="h3p1vvH2" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714386326; x=1745922326; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mnVWFiBfYUU2lpuKyQVuWsMjv4lrzOkciv18t8WSb+Q=; b=h3p1vvH2YiSbnOq0DbcTwNTMfr4caR7c2sH3vqYVJzoxZgAoka9l8Nb9 sC9BQ32nCFNEtwUmZxuHnbTj0TtCJ9VzdCuNzQ7LdICtE/6nw4oOHUxvX LTYrHbfNLue8JxnCznUMR29C7q1RkQDkE7vC+BBZrwLRjMJC9QOaXe1Ns Nt2Du3y1A5utJf+/hJNf11x8+kDjFrD/LSsI2q6neYVuRPOOnCMtrsc5K kHmtH44Iqt84oLBfHNG4Sm/NXL7SXgEpSWEgsY/Mn3/sqf6fT0K5STc3p nTnZBL1ldAk3pECkcYCC7tCo8GSZBYA0m4N/tISKrN1fLkcj8WBa1obmZ g==; X-CSE-ConnectionGUID: OETDlredQpyEccbhOjqZAA== X-CSE-MsgGUID: 1RgSMvieTsKb8AXugCHFdg== X-IronPort-AV: E=McAfee;i="6600,9927,11057"; a="13827931" X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="13827931" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2024 03:25:22 -0700 X-CSE-ConnectionGUID: KDY/1w+iSwiKi9y57mrB/g== X-CSE-MsgGUID: HKejN5CvT+q1pdsGY7VemQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="26475173" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa006.jf.intel.com with ESMTP; 29 Apr 2024 03:25:13 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id A849B1A0; Mon, 29 Apr 2024 13:25:11 +0300 (EEST) From: Andy Shevchenko To: Manivannan Sadhasivam , Frank Li , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Andy Shevchenko , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Yue Wang , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Xiaowei Song , Binghui Wang , Thierry Reding , Jonathan Hunter , Thomas Petazzoni , =?utf-8?q?Pali_Roh=C3=A1r?= Subject: [PATCH v3 2/5] PCI: aardvark: Remove unused of_gpio.h Date: Mon, 29 Apr 2024 13:23:19 +0300 Message-ID: <20240429102510.2665280-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> References: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 of_gpio.h is deprecated and subject to remove. The driver doesn't use it, simply remove the unused header. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Andy Shevchenko --- drivers/pci/controller/pci-aardvark.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 71ecd7ddcc8a..8b3e1a079cf3 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include "../pci.h" From patchwork Mon Apr 29 10:23:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 793588 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 924672C86A; Mon, 29 Apr 2024 10:25:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386324; cv=none; b=gS2NeEz/8bGQ+EdH/+R0TKUYLEVWZvlHuwDhStwSRWQ5MBlfMEdbdX4KMiN9n6I/FWKAADzRZ+G8Gesh4BBgFty2ssTTxWmQyHLbneDYux5NcGr3FFVIokBTnQgzC+PdqNRrZLCmiGgil7k4tMmfS2kXw3T2Kz9cAU93FjCefS8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386324; c=relaxed/simple; bh=8rSWiYZvmKFnXcw8ynHscd2dH4mpaWep1+0Q3U6jY4c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Nvo5yrP/XuW0cRoI4+nEJkYXYxD42DvltkKsongXifmZ+9FKl99mz+CKR3yvHjqC7w5I+lRVoEpBH93kIjgBXcPqOilQ45ScqECBhBCPxn6RvGrVgbT2xiH7YE0L+WCqC7T/6gD4pPnmflhGSVzTrWMgBPEuwfGIGYYwdix7Dgw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OzgYMJPt; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OzgYMJPt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714386323; x=1745922323; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8rSWiYZvmKFnXcw8ynHscd2dH4mpaWep1+0Q3U6jY4c=; b=OzgYMJPtzLnxyXEyTkLq4NKhwT4wkTIJgM4sLqFs4ZYPUa2g108olNg8 OAdxuzIaOdWf1LqYkoddOvugmKVedQyFU/C8WVwa9eB4MQ6WDVj/sngwF gOKJVs8/ye8dQW/Bwd95uYLiBYtI73O4+YcXdTln4EAHxbKC+fwWA1SEp BLOHm1m6yfFed/dTUC+OK//1EtxHAs/zaC+zZlmgwzvAfdBS3f5Nn6djG cmewWpmbn24uxk4Byt+2qoswonM3jkwsE/+YvFVBZllgGxU1FD+uQMS47 NIuxLYuGj0H4ZXHIgwI/Py+XthEd7250aSucirw+VHmBFOcFfHBGVdtij g==; X-CSE-ConnectionGUID: 3gmhgQmZQPGBv0LWWGrlYw== X-CSE-MsgGUID: MvEUdEULSCKmBr12BkOHuA== X-IronPort-AV: E=McAfee;i="6600,9927,11057"; a="13827882" X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="13827882" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2024 03:25:21 -0700 X-CSE-ConnectionGUID: Zt/l+adsTyGWI5SPauizfA== X-CSE-MsgGUID: i0V5bZmRQd2eW/gk5ii/2Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="26475171" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa006.jf.intel.com with ESMTP; 29 Apr 2024 03:25:13 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id B80531AC; Mon, 29 Apr 2024 13:25:11 +0300 (EEST) From: Andy Shevchenko To: Manivannan Sadhasivam , Frank Li , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Andy Shevchenko , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Yue Wang , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Xiaowei Song , Binghui Wang , Thierry Reding , Jonathan Hunter , Thomas Petazzoni , =?utf-8?q?Pali_Roh=C3=A1r?= Subject: [PATCH v3 3/5] PCI: dwc: Remove unused of_gpio.h Date: Mon, 29 Apr 2024 13:23:20 +0300 Message-ID: <20240429102510.2665280-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> References: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 of_gpio.h is deprecated and subject to remove. The driver doesn't use it, simply remove the unused header. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Andy Shevchenko --- drivers/pci/controller/dwc/pci-dra7xx.c | 1 - drivers/pci/controller/dwc/pci-meson.c | 1 - drivers/pci/controller/dwc/pcie-qcom.c | 1 - drivers/pci/controller/dwc/pcie-tegra194.c | 2 -- 4 files changed, 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c index b67071a63f8a..cf8392190856 100644 --- a/drivers/pci/controller/dwc/pci-dra7xx.c +++ b/drivers/pci/controller/dwc/pci-dra7xx.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c index 6477c83262c2..db9482a113e9 100644 --- a/drivers/pci/controller/dwc/pci-meson.c +++ b/drivers/pci/controller/dwc/pci-meson.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 14772edcf0d3..436076612c8f 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 93f5433c5c55..e8cd8c1bd4f4 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -21,7 +20,6 @@ #include #include #include -#include #include #include #include From patchwork Mon Apr 29 10:23:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 793203 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D7E42940C; Mon, 29 Apr 2024 10:25:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386322; cv=none; b=PolfahV+cdx5tIEuwZpW1ZNdbzYOHXbOtExNL90QESm8fIupwwjvd2ZoFnD8Kus45tLDlqAGmRcs/FTSsG1f5rMHwofwgZ7JU77tsMZoGF5Jqj8YB8Eb6BQXHgtNdnFbLLDlKgSgzJPmv72PkAbd+CvjKu+Hsm9oe1HEZmLp6GA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386322; c=relaxed/simple; bh=uldoHXOi58gOtXmEwfsBKEgTKr1MJDimWsgLcyfBNoE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DnrZ0+ToIIO+B6G0w+gCUa4+H9p1FFQqyUxrpekwCO/7LB0ql71c6fANPTuornnRMcU8utg6RhhPV0CPz09OYJhsfbs1wrWwqLN3dEBFyqtogczjfBlg6p7eTKXitc5iULkKyuu1k2F+vQfsiV5Qf407e9Q+zPdTvO+MqjdQySs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=U0shSVIz; arc=none smtp.client-ip=192.198.163.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="U0shSVIz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714386321; x=1745922321; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uldoHXOi58gOtXmEwfsBKEgTKr1MJDimWsgLcyfBNoE=; b=U0shSVIzntZrBgpVEklUKQo5WW2mkxVdmN1+cnKccY2YNnDOWAcY1oOj zG240iFfGyGqOFYZ1jXzy1GKWMV2pWjjc22+G9KlhFibEkCrmH25UyzxS ucAAOnzT9CI5wcmU/P6l4yabxyaSzumjVLjQK6TNBBro2wJQCskxpPYlU 5RVjqZZvVMopY7nSePk9eu3vVu9zVSfkYmPAAGAiuJOOtAL/EiqYAseXt sqeZefWv0EuzXOzhtdPYBAqbd7MM40IC1MJn8qU1Z0Qpcv+Kqn4G+IOPM NwGtCagIZ8Ngas4AoUX35sckNIboNVT2SObTDSlIAFcJoGAzsKg5QlvJK w==; X-CSE-ConnectionGUID: Q0ttS7hJRze7/X/Kc4ERtA== X-CSE-MsgGUID: q1p8SjBsTcio663kcOH4Ww== X-IronPort-AV: E=McAfee;i="6600,9927,11057"; a="20726812" X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="20726812" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2024 03:25:20 -0700 X-CSE-ConnectionGUID: U0qSP98fTDCPthNQcPK/6Q== X-CSE-MsgGUID: B/DsE5IrSSKOPrsPw4XOoQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="26176422" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa006.fm.intel.com with ESMTP; 29 Apr 2024 03:25:13 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id C4185299; Mon, 29 Apr 2024 13:25:11 +0300 (EEST) From: Andy Shevchenko To: Manivannan Sadhasivam , Frank Li , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Andy Shevchenko , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Yue Wang , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Xiaowei Song , Binghui Wang , Thierry Reding , Jonathan Hunter , Thomas Petazzoni , =?utf-8?q?Pali_Roh=C3=A1r?= Subject: [PATCH v3 4/5] PCI: imx6: Convert to agnostic GPIO API Date: Mon, 29 Apr 2024 13:23:21 +0300 Message-ID: <20240429102510.2665280-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> References: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The of_gpio.h is going to be removed. In preparation of that convert the driver to the agnostic API. Reviewed-by: Manivannan Sadhasivam Reviewed-by: Frank Li Signed-off-by: Andy Shevchenko --- drivers/pci/controller/dwc/pci-imx6.c | 37 ++++++++++----------------- 1 file changed, 14 insertions(+), 23 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 917c69edee1d..d620f1e1a43c 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -11,14 +11,13 @@ #include #include #include -#include +#include #include #include #include #include #include #include -#include #include #include #include @@ -107,7 +106,7 @@ struct imx6_pcie_drvdata { struct imx6_pcie { struct dw_pcie *pci; - int reset_gpio; + struct gpio_desc *reset_gpiod; bool gpio_active_high; bool link_is_up; struct clk_bulk_data clks[IMX6_PCIE_MAX_CLKS]; @@ -721,9 +720,8 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) } /* Some boards don't have PCIe reset GPIO. */ - if (gpio_is_valid(imx6_pcie->reset_gpio)) - gpio_set_value_cansleep(imx6_pcie->reset_gpio, - imx6_pcie->gpio_active_high); + gpiod_set_raw_value_cansleep(imx6_pcie->reset_gpiod, + imx6_pcie->gpio_active_high); } static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) @@ -771,10 +769,10 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) } /* Some boards don't have PCIe reset GPIO. */ - if (gpio_is_valid(imx6_pcie->reset_gpio)) { + if (imx6_pcie->reset_gpiod) { msleep(100); - gpio_set_value_cansleep(imx6_pcie->reset_gpio, - !imx6_pcie->gpio_active_high); + gpiod_set_raw_value_cansleep(imx6_pcie->reset_gpiod, + !imx6_pcie->gpio_active_high); /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */ msleep(100); } @@ -1285,22 +1283,15 @@ static int imx6_pcie_probe(struct platform_device *pdev) return PTR_ERR(pci->dbi_base); /* Fetch GPIOs */ - imx6_pcie->reset_gpio = of_get_named_gpio(node, "reset-gpio", 0); imx6_pcie->gpio_active_high = of_property_read_bool(node, "reset-gpio-active-high"); - if (gpio_is_valid(imx6_pcie->reset_gpio)) { - ret = devm_gpio_request_one(dev, imx6_pcie->reset_gpio, - imx6_pcie->gpio_active_high ? - GPIOF_OUT_INIT_HIGH : - GPIOF_OUT_INIT_LOW, - "PCIe reset"); - if (ret) { - dev_err(dev, "unable to get reset gpio\n"); - return ret; - } - } else if (imx6_pcie->reset_gpio == -EPROBE_DEFER) { - return imx6_pcie->reset_gpio; - } + imx6_pcie->reset_gpiod = + devm_gpiod_get_optional(dev, "reset", + imx6_pcie->gpio_active_high ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW); + if (IS_ERR(imx6_pcie->reset_gpiod)) + return dev_err_probe(dev, PTR_ERR(imx6_pcie->reset_gpiod), + "unable to get reset gpio\n"); + gpiod_set_consumer_name(imx6_pcie->reset_gpiod, "PCIe reset"); if (imx6_pcie->drvdata->clks_cnt >= IMX6_PCIE_MAX_CLKS) return dev_err_probe(dev, -ENOMEM, "clks_cnt is too big\n"); From patchwork Mon Apr 29 10:23:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 793586 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70E90481BB; Mon, 29 Apr 2024 10:25:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386332; cv=none; b=RmLT4UuNzrra/p7xz3MM6q5oLWqx4vUmzpoEC9pmKqgO6NK0JpGS+dvXz46lhv0siN32G+h4AZQzw0b1P6J+s7rFldJFfgaEtwLNiGHlxz1K3nJcYXgJEdv68EiL7yHMrrpaJ1kj36rylBsBQZTqNVPBGe6gDq9lNec4hwZN5oA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714386332; c=relaxed/simple; bh=LIvkjHjII+w/YIjWTkZSqs4gt20HyUr04K+dyazYQ+c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RgagMJ2oNgkJwUWS3CueW2BIl4NVbb/v9ATTxB50j9s1a56yWmS5UBTxa9M1QZSWuftjrie3OjmcYXrejxxq/Uw4cMW+Vy/zGC7rOE42F1kduh3bqJGb9nTBLT15oUkiXvhN3WpTSrqNFJmyRZz29t/+8iKDoBejL/G7iuvQ6c4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=b2fzXdHE; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="b2fzXdHE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714386331; x=1745922331; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LIvkjHjII+w/YIjWTkZSqs4gt20HyUr04K+dyazYQ+c=; b=b2fzXdHExp9FNOUaEDjVtqp1eNkfEr9d2uv+WgT6jhP8Sj4nT0/EOk7k wbLDafqMeTG6g1awzPOoBe47c1n8Nr9aeDgfavmZYxVSYusDgYHVEqIaA 9QEJEYWJxIGNDignHGQmY9O6l+W0RR+MkgJTImORLiILtPklK9P/BEwB0 KM5CJDHX7c77gixH/WDtnC0ZozNqVyyoNhxVGAKf/CKRJEvq7x+ngc5Q+ Zx6p695V+Hg7/fEpuPIH9hAa6QlPh/6NKUx3gXn+jmej0zT6v4fGkqJQC zNjJptpfVIMWleRKcp8chp9PoFQkqe+dCV93jQTy7ITscDT3lt6uPVB7A Q==; X-CSE-ConnectionGUID: Ym77BXNwSZqv1TbAn7Iohg== X-CSE-MsgGUID: HvHyO5ouQs2HYHvcLp53Mg== X-IronPort-AV: E=McAfee;i="6600,9927,11057"; a="13827951" X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="13827951" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2024 03:25:29 -0700 X-CSE-ConnectionGUID: Z088nAtaQXWtNHpchgLpJw== X-CSE-MsgGUID: hJ+YXbotRPu8C/D8hqLxIA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,239,1708416000"; d="scan'208";a="26475181" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa006.jf.intel.com with ESMTP; 29 Apr 2024 03:25:21 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id CFCF82F2; Mon, 29 Apr 2024 13:25:11 +0300 (EEST) From: Andy Shevchenko To: Manivannan Sadhasivam , Frank Li , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Andy Shevchenko , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Yue Wang , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Xiaowei Song , Binghui Wang , Thierry Reding , Jonathan Hunter , Thomas Petazzoni , =?utf-8?q?Pali_Roh=C3=A1r?= Subject: [PATCH v3 5/5] PCI: kirin: Convert to agnostic GPIO API Date: Mon, 29 Apr 2024 13:23:22 +0300 Message-ID: <20240429102510.2665280-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> References: <20240429102510.2665280-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The of_gpio.h is going to be removed. In preparation of that convert the driver to the agnostic API. Reviewed-by: Rob Herring Signed-off-by: Andy Shevchenko Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-kirin.c | 105 ++++++++---------------- 1 file changed, 35 insertions(+), 70 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-kirin.c b/drivers/pci/controller/dwc/pcie-kirin.c index d5523f302102..d1f54f188e71 100644 --- a/drivers/pci/controller/dwc/pcie-kirin.c +++ b/drivers/pci/controller/dwc/pcie-kirin.c @@ -12,12 +12,10 @@ #include #include #include -#include #include #include #include #include -#include #include #include #include @@ -78,16 +76,16 @@ struct kirin_pcie { void *phy_priv; /* only for PCIE_KIRIN_INTERNAL_PHY */ /* DWC PERST# */ - int gpio_id_dwc_perst; + struct gpio_desc *id_dwc_perst_gpio; /* Per-slot PERST# */ int num_slots; - int gpio_id_reset[MAX_PCI_SLOTS]; + struct gpio_desc *id_reset_gpio[MAX_PCI_SLOTS]; const char *reset_names[MAX_PCI_SLOTS]; /* Per-slot clkreq */ int n_gpio_clkreq; - int gpio_id_clkreq[MAX_PCI_SLOTS]; + struct gpio_desc *id_clkreq_gpio[MAX_PCI_SLOTS]; const char *clkreq_names[MAX_PCI_SLOTS]; }; @@ -381,15 +379,20 @@ static int kirin_pcie_get_gpio_enable(struct kirin_pcie *pcie, pcie->n_gpio_clkreq = ret; for (i = 0; i < pcie->n_gpio_clkreq; i++) { - pcie->gpio_id_clkreq[i] = of_get_named_gpio(dev->of_node, - "hisilicon,clken-gpios", i); - if (pcie->gpio_id_clkreq[i] < 0) - return pcie->gpio_id_clkreq[i]; + pcie->id_clkreq_gpio[i] = devm_gpiod_get_index(dev, + "hisilicon,clken", i, + GPIOD_OUT_LOW); + if (IS_ERR(pcie->id_clkreq_gpio[i])) + return dev_err_probe(dev, PTR_ERR(pcie->id_clkreq_gpio[i]), + "unable to get a valid clken gpio\n"); pcie->clkreq_names[i] = devm_kasprintf(dev, GFP_KERNEL, "pcie_clkreq_%d", i); if (!pcie->clkreq_names[i]) return -ENOMEM; + + gpiod_set_consumer_name(pcie->id_clkreq_gpio[i], + pcie->clkreq_names[i]); } return 0; @@ -407,10 +410,16 @@ static int kirin_pcie_parse_port(struct kirin_pcie *pcie, for_each_available_child_of_node(parent, child) { i = pcie->num_slots; - pcie->gpio_id_reset[i] = of_get_named_gpio(child, - "reset-gpios", 0); - if (pcie->gpio_id_reset[i] < 0) - continue; + pcie->id_reset_gpio[i] = devm_fwnode_gpiod_get_index(dev, + of_fwnode_handle(child), + "reset", 0, GPIOD_OUT_LOW, + NULL); + if (IS_ERR(pcie->id_reset_gpio[i])) { + if (PTR_ERR(pcie->id_reset_gpio[i]) == -ENOENT) + continue; + return dev_err_probe(dev, PTR_ERR(pcie->id_reset_gpio[i]), + "unable to get a valid reset gpio\n"); + } pcie->num_slots++; if (pcie->num_slots > MAX_PCI_SLOTS) { @@ -434,6 +443,9 @@ static int kirin_pcie_parse_port(struct kirin_pcie *pcie, ret = -ENOMEM; goto put_node; } + + gpiod_set_consumer_name(pcie->id_reset_gpio[i], + pcie->reset_names[i]); } } @@ -463,14 +475,11 @@ static long kirin_pcie_get_resource(struct kirin_pcie *kirin_pcie, return PTR_ERR(kirin_pcie->apb); /* pcie internal PERST# gpio */ - kirin_pcie->gpio_id_dwc_perst = of_get_named_gpio(dev->of_node, - "reset-gpios", 0); - if (kirin_pcie->gpio_id_dwc_perst == -EPROBE_DEFER) { - return -EPROBE_DEFER; - } else if (!gpio_is_valid(kirin_pcie->gpio_id_dwc_perst)) { - dev_err(dev, "unable to get a valid gpio pin\n"); - return -ENODEV; - } + kirin_pcie->id_dwc_perst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(kirin_pcie->id_dwc_perst_gpio)) + return dev_err_probe(dev, PTR_ERR(kirin_pcie->id_dwc_perst_gpio), + "unable to get a valid gpio pin\n"); + gpiod_set_consumer_name(kirin_pcie->id_dwc_perst_gpio, "pcie_perst_bridge"); ret = kirin_pcie_get_gpio_enable(kirin_pcie, pdev); if (ret) @@ -553,7 +562,7 @@ static int kirin_pcie_add_bus(struct pci_bus *bus) /* Send PERST# to each slot */ for (i = 0; i < kirin_pcie->num_slots; i++) { - ret = gpio_direction_output(kirin_pcie->gpio_id_reset[i], 1); + ret = gpiod_direction_output_raw(kirin_pcie->id_reset_gpio[i], 1); if (ret) { dev_err(pci->dev, "PERST# %s error: %d\n", kirin_pcie->reset_names[i], ret); @@ -623,44 +632,6 @@ static int kirin_pcie_host_init(struct dw_pcie_rp *pp) return 0; } -static int kirin_pcie_gpio_request(struct kirin_pcie *kirin_pcie, - struct device *dev) -{ - int ret, i; - - for (i = 0; i < kirin_pcie->num_slots; i++) { - if (!gpio_is_valid(kirin_pcie->gpio_id_reset[i])) { - dev_err(dev, "unable to get a valid %s gpio\n", - kirin_pcie->reset_names[i]); - return -ENODEV; - } - - ret = devm_gpio_request(dev, kirin_pcie->gpio_id_reset[i], - kirin_pcie->reset_names[i]); - if (ret) - return ret; - } - - for (i = 0; i < kirin_pcie->n_gpio_clkreq; i++) { - if (!gpio_is_valid(kirin_pcie->gpio_id_clkreq[i])) { - dev_err(dev, "unable to get a valid %s gpio\n", - kirin_pcie->clkreq_names[i]); - return -ENODEV; - } - - ret = devm_gpio_request(dev, kirin_pcie->gpio_id_clkreq[i], - kirin_pcie->clkreq_names[i]); - if (ret) - return ret; - - ret = gpio_direction_output(kirin_pcie->gpio_id_clkreq[i], 0); - if (ret) - return ret; - } - - return 0; -} - static const struct dw_pcie_ops kirin_dw_pcie_ops = { .read_dbi = kirin_pcie_read_dbi, .write_dbi = kirin_pcie_write_dbi, @@ -680,7 +651,7 @@ static int kirin_pcie_power_off(struct kirin_pcie *kirin_pcie) return hi3660_pcie_phy_power_off(kirin_pcie); for (i = 0; i < kirin_pcie->n_gpio_clkreq; i++) - gpio_direction_output(kirin_pcie->gpio_id_clkreq[i], 1); + gpiod_direction_output_raw(kirin_pcie->id_clkreq_gpio[i], 1); phy_power_off(kirin_pcie->phy); phy_exit(kirin_pcie->phy); @@ -707,10 +678,6 @@ static int kirin_pcie_power_on(struct platform_device *pdev, if (IS_ERR(kirin_pcie->phy)) return PTR_ERR(kirin_pcie->phy); - ret = kirin_pcie_gpio_request(kirin_pcie, dev); - if (ret) - return ret; - ret = phy_init(kirin_pcie->phy); if (ret) goto err; @@ -723,11 +690,9 @@ static int kirin_pcie_power_on(struct platform_device *pdev, /* perst assert Endpoint */ usleep_range(REF_2_PERST_MIN, REF_2_PERST_MAX); - if (!gpio_request(kirin_pcie->gpio_id_dwc_perst, "pcie_perst_bridge")) { - ret = gpio_direction_output(kirin_pcie->gpio_id_dwc_perst, 1); - if (ret) - goto err; - } + ret = gpiod_direction_output_raw(kirin_pcie->id_dwc_perst_gpio, 1); + if (ret) + goto err; usleep_range(PERST_2_ACCESS_MIN, PERST_2_ACCESS_MAX);