From patchwork Thu Oct 10 20:30:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 175862 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2808439ill; Thu, 10 Oct 2019 13:42:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqzAreb02wQ2gMZl/YGVnS1IKcPXntPfNkHVFzlXloU09wmcvY9DzdnhuxRpHcj74YWzKm1A X-Received: by 2002:a50:ce16:: with SMTP id y22mr9992007edi.293.1570740170930; Thu, 10 Oct 2019 13:42:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570740170; cv=none; d=google.com; s=arc-20160816; b=BBHcQoDX0QGF3nwiMI1MyFBsg67nsW5dytL4EBUtI7CHNiFJ0moNqKcFvBaH4p+odR d0eZi4Wgc5ogwjKABwAg9luQqhzNmINafQmmz9NQdegru1HnxvS3QmVWzC5dJPll1a6i bgwLjs5EZ/fT0D8lu6KTUmfoWaIC9X7ESP3y2p6w+4KstYaccuw8w0Ut5LcvRGykZXFl PtB0dIy86okCqfPH39nrI7sFINTz0k58L/txe2BnymhQhpZoIBKuz4+TioNDDTgm2ciV bWi30K9Oz5BPKou7kBSnX0CVX0MnKSZAAEmC0ZMiuT+Hct45Q0/BVTilaZn0vq9uRb3E kuQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=bmCEdk4jayL8N6B/zW4QC2LdtDFTisI3XmP+xeHLM3k=; b=Tkl1yNRgoHJbmyMUFqy97vgOFUN7DU4fRuBiIu5+HTbpD8lVFbRu6SFTzM/jRS3MB3 7XCDb3+HncbypSYHtBmdqnfF5Yqi8U4o4EBDrPaYsy1n9FOGiBfrZFTcDEzJ08nsv6Tr U2a+lNRzJaXmh36bNUi63a06g1v1w8Gmo+Qk924xHuU/m+CjbSmUBPYu3xJ06/5Jzq6n eDonV3ZusQIeJUQOZMiOsG4VGJgUv3F8fctK935OjJ+gS1sY1pDSo/LkZXAxuKx/Oh0v /AQA9jPpRuz3UiclOnjOhdofa6e77CdDi/HhgsdXzovPZeNybNU9gcTK1pvumFYhQuOx FrFA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ck2si3650683ejb.346.2019.10.10.13.42.50; Thu, 10 Oct 2019 13:42:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727121AbfJJUmu (ORCPT + 1 other); Thu, 10 Oct 2019 16:42:50 -0400 Received: from mout.kundenserver.de ([212.227.126.133]:33937 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726423AbfJJUmu (ORCPT ); Thu, 10 Oct 2019 16:42:50 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MODeL-1iTRpR0sAL-00OXyt; Thu, 10 Oct 2019 22:42:40 +0200 From: Arnd Bergmann To: Kukjin Kim , Krzysztof Kozlowski , Mark Brown , Andi Shyti Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, Arnd Bergmann , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: [PATCH 16/36] ARM: s3c: move spi fiq handler into platform Date: Thu, 10 Oct 2019 22:30:00 +0200 Message-Id: <20191010203043.1241612-16-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20191010203043.1241612-1-arnd@arndb.de> References: <20191010202802.1132272-1-arnd@arndb.de> <20191010203043.1241612-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:pxNso9pqaCSa7Erxdl+xcM2PSbR6QNBafZTkg7d8WZ6ZRjnAavq bIdBaNH5u5C/jlBjKRugdunCELCvWTNlyvuxHzHOLMHArPk2SuoQlSIqD/7R1neOpzmWMWI 0DV7s4wfoUqZSuf6Dp6JgN+UCwj36OGLtI9kkZ3a+54hEyhCfQOSwICRyYNzOVxS0OIhW7A SzzuJAAtT0Ron3uPw6JqA== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:SpuTVFWAlTg=:0lOQSUoQNKsa4xu/euVKIe tZ+7Lxfv70jhBAaNTwCjGIH0MY3yk+Q/buWIDUtbSvDzFO0ISdzyt9vNAWUKHUMoQsDb+TyyU DTSUopqMe6xTBcVKRD+ipnM2POhQ4n039t30HsyuuQqlFiEnCz1vm3Xqpo3Akj2k5aWH6xclM ke/nOD/Kysa38CC4hMStGdW0vJYwTw0Migelq19C8m4+aIARd9Rv2nPpPNAFTztr9Y87wfTVE yc+1pKCK/j91QnbIFz01MbGRgEnN643BNpeBgE1i2WRRjMaBgatSDvEjlrpXZMYA2HSyrGCqM bStqT9LuLV6frmnUK51XFDAjlrDn6l4AdMBYJVuWZ8R+Ae68E/qN2BHwBsjochs/I+J0rbAe9 SH+6eCvv6DSKpj4NA2YHrYGlbJndP7OwNzRtjuKHELva0JsN3BNJQ8AG18HOF3yun2uwqTe5J dUQgfFmn8Ps+8KvlEw3/ij4oiaVmGeusbFmAgLvoyxNvGq3c93wLsg7su7lbXc04r2/X377hG 1SgLYf/frqvkdb6ZdFxZtPCyNJ2ZHxnywuBqOTO3ly5nTX2U9y8M0mw9xxJ3jUDaYxCg9MdSe ydgTPyPSV1vadFC0N34d6oTfGjpd6PUS/yNdu8AlMq7pNRv8Hdc/LUKQR6+n0v0jOzJEXCS+n sdN5Y7Nmi6IalHiUvkWX/CruoNEUmlFiU3nK0JkcaXZ0zp3J3ygxxeuUmWGeJKCXw6pTu4DYL h+cAHE515cBJqLJFCZXMkyvv6fE0ATfkRG5cWao0qaCoy3M+prvh7WqfB8d0Wz9RV7Bqkt0qB NAQa/UZbz3bjRoV428dxPKy3MO1X3hHYqibglP4+AaclKmXrT+8W8gP6mBAhNpvOxCzziLVVs L4R+ilKkeT5O4etuhUqQ== Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The fiq handler needs access to some register definitions that should not be used directly by device drivers. Since this is closely related to the irqchip driver anyway, move it into the same place. Signed-off-by: Arnd Bergmann --- arch/arm/mach-s3c24xx/Makefile | 2 ++ arch/arm/mach-s3c24xx/irq-s3c24xx-fiq-exports.c | 9 +++++++++ .../arm/mach-s3c24xx/irq-s3c24xx-fiq.S | 2 +- drivers/spi/Makefile | 1 - drivers/spi/spi-s3c24xx.c | 7 +------ .../spi-s3c24xx-fiq.h => include/linux/spi/s3c24xx-fiq.h | 5 +++++ 6 files changed, 18 insertions(+), 8 deletions(-) create mode 100644 arch/arm/mach-s3c24xx/irq-s3c24xx-fiq-exports.c rename drivers/spi/spi-s3c24xx-fiq.S => arch/arm/mach-s3c24xx/irq-s3c24xx-fiq.S (98%) rename drivers/spi/spi-s3c24xx-fiq.h => include/linux/spi/s3c24xx-fiq.h (78%) -- 2.20.0 diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile index 8c31f84f8c97..695573df00b1 100644 --- a/arch/arm/mach-s3c24xx/Makefile +++ b/arch/arm/mach-s3c24xx/Makefile @@ -9,6 +9,8 @@ obj-y += common.o obj-y += irq-s3c24xx.o +obj-$(CONFIG_SPI_S3C24XX_FIQ) += irq-s3c24xx-fiq.o +obj-$(CONFIG_SPI_S3C24XX_FIQ) += irq-s3c24xx-fiq-exports.o obj-$(CONFIG_CPU_S3C2410) += s3c2410.o obj-$(CONFIG_S3C2410_PLL) += pll-s3c2410.o diff --git a/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq-exports.c b/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq-exports.c new file mode 100644 index 000000000000..ef2d1f664e67 --- /dev/null +++ b/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq-exports.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +EXPORT_SYMBOL(s3c24xx_spi_fiq_rx); +EXPORT_SYMBOL(s3c24xx_spi_fiq_txrx); +EXPORT_SYMBOL(s3c24xx_spi_fiq_tx); diff --git a/drivers/spi/spi-s3c24xx-fiq.S b/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq.S similarity index 98% rename from drivers/spi/spi-s3c24xx-fiq.S rename to arch/arm/mach-s3c24xx/irq-s3c24xx-fiq.S index 9d5f8f1e5e81..2a84535a14fd 100644 --- a/drivers/spi/spi-s3c24xx-fiq.S +++ b/arch/arm/mach-s3c24xx/irq-s3c24xx-fiq.S @@ -13,7 +13,7 @@ #include #include -#include "spi-s3c24xx-fiq.h" +#include #define S3C2410_SPTDAT (0x10) #define S3C2410_SPRDAT (0x14) diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index bb49c9e6d0a0..4bcbbd35d2e8 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -89,7 +89,6 @@ obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o obj-$(CONFIG_SPI_RSPI) += spi-rspi.o obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o spi-s3c24xx-hw-y := spi-s3c24xx.o -spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o obj-$(CONFIG_SPI_S3C64XX) += spi-s3c64xx.o obj-$(CONFIG_SPI_SC18IS602) += spi-sc18is602.o obj-$(CONFIG_SPI_SH) += spi-sh.o diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c index 2f395e4861f6..464146fc8420 100644 --- a/drivers/spi/spi-s3c24xx.c +++ b/drivers/spi/spi-s3c24xx.c @@ -19,12 +19,12 @@ #include #include #include +#include #include #include #include "spi-s3c24xx-regs.h" -#include "spi-s3c24xx-fiq.h" /** * s3c24xx_spi_devstate - per device data @@ -229,10 +229,6 @@ struct spi_fiq_code { u8 data[0]; }; -extern struct spi_fiq_code s3c24xx_spi_fiq_txrx; -extern struct spi_fiq_code s3c24xx_spi_fiq_tx; -extern struct spi_fiq_code s3c24xx_spi_fiq_rx; - /** * ack_bit - turn IRQ into IRQ acknowledgement bit * @irq: The interrupt number @@ -282,7 +278,6 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw) regs.uregs[fiq_rrx] = (long)hw->rx; regs.uregs[fiq_rtx] = (long)hw->tx + 1; regs.uregs[fiq_rcount] = hw->len - 1; - regs.uregs[fiq_rirq] = (long)S3C24XX_VA_IRQ; set_fiq_regs(®s); diff --git a/drivers/spi/spi-s3c24xx-fiq.h b/include/linux/spi/s3c24xx-fiq.h similarity index 78% rename from drivers/spi/spi-s3c24xx-fiq.h rename to include/linux/spi/s3c24xx-fiq.h index 7786b0ea56ec..954452618dfe 100644 --- a/drivers/spi/spi-s3c24xx-fiq.h +++ b/include/linux/spi/s3c24xx-fiq.h @@ -12,6 +12,11 @@ #ifdef __ASSEMBLY__ #define __REG_NR(x) r##x #else + +extern struct spi_fiq_code s3c24xx_spi_fiq_txrx; +extern struct spi_fiq_code s3c24xx_spi_fiq_tx; +extern struct spi_fiq_code s3c24xx_spi_fiq_rx; + #define __REG_NR(x) (x) #endif From patchwork Thu Oct 10 20:30:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 175871 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2814610ill; Thu, 10 Oct 2019 13:49:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqygYphbU8QCyXwAQmfJJeNcof0b5K4IBWeSYptLM27Mu7JXFpwqCp0TjB7FKmW29s9v6X0I X-Received: by 2002:a17:907:3301:: with SMTP id ym1mr10346741ejb.106.1570740558471; Thu, 10 Oct 2019 13:49:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570740558; cv=none; d=google.com; s=arc-20160816; b=hwW+EYnesA/gig3T3uKS6EOGDRY+SXh/76lXdtehIcgiTBMyvs8o+bA5KiSay84/Ry fXldBXEdh1I2t5aFeEnwJggwnAUIfa8CggK+FVmpo03Z8C3wiVRV7M0xM92RhPYH+xny xd3M8a+o+4qAhLBqd54RfYfUzmkmVFyIdqvH2XS0zuWbtDUiIx4/Ucd6AfuTlytOB+ro FLhNb4999YvOnrO4GpnDRhxZWABoqvtKeRz2ye3ZsqLkTTSqB32Nyncaf4qE+lhJtftO 49jgmAY9ccwegW+7/qczW1RsosKRLI9Db/PMu6RDKqd4eTMGu0iLdGw08+x7Ejz2IFWD LUgQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id x62si4394470ede.352.2019.10.10.13.49.18; Thu, 10 Oct 2019 13:49:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726702AbfJJUtR (ORCPT + 1 other); Thu, 10 Oct 2019 16:49:17 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:49133 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726643AbfJJUtR (ORCPT ); Thu, 10 Oct 2019 16:49:17 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MmQUL-1hrtCu1NLt-00iTUZ; Thu, 10 Oct 2019 22:49:09 +0200 From: Arnd Bergmann To: Kukjin Kim , Krzysztof Kozlowski , Andi Shyti , Mark Brown Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, Arnd Bergmann , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: [PATCH 25/36] ARM: s3c: spi: avoid hardcoding fiq number in driver Date: Thu, 10 Oct 2019 22:30:09 +0200 Message-Id: <20191010203043.1241612-25-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20191010203043.1241612-1-arnd@arndb.de> References: <20191010202802.1132272-1-arnd@arndb.de> <20191010203043.1241612-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:s0CwvLUh0Zt1aNpPMIdJtPmyIE+SbFYN5oqxY6XwHzTwnI47DgP uoljIHRqhWICxbKhJ3Dy+1+bu0FYJTFGu/+ZCpSR80FWv7/E3LWo79CZLild1X6EkhmA2po VHPUq5C+3BzgWtzLxHk1KNXpvPBXxxQSkABs9SWef4/Ls/Dg/a91FmPdRUfuWv8a9TUza+7 KgM+bsyOeLgUpJTP6GE8A== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:4CkTuF8oOdw=:85gFcnpN2VJXr2f5InQsnA VNxi7IexHlaXQVNxbACwbr9wFnDR6vQVm3FLC+fZpbvKHddPWYm2A0MZAT5wySowUafjGqErL yiFIeJ18+6C1jX17EwyZEtw5rlPx2zCulYdiPdk5s0UB3FDo6X/8CWGKHNVS6jDKyUlJKA4aJ GyB5XHhh8sJyCaFqljrEsvf8AMUc2pzjElCVAJJ2wGfTZotQUDxlMRkgCSxX98eIZANU1584E aKwfTGZvXJeYIp2ozFvJL72lvXHzY00Ul4MKHhOtYwt8KrK29KH+5Dy0qMp9b5yWABORy7LXW cgs0Q9CciwS7bxa5GhfrGgcwU3S1pl8WcbKW0I0fqqAFV4CxEtmdo+JEi2EzIBigVhzCXXWab vM8asAqtDMhZqmORz64vPD+KM0hFATjmGNXUyJAI1eTFKT1Hw7ffngX02fJynbAIV+iaPJAwk uPRFvSKqblOKGGJ9iA3kal/NiO9euAnsL2eZ/HyW8fmeUYxTxn8jpkLrPz+T85y+vs9J8gY5C u5ojweam7qNeSsictVCH2zACJhdUQnBK6fWNhmlFgFrLfP23sw1gW8FLuN7slUmBKSSRWDHDY U2EEP0CZPm/uFoKDvOPjrrYNTrkDcKsR4EBBVQsnU9k4Vaz0dIaraWvvmDvY+dg5aMbCd8lhX WlcTBOnrKQ23759pdqLM9JV+QSXmJBoO8Tan67RQxsdF92HFR5E+Ku3MRBEOZkH3XkwlJIuaD zpHBLMdH9+Hh0Odt+wc1DFCtI4FXeJtAN89h/YNMOwoIvUYWfsKduh8fzVTzg0wjwgMUbjhwp z6vRFs5gDeJtNrKFqprqpQE5tPD1IPLe69c81tQu7OWntE78TNoJT4JpPgoz7HuHZYQ0KBKv2 Af15ynf6YXKickTItCFQ== Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The IRQ_EINT0 constant is a platform detail that is defined in mach/irqs.h and not visible to drivers once that header is made private. Since the same calculation already happens in s3c24xx_set_fiq, just return the value from there. Signed-off-by: Arnd Bergmann --- arch/arm/mach-s3c24xx/irq-s3c24xx.c | 12 +++++++++--- drivers/spi/spi-s3c24xx.c | 18 ++---------------- include/linux/spi/s3c24xx.h | 2 +- 3 files changed, 12 insertions(+), 20 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-s3c24xx/irq-s3c24xx.c b/arch/arm/mach-s3c24xx/irq-s3c24xx.c index b0e879ee14c1..3965347cacf0 100644 --- a/arch/arm/mach-s3c24xx/irq-s3c24xx.c +++ b/arch/arm/mach-s3c24xx/irq-s3c24xx.c @@ -376,14 +376,17 @@ asmlinkage void __exception_irq_entry s3c24xx_handle_irq(struct pt_regs *regs) /** * s3c24xx_set_fiq - set the FIQ routing * @irq: IRQ number to route to FIQ on processor. + * @ack_ptr: pointer to a location for storing the bit mask * @on: Whether to route @irq to the FIQ, or to remove the FIQ routing. * * Change the state of the IRQ to FIQ routing depending on @irq and @on. If * @on is true, the @irq is checked to see if it can be routed and the * interrupt controller updated to route the IRQ. If @on is false, the FIQ * routing is cleared, regardless of which @irq is specified. + * + * returns the mask value for the register. */ -int s3c24xx_set_fiq(unsigned int irq, bool on) +int s3c24xx_set_fiq(unsigned int irq, u32 *ack_ptr, bool on) { u32 intmod; unsigned offs; @@ -391,15 +394,18 @@ int s3c24xx_set_fiq(unsigned int irq, bool on) if (on) { offs = irq - FIQ_START; if (offs > 31) - return -EINVAL; + return 0; intmod = 1 << offs; } else { intmod = 0; } + if (ack_ptr) + *ack_ptr = intmod; writel_relaxed(intmod, S3C2410_INTMOD); - return 0; + + return intmod; } EXPORT_SYMBOL_GPL(s3c24xx_set_fiq); diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c index 464146fc8420..58025876a081 100644 --- a/drivers/spi/spi-s3c24xx.c +++ b/drivers/spi/spi-s3c24xx.c @@ -229,17 +229,6 @@ struct spi_fiq_code { u8 data[0]; }; -/** - * ack_bit - turn IRQ into IRQ acknowledgement bit - * @irq: The interrupt number - * - * Returns the bit to write to the interrupt acknowledge register. - */ -static inline u32 ack_bit(unsigned int irq) -{ - return 1 << (irq - IRQ_EINT0); -} - /** * s3c24xx_spi_tryfiq - attempt to claim and setup FIQ for transfer * @hw: The hardware state. @@ -256,6 +245,7 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw) struct pt_regs regs; enum spi_fiq_mode mode; struct spi_fiq_code *code; + u32 *ack_ptr = NULL; int ret; if (!hw->fiq_claimed) { @@ -282,8 +272,6 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw) set_fiq_regs(®s); if (hw->fiq_mode != mode) { - u32 *ack_ptr; - hw->fiq_mode = mode; switch (mode) { @@ -303,12 +291,10 @@ static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw) BUG_ON(!code); ack_ptr = (u32 *)&code->data[code->ack_offset]; - *ack_ptr = ack_bit(hw->irq); - set_fiq_handler(&code->data, code->length); } - s3c24xx_set_fiq(hw->irq, true); + s3c24xx_set_fiq(hw->irq, ack_ptr, true); hw->fiq_mode = mode; hw->fiq_inuse = 1; diff --git a/include/linux/spi/s3c24xx.h b/include/linux/spi/s3c24xx.h index c91d10b82f08..440a71593162 100644 --- a/include/linux/spi/s3c24xx.h +++ b/include/linux/spi/s3c24xx.h @@ -20,6 +20,6 @@ struct s3c2410_spi_info { void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); }; -extern int s3c24xx_set_fiq(unsigned int irq, bool on); +extern int s3c24xx_set_fiq(unsigned int irq, u32 *ack_ptr, bool on); #endif /* __LINUX_SPI_S3C24XX_H */ From patchwork Thu Oct 10 20:30:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 175880 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2820955ill; Thu, 10 Oct 2019 13:56:33 -0700 (PDT) X-Google-Smtp-Source: APXvYqxc7M0EdzEvSoV+SeQenOSVpaQ5H89Unryg3tYGn4e3KA4k+vRrelGsRb20QhBNwTv28qlR X-Received: by 2002:a05:6402:7ca:: with SMTP id u10mr10141296edy.20.1570740993446; Thu, 10 Oct 2019 13:56:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570740993; cv=none; d=google.com; s=arc-20160816; b=1IoTSsL1Nabw42bcYxsaIGCdiIiTJpmj09DKCile7MgMSxmw70pWkgMez7YsZXRZCE 5Y92MmA8yVvtchVTsV1Hf9qzS8DR4VQDmbkLXM7zbV3Pmet0V6IQMOYiKJ9ccNu+pEHH RBZtZa4oZ1MBCtVzL3Mg4hkidrvpRiRe5re9Oe6tUvztqxXg8JPC+nSyhNbHzAV8L9Me DPkbLU59o7Xc/9JJ81DyoilSKviGBV3vI0u9yv1fcrwIZRYAEcJiglbOuPvU5POxBRZE lTL5ScnvM8Pgs/rpKb7+GRk39YQixnWWjUo2hHDFD6/78CM6koA05NuQgJke//9CvoGp ApEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=nirYitt5tKzDSHjIHIRs863GFhFwXGf7Sq+mZ0nebOY=; b=T0rd6As6926stQ/A2BGNECHL6N9CpBOaNcEAj/QeMWWbrBokj3oH26Wbs04Z9aF+UJ oxpD9LZHjRA4L2JwN1FH4/Jm0CExoqEVAAyYvyRMoe/1qiLPfZEqr7yd1SI1/OYTh8s0 bilTmrmCqJI3SP/usLXd3ROWmlYwLLRk5jIztTMmpL2dGo2eNS+3wK0NTGOEp8IzE8OX zYq6mjX4eXBNN5w4r6VkK8YuvRpSINJWIyVQf30dgYcKoLmvw5Lp5Ypra7KnrhnMHWyT 3D5XLEtmRjaC+xlXwJz/La6K0CdSdhF6r2R8YoUgXrBp1ZWEanPHQIfZHJJF3H/zkoJz SRcg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u12si4004640ejt.21.2019.10.10.13.56.33; Thu, 10 Oct 2019 13:56:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726755AbfJJU4c (ORCPT + 1 other); Thu, 10 Oct 2019 16:56:32 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:55991 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725867AbfJJU4c (ORCPT ); Thu, 10 Oct 2019 16:56:32 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MNwXA-1iTi5O0nyC-00OGri; Thu, 10 Oct 2019 22:56:14 +0200 From: Arnd Bergmann To: Kukjin Kim , Krzysztof Kozlowski , Andi Shyti , Mark Brown , Felipe Balbi , Greg Kroah-Hartman Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, Arnd Bergmann , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 34/36] ARM: s3c: stop including mach/hardware.h from mach/io.h Date: Thu, 10 Oct 2019 22:30:18 +0200 Message-Id: <20191010203043.1241612-34-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20191010203043.1241612-1-arnd@arndb.de> References: <20191010202802.1132272-1-arnd@arndb.de> <20191010203043.1241612-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:LMl2ipg1DijdMjugydbZzoYkCnmLbylOvvQXsya3QlKsbqkQ54L rRQiYD8uPwWNFRtZ9LNSFwnbjTRfWgKXO5EaWD7ShmjBMGB/FTGcmVOPSHqxSJKDcLENqXV 6mlCYdH8gP9tJ15KGa5489j76oWy9eHTX/8ncu+rwoYA+ZrMG+1OA0GYNLSONi9424e52f4 1aowKON7k3Wgp8Ns1IGGg== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:quF4arNDUyg=:HiBvgCRB5O3CTHFspJe2/0 oTm/Q55a+CDLCSvsT0iy7WhF6sOYxv0M4cEyr/mFIzbNKJwBGpQzOOkacF0/T02lmeonYc3NE piSQx9AlefIIFhhY8sLufIH7LlCEsSnU5hzIj5PyC99vcKd84RroldnthR/rjcOLYBDJtZDO1 iyJ2TCLb8Vb7dAE6RZ901KCj9i0RVuS4cwHOawuaHbmuk4EOlcymFGeZNnZzePEGe7VBRsx3S UP4NX/41ZEw0UGWx24MGSoZh9c0WgWn0PZ6xjYpMuHvcj+eW/M/8/WOLQD8bekNbvb3+UM1Au qI5D4eQ4WrtUxqRkPMLJYc9eLmhtjRDW1a+ppFYf5FeNwL4urBIVckpkCLL/jnW7/ML17WF6c 1/3MbJ9DUkVhADZbKWw7jQtsvOlBh+6r2ECmP0gqwpfqODNajbbqGJe44seCK4qqZ12DP9nfB 4bevibs5LJqUyDIsbaN5ieMmamo76+MgFVR/1BLhwzqLWagdhRrj7k5fT8pz4sfB002YgXTZZ TwwI2y/7bS9rYqH/wpEUyBATftzVyCvpfSEovAZ+2IoW+ccdvPeAg0aQj2LQN2eENSAJcOrOd aw5oTWWlS36C0FwplgchzPz/OdQTx165qsVqf0tJGh3jSSF5XHD8eA9boBGUKaNSOsliBcZz1 DjMAI/yqVznKMapgv/k6Ir0qsrks5GhmAkM6zGxRuQF2i6MK5n+e/stMA2TxFTyCGTGQRG+Bj HFE6XwCgkI55Jll/ycWneTycBAAJ+GijAG32zBPJtpDdJbqcq+EaLDGalqkqdeaCdIlqqherL NC+a0yypDpn56DcYlIkexf/DO0p3/nS68gnhet6jQiulHFA+k/YwaNXimyzFVOH8cFINFWVyD uVOIY8kn8V2kbOMPS0Yw== Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org A number of other files rely on mach/map.h to be indirectly included from mach/io.h through mach/hardware.h. Reduce this to the minimal plat/map-base.h and add explicit includes everywhere else. Signed-off-by: Arnd Bergmann --- arch/arm/mach-s3c24xx/common.c | 1 + arch/arm/mach-s3c24xx/include/mach/gpio-samsung.h | 2 ++ arch/arm/mach-s3c24xx/include/mach/hardware.h | 7 ------- arch/arm/mach-s3c24xx/include/mach/io.h | 3 +-- arch/arm/mach-s3c24xx/include/mach/regs-clock.h | 2 ++ arch/arm/mach-s3c24xx/include/mach/regs-gpio.h | 2 ++ arch/arm/mach-s3c24xx/include/mach/regs-irq.h | 2 ++ arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h | 1 + arch/arm/mach-s3c24xx/include/mach/s3c2412.h | 2 ++ arch/arm/mach-s3c24xx/mach-h1940.c | 1 + arch/arm/mach-s3c24xx/mach-jive.c | 1 + arch/arm/mach-s3c24xx/mach-rx1950.c | 1 + arch/arm/mach-s3c24xx/pm-h1940.S | 1 - arch/arm/mach-s3c24xx/regs-mem.h | 2 ++ arch/arm/mach-s3c24xx/s3c2410.c | 2 +- arch/arm/mach-s3c24xx/s3c2412.c | 2 +- arch/arm/mach-s3c24xx/s3c2416.c | 2 +- arch/arm/mach-s3c24xx/s3c2443.c | 2 +- arch/arm/mach-s3c24xx/s3c244x.c | 2 +- arch/arm/mach-s3c24xx/sleep-s3c2410.S | 1 - arch/arm/mach-s3c24xx/sleep-s3c2412.S | 1 - arch/arm/mach-s3c24xx/sleep.S | 1 - drivers/spi/spi-s3c24xx-regs.h | 2 ++ drivers/usb/gadget/udc/s3c2410_udc_regs.h | 2 ++ 24 files changed, 27 insertions(+), 18 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index d16a164df6c4..42d828f48345 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -21,6 +21,7 @@ #include #include +#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-samsung.h b/arch/arm/mach-s3c24xx/include/mach/gpio-samsung.h index 2ad22b2d459b..f8a114891f16 100644 --- a/arch/arm/mach-s3c24xx/include/mach/gpio-samsung.h +++ b/arch/arm/mach-s3c24xx/include/mach/gpio-samsung.h @@ -14,6 +14,8 @@ #ifndef GPIO_SAMSUNG_S3C24XX_H #define GPIO_SAMSUNG_S3C24XX_H +#include + /* * GPIO sizes for various SoCs: * diff --git a/arch/arm/mach-s3c24xx/include/mach/hardware.h b/arch/arm/mach-s3c24xx/include/mach/hardware.h index f28ac6c78d82..c732ea54984c 100644 --- a/arch/arm/mach-s3c24xx/include/mach/hardware.h +++ b/arch/arm/mach-s3c24xx/include/mach/hardware.h @@ -9,13 +9,6 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H -#ifndef __ASSEMBLY__ - extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); -#endif /* __ASSEMBLY__ */ - -#include -#include - #endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/io.h b/arch/arm/mach-s3c24xx/include/mach/io.h index 3e8bff26cdd5..bcddf615adb6 100644 --- a/arch/arm/mach-s3c24xx/include/mach/io.h +++ b/arch/arm/mach-s3c24xx/include/mach/io.h @@ -10,8 +10,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include - +#include /* * ISA style IO, for each machine to sort out mappings for, diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-clock.h b/arch/arm/mach-s3c24xx/include/mach/regs-clock.h index 7ca3dd4f13c0..da4e7b3aeba6 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-clock.h @@ -9,6 +9,8 @@ #ifndef __ASM_ARM_REGS_CLOCK #define __ASM_ARM_REGS_CLOCK +#include + #define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) #define S3C2410_PLLVAL(_m,_p,_s) ((_m) << 12 | ((_p) << 4) | ((_s))) diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h index 594e967c0673..51827d5577b6 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h @@ -10,6 +10,8 @@ #ifndef __ASM_ARCH_REGS_GPIO_H #define __ASM_ARCH_REGS_GPIO_H +#include + #define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) /* general configuration options */ diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-irq.h b/arch/arm/mach-s3c24xx/include/mach/regs-irq.h index 8d8e669e3903..2921b48c56b2 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-irq.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-irq.h @@ -8,6 +8,8 @@ #ifndef ___ASM_ARCH_REGS_IRQ_H #define ___ASM_ARCH_REGS_IRQ_H +#include + /* interrupt controller */ #define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h index 682759549e63..fefef7233f4b 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h @@ -11,6 +11,7 @@ #define __ASM_ARM_REGS_S3C2443_CLOCK #include +#include #define S3C2443_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) diff --git a/arch/arm/mach-s3c24xx/include/mach/s3c2412.h b/arch/arm/mach-s3c24xx/include/mach/s3c2412.h index 4ff83f956cfb..1ae369c81beb 100644 --- a/arch/arm/mach-s3c24xx/include/mach/s3c2412.h +++ b/arch/arm/mach-s3c24xx/include/mach/s3c2412.h @@ -8,6 +8,8 @@ #ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_H #define __ARCH_ARM_MACH_S3C24XX_S3C2412_H __FILE__ +#include + #define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) #define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x)) diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index d56e3befa459..287e42fc1665 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c @@ -48,6 +48,7 @@ #include #include +#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c index 3b33132b2334..8012c34bddd9 100644 --- a/arch/arm/mach-s3c24xx/mach-jive.c +++ b/arch/arm/mach-s3c24xx/mach-jive.c @@ -31,6 +31,7 @@ #include #include +#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index ee4a0992339f..f94884090fbe 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c @@ -46,6 +46,7 @@ #include +#include #include #include diff --git a/arch/arm/mach-s3c24xx/pm-h1940.S b/arch/arm/mach-s3c24xx/pm-h1940.S index a7bbe336ac6b..f9ee515e1cbe 100644 --- a/arch/arm/mach-s3c24xx/pm-h1940.S +++ b/arch/arm/mach-s3c24xx/pm-h1940.S @@ -7,7 +7,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/regs-mem.h b/arch/arm/mach-s3c24xx/regs-mem.h index 2f3bc48b5890..5048ab8f06c2 100644 --- a/arch/arm/mach-s3c24xx/regs-mem.h +++ b/arch/arm/mach-s3c24xx/regs-mem.h @@ -9,6 +9,8 @@ #ifndef __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H #define __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H __FILE__ +#include + #define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) #define S3C2410_BWSCON S3C2410_MEMREG(0x00) diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c index 8427c150dd22..44bf3e1e77f1 100644 --- a/arch/arm/mach-s3c24xx/s3c2410.c +++ b/arch/arm/mach-s3c24xx/s3c2410.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index 209f952a6c98..75648dcc2c1d 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c @@ -29,7 +29,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c index 1cdb7bd3e713..ef2eace605e6 100644 --- a/arch/arm/mach-s3c24xx/s3c2416.c +++ b/arch/arm/mach-s3c24xx/s3c2416.c @@ -26,7 +26,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c index f404ecac4baf..00318ad994ff 100644 --- a/arch/arm/mach-s3c24xx/s3c2443.c +++ b/arch/arm/mach-s3c24xx/s3c2443.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c index f5bd489bac85..0ca188d0ffe5 100644 --- a/arch/arm/mach-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c24xx/s3c244x.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-s3c24xx/sleep-s3c2410.S b/arch/arm/mach-s3c24xx/sleep-s3c2410.S index 659f9eff9de2..e4f6f64e7826 100644 --- a/arch/arm/mach-s3c24xx/sleep-s3c2410.S +++ b/arch/arm/mach-s3c24xx/sleep-s3c2410.S @@ -13,7 +13,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/sleep-s3c2412.S b/arch/arm/mach-s3c24xx/sleep-s3c2412.S index c373f1ca862b..434f5082b2ed 100644 --- a/arch/arm/mach-s3c24xx/sleep-s3c2412.S +++ b/arch/arm/mach-s3c24xx/sleep-s3c2412.S @@ -8,7 +8,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/sleep.S b/arch/arm/mach-s3c24xx/sleep.S index f0f11ad60c52..4bda4a413584 100644 --- a/arch/arm/mach-s3c24xx/sleep.S +++ b/arch/arm/mach-s3c24xx/sleep.S @@ -13,7 +13,6 @@ #include #include #include -#include #include #include diff --git a/drivers/spi/spi-s3c24xx-regs.h b/drivers/spi/spi-s3c24xx-regs.h index 37b93ff7c7fe..b76d591eba8c 100644 --- a/drivers/spi/spi-s3c24xx-regs.h +++ b/drivers/spi/spi-s3c24xx-regs.h @@ -8,6 +8,8 @@ #ifndef __ASM_ARCH_REGS_SPI_H #define __ASM_ARCH_REGS_SPI_H +#include + #define S3C2410_SPCON (0x00) #define S3C2410_SPCON_SMOD_DMA (2 << 5) /* DMA mode */ diff --git a/drivers/usb/gadget/udc/s3c2410_udc_regs.h b/drivers/usb/gadget/udc/s3c2410_udc_regs.h index d8d2eeaca088..4df279342cdd 100644 --- a/drivers/usb/gadget/udc/s3c2410_udc_regs.h +++ b/drivers/usb/gadget/udc/s3c2410_udc_regs.h @@ -6,6 +6,8 @@ #ifndef __ASM_ARCH_REGS_UDC_H #define __ASM_ARCH_REGS_UDC_H +#include + #define S3C2410_USBDREG(x) (x) #define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140)