From patchwork Thu Oct 10 11:33:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175764 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2172514ill; Thu, 10 Oct 2019 04:51:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqyhVMmRp2/OY9GmlbR7+EI7WkiFfnp8YNftE0pAC10LJ4e2HrLYkyZHYoX8AwuT8xV0fbQE X-Received: by 2002:a0c:95d2:: with SMTP id t18mr9575014qvt.50.1570708266042; Thu, 10 Oct 2019 04:51:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708266; cv=none; d=google.com; s=arc-20160816; b=ACT9dNETa03NjYZQLW2ktNsPFBKcRFEVk4dqPru14qv8T4YiYqZdRqAq5W11+lbyI1 8jEfDx6g58qPns/BPXMNsOoiNncdDexO1rrs59JaSIoHDbXU0coQkiK+TJMh1BA/eqP1 Bop7RpvtlwqV9frHk9DIsGTGBYiAi2UsXVFNnen+MP/hMlGuUfDcl/0IjAvPIa22TGRW zbBOqeZPweX3QXB7R2r6VScVuwWF/Hgbm2IDGomAFyjj2GhzDA9pcnDFS1IAp9IDaEKk CDYq+wIDCkJSLJqyrFH+nZk5JQpuqVxsNIVGPvIcskykZzNUAB93tEkBTrdHThkahI3Y HvoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=c2u4j37UGelWXQ+1pnU4DtjO8EHP3oDWN4Y06o02pyU=; b=b6H5R88FgS4Pd7g2UDCZKH5EnXkiw4psAJBa0AFBXuqYFL2DMdB1vvMyR9v915LQKX U7bWBWd+NmDnltXfrZVOSRCW2D1Xl3LK6qOuVxrv8JjTECExLR9s7o8AAEDL4aAUkKYs k8TVECTazUrDrNTV5jmT8iK9d7ya4+I/78RfvEmqo7MsZWquN5O8C9c0PZNZQRZTUMDe ZGJAsCZqyRTjRNTCriqPm+I7JRk0WUNJ4Vfx44L0JaTmJncN85WsE5wvjtlGovDKN7Jh EaS9yhdWrORMO6Acbbz7Aosb7Hc+rONJjoAZ7I3g3+IkW7fEbWqAp9ctL1ZWF21U/s8n KigA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s9si5638752qtj.335.2019.10.10.04.51.05 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:51:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36706 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWyG-0004ox-3k for patch@linaro.org; Thu, 10 Oct 2019 07:51:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50289) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWib-00046n-GT for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWia-0005wE-4b for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:53 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59158) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiZ-0005vo-SW; Thu, 10 Oct 2019 07:34:52 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1A5DD18C8902; Thu, 10 Oct 2019 11:34:51 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id ED1D05C1B5; Thu, 10 Oct 2019 11:34:47 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 14/31] target/s390x: Remove ilen parameter from tcg_s390_program_interrupt Date: Thu, 10 Oct 2019 13:33:39 +0200 Message-Id: <20191010113356.5017-15-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Thu, 10 Oct 2019 11:34:51 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Since we begin the operation with an unwind, we have the proper value of ilen immediately available. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-3-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 10 +++++----- target/s390x/interrupt.c | 2 +- target/s390x/tcg-stub.c | 4 ++-- target/s390x/tcg_s390x.h | 4 ++-- 4 files changed, 10 insertions(+), 10 deletions(-) -- 2.21.0 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 892f659d5a..eb55e5ef53 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -34,15 +34,15 @@ #include "hw/boards.h" #endif -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { CPUState *cs = env_cpu(env); cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ilen); + trigger_pgm_exception(env, code, ILEN_UNWIND); cpu_loop_exit(cs); } @@ -60,7 +60,7 @@ void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc, if (env->cregs[0] & CR0_AFP) { env->fpc = deposit32(env->fpc, 8, 8, dxc); } - tcg_s390_program_interrupt(env, PGM_DATA, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_DATA, ra); } void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, @@ -75,7 +75,7 @@ void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, /* Always store the VXC into the FPC, without AFP it is undefined */ env->fpc = deposit32(env->fpc, 8, 8, vxc); - tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ra); } void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc) diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 30a9fb8852..b798e2ecbe 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -40,7 +40,7 @@ void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); } else if (tcg_enabled()) { - tcg_s390_program_interrupt(env, code, ilen, ra); + tcg_s390_program_interrupt(env, code, ra); } else { g_assert_not_reached(); } diff --git a/target/s390x/tcg-stub.c b/target/s390x/tcg-stub.c index 32adb7276a..d22c898802 100644 --- a/target/s390x/tcg-stub.c +++ b/target/s390x/tcg-stub.c @@ -18,8 +18,8 @@ void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque) { } -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { g_assert_not_reached(); } diff --git a/target/s390x/tcg_s390x.h b/target/s390x/tcg_s390x.h index 2813f9d48e..2f54ccb027 100644 --- a/target/s390x/tcg_s390x.h +++ b/target/s390x/tcg_s390x.h @@ -14,8 +14,8 @@ #define TCG_S390X_H void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque); -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra); +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra); void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc, uintptr_t ra); void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, From patchwork Thu Oct 10 11:33:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175767 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2174853ill; Thu, 10 Oct 2019 04:53:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqyMog14chcRd15+nN1BcKCvel+QUdhJdTfrVcDXBobdLI+mpmcNcj3qJKKDnZSkzyXna7Uc X-Received: by 2002:aa7:cb58:: with SMTP id w24mr7689315edt.158.1570708412414; Thu, 10 Oct 2019 04:53:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708412; cv=none; d=google.com; s=arc-20160816; b=QnvMLCWdpXIS6KwD59QlIE0sVj5djGjlNjeptdmkEHPfRYhHxIv35uxaiiQqNjmqZG kKf43pmBcSdHbsZafxiQFxN/oioDlBilJ0XiBPzM+UJM9jSoIND0GLmtNJ6qb3XnQ0Kv +L0X6WIeDPMdD/8uuCs82jBsp+8BLy6XZvYRB6z8Y9lKtjCySQCGEv0sYdv4avgtkV4U iUk/v+k6wnc8MX1q9btTrfEEUggRA26stG3ZmuZ0+khDSdgBmC4qPo/OHJZBuFqcSNrx Qpig6X8FKhMRaIf2uKJqDsSqh/jYLAHrs6eixZGT56HBi6mAEcatqQ4rnajLAwoI9VAP 6JIQ== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id x25si3427538edd.350.2019.10.10.04.53.32 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:53:32 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36748 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX0c-0008Un-Ht for patch@linaro.org; Thu, 10 Oct 2019 07:53:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50333) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWif-0004EM-U2 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWic-0005xQ-6B for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59174) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWib-0005wv-QF; Thu, 10 Oct 2019 07:34:54 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0E66718C8902; Thu, 10 Oct 2019 11:34:53 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 63FC65C22C; Thu, 10 Oct 2019 11:34:51 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 15/31] target/s390x: Remove ilen parameter from s390_program_interrupt Date: Thu, 10 Oct 2019 13:33:40 +0200 Message-Id: <20191010113356.5017-16-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Thu, 10 Oct 2019 11:34:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson This is no longer used, and many of the existing uses -- particularly within hw/s390x -- seem questionable. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-4-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- hw/s390x/s390-pci-inst.c | 58 ++++++++++++++++++------------------ target/s390x/cc_helper.c | 2 +- target/s390x/cpu.h | 3 +- target/s390x/crypto_helper.c | 4 +-- target/s390x/diag.c | 14 ++++----- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 6 ++-- target/s390x/int_helper.c | 14 ++++----- target/s390x/interrupt.c | 3 +- target/s390x/ioinst.c | 40 ++++++++++++------------- target/s390x/mem_helper.c | 43 +++++++++++++------------- target/s390x/misc_helper.c | 27 ++++++----------- 12 files changed, 102 insertions(+), 114 deletions(-) -- 2.21.0 diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 4b3bd4a804..92c7e45df5 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -157,7 +157,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) int i; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -168,7 +168,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) reqh = (ClpReqHdr *)buffer; req_len = lduw_p(&reqh->len); if (req_len < 16 || req_len > 8184 || (req_len % 8 != 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -180,11 +180,11 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) resh = (ClpRspHdr *)(buffer + req_len); res_len = lduw_p(&resh->len); if (res_len < 8 || res_len > 8176 || (res_len % 8 != 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } if ((req_len + res_len) > 8192) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -390,12 +390,12 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) uint8_t pcias; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -429,25 +429,25 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) switch (pcias) { case ZPCI_IO_BAR_MIN...ZPCI_IO_BAR_MAX: if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result = zpci_read_bar(pbdev, pcias, offset, &data, len); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; case ZPCI_CONFIG_BAR: if (!len || (len > (4 - (offset & 0x3))) || len == 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } data = pci_host_config_read_common( pbdev->pdev, offset, pci_config_size(pbdev->pdev), len); if (zpci_endian_swap(&data, len)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -489,12 +489,12 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) uint8_t pcias; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -536,13 +536,13 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) * A length of 0 is invalid and length should not cross a double word */ if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result = zpci_write_bar(pbdev, pcias, offset, data, len); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -550,7 +550,7 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) /* ZPCI uses the pseudo BAR number 15 as configuration space */ /* possible access lengths are 1,2,4 and must not cross a word */ if (!len || (len > (4 - (offset & 0x3))) || len == 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } /* len = 1,2,4 so we do not need to test */ @@ -622,12 +622,12 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) hwaddr start, end; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -709,7 +709,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, uint8_t buffer[128]; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -772,7 +772,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, if (!memory_region_access_valid(mr, offset, len, true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -786,7 +786,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, ldq_p(buffer + i * 8), MO_64, MEMTXATTRS_UNSPECIFIED); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } } @@ -797,7 +797,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, return 0; specification_error: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -871,14 +871,14 @@ static int reg_ioat(CPUS390XState *env, S390PCIIOMMU *iommu, ZpciFib fib, pba &= ~0xfff; pal |= 0xfff; if (pba > pal || pba < ZPCI_SDMA_ADDR || pal > ZPCI_EDMA_ADDR) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } /* currently we only support designation type 1 with translation */ if (!(dt == ZPCI_IOTA_RTTO && t)) { error_report("unsupported ioat dt %d t %d", dt, t); - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } @@ -1003,7 +1003,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, uint64_t cc = ZPCI_PCI_LS_OK; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -1012,7 +1012,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, fh = env->regs[r1] >> 32; if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -1040,7 +1040,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, } if (fib.fmt != 0) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -1151,7 +1151,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, break; } default: - s390_program_interrupt(&cpu->env, PGM_OPERAND, 6, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); cc = ZPCI_PCI_LS_ERR; } @@ -1171,7 +1171,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, uint64_t cc = ZPCI_PCI_LS_OK; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -1185,7 +1185,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, } if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index cf68792733..3cb00bcb09 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -588,7 +588,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); break; } } diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 1a5b1397da..18e7091763 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -809,8 +809,7 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra); +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */ void s390_sclp_extint(uint32_t parm); diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 5c79790187..1f83987e9d 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -34,7 +34,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } break; @@ -42,7 +42,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } diff --git a/target/s390x/diag.c b/target/s390x/diag.c index 65eabf0461..53c2f81f2a 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -61,12 +61,12 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) IplParameterBlock *iplb; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return; } if ((subcode & ~0x0ffffULL) || (subcode > 6)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -82,13 +82,13 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) break; case 5: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), false, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb = g_new0(IplParameterBlock, 1); @@ -112,13 +112,13 @@ out: return; case 6: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb = s390_ipl_get_iplb(); @@ -130,7 +130,7 @@ out: } return; default: - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); break; } } diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index eb55e5ef53..089623a248 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, retaddr); + s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 5faf973c6c..7228eb96e2 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->fpc = deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index d13cc49be6..1d29a1fc1f 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -39,7 +39,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) int64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -47,7 +47,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -60,7 +60,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) uint64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -68,7 +68,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -79,7 +79,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b == 0 || (b == -1 && a == (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl = a % b; return a / b; @@ -92,7 +92,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah == 0) { /* 64 -> 64/64 case */ @@ -106,7 +106,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, env->retxl = a % b; ret = q; if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just abort if diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index b798e2ecbe..2b71e03914 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -34,8 +34,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) } } -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra) +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) { if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c index 83c164a168..c437a1d8c6 100644 --- a/target/s390x/ioinst.c +++ b/target/s390x/ioinst.c @@ -44,7 +44,7 @@ void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("xsch", cssid, ssid, schid); @@ -62,7 +62,7 @@ void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("csch", cssid, ssid, schid); @@ -80,7 +80,7 @@ void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("hsch", cssid, ssid, schid); @@ -116,7 +116,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &schib, sizeof(schib))) { @@ -125,7 +125,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) } if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_schib_valid(&schib)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("msch", cssid, ssid, schid); @@ -173,7 +173,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &orig_orb, sizeof(orb))) { @@ -183,7 +183,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) copy_orb_from_guest(&orb, &orig_orb); if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_orb_valid(&orb)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("ssch", cssid, ssid, schid); @@ -205,7 +205,7 @@ void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -236,7 +236,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -247,7 +247,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, * access execption if it is not) first. */ if (!s390_cpu_virt_mem_check_write(cpu, addr, ar, sizeof(schib))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); } else { s390_cpu_virt_mem_handle_exc(cpu, ra); } @@ -299,13 +299,13 @@ int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) uint8_t ar; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EIO; } trace_ioinst_sch_id("tsch", cssid, ssid, schid); addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return -EIO; } @@ -613,7 +613,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra) addr = env->regs[reg]; /* Page boundary? */ if (addr & 0xfff) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } /* @@ -629,7 +629,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra) len = be16_to_cpu(req->len); /* Length field valid? */ if ((len < 16) || (len > 4088) || (len & 7)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } memset((char *)req + len, 0, TARGET_PAGE_SIZE - len); @@ -678,7 +678,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, trace_ioinst("schm"); if (SCHM_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -687,7 +687,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, dct = SCHM_REG1_DCT(reg1); if (update && (reg2 & 0x000000000000001f)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -700,7 +700,7 @@ void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("rsch", cssid, ssid, schid); @@ -724,7 +724,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra) CPUS390XState *env = &cpu->env; if (RCHP_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -747,7 +747,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra) break; default: /* Invalid channel subsystem. */ - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } setcc(cpu, cc); @@ -758,6 +758,6 @@ void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1, uintptr_t ra) { /* We do not provide address limit checking, so let's suppress it. */ if (SAL_REG1_INVALID(reg1) || reg1 & 0x000000000000ffff) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); } } diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 08c5cc6a99..77d2eb96d4 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -71,7 +71,7 @@ static inline void check_alignment(CPUS390XState *env, uint64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } @@ -730,7 +730,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -767,7 +767,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -846,7 +846,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) S390Access srca, desta; if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } r1 = wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +879,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, uint32_t r2) int i; if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* @@ -911,8 +911,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - /* we either came here by lam or lamy, which have different lengths */ - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -932,7 +931,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1888,7 +1887,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, return cc; spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); g_assert_not_reached(); } @@ -1912,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1945,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1976,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1996,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -2168,7 +2167,7 @@ uint32_t HELPER(mvcs)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY) || psw_as == AS_HOME || psw_as == AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } l = wrap_length32(env, l); @@ -2199,7 +2198,7 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY) || psw_as == AS_HOME || psw_as == AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } l = wrap_length32(env, l); @@ -2226,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) uint16_t entries, i, index = 0; if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if (!(r2 & 0x800)) { @@ -2370,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } old_exc = cs->exception_index; @@ -2539,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, __func__, dest, src, len); if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } /* OAC (operand access control) for the first operand -> dest */ @@ -2570,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, } if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); } len = wrap_length32(env, len); @@ -2591,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, 6, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); } /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 7530dcb8f3..9fbb37cfb9 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) int r = sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) } if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val = r0; if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr = val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } qemu_mutex_lock_iothread(); @@ -573,17 +573,8 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) #ifndef CONFIG_USER_ONLY void HELPER(per_check_exception)(CPUS390XState *env) { - uint32_t ilen; - if (env->per_perc_atmid) { - /* - * FIXME: ILEN_AUTO is most probably the right thing to use. ilen - * always has to match the instruction referenced in the PSW. E.g. - * if a PER interrupt is triggered via EXECUTE, we have to use ilen - * of EXECUTE, while per_address contains the target of EXECUTE. - */ - ilen = get_ilen(cpu_ldub_code(env, env->per_address)); - s390_program_interrupt(env, PGM_PER, ilen, GETPC()); + s390_program_interrupt(env, PGM_PER, GETPC()); } } @@ -673,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) int i; if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } prepare_stfl(); @@ -746,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } } From patchwork Thu Oct 10 11:33:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175759 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2166295ill; Thu, 10 Oct 2019 04:44:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqwaPxPUXoMVctblnx7R5fZr7SPC6dMwSusSyw6lrAryQJHLKgjPlJ1a2UTfzr0YSzPVm+RY X-Received: by 2002:aa7:d045:: with SMTP id n5mr7668071edo.24.1570707898625; Thu, 10 Oct 2019 04:44:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570707898; cv=none; d=google.com; s=arc-20160816; b=bYD6kICz6RfH1ArOm9W91vKfZ33fAUJFJkHh5Zw1AwdZdqthTUjoHvR7MYtZ+ZMDX7 +SkW3Prv7yV2C7gLUZ2YrKjEmjlQKXekBUyelN77wB3qa7enNEQrTtDqHuZ7oP7xPgr3 6fdeYktlvLXcJMHNaTmBNJF2+Bp9z/5C/oySHeHP5zbqYCRdCbzdKwQYLtnDMH7MsiDV ZFU68bW6GwohDT/7r2dGlbj6Hd+E3BzVOPbzb/7DdJrsVVVpI0rud4/I+3PVNf6++8hb 5ZxNBUpAsGE2rQpTDuFrjBUCCVSsP4ZAjZY8xr3vrnz5Uc7iaHBuh6xW0Ga4hGDapER0 KpWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=ddRzNDorjihRHoJCBuQW9VyUceJ1GDTmpZAs35fR46I=; b=W4OUK5IzOUZtGL8/Biwvu7UbCDGUogw7vsAwEzEaO8OauGG8JwIN7pOmeF7zDgIuvR h5Qy7SunaYyApXTDScB9draqF+iV0pF2D5SYJgVchPfBlUhyFi0OQm+0u7bQFF0JX3yX SWOKrD6LTO3JWZFBMbfSDm+7puIhslsgurI86ul345R1d82CRESL+5Fivvw8hDhKdZXE u3RI33Uv43dJq4NSpx+DjzEwgW7buC6iSaL6z4hraUoRSCpalSNrTdEDSjyOJPgNSwfT FA0LP2mv8W7bqnOe4XrFxK/FbIjya3nBVf8QRFi7uOLqaj3o7zEhAd0zTF3IkHYURyqL gTqQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f43si3782166edf.422.2019.10.10.04.44.58 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:44:58 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36502 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWsL-0006Ad-AS for patch@linaro.org; Thu, 10 Oct 2019 07:44:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50353) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWil-0004La-Qs for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWii-0005zy-36 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56980) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWih-0005zX-R3; Thu, 10 Oct 2019 07:35:00 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1C62F3086218; Thu, 10 Oct 2019 11:34:59 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 589795C3FD; Thu, 10 Oct 2019 11:34:53 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 16/31] target/s390x: Use tcg_s390_program_interrupt in TCG helpers Date: Thu, 10 Oct 2019 13:33:41 +0200 Message-Id: <20191010113356.5017-17-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Thu, 10 Oct 2019 11:34:59 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Replace all uses of s390_program_interrupt within files that are marked CONFIG_TCG. These are necessarily tcg-only. This lets each of these users benefit from the QEMU_NORETURN attribute on tcg_s390_program_interrupt. Acked-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-5-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/cc_helper.c | 4 ++-- target/s390x/crypto_helper.c | 7 +++---- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 6 +++--- target/s390x/int_helper.c | 15 +++++++------- target/s390x/mem_helper.c | 40 ++++++++++++++++++------------------ target/s390x/misc_helper.c | 18 ++++++++-------- 7 files changed, 46 insertions(+), 46 deletions(-) -- 2.21.0 diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index 3cb00bcb09..44731e4a85 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" @@ -588,8 +589,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); - break; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } #endif diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 1f83987e9d..ff3fbc3950 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -34,16 +35,14 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } break; } s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } switch (fc) { diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 089623a248..dbff772d34 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; - s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 7228eb96e2..8bb9f54fd0 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->fpc = deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index 1d29a1fc1f..658507dd6d 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" @@ -39,7 +40,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) int64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -47,7 +48,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -60,7 +61,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) uint64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -68,7 +69,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -79,7 +80,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b == 0 || (b == -1 && a == (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl = a % b; return a / b; @@ -92,7 +93,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah == 0) { /* 64 -> 64/64 case */ @@ -106,7 +107,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, env->retxl = a % b; ret = q; if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just abort if diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 77d2eb96d4..7d2a652823 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -71,7 +72,7 @@ static inline void check_alignment(CPUS390XState *env, uint64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } @@ -730,7 +731,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -767,7 +768,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -846,7 +847,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) S390Access srca, desta; if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } r1 = wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +880,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, uint32_t r2) int i; if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* @@ -911,7 +912,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -931,7 +932,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1887,8 +1888,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, return cc; spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - g_assert_not_reached(); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } uint32_t HELPER(csst)(CPUS390XState *env, uint32_t r3, uint64_t a1, uint64_t a2) @@ -1911,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1944,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1975,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1995,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -2225,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) uint16_t entries, i, index = 0; if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if (!(r2 & 0x800)) { @@ -2369,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } old_exc = cs->exception_index; @@ -2538,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, __func__, dest, src, len); if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } /* OAC (operand access control) for the first operand -> dest */ @@ -2569,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, } if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, ra); + tcg_s390_program_interrupt(env, PGM_PRIVILEGED, ra); } len = wrap_length32(env, len); @@ -2590,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, ra); + tcg_s390_program_interrupt(env, PGM_ADDRESSING, ra); } /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 9fbb37cfb9..bfb457fb63 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) int r = sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) } if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val = r0; if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr = val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } qemu_mutex_lock_iothread(); @@ -574,7 +574,7 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) void HELPER(per_check_exception)(CPUS390XState *env) { if (env->per_perc_atmid) { - s390_program_interrupt(env, PGM_PER, GETPC()); + tcg_s390_program_interrupt(env, PGM_PER, GETPC()); } } @@ -664,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) int i; if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } prepare_stfl(); @@ -737,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } } From patchwork Thu Oct 10 11:33:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175761 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2169739ill; Thu, 10 Oct 2019 04:48:14 -0700 (PDT) X-Google-Smtp-Source: APXvYqx+sciWq6VOACDbEa+WP51z36AILpa/1bzT5fCLFOe9+PmQENM8LnNNJqrCMVSyObPBtzfr X-Received: by 2002:ae9:d8c2:: with SMTP id u185mr9096977qkf.112.1570708094412; Thu, 10 Oct 2019 04:48:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708094; cv=none; d=google.com; s=arc-20160816; b=VugLbTq1er7VEgbV7MOiTdql+F3nSvtV86+Ad3GVHkVQ+j28nv9BA5Y4SR+gjxeXkU 4Ub7InBjAx5CtOJcw8twnkn/w5/s132PNeNviL3t7da69lYkiBcoRtHDLMomhCcaoJNQ K1RL5WD28XmhbCsICVr/8uPLNOLaqDlgui0HR7NOySdGRFDmjWQuZkhRk3Cqp6wwNhG6 NP5IkCSJjVvg3jIRmZCM/DTS8W5Sp1k8/0X6OwN+Ag3cfQpO/biPylDEcRCdHnDSX8be BV/yvxwlPbHUO6usDKkB8T/IYOuewc2/eG9s53eZivr0ZyPYfT/wT4838PHnfYRo8OqS 0tug== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id p49si5465850qvc.91.2019.10.10.04.48.14 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:48:14 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36670 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWvV-0001nQ-9O for patch@linaro.org; Thu, 10 Oct 2019 07:48:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50396) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWiz-0004RW-He for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWix-000669-Ha for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:17 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42824) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiq-00061S-Sl; Thu, 10 Oct 2019 07:35:11 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 528E23CA00; Thu, 10 Oct 2019 11:35:03 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 647DA5C231; Thu, 10 Oct 2019 11:34:59 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 17/31] target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fill Date: Thu, 10 Oct 2019 13:33:42 +0200 Message-Id: <20191010113356.5017-18-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 10 Oct 2019 11:35:03 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Delay triggering an exception until the end, after we have determined ultimate success or failure, and also taken into account whether this is a non-faulting probe. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-6-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 2.21.0 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index dbff772d34..552098be5f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc; - int prot, fail; + int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,12 +141,14 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); + excp = 0; /* exception already raised */ } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); + excp = 0; /* exception already raised */ } else { g_assert_not_reached(); } @@ -159,7 +161,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, qemu_log_mask(CPU_LOG_MMU, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); - trigger_pgm_exception(env, PGM_ADDRESSING, ILEN_AUTO); + excp = PGM_ADDRESSING; fail = 1; } @@ -175,6 +177,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } + if (excp) { + trigger_pgm_exception(env, excp, ILEN_AUTO); + } cpu_restore_state(cs, retaddr, true); /* From patchwork Thu Oct 10 11:33:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175763 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2171995ill; Thu, 10 Oct 2019 04:50:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqxWOebgVGGoH1KskEKT8q/uwMjtqRhpPS6/XEthEbA6dAdAppupJ3jQeCMRLS/DyNuRzJkx X-Received: by 2002:a37:9343:: with SMTP id v64mr8711747qkd.241.1570708230173; Thu, 10 Oct 2019 04:50:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708230; cv=none; d=google.com; s=arc-20160816; b=w/A/MYzrmZjW3lKuPty7cI7HBe9p/wfLK05haPcnZ/YQPacZQ2z2hDi87NAdzOlmo4 YMSdQcQLOZNXPO2oNO05cXk1xWcPsAAPpFa/kkzS5ZWqBhRGDxeAhadS+Xi4hRNH02HL OewhXljHZomBkvgx9YGrEpLwUqNJJFfjYtNJILytalaH+IXe6lnAvbICeax8vPBiN6KF vKTbP+RVFMhymsvZq/02asgb7DE+3qOuW7Uv31Aj8fp+YGrlG7lQkqJK+nmO5Nq30mRT WUglpxf3jMW/gqhGbA0QomqKpu6D3bSDqSOm3dqFWY/mK6MBrA86hT6SjNT5PjSmDhnC uGTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=7qe0U0PsyzruDmGkne0ZlXjxfeTvUUHGZ291y/GWCHg=; b=mDTYnRnce32hiknThy5Vv+eenKgYNPJbgbv4ZmiqkKTOFtWSCW846jlXa3UlsCJGWk ikO0sLsxveSJCBwnn+x8azNni+mlJxm2QJuhF7bjHQlgmOkbBRjEhyEIvn8RrVX0P5Uj IW5aNgkF78hjPuf6r6dt/l/VgYM3gRvp5GMyef3/hyeeNG5Y9eTF/+ik7b6PgPj338gc 0K+NbiJoYIPZe2nxlzJ+FA7CtUZOSbI1lVZADIgXSJuvqIJtHFA3NOri4fnfdDlzLjuF sMgrlnOC8KdSdXFouh9GMdj6TS1p39SJZ9axCY1N6NAdT5zv8M+1OxkD9oppj7CPx0SI 2tXA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id v34si5420154qtd.70.2019.10.10.04.50.30 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:50:30 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36698 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWxh-0003sD-BL for patch@linaro.org; Thu, 10 Oct 2019 07:50:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50424) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWj3-0004Sj-HR for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWj1-00067k-Gg for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52128) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiz-00064I-EJ; Thu, 10 Oct 2019 07:35:19 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9BFE37CB95; Thu, 10 Oct 2019 11:35:09 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 98EA95E1B0; Thu, 10 Oct 2019 11:35:03 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 18/31] target/s390x: Handle tec in s390_cpu_tlb_fill Date: Thu, 10 Oct 2019 13:33:43 +0200 Message-Id: <20191010113356.5017-19-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 10 Oct 2019 11:35:09 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson As a step toward moving all excption handling out of mmu_translate, copy handling of the LowCore tec value from trigger_access_exception into s390_cpu_tlb_fill. So far this new plumbing isn't used. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-7-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 552098be5f..ab2ed47fef 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; - uint64_t asc; + uint64_t asc, tec; int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", @@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; + tec = 0; /* unused */ fail = 1; } @@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } if (excp) { + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); + } trigger_pgm_exception(env, excp, ILEN_AUTO); } cpu_restore_state(cs, retaddr, true); From patchwork Thu Oct 10 11:33:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175765 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2172720ill; Thu, 10 Oct 2019 04:51:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqwN6O9FL7/OK5ZBJRfpsVoU8FrmJwi58vogIq5F3cR+KG20LvljX00FJ7/NxRUK8AoMJAfE X-Received: by 2002:a37:9b81:: with SMTP id d123mr9070090qke.400.1570708278156; Thu, 10 Oct 2019 04:51:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708278; cv=none; d=google.com; s=arc-20160816; b=kCzvuvYe/LB97m/SbEJa2vTLPSsaVphU/OciQvxsI0ml7PB+tOEZkeZce1iRcyRiZl WprBiLPVo4xhBQpn48+N3dTfvXYJrUe2jOMh6LizB/KchLeRLaAKmBezJXAGBc6WLvIs 1KDAmpYXPH2tQflM4VQV9hVKjmfAyFHa9S6ur/sca0WNMXm6qWCB+aE1ZWetC308NDx8 ABPp8Qx/gYV5fU1Bis92FUd2W61Isx8Evm8lN4qQCMzNOmbSY8Femw9r4FBQ0B+cLA4/ IQrAEaR74rjKWkNZipH/1nxwuMpP/Z8rV4FM5DFdvFBT7Bnm7QiCNZyh+3eVRryUi18l 6Ruw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=KQfpSek59wvMzE2pvXgZqpW9ZWEPxhm+pHcFqqyHk2Q=; b=OyqI7mceGpyBdK+l3/RNW/dAJ5+y+cO+fp1qVTLLXIcnriRDVD9EXUCf5zBR6oOZn/ eUs6gjikh2Mm0mk6mTKfT32sXZz6ElHjYz6GBhh0z2UQAtuH6s7/1GCaoYZxZwuOLxkd TmZfHukQ/26ChHrroPIHMLoDyMNYjWTD1PwkRvhx7aIqd+D3KDcWhGAOgEdfN2xrawN+ 1N40NHv7++uDNaUxRbtpWg5S2KUII6++qd6w11AlfdyMjZ5hJmyruIeDuOm2cD1e/2k8 g/VSU8gF9I6ybHM+sLul0gCZ63GA2Tf73nCJsFo0QkOfL1Wy2T2sO4DllzHRgUCahAQB IdKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o32si5343264qvh.190.2019.10.10.04.51.17 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:51:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36712 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWyT-0005Oq-1X for patch@linaro.org; Thu, 10 Oct 2019 07:51:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50464) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWj7-0004Uu-8R for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWj4-00069c-I8 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:25 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58092) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWj3-00067s-Dg; Thu, 10 Oct 2019 07:35:21 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A7F2B307D96D; Thu, 10 Oct 2019 11:35:19 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id E46CB5C553; Thu, 10 Oct 2019 11:35:09 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 19/31] target/s390x: Return exception from mmu_translate_real Date: Thu, 10 Oct 2019 13:33:44 +0200 Message-Id: <20191010113356.5017-20-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Thu, 10 Oct 2019 11:35:19 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Do not raise the exception directly within mmu_translate_real, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-8-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 4 ++-- target/s390x/internal.h | 2 +- target/s390x/mmu_helper.c | 14 ++++++-------- 3 files changed, 9 insertions(+), 11 deletions(-) -- 2.21.0 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index ab2ed47fef..906b87c071 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -147,8 +147,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); - excp = 0; /* exception already raised */ + excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); + fail = excp; } else { g_assert_not_reached(); } diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c243fa725b..c4388aaf23 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -362,7 +362,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, target_ulong *raddr, int *flags, bool exc); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags); + target_ulong *addr, int *flags, uint64_t *tec); /* misc_helper.c */ diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 4a794dadcf..e8281d4413 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -554,14 +554,11 @@ void s390_cpu_virt_mem_handle_exc(S390CPU *cpu, uintptr_t ra) * @param rw 0 = read, 1 = write, 2 = code fetch * @param addr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer - * @return 0 if the translation was successful, < 0 if a fault occurred + * @return 0 = success, != 0, the exception to raise */ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags) + target_ulong *addr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - uint64_t tec = (raddr & TARGET_PAGE_MASK) | - (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); const bool lowprot_enabled = env->cregs[0] & CR0_LOWPROT; *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -570,9 +567,10 @@ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, *flags |= PAGE_WRITE_INV; if (is_low_address(raddr) && rw == MMU_DATA_STORE) { /* LAP sets bit 56 */ - tec |= 0x80; - trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, tec); - return -EACCES; + *tec = (raddr & TARGET_PAGE_MASK) + | (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ) + | 0x80; + return PGM_PROTECTION; } } From patchwork Thu Oct 10 11:33:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175768 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2174985ill; Thu, 10 Oct 2019 04:53:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqxh4YE8WpFKRmmXXcbeaVhnisR+6rV1rNfmOXuOkkL5f6utO83qUj7zZb0uBqRPeFTaNzdQ X-Received: by 2002:a50:fa94:: with SMTP id w20mr7837223edr.47.1570708418934; Thu, 10 Oct 2019 04:53:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708418; cv=none; d=google.com; s=arc-20160816; b=AZf8+Pni9qek94MaUp7a5iztFnnNwkjyVyxyT6usk5KYeY4V/G4phOkgc8e0k3MfTx 2d40D2inovBlsnBpcbuvUw4iHeAx9ZtdJ5adF2WNnk8NHQRTGJOPuOn/rDVPwFkdD3B1 Q68jRu7zBmhb9ativw7scuBGrXK+0DJyGqZTR617TAxH/D5hTEiCqkrgN1MLMmSHrLc/ EdFiWEX+BMvlejOj8epZHI9oGoh3IOu9gpgeFC4GaYxP4XTxW5d/H+6bi32qqOd/CgKF 1YXYofaBYUCcqYc8BsnO+0ekyY/6ENx92b1dybRKOFE6PN8Lg9/wynEBnyeJMMr5Sz1d gW/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=t22bHl9JWyLjic1qDlrEugIMAUxqK+RYVjkEzQ0D8K4=; b=Izn5G4E6w6Wmm40HRB7OnzTLq92ApMdmq07KXtya0EqQlHluH1sedax2Fk5mUtNyHM EsRiEnbWuyERrvExiSV/BAF4xsqP1OQGaWbTXx6uWK7U4vYO6k8Pfaq/oeyq+RWRRKO+ hCw0iEjBNQs87GfUSHRkbbzLwjkAsBySBoxMZvjiyRlx/icUACj+Zko2HsBnQ3XrrtvL wGFUC7q9EJ69kNa6MUdXDIAEJ4XaNVz5437TaE2rsZAGhjDSRH3G+qIq25azUgsO5Nx3 GFaCCnHeChJu/bMNTfqT9O/79bN383E36mX1Lyb4UvvzbfY8BlkA1coqsV3/sATH4M1C IvYg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r24si3046991ejs.166.2019.10.10.04.53.38 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:53:38 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36756 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX0j-0000Ni-GT for patch@linaro.org; Thu, 10 Oct 2019 07:53:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50506) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWjH-0004bE-Ue for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWjG-0006IE-Sq for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46086) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWjG-0006Hj-NL; Thu, 10 Oct 2019 07:35:34 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 989132D6A10; Thu, 10 Oct 2019 11:35:32 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id EF79F5C548; Thu, 10 Oct 2019 11:35:19 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 20/31] target/s390x: Remove exc argument to mmu_translate_asce Date: Thu, 10 Oct 2019 13:33:45 +0200 Message-Id: <20191010113356.5017-21-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 10 Oct 2019 11:35:32 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Now that mmu_translate_asce returns the exception instead of raising it, the argument is unused. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-9-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.21.0 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index e8281d4413..e57d762f45 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -116,7 +116,7 @@ static inline bool read_table_entry(CPUS390XState *env, hwaddr gaddr, static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t asce, target_ulong *raddr, - int *flags, int rw, bool exc) + int *flags, int rw) { const bool edat1 = (env->cregs[0] & CR0_EDAT) && s390_has_feat(S390_FEAT_EDAT); @@ -423,7 +423,7 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, } /* perform the DAT translation */ - r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw, exc); + r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { if (exc) { trigger_access_exception(env, r, ilen, tec); From patchwork Thu Oct 10 11:33:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175766 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2174014ill; Thu, 10 Oct 2019 04:52:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqxwjgL7dr4JMzAEjWH1lTTagkM4m1v+BJ9eHH2thrxdth/gkcfCtYWndhlWx1Cgh0o489G1 X-Received: by 2002:aed:3c24:: with SMTP id t33mr10155429qte.186.1570708360833; Thu, 10 Oct 2019 04:52:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708360; cv=none; d=google.com; s=arc-20160816; b=DIwknWLLZgh41LVYbI7b0pQIlOHdFACxhIQkOQsnke3YdQSt7kNNjELgpZ+R4cUSZz qoigOi1feTjxNzc7KgUaNN13acmG9zKRwp2CR2JtL6ZtCwa6TwLccX50/bZD/KksClu2 R91apYfPzDlSECDtbcP0nxAWUBN4KJYY5hLIrLwRx/kk67FRaFmfEeUg4jx1spzm7iPz jIStwmaWliaxUasHRTMufFfzaJnFFmmLdzMyv4fsvpBluHqkuzLov5GhGJ1t5ahX7+1n eBHaDJQRtwDfIVhFRYc8VQdJL9fj2RddYs+cIU8brw+urEFiIQHVny+e4sdUL82znTx7 Wohg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=sCBPbNVq56MljGolhMcEmF3Vpe2hklyMd1hEdEy9kdo=; b=RvH1tMAAYCJbckNip1Jeo0hiBUKzklMWj09zgThF4YlstSA49W2VyorxSekG0sLElf cf+Q8I6BQ3fu8pZW1dZF1y2tG9gg+gN7Kydq9scCwFQZeIBXP5UQyRakWwCqFljh5X3E 7osVKyeqj2Gy6o8CeZ0a6YUlTvcCFRmUHq/gl/tQjj+ntYGeGf4WPwCsMCHkql2fOCpS HBTDuDwYeIr+fInxZu+oUDBqSUwi3M8IOoackKqA3Xb49NAdZcVZzwhR1E4u1APN9cP6 U5kkdHSxeny3f60J1GFkR26YFaOxCrGHyaWmmNLRFD3BOwpwRfXQnW9zjb7Wb2Rvh2sC UI/Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n8si5365011qkn.233.2019.10.10.04.52.40 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:52:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36734 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWzn-0007V9-PO for patch@linaro.org; Thu, 10 Oct 2019 07:52:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50535) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWjY-000539-20 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWjW-0006Ky-FD for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35204) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWjW-0006Kn-7H; Thu, 10 Oct 2019 07:35:50 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7100D4E8AC; Thu, 10 Oct 2019 11:35:49 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id E33655C22C; Thu, 10 Oct 2019 11:35:32 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 21/31] target/s390x: Return exception from mmu_translate Date: Thu, 10 Oct 2019 13:33:46 +0200 Message-Id: <20191010113356.5017-22-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Thu, 10 Oct 2019 11:35:49 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Do not raise the exception directly within mmu_translate, but pass it back so that caller may do so. Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-10-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 4 +-- target/s390x/helper.c | 3 ++- target/s390x/internal.h | 2 +- target/s390x/mem_helper.c | 13 +++++++--- target/s390x/mmu_helper.c | 51 +++++++++++++++----------------------- 5 files changed, 35 insertions(+), 38 deletions(-) -- 2.21.0 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 906b87c071..6a0728b65f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -140,8 +140,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); - excp = 0; /* exception already raised */ + excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec); + fail = excp; } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { diff --git a/target/s390x/helper.c b/target/s390x/helper.c index bf503b56ee..a3a49164e4 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -52,6 +52,7 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr) target_ulong raddr; int prot; uint64_t asc = env->psw.mask & PSW_MASK_ASC; + uint64_t tec; /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { @@ -67,7 +68,7 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr) * We want to read code even if IEP is active. Use MMU_DATA_LOAD instead * of MMU_INST_FETCH. */ - if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, false)) { + if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, &tec)) { return -1; } return raddr; diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c4388aaf23..c993c3ef40 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -360,7 +360,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, /* mmu_helper.c */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, - target_ulong *raddr, int *flags, bool exc); + target_ulong *raddr, int *flags, uint64_t *tec); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, target_ulong *addr, int *flags, uint64_t *tec); diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 7d2a652823..e15aa296dd 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2364,8 +2364,8 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) CPUState *cs = env_cpu(env); uint32_t cc = 0; uint64_t asc = env->psw.mask & PSW_MASK_ASC; - uint64_t ret; - int old_exc, flags; + uint64_t ret, tec; + int old_exc, flags, exc; /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { @@ -2373,7 +2373,14 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) } old_exc = cs->exception_index; - if (mmu_translate(env, addr, 0, asc, &ret, &flags, true)) { + exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); + if (exc) { + /* + * We don't care about ILEN or TEC, as we're not going to + * deliver the exception -- thus resetting exception_index below. + * TODO: clean this up. + */ + trigger_pgm_exception(env, exc, ILEN_UNWIND); cc = 3; } if (cs->exception_index == EXCP_PGM) { diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index e57d762f45..001d0a9c8a 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -365,20 +365,18 @@ static void mmu_handle_skey(target_ulong addr, int rw, int *flags) * @param raddr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer * @param exc true = inject a program check if a fault occurred - * @return 0 if the translation was successful, -1 if a fault occurred + * @return 0 = success, != 0, the exception to raise */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, - target_ulong *raddr, int *flags, bool exc) + target_ulong *raddr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - const int ilen = (rw == MMU_INST_FETCH) ? 2 : ILEN_AUTO; - uint64_t tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | - (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); uint64_t asce; int r; - + *tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | + (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + if (is_low_address(vaddr & TARGET_PAGE_MASK) && lowprot_enabled(env, asc)) { /* * If any part of this page is currently protected, make sure the @@ -390,12 +388,9 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, */ *flags |= PAGE_WRITE_INV; if (is_low_address(vaddr) && rw == MMU_DATA_STORE) { - if (exc) { - /* LAP sets bit 56 */ - tec |= 0x80; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -EACCES; + /* LAP sets bit 56 */ + *tec |= 0x80; + return PGM_PROTECTION; } } @@ -425,30 +420,21 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, /* perform the DAT translation */ r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { - if (exc) { - trigger_access_exception(env, r, ilen, tec); - } - return -1; + return r; } /* check for DAT protection */ if (unlikely(rw == MMU_DATA_STORE && !(*flags & PAGE_WRITE))) { - if (exc) { - /* DAT sets bit 61 only */ - tec |= 0x4; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* DAT sets bit 61 only */ + *tec |= 0x4; + return PGM_PROTECTION; } /* check for Instruction-Execution-Protection */ if (unlikely(rw == MMU_INST_FETCH && !(*flags & PAGE_EXEC))) { - if (exc) { - /* IEP sets bit 56 and 61 */ - tec |= 0x84; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* IEP sets bit 56 and 61 */ + *tec |= 0x84; + return PGM_PROTECTION; } nodat: @@ -472,9 +458,12 @@ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, int ret, i, pflags; for (i = 0; i < nr_pages; i++) { - ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, true); + uint64_t tec; + + ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec); if (ret) { - return ret; + trigger_access_exception(env, ret, ILEN_AUTO, tec); + return -EFAULT; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, From patchwork Thu Oct 10 11:33:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175771 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2179255ill; Thu, 10 Oct 2019 04:57:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqw8WtyIJ9PxQ2taPv/3TanRnIBckDkoKUraAzaAmR/Qlr7hGgzIZdbX5rEf6OlHmQWqCQFg X-Received: by 2002:ac8:1c34:: with SMTP id a49mr10015483qtk.184.1570708676967; Thu, 10 Oct 2019 04:57:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708676; cv=none; d=google.com; s=arc-20160816; b=EJue1czQipFwAySNSKXFYwZz44VdTYCWfFxbu7XMrJ23BGN5Dkg8GICM8dC0POur9A 7047+FC6GAXat+U8QPuEXhsvAw5n1ZfIPso4scP3DdBJ/RE3y3w8J0sA2Fuf562r0PBY XV0icnPne6Bh/0DP0XADTWUmeRO9fZzzDnGrBvHpkODX9MzEDkmWSXmBORnE/V+gfuG1 w6AU/wcVa/UM8L3iqXHsOzYlKL+hCe5YkohnJKnEOGQnNtFfV0537a5pciY0cXl8n+S1 QOdjjXlbPL3mGAcILSlorjAZ6rB7L6nNTIBEFKZXtTD5rMIQI4zMyeWKlNxBycrzRCP0 VtKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=w7Gv2f9saYqkbXs/nEo9XyrT9KNMM2DbxaC8sA0X6t4=; b=ZGvjv9hq5L3Mu+9kYAKbsr6P8R0uA/bTPgKqyNuXjhJI2NPjfD6DrFgIzTLx8I08h6 ttwoCl9YKk/+rjevSWgm+ZEjJgBUMNt36RUDVRRUNNx63NKGYUyBcov5aIHUCwNxlEk0 On0MOcI9S+tZ6ijCCpxC36hcRfLtsL821yhVCao4x73iZYnIpI53wYALHe2uoIjpLYNc 5vKY6E8R7i2Pee+1qFkv59eVccAdP88x9HF5d7GmCfQ/gDT3TCbQAjLhi+9CYlHZPLQs FfJNC6LYPrsT1pvR/jQkMbhppqC6YISL7yRMY3oVV82Qpd/gMykk/ggrDCNKG1aWuCSn IFZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j4si5685274qkd.85.2019.10.10.04.57.56 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:57:56 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36812 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX4u-0005L1-FF for patch@linaro.org; Thu, 10 Oct 2019 07:57:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50583) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWjn-0005Sz-Mq for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWjm-0006QO-Ja for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:07 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48114) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWjm-0006QE-AK; Thu, 10 Oct 2019 07:36:06 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7F27010CC1E3; Thu, 10 Oct 2019 11:36:05 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id B9B9B5E1C2; Thu, 10 Oct 2019 11:35:49 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 22/31] target/s390x: Return exception from translate_pages Date: Thu, 10 Oct 2019 13:33:47 +0200 Message-Id: <20191010113356.5017-23-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.65]); Thu, 10 Oct 2019 11:36:05 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Do not raise the exception directly within translate_pages, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-11-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.21.0 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 001d0a9c8a..869debd30a 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -451,25 +451,22 @@ nodat: * the MEMOP interface. */ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, - target_ulong *pages, bool is_write) + target_ulong *pages, bool is_write, uint64_t *tec) { uint64_t asc = cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &cpu->env; int ret, i, pflags; for (i = 0; i < nr_pages; i++) { - uint64_t tec; - - ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec); + ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, tec); if (ret) { - trigger_access_exception(env, ret, ILEN_AUTO, tec); - return -EFAULT; + return ret; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, MEMTXATTRS_UNSPECIFIED)) { - trigger_access_exception(env, PGM_ADDRESSING, ILEN_AUTO, 0); - return -EFAULT; + *tec = 0; /* unused */ + return PGM_ADDRESSING; } addr += TARGET_PAGE_SIZE; } @@ -497,6 +494,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, { int currlen, nr_pages, i; target_ulong *pages; + uint64_t tec; int ret; if (kvm_enabled()) { @@ -510,8 +508,10 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, + 1; pages = g_malloc(nr_pages * sizeof(*pages)); - ret = translate_pages(cpu, laddr, nr_pages, pages, is_write); - if (ret == 0 && hostbuf != NULL) { + ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); + if (ret) { + trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { currlen = MIN(len, TARGET_PAGE_SIZE - (laddr % TARGET_PAGE_SIZE)); From patchwork Thu Oct 10 11:33:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175760 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2167533ill; Thu, 10 Oct 2019 04:46:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqxEymYEjb9JyoYgqFWKmSqva7tJzvHjrR5WDdnutO2LZNEr/EHK+XhM9q/HW2EAZJDTy7Nv X-Received: by 2002:a0c:b4d2:: with SMTP id h18mr9265450qvf.208.1570707968469; Thu, 10 Oct 2019 04:46:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570707968; cv=none; d=google.com; s=arc-20160816; b=ZvmW9gLIujtyvWM0yizI3p1/msJqBGr/TdwNyorrGm/xS41mINIDrE6w/eMjYKnbtC C8L8AHwl8ptZQWXciSmQm0keUf88OBqUw4ypBoaflzR1uvZL9BpHoDVFjPGtHybEqqlo C2u2jr8pg0VyNDOQ6anMhs//EQRAXeTekRjadshuacG94Xz4yzZeY/4qwEhXFV2VG6jh b0R0QI4UgbvJGhm8BMdVj/b1z5Is5pBHXpbQT1QlgewCM2fRX5Z2GX4m8hM32KjOtADo LUppPuJwlRClza8FD4jFd+OKXdj+DyF1PDd9iU6FyLuQyVlxe9C7qTQR/6Yh1cU2nU3i qYWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=i89wpE6JQrhnj1eohi65RNjebwQ39GFN75uciaPwPfM=; b=kwtfnsp3oXzDwMbbjKdFvK0voNOQY8TWpOl9B9Ipa9YEqCGiQg+lDw6NZrvAli7LpZ l1AiQdoe1v+ZDufmtSGrODUBGT+cXYcK3sdGRwN8FJbZ/NZiMm2ZuNuKg2zYVfdJWFjS BZEhdH9bsdpIlm8V8jfznKeds/GnGPctF3dpsBkfMkcggdtrWv8BqlOeNr/v9nRXWL5/ IIj6LwMPHvvUAMqC1YrTjiWipzLfBfYwfsjB/2BlkJ4O0IIKWCGxctZU1nEYC0Z9ApzQ cMzBSg3SZ/YhN7w+ualH5gE5sDpHkLDZRD6fWC3PA0RX1Quxv7bWrHBDz5ZZdQWnD0aj wP7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k22si5635614qtk.122.2019.10.10.04.46.08 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:46:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36636 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWtT-0007RT-Bm for patch@linaro.org; Thu, 10 Oct 2019 07:46:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50640) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWk3-0005t3-Ev for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWk2-0006UE-0s for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42386) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWk1-0006Tu-Ot; Thu, 10 Oct 2019 07:36:21 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E6EBA10CBC4B; Thu, 10 Oct 2019 11:36:20 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id C5FDF5C1B5; Thu, 10 Oct 2019 11:36:05 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 23/31] target/s390x: Remove fail variable from s390_cpu_tlb_fill Date: Thu, 10 Oct 2019 13:33:48 +0200 Message-Id: <20191010113356.5017-24-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.66]); Thu, 10 Oct 2019 11:36:21 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Now that excp always contains a real exception number, we can use that instead of a separate fail variable. This allows a redundant test to be removed. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-12-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) -- 2.21.0 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 6a0728b65f..98a1ee8317 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc, tec; - int prot, fail, excp; + int prot, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,20 +141,18 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec); - fail = excp; } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); - fail = excp; } else { g_assert_not_reached(); } /* check out of RAM access */ - if (!fail && + if (!excp && !address_space_access_valid(&address_space_memory, raddr, TARGET_PAGE_SIZE, access_type, MEMTXATTRS_UNSPECIFIED)) { @@ -163,10 +161,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; tec = 0; /* unused */ - fail = 1; } - if (!fail) { + if (!excp) { qemu_log_mask(CPU_LOG_MMU, "%s: set tlb %" PRIx64 " -> %" PRIx64 " (%x)\n", __func__, (uint64_t)vaddr, (uint64_t)raddr, prot); @@ -178,13 +175,11 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } - if (excp) { - if (excp != PGM_ADDRESSING) { - stq_phys(env_cpu(env)->as, - env->psa + offsetof(LowCore, trans_exc_code), tec); - } - trigger_pgm_exception(env, excp, ILEN_AUTO); + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); } + trigger_pgm_exception(env, excp, ILEN_AUTO); cpu_restore_state(cs, retaddr, true); /* From patchwork Thu Oct 10 11:33:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175780 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2184272ill; Thu, 10 Oct 2019 05:02:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqw5AMDuzSh+wQeG7zzuDTmG4Z8YbgGN+bc44meO5h03HNO/eVxRCsqXB7zfbb9vBWnLnzLN X-Received: by 2002:a37:9442:: with SMTP id w63mr9102244qkd.138.1570708935889; Thu, 10 Oct 2019 05:02:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708935; cv=none; d=google.com; s=arc-20160816; b=ZchKFfn7PQZ+Znftq1GJWe4Rz0T5f/G33L4RPVXbDDwfSL9jEL5mCiSAjV2k+zK5sd bYWylQLijCIiEaSqRXq+8koITqDyVgMScUfBeBcTxctXyxyx+5g+YGcgM9Rv+hgE2Rvk 0m5lmOGf8Bk5RJD/REs8o2UIz9fIKAhUScBCMrDCMWH4WI2CWK7EzZfP9ykBpfavm0Ug U2nZ9w/My45ACvi2JFuZQ+ag65KZANeq/Jal9IoRkrG3c8Tr9BUrHHXQgYqoDUVYpiSD rC/yhb0iDY0BEK9fdMWBdIUW00jPjD5Ac3srtKn8zyCmOFjK+l6znZ8LDjwo9iXcpjLl CdOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=J93CMqm5X6glyXXnNaHtkAEDMS41wxJLB0XPHlAOTBE=; b=j79T1Km+dGHeMA2XduwBRV0jRpmZU86LY8RhEO9nG44VqwKDBCKSZpPwb79iwvk1in qQAXAEIgX84F6UL2KBzG1Rsd+tb0vEQjb5hmN/9XsDkAgtM1JCWPybb+TpSz0nvGtl4U rVjhsLhcCspRr3IDh/CE9u1jMW5LcPvqMW7VLKFMM64H8D5iV1y9u2da6ZeYJvA/0mdS h4hptL58Qzymddubig3byn8KBaxPwBiN5cEDrAIa1D9MRU7jb9oRNVoqwX4l02ssrn9q +1reK1H3llsvvP2iEMHYnt/aw6+aGXWIz025HzPua8gMQr/EgH/tETr63RSrP4ySsnNs 4gTQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o24si5536788qve.23.2019.10.10.05.02.15 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 05:02:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36844 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX94-0000Z5-JE for patch@linaro.org; Thu, 10 Oct 2019 08:02:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50671) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkE-0006AW-5p for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkD-0006YT-0v for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33724) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkC-0006Y6-R9; Thu, 10 Oct 2019 07:36:32 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 03D9B88FFF7; Thu, 10 Oct 2019 11:36:32 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3B0E65C1B5; Thu, 10 Oct 2019 11:36:21 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 24/31] target/s390x: Simplify helper_lra Date: Thu, 10 Oct 2019 13:33:49 +0200 Message-Id: <20191010113356.5017-25-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.68]); Thu, 10 Oct 2019 11:36:32 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We currently call trigger_pgm_exception to set cs->exception_index and env->int_pgm_code and then read the values back and then reset cs->exception_index so that the exception is not delivered. Instead, use the exception type that we already have directly without ever triggering an exception that must be suppressed. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-13-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) -- 2.21.0 diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index e15aa296dd..4254548935 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2361,34 +2361,23 @@ void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1) /* load real address */ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) { - CPUState *cs = env_cpu(env); - uint32_t cc = 0; uint64_t asc = env->psw.mask & PSW_MASK_ASC; uint64_t ret, tec; - int old_exc, flags, exc; + int flags, exc, cc; /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } - old_exc = cs->exception_index; exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); if (exc) { - /* - * We don't care about ILEN or TEC, as we're not going to - * deliver the exception -- thus resetting exception_index below. - * TODO: clean this up. - */ - trigger_pgm_exception(env, exc, ILEN_UNWIND); cc = 3; - } - if (cs->exception_index == EXCP_PGM) { - ret = env->int_pgm_code | 0x80000000; + ret = exc | 0x80000000; } else { + cc = 0; ret |= addr & ~TARGET_PAGE_MASK; } - cs->exception_index = old_exc; env->cc_op = cc; return ret; From patchwork Thu Oct 10 11:33:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175770 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2178163ill; Thu, 10 Oct 2019 04:56:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqyrutd/4yQcGKJ3V90hUkFCIEzC/krngX5daA52ywK4B9XZXnvk0Df7ZmuCSPM7BJuH6/X8 X-Received: by 2002:a50:f198:: with SMTP id x24mr8112856edl.238.1570708606036; Thu, 10 Oct 2019 04:56:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708606; cv=none; d=google.com; s=arc-20160816; b=O7GkAhbHpLhgxFf55H/Y4rzk+69UYg5eltiSU/lTbwv1C1sMFqt7qTrDDN/SHUPbQ1 kYQiS6uU1A7goSvzutq8y0ygDeSVqCt7hQOkTCPlYB4TGxhZlPPhvfsB3zuaDhCj+9p8 IwpRlRY1HY3Z9GKnSBCdlmBjW2DLrn/8v0SR544STVHS3pGJ6Pgt7jtAxBw+AKUu2gjk oqbKsiLvjztMiKEfJJD8aZsA/AAxbOiOnUbaLK4MVjB39L6JgVKuWYkGGvt7kTVD/y0S wJtmkDmrw96v/sz/Q2zXql2OPsQdHzXDOBONG9Y5NTZ8KaCTvBxE4ZiCQBrJ5q8NIJ1K XiKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=7Ivwxu8/t4YfCpLSLM8L9tizkTBczTRQPDbFGKSL1H8=; b=Oj5Ky32Ic5sNdHT4mHwzrqWtNUAshA1RHU+kXuljFmdu5I16b9AUg9AR04ziKRM3zx xxGZ/p6mbqun5VAPZREON0dWbkDJZGfr4B6YbkFcPzuEfenkjbWSOiKB6DoJqXyRfTm5 1Ml3xmF7VhHD9PeLJlsmYs4Lc1f/3aAX+kNn33P6sAsdMyIqiymqhQzdNUhFREYBx9RM 1/o++FaN93OzEtPYaNiE5wUwOzW0Gn8Mq6J1n6Rn1FsETPT8jb9bRoYO0K5LYi1oaj5j V8W58Tj53UbkSXiSiMoJtBCPHnFcPCptxMkwa6Mgr3PF5hhBBf+94S+e0Sin1nyadlhR rJQA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s19si3025924ejd.277.2019.10.10.04.56.45 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:56:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36802 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX3k-0003zJ-GW for patch@linaro.org; Thu, 10 Oct 2019 07:56:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50694) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkO-0006RZ-M4 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkN-0006aU-EB for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:6238) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkN-0006aN-8t; Thu, 10 Oct 2019 07:36:43 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 82D8189AC2; Thu, 10 Oct 2019 11:36:42 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4BB515C22C; Thu, 10 Oct 2019 11:36:32 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 25/31] target/s390x: Rely on unwinding in s390_cpu_tlb_fill Date: Thu, 10 Oct 2019 13:33:50 +0200 Message-Id: <20191010113356.5017-26-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 10 Oct 2019 11:36:42 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We currently set ilen to AUTO, then overwrite that during unwinding, then overwrite that for the code access case. This can be simplified to setting ilen to our arbitrary value for the (undefined) code access case, then rely on unwinding to overwrite that with the correct value for the data access case. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-14-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) -- 2.21.0 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 98a1ee8317..8ce992e639 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_AUTO); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. */ cpu->env.__excp_addr = address; @@ -179,24 +179,15 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, stq_phys(env_cpu(env)->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, excp, ILEN_AUTO); - cpu_restore_state(cs, retaddr, true); /* - * The ILC value for code accesses is undefined. The important - * thing here is to *not* leave env->int_pgm_ilen set to ILEN_AUTO, - * which would cause do_program_interrupt to attempt to read from - * env->psw.addr again. C.f. the condition in trigger_page_fault, - * but is not universally applied. - * - * ??? If we remove ILEN_AUTO, by moving the computation of ILEN - * into cpu_restore_state, then we may remove this entirely. + * For data accesses, ILEN will be filled in from the unwind info, + * within cpu_loop_exit_restore. For code accesses, retaddr == 0, + * and so unwinding will not occur. However, ILEN is also undefined + * for that case -- we choose to set ILEN = 2. */ - if (access_type == MMU_INST_FETCH) { - env->int_pgm_ilen = 2; - } - - cpu_loop_exit(cs); + trigger_pgm_exception(env, excp, 2); + cpu_loop_exit_restore(cs, retaddr); } static void do_program_interrupt(CPUS390XState *env) From patchwork Thu Oct 10 11:33:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175769 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2177456ill; Thu, 10 Oct 2019 04:56:01 -0700 (PDT) X-Google-Smtp-Source: APXvYqw7lTZeFtii54i4TG7kPGKrGYsDxM1hbORl7kxriBn1lxPns7mk3tksAgW72wzoC9IO+MJh X-Received: by 2002:ac8:1c34:: with SMTP id a49mr10007936qtk.184.1570708561614; Thu, 10 Oct 2019 04:56:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708561; cv=none; d=google.com; s=arc-20160816; b=BzTMiiWHL+QUyBxGPEBbgAJONX6jFi/sij4X4B3xxVGLfdrVPiJhhFBEDNa+yUiDZG dmNiSFGpVJ1F21G1RRe5BjeSgvBk2YXdWgZu52jHLoFDP+aICtZonOId9DQFXWcQMJkw JzfXcvm9SIqoXr9s2vFT8ooh06zrZnwEKeFdf2v23Hs50aDNTCssAsHKOtz/fGUGhYcD 2HUeDfuL3KyERhFz8Msttm13tXcWVjP5gDtgm6DR5XFT5i7AwxN2wo/5O329joAWrPxH 51N4CCBlRl3RO16jScQTAJlDyZnyeSIW71zU8ZnDju23ersXvDuw9WeDfTo9+cYJaA4M zMRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=uHMsGGnWyFERoahnZ0omXl9LMDr0pe1evBEQpS9VhbE=; b=WomabezbafVnGNBxT3lls+ZgdEdgw3hnYg5oAqeTipRCVUAnxrGGtsCVBaE30P+bF8 GLTNYPOjFlN3Tvxou+Xe/7GRC/zyQEjE5nVP9sdEjbGC5OGpYZN2SaltU2UtZyAGKXoP CM9YFGVgsHh5jYtcBEr2w/RQxXZv5gtyhIHZk91dXyui2x2Sd8+k1ljCQcAJUtkRDn6v d8l3Adn0rf7YKkx2c8OyjzYmnT0XRRopIqbGjB1UC9egAbvpfn1jyTgFu9CU3/055O6X KdX+uzf1pQJPHLsGdt7Sb+hRWykNTTScCjwUnZZBHBASx5SUcoPcQOc5mO8JtEmSTb+x v1nQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a185si5540111qkg.5.2019.10.10.04.56.01 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:56:01 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36779 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX32-0002hj-Iv for patch@linaro.org; Thu, 10 Oct 2019 07:56:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50727) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkT-0006cO-W8 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkT-0006bv-0k for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:31218) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkS-0006bg-RZ; Thu, 10 Oct 2019 07:36:48 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1913958; Thu, 10 Oct 2019 11:36:48 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id CDAC05C1B5; Thu, 10 Oct 2019 11:36:42 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 26/31] target/s390x: Rely on unwinding in s390_cpu_virt_mem_rw Date: Thu, 10 Oct 2019 13:33:51 +0200 Message-Id: <20191010113356.5017-27-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 10 Oct 2019 11:36:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson For TCG, we will always call s390_cpu_virt_mem_handle_exc, which will go through the unwinder to set ILEN. For KVM, we do not go through do_program_interrupt, so this argument is unused. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-15-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.21.0 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 869debd30a..df58fb73ba 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -510,7 +510,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { From patchwork Thu Oct 10 11:33:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175781 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2189275ill; Thu, 10 Oct 2019 05:05:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqzyiP1xD0TFI2PIJAFnmdT7Ci2hwEBM04oDMSjn/Ly+Gmfk1280ZiYtOSKURjd17inDggQq X-Received: by 2002:a37:2ec5:: with SMTP id u188mr9269690qkh.94.1570709141211; Thu, 10 Oct 2019 05:05:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570709141; cv=none; d=google.com; s=arc-20160816; b=syrVyw9v6vvL6qTwlYTlrXW+76YUT3qO5ecbp5Cw22w6V3NVcYaKf6TKj59fHr1oRV 0HyUBTLNgjYUnqcAPuZPnNOPoMOUJY86ZqOHUs2RiHfEKF0lHxz5qsXQpqviPg6heoui qs1BsFQZ8DWdc5UcNx7rwSQwUM8Cr9eEMhbxYfLtpmQWDydgyCMU5NUGXzGszhOK7fG5 XtdTuIx+9GOCW2NvJtR3TxrZsVl7OW0swHshYcdGCLkCzTfnYTDYQ3FkP9ICta3SgteB JYvTGFb89u4SOUPUC63LXPlsgKPYr2tJ0H7pfNcn+po8JoO5S40dpEgy6TBm6PxQbAU+ zC/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=GK7x8RVqzGpKU35izZ5jflaUXwtmu0s8AmcDFU0CA2Q=; b=CQkpdbu+7j4xCQY/Cx+JEiP9nVDvQdxWij4pyx9sEnbeh46SAgGzCVzkYnXBnQT+dA GQdpkj/Prgrd7i4o/JvEjZQccVvz1RwaCHEFC72EpXQwIqVdGHvPQ/BlB8T1o+pixHsE fvIS2yq3N4Q4fZ3rHTaXAxdp8rA+G+i8g5wqzS7UJtQ95dVHTAdFvcbFJfbXpWub8PsG /Y+vE63yc5kMOLjslLL/tHx9HLOPhXjcYIb6+/w4NrfUnx9EtuwbKRve3NP8V22aUXe9 q91DI6+pHWEX4S9DVGqUq4w8KZtC6fq1o6/7rgskEM3AQcfTxhf9qaEyE+YbIurrYvNC 4FAA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h11si5330410qtn.375.2019.10.10.05.05.41 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 05:05:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36886 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIXCO-0004H5-0C for patch@linaro.org; Thu, 10 Oct 2019 08:05:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50746) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkW-0006fU-0P for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkU-0006cS-QH for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:40905) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkU-0006cC-Kt; Thu, 10 Oct 2019 07:36:50 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D934989AC7; Thu, 10 Oct 2019 11:36:49 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 616BB5C1B5; Thu, 10 Oct 2019 11:36:48 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 27/31] target/s390x: Remove ILEN_AUTO Date: Thu, 10 Oct 2019 13:33:52 +0200 Message-Id: <20191010113356.5017-28-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 10 Oct 2019 11:36:49 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson This setting is no longer used. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-16-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/cpu.h | 2 -- target/s390x/excp_helper.c | 3 --- 2 files changed, 5 deletions(-) -- 2.21.0 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 18e7091763..e7a9a58e0f 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -806,8 +806,6 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); /* instruction length set by unwind info */ #define ILEN_UNWIND 0 -/* automatically detect the instruction length */ -#define ILEN_AUTO 0xff #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 8ce992e639..c252e9a7d8 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -196,9 +196,6 @@ static void do_program_interrupt(CPUS390XState *env) LowCore *lowcore; int ilen = env->int_pgm_ilen; - if (ilen == ILEN_AUTO) { - ilen = get_ilen(cpu_ldub_code(env, env->psw.addr)); - } assert(ilen == 2 || ilen == 4 || ilen == 6); switch (env->int_pgm_code) { From patchwork Thu Oct 10 11:33:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175772 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2181365ill; Thu, 10 Oct 2019 05:00:07 -0700 (PDT) X-Google-Smtp-Source: APXvYqxHZKRx0dNShu/X0Nekue29tyySZ2n6yb15ZKUN7yoxwCqn+SRjwAi4q1U14pxC8Chc/G5k X-Received: by 2002:a05:620a:1469:: with SMTP id j9mr9131407qkl.398.1570708807576; Thu, 10 Oct 2019 05:00:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708807; cv=none; d=google.com; s=arc-20160816; b=fZon/OIp/7Swt8ZARdKtpzDePH0aSrJxEEU5TBFom9B4sA7eN5OakpftSODUwzNq5c dFOwWzeW9muY2UCm1YwWhBDxlGYDRHmPfLguHXERkAmfxAFHRcrBWfND14Ko+iYq4gXn oz/mukqLP0pRiVlZTOdtatpzXQj5Igu/qbm80YI3PhcsD6t4o2IRc3DQ5KnS1msEzmhs I51KI/RZumHWDaUygfAoFFwUoy7u7sNZYmCppgqk7s90I0CVFdnXU9+67E+FUH/38lR7 ZXD+t/HcQ0vE8wclGhF0vZUBkFCpH9STFPYMKUWPRxzzfz3V/4YbI0AaYoTOB2E1dnu0 W99Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=n9nK2fR6klalLg2w93/xwMz8kKQIkVfpoaS7JucibHk=; b=NJLuD1J0yG1EmsFts7dC8RxD8WS/k3EnLoWj9qAuY1mc5PEp4GfhyGn3dFbM//Db4Y KUYgYsMwIjgLYlWMIvUFcba2V1FyvkCRsKBJ8bL8DH/9c57xJMHSHVzD0vRmAldo8siy a1k5N6mnmO6jna7acPl11TrMNGUAkDFC6+g3O8LxwDOpGQ69W4gZ8fDqbIjpK4z3uUDM tlSbIlB1b1SJZ+PUxkz6Wi1felkE9A/GWTcRQN/86gmmcZCOEcH28irf2Gxspvip8DSo S2r0xLd4svEn9N/PSd7HsmUKSNXiP7dCtC8FYYqJN0A+F7UDsXC6oeIoKGdohxMQZkIr Qyqw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g186si5779807qkd.102.2019.10.10.05.00.07 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 05:00:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36832 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX70-0007YI-Kr for patch@linaro.org; Thu, 10 Oct 2019 08:00:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50768) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkY-0006jk-N8 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkW-0006dI-Jw for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45262) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkW-0006cu-E9; Thu, 10 Oct 2019 07:36:52 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A1DC4883C24; Thu, 10 Oct 2019 11:36:51 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2C32A5C1B5; Thu, 10 Oct 2019 11:36:50 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 28/31] target/s390x: Remove ilen argument from trigger_access_exception Date: Thu, 10 Oct 2019 13:33:53 +0200 Message-Id: <20191010113356.5017-29-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.69]); Thu, 10 Oct 2019 11:36:51 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The single caller passes ILEN_UNWIND; pass that along to trigger_pgm_exception directly. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-17-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.21.0 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index df58fb73ba..09c74f17dd 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -33,7 +33,7 @@ #define FS_WRITE 0x400 static void trigger_access_exception(CPUS390XState *env, uint32_t type, - uint32_t ilen, uint64_t tec) + uint64_t tec) { S390CPU *cpu = env_archcpu(env); @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, uint32_t type, if (type != PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, type, ilen); + trigger_pgm_exception(env, type, ILEN_UNWIND); } } @@ -510,7 +510,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); + trigger_access_exception(&cpu->env, ret, tec); } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { From patchwork Thu Oct 10 11:33:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175782 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2192956ill; Thu, 10 Oct 2019 05:08:27 -0700 (PDT) X-Google-Smtp-Source: APXvYqzgJAgA1J7L4SgM9TIoVjcmCyKguUZwZ8MKyq4UMRaKHY8wOVEuJfGFTkLD3hTK5/RBAEYk X-Received: by 2002:a05:6402:21c7:: with SMTP id bi7mr7771438edb.205.1570709307896; Thu, 10 Oct 2019 05:08:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570709307; cv=none; d=google.com; s=arc-20160816; b=sXUtOtLRTVSGUHzY70LBWF0fPCwYpljhgD6HjyOG2WZB9kTUReWFy2Yos/BNMYgTKW s6bQvZip7JjVQkSzr7mTy9QHdeve3KcDt4lZnJ4fsT1t1aG+eDvN7v/kxzKTpLD67xnB D/348S5Aozfp49OTDJG5IyyZtTMaCGkoTOlKvSeZza3sZLkmG7wzGTm++GPLUkotHAeH d//7eY6T9WSqgurA8O1JIjGHcpYgJS/q14JNqMg1LY+5ghD0KFeaEvper33QnBGeuMvO GpnZoXR3AYVMjts1dty7wU1R7vQ38hMHCQxvCeVIygO5DgHTs0fFaJ4dNw2k3d8VMap3 +IUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=bZlbqzd8sXRlkMlK8wlqFd9GzHiCAtvOHMTDoCEC1OQ=; b=GtLSJhe9H9nmcWZCiCycIfE0QGRwDaLfmdaW8h7iVMarC9+pSL597LDWpy7/7IexXM +Uwl6NaJDRQNJbTuP88ARK0uNQ1+JRB6+URGe1yrQZUpOdLEpCAODwNwXMy28MXuj4cf +fAIiM8aIKONVb/TRcMyEe3cSU1/8uzatZLNpLt2kS+416aCV8cutIHxsarWQ/Nd2FTn jPJvtMxmx/z9i3GGuyNVdhUX/GRqIBnU1MlikRejNM/cJ+XUSHM/UiDL41zhCLvdQqZt pHkvBTe6lA+TtIq48b14/2tvBb84xqnLLoi2lqBG5/xu85tyUbNKyt5G69FhtknHeaDq ROLA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id rh27si2978248ejb.52.2019.10.10.05.08.27 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 05:08:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36916 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIXF4-0007f1-9t for patch@linaro.org; Thu, 10 Oct 2019 08:08:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50785) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkZ-0006lx-Oq for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkY-0006dx-GB for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44180) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkY-0006dl-7t; Thu, 10 Oct 2019 07:36:54 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6D16B970F1; Thu, 10 Oct 2019 11:36:53 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id EB2E55C1B5; Thu, 10 Oct 2019 11:36:51 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 29/31] target/s390x: Remove ilen argument from trigger_pgm_exception Date: Thu, 10 Oct 2019 13:33:54 +0200 Message-Id: <20191010113356.5017-30-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 10 Oct 2019 11:36:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson All but one caller passes ILEN_UNWIND, which is not stored. For the one use case in s390_cpu_tlb_fill, set int_pgm_ilen directly, simply to avoid the assert within do_program_interrupt. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-18-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 7 ++++--- target/s390x/internal.h | 2 +- target/s390x/interrupt.c | 7 ++----- target/s390x/mmu_helper.c | 2 +- 4 files changed, 8 insertions(+), 10 deletions(-) -- 2.21.0 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index c252e9a7d8..e70c20d363 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -42,7 +42,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ILEN_UNWIND); + trigger_pgm_exception(env, code); cpu_loop_exit(cs); } @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. */ cpu->env.__excp_addr = address; @@ -186,7 +186,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, * and so unwinding will not occur. However, ILEN is also undefined * for that case -- we choose to set ILEN = 2. */ - trigger_pgm_exception(env, excp, 2); + env->int_pgm_ilen = 2; + trigger_pgm_exception(env, excp); cpu_loop_exit_restore(cs, retaddr); } diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c993c3ef40..d37816104d 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -317,7 +317,7 @@ void cpu_unmap_lowcore(LowCore *lowcore); /* interrupt.c */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen); +void trigger_pgm_exception(CPUS390XState *env, uint32_t code); void cpu_inject_clock_comparator(S390CPU *cpu); void cpu_inject_cpu_timer(S390CPU *cpu); void cpu_inject_emergency_signal(S390CPU *cpu, uint16_t src_cpu_addr); diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 2b71e03914..4cdbbc8849 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -22,16 +22,13 @@ #endif /* Ensure to exit the TB after this call! */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) +void trigger_pgm_exception(CPUS390XState *env, uint32_t code) { CPUState *cs = env_cpu(env); cs->exception_index = EXCP_PGM; env->int_pgm_code = code; - /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ - if (ilen != ILEN_UNWIND) { - env->int_pgm_ilen = ilen; - } + /* env->int_pgm_ilen is already set, or will be set during unwinding */ } void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 09c74f17dd..90b81335f9 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, uint32_t type, if (type != PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, type, ILEN_UNWIND); + trigger_pgm_exception(env, type); } } From patchwork Thu Oct 10 11:33:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 175762 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2171147ill; Thu, 10 Oct 2019 04:49:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqzSk04wnNaKaoHqdqDBfZzl7gWt2w9w1OU0VwKCJBc2E9A+WdESNBuJIa71MtS41zwllVyF X-Received: by 2002:a05:620a:132b:: with SMTP id p11mr9105326qkj.232.1570708174455; Thu, 10 Oct 2019 04:49:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570708174; cv=none; d=google.com; s=arc-20160816; b=uOuFGtwIeRXJGMJhJfSkmjanVd1e3SMbf2t60NPMWFMzgbGci7Suc6RxQXwQN8GonV 7tWgx8iARB8y964oI9DwGBAzooqS/Dt4WCMofXSlFAW5yyThvWL3oa/NC2TZlx/FdpZz z0I6eNrP7p7gIWRd+b607gaZgEW6QaOEVNQmDzDSTvu6c1n0SklF1VpDAxx5Y8rJzsiB 7xf153EBSuzpuUmPI+J3GJIxFFvtuUOaSFryq+zcVB1+qIjhdvi6UdUy7WNfxUInm8TT lBajk0q/SrXvknyJFlFNGtw3zSLsjA4PVwvAyN4gKb/jwx5Tu4uGoN/uH1PmEkcHOjgh LpXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=qf2fFIwuh6IDKRqDLeOQ4N/XeLHIW7+IKd8lVvJtK4k=; b=sycBjEteSILxF8s0YjIuOY855cFX0Ygm3fLwYtF1dk6cJMrDcq10LegNBhI2OZ1oxG YvGQDa9tKRAj5yts7CvMYjDUiE2lVuO6XMO4iZ4yNwcNxWmRrGikObmfTNa8MKrzwJwO Y7hYKVIJNJxoXH/6e+Zr+jsg2fIh8ClhRwnfXcxiz1C9LHx2Q16FsFsoB896ThzjlM9N qea9Km7FRVQde/kU4YAJ20E5M+9MnhUWLI0g/q07zk/SmY1JiWjyF4LO4y4GotCDf0Wt rGSVeRGjXnbhCdvSxjrokkqu4KW/2MxvQpAEhRR0HsYOjAhZxG6utgvZQKaf333TyA7Y /2hw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c47si5807176qtb.98.2019.10.10.04.49.34 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2019 04:49:34 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:36680 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWwn-0002pz-FF for patch@linaro.org; Thu, 10 Oct 2019 07:49:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50806) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkb-0006oj-DS for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWka-0006ef-7A for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38908) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWka-0006eG-1S; Thu, 10 Oct 2019 07:36:56 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3A728316D798; Thu, 10 Oct 2019 11:36:55 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id B66185C1B5; Thu, 10 Oct 2019 11:36:53 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 30/31] target/s390x: Remove ILEN_UNWIND Date: Thu, 10 Oct 2019 13:33:55 +0200 Message-Id: <20191010113356.5017-31-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Thu, 10 Oct 2019 11:36:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson This setting is no longer used. Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-19-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand Signed-off-by: David Hildenbrand --- target/s390x/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.21.0 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index e7a9a58e0f..17460ed7b3 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -804,8 +804,6 @@ int cpu_s390x_signal_handler(int host_signum, void *pinfo, void *puc); void s390_crw_mchk(void); void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); -/* instruction length set by unwind info */ -#define ILEN_UNWIND 0 #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */