From patchwork Thu Oct 10 11:39:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 175749 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2186251ocf; Thu, 10 Oct 2019 04:40:16 -0700 (PDT) X-Google-Smtp-Source: APXvYqyk5aHykysOuSmm3zQJOi4k/d2Be2UnnZW0q9o9472oIst4ZA0wR792kMEO82QzjkxIXnXX X-Received: by 2002:a17:906:fcd4:: with SMTP id qx20mr7724648ejb.257.1570707616063; Thu, 10 Oct 2019 04:40:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570707616; cv=none; d=google.com; s=arc-20160816; b=MzJ7Z4wNPd7N0OTeb8VtMXdM3lWtu93j2wFO4Yghnn9lne42dr2mz9y7XRDZfhiYyC Z0U+b/QLoklatYG5upp9fib9vaxlMaCf+Ek2amBMuBUZhPqjQomkugwjcNuvYVAf8h9K s7vrYKifabKiweL9QMAoDO/6O4bzy0xc66Xx5GnASglozQzO4R6SoqCX27lZG6OgoeLy ebaRcm80DaUaRYkVFDyU6pbVk1fvpPgnmoMNMkzc1PMoXyPNyae046Lh3AkQylJzfBEZ Odi1e2CzOdtEUJM1AoMbp6k3vKZY/zJLvcu7LUCDA2LtUddeiV2SCA65AzBQwC1USxRC RsHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=GuctgQaNXDpvCtGnyWFncLAWkLOPv4PuyrC/plBYoKw=; b=iLKXaY8mj6smcejofVHFNPO0BTfwg04IhhL7ZaQ7FygPZrXnNglTMakPslvKbyhyFB pLXyOJ5cahNftfp6FF7eFlH3EkiNBbutmffJNBAiDN0+7pg9/kQh+fJwbyUwh5w9mgR8 oTJWuS+kjZ02iSU3ERWcM3KtGwPSJABtmoPJKwtSLyQW+H5oe82BybCE6lxiG12btKOz vG5s/Prp/U1xISc1t7vtR7ITl9Pi/w1fi/cZpPwaegggN4aOPaLGLTAOBb5q9DjCqfaX FP4I40k+l9HJ91uCISaqMqKrZytD0Q6f59163q/5S5RfUdXcVV/1ajOItJBQPFbWpKAq /rVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DanIYhUZ; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id p3sm1168937ljn.78.2019.10.10.04.40.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 04:40:10 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH 04/13] of: base: Add of_get_cpu_state_node() to get idle states for a CPU node Date: Thu, 10 Oct 2019 13:39:28 +0200 Message-Id: <20191010113937.15962-5-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010113937.15962-1-ulf.hansson@linaro.org> References: <20191010113937.15962-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The CPU's idle state nodes are currently parsed at the common cpuidle DT library, but also when initializing data for specific CPU idle operations, as in the PSCI cpuidle driver case and qcom-spm cpuidle case. To avoid open-coding, let's introduce of_get_cpu_state_node(), which takes the device node for the CPU and the index to the requested idle state node, as in-parameters. In case a corresponding idle state node is found, it returns the node with the refcount incremented for it, else it returns NULL. Moreover, for PSCI there are two options to describe the CPU's idle states [1], either via a flattened description or a hierarchical layout. Hence, let's take both options into account. [1] Documentation/devicetree/bindings/arm/psci.yaml Suggested-by: Sudeep Holla Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Reviewed-by: Rob Herring Reviewed-by: Daniel Lezcano Signed-off-by: Ulf Hansson --- drivers/of/base.c | 36 ++++++++++++++++++++++++++++++++++++ include/linux/of.h | 8 ++++++++ 2 files changed, 44 insertions(+) -- 2.17.1 Reviewed-by: Sudeep Holla diff --git a/drivers/of/base.c b/drivers/of/base.c index 1d667eb730e1..0e4cdf0f3864 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -477,6 +477,42 @@ int of_cpu_node_to_id(struct device_node *cpu_node) } EXPORT_SYMBOL(of_cpu_node_to_id); +/** + * of_get_cpu_state_node - Get CPU's idle state node at the given index + * + * @cpu_node: The device node for the CPU + * @index: The index in the list of the idle states + * + * Two generic methods can be used to describe a CPU's idle states, either via + * a flattened description through the "cpu-idle-states" binding or via the + * hierarchical layout, using the "power-domains" and the "domain-idle-states" + * bindings. This function check for both and returns the idle state node for + * the requested index. + * + * In case an idle state node is found at @index, the refcount is incremented + * for it, so call of_node_put() on it when done. Returns NULL if not found. + */ +struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + struct of_phandle_args args; + int err; + + err = of_parse_phandle_with_args(cpu_node, "power-domains", + "#power-domain-cells", 0, &args); + if (!err) { + struct device_node *state_node = + of_parse_phandle(args.np, "domain-idle-states", index); + + of_node_put(args.np); + if (state_node) + return state_node; + } + + return of_parse_phandle(cpu_node, "cpu-idle-states", index); +} +EXPORT_SYMBOL(of_get_cpu_state_node); + /** * __of_device_is_compatible() - Check if the node matches given constraints * @device: pointer to node diff --git a/include/linux/of.h b/include/linux/of.h index 844f89e1b039..c669c0a4732f 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -351,6 +351,8 @@ extern const void *of_get_property(const struct device_node *node, int *lenp); extern struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); extern struct device_node *of_get_next_cpu_node(struct device_node *prev); +extern struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index); #define for_each_property_of_node(dn, pp) \ for (pp = dn->properties; pp != NULL; pp = pp->next) @@ -765,6 +767,12 @@ static inline struct device_node *of_get_next_cpu_node(struct device_node *prev) return NULL; } +static inline struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + return NULL; +} + static inline int of_n_addr_cells(struct device_node *np) { return 0; From patchwork Thu Oct 10 11:39:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 175754 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2163036ill; Thu, 10 Oct 2019 04:41:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqxvaRGwg2zmEU/ck7gG9Wnv10/41QTvuBH80dCrzxYIaxXQYLMU2w9MzZ26OMi4QyYcWCnY X-Received: by 2002:a17:907:2118:: with SMTP id qn24mr7521246ejb.141.1570707616598; Thu, 10 Oct 2019 04:40:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570707616; cv=none; d=google.com; s=arc-20160816; b=zLl3teqBEqwoeyvEm7kfRu9mjxYeCOC9N/+vtUaSPs5XLcpyUAuCsF2T6RrTmAXlOE KCuyPhP2FwSmNVWp3WRKob9ibYAjtPFEOHRTU2QZILRCktVvPiYrxUv2teXm90mII3fb XLYY6vWK97x2A/yLm2YOQZruJUF+6knUaS4KDwTfZ1F5pz2j7H0yzLhBwT6n85GA1ovQ eP+mmY5M0TYZP6PBkc9sRcYHSTSj7MQVUDALwjS1c2ILqnJyY0PSEUNGF83UQbwqCr1R zqPfswQuIutokOVdNulGiYhNfiAVV4JtmkcxMipmFtH3guAamGVFZGZAbMGSNPtERDex CWhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=uPQQL2LvieO3hRSdVOoT+soulZMhG9ActuEg4qQLyaA=; b=Lup5kd1CqvFMfkQGHfAhUmR1e6Am7v23XCrPnXSrluyWteJiy2DnzRU0melMnauQBg g2UR/CIyHauRBHtz5KOyNow/rybUIyshRb20fLCWU9gARhJdWuyCVok4xMAawUZH4Zwn 0DNEmOdTrREvCnlF4h0iba628/HP0eAzIGFTgra5rNimjWHZ8c658u1HB1ZYi1dEaqsZ xsIYBe2kgLAIdrfXd6NjotjWR0AnH4D+oDOAa5qjoJYczokWhYc0wbcUIyZ1ADexN/tw csUmXc1forqkF0QdeTZL9BhEO0IoUqkLD5xpdjr9RA4i7kGS131kFJkb03EBRzDP3awp W/Tw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T0nFsd0F; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id p3sm1168937ljn.78.2019.10.10.04.40.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 04:40:12 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH 05/13] cpuidle: dt: Support hierarchical CPU idle states Date: Thu, 10 Oct 2019 13:39:29 +0200 Message-Id: <20191010113937.15962-6-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010113937.15962-1-ulf.hansson@linaro.org> References: <20191010113937.15962-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Lina Iyer Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Suggested-by: Sudeep Holla Signed-off-by: Lina Iyer Reviewed-by: Daniel Lezcano Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson --- drivers/cpuidle/dt_idle_states.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) -- 2.17.1 Reviewed-by: Sudeep Holla diff --git a/drivers/cpuidle/dt_idle_states.c b/drivers/cpuidle/dt_idle_states.c index d06d21a9525d..252f2a9686a6 100644 --- a/drivers/cpuidle/dt_idle_states.c +++ b/drivers/cpuidle/dt_idle_states.c @@ -111,8 +111,7 @@ static bool idle_state_valid(struct device_node *state_node, unsigned int idx, for (cpu = cpumask_next(cpumask_first(cpumask), cpumask); cpu < nr_cpu_ids; cpu = cpumask_next(cpu, cpumask)) { cpu_node = of_cpu_device_node_get(cpu); - curr_state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - idx); + curr_state_node = of_get_cpu_state_node(cpu_node, idx); if (state_node != curr_state_node) valid = false; @@ -170,7 +169,7 @@ int dt_init_idle_driver(struct cpuidle_driver *drv, cpu_node = of_cpu_device_node_get(cpumask_first(cpumask)); for (i = 0; ; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + state_node = of_get_cpu_state_node(cpu_node, i); if (!state_node) break; From patchwork Thu Oct 10 11:39:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 175750 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2186328ocf; Thu, 10 Oct 2019 04:40:20 -0700 (PDT) X-Google-Smtp-Source: APXvYqxTn6flZtUYQzhm2njdmTtdQte57FQfWEG0HNU/0NWLjjgpFYJJ7Mjaa4UaQ7feWoSsIkMi X-Received: by 2002:aa7:d5d3:: with SMTP id d19mr7454272eds.213.1570707620351; Thu, 10 Oct 2019 04:40:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570707620; cv=none; d=google.com; s=arc-20160816; b=EQiDAYAuDhDDOgfgWYZkDz0t1HSPTk98A6u5uYO0SnWR0591oDy/YUO4+iZqt0ZPTb 1JDoMs5hzxYx2JGrQnAVkHDJYVUsTrTFyqYER18/fxUsocg8TTkl52or/mG2+YxJLk2M ony8jv8/XepmfWtLSSxrhSN9ZFuq+/qaMeuN8v9P6D/kinh4pgzXjwrhRJrTx7Vl9yH1 YHd060Li1OXFVv/qE7ODrlIGSnKPfm+vI8vcZFszj6YUQaTHS1bHtTIYkR1ks0OhUfUA vu5re0HzjLSAP604NJghUC8hYidHFOXDtAcbAciu6N3wT12bHnYb9gXMM+d1PIVAtD74 Jehw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=nvXOpVcM/IpothdU1ZKoTmNHFS7WJStir72tye3UWWE=; b=I4OAOgOullXjZ2CDZgBs3D+sWLZUmEN6TSK/KYDCtnvO+xOgKPBncvakexz7Q1NPHT 7q5MVFSSD2q3GPnXTdlHt0HIprj2PW7yjaLCi8ForGpOxdsd0fHGzKYpSC0eeq9+nkaT dBwLZF7ajRjsN233f2pnWPRYXC1PtU/LeAW4vKyBNNaf7ZMOvVoSpjU83oVxjcyXT00g Pquh8m9eXbHslCCw3x6aaUAKJkRFs+HlRDT5A9HD6JbRL9iMhYvdeQPDKxJudjispLMa XKtWcMz2YDUrNNdBB86P/ArkcGLzfS6DmlugEGHMLi7BQObJ8DrhhqeeipAsND58hlXR eZcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EUAy07fB; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id p3sm1168937ljn.78.2019.10.10.04.40.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 04:40:15 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 07/13] cpuidle: psci: Support hierarchical CPU idle states Date: Thu, 10 Oct 2019 13:39:31 +0200 Message-Id: <20191010113937.15962-8-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010113937.15962-1-ulf.hansson@linaro.org> References: <20191010113937.15962-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Signed-off-by: Ulf Hansson --- drivers/cpuidle/cpuidle-psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 1195a1056139..5c30f23a8a7b 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -85,7 +85,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, return -ENOMEM; for (i = 0; i < state_nodes; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + state_node = of_get_cpu_state_node(cpu_node, i); if (!state_node) break; From patchwork Thu Oct 10 11:39:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 175751 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2186381ocf; Thu, 10 Oct 2019 04:40:23 -0700 (PDT) X-Google-Smtp-Source: APXvYqywDfTXXZ9QbPzp+0sYpAyZhDYs/tj7rFBilhkKVJ8CSvOZ0pgJwf/IdOWpYkY3sdZPUlL4 X-Received: by 2002:aa7:df86:: with SMTP id b6mr7596186edy.107.1570707622738; Thu, 10 Oct 2019 04:40:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570707622; cv=none; d=google.com; s=arc-20160816; b=f763UpGhqqAk1ZxE9FqfOLqMPvEkigq9uYzy8LUOxI7EBq/dxMrw/GB5vxC8atdkzc 5EpRkdOqE1Y2Y2gvSZ8GqNw7rphyYggnFMBYPPSR9Z0I9T4NShKt4RvowRntuM/pHuyt 4Xzzn7Eklx2nhpL2nt/D50qbHznTjYFnTazRCkeEzJwXpFMOj2lZhbl+nE7zhWbc7usr ajwEsHZnhBo/+edYd7wgvThoh6kGUv0Y76H9zofwn4T8/hlv+DnCLFrJBAPUCw9twSYu 0IkPK5QfvZ77qCH3iWSugCgsyKPvluFRMP+zYEZDX8z1ih0imPaH2NlmDn59e/dnu9JR xtig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=p5qrlgEHHz72OqawbaM4oNKQbRiSCqvlNCrVec5FI84=; b=r6lxdbi6S5LbO/IvJE5XzBinxFj5VJrdjBYmkPGrpqW6NFzCxQ7fREIkYc0Lk9IpIU Mtp8ccVeNzwPTivg37drK3M3B63/aAymFrcOUdIEN0cUuAJLqSLWbYNV3i/JrHaxsJlI yUWm3UpdBBM10eTaLKEYXbhEHNa0z+DOAEJ1gsKLkxEtjS7GkGTfZZfRRSgE4Pkb2+AZ wBDbUuOdJ6XBv6XJdid1huHLhb7bNzsosPgC+0CAXdcKPvKZHc41vc6KBPXr1e02DpNh soBCYl/8Lbw3T7RAmLfP2HNHCCDb4BCPBPElWXXyXGTz8gKk6MxUdq65c7ub0GZ8YLJQ 7Kmg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fpTsBvZB; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id p3sm1168937ljn.78.2019.10.10.04.40.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 04:40:17 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH 08/13] cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains Date: Thu, 10 Oct 2019 13:39:32 +0200 Message-Id: <20191010113937.15962-9-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010113937.15962-1-ulf.hansson@linaro.org> References: <20191010113937.15962-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The per CPU variable psci_power_state, contains an array of fixed values, which reflects the corresponding arm,psci-suspend-param parsed from DT, for each of the available CPU idle states. This isn't sufficient when using the hierarchical CPU topology in DT, in combination with having PSCI OS initiated (OSI) mode enabled. More precisely, in OSI mode, Linux is responsible of telling the PSCI FW what idle state the cluster (a group of CPUs) should enter, while in PSCI Platform Coordinated (PC) mode, each CPU independently votes for an idle state of the cluster. For this reason, introduce a per CPU variable called domain_state and implement two helper functions to read/write its value. Then let the domain_state take precedence over the regular selected state, when idling the CPU in psci_enter_idle_state(). This allows subsequent patches that implements support for PM domains for cpuidle-psci, to write the selected idle state parameter for the cluster into the domain_state variable. Furthermore, let's share the needed functions in a header file, to enable the support for PM domains to be implemented in a separate c-file. Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- drivers/cpuidle/cpuidle-psci.c | 31 ++++++++++++++++++++++++++++--- drivers/cpuidle/cpuidle-psci.h | 11 +++++++++++ 2 files changed, 39 insertions(+), 3 deletions(-) create mode 100644 drivers/cpuidle/cpuidle-psci.h -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 5c30f23a8a7b..a16467daf99d 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -20,17 +20,42 @@ #include +#include "cpuidle-psci.h" #include "dt_idle_states.h" static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); +static DEFINE_PER_CPU(u32, domain_state); + +void psci_set_domain_state(u32 state) +{ + __this_cpu_write(domain_state, state); +} + +static inline u32 psci_get_domain_state(void) +{ + return __this_cpu_read(domain_state); +} + +static int __psci_enter_idle_state(int idx, u32 state) +{ + return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state); +} static int psci_enter_idle_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { + int ret; u32 *states = __this_cpu_read(psci_power_state); - u32 state = idx ? states[idx - 1] : 0; + u32 state = psci_get_domain_state(); - return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state); + if (!state && idx) + state = states[idx - 1]; + + ret = __psci_enter_idle_state(idx, state); + + /* Clear the domain state to start fresh when back from idle. */ + psci_set_domain_state(0); + return ret; } static struct cpuidle_driver psci_idle_driver __initdata = { @@ -56,7 +81,7 @@ static const struct of_device_id psci_idle_state_match[] __initconst = { { }, }; -static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) +int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) { int err = of_property_read_u32(np, "arm,psci-suspend-param", state); diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h new file mode 100644 index 000000000000..e593de1784c3 --- /dev/null +++ b/drivers/cpuidle/cpuidle-psci.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __CPUIDLE_PSCI_H +#define __CPUIDLE_PSCI_H + +struct device_node; + +void psci_set_domain_state(u32 state); +int __init psci_dt_parse_state_node(struct device_node *np, u32 *state); + +#endif /* __CPUIDLE_PSCI_H */ From patchwork Thu Oct 10 11:39:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 175752 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2186465ocf; Thu, 10 Oct 2019 04:40:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqznTUbkDs2rl4GlBLNbBD1vSrl238LKPlj6skP84+kguMe3jLcncTwls19O18D6f7m/Qs1B X-Received: by 2002:a50:f384:: with SMTP id g4mr7501853edm.282.1570707626532; Thu, 10 Oct 2019 04:40:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570707626; cv=none; d=google.com; s=arc-20160816; b=h9BB37Nzl7cjtz9I8IweuTK7hKczIRS48gB0sxu7foLumMAVIEttKS2PLEqW+K7atZ w2nSA75hTMN5SD0/SztJGJoIh6OAzkgwzIy2I8pMjZ1eQ8ooArdCYfFIytZLalhCP9bB vaCu+Obul1Mh3Xbheo/AA5L6bDv5vBwRQy8taQKckl6Ohx28YxGbZpoSjU8wX+liN+yR hqSMdq51QthxosnVAhVimgLPJ0T5uZf9BZS6HwFPXm5DIUryMGbSCRnkoJ8TEKxhPc+g +KxjoyinET6bxGk1Os72blun4BVmqhItN0VEEJN+LPeDDahbtnW5IwF64RVyPVT1NeiC SYNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=9/8dxTtZBh9YfBGYNaIy85l3qLceeSKusYT56QpkuBo=; b=EfpjdPP8xLP95lBgDur0TKuFY+l/L0L5q47DKoMNzuSMDL+Jl14mTsYI/sd8WB3CbC 8NVXJ7TJTghVZAp6gS45iEkeIbIit8laHY3E1deVY1CEB0bwXzGcVrU6EAfgI2HOsrEA nQRX5vgHAWNPdEkkRX+HtoH8J5IstbEEEgSTN1wDvtQ2w+Ah+dodL4wZiRdgKVLprHtG bkhiSiMpwnjSlPPV9Gv92dNrzT5yYHvL2NS0SD3p0Xwj/Trrt4XIQC8J/XdTqa7P/yzL 18tiAhbsFDrHrNx+MGsa6X93cLnQpQ4HJpptc3uBKTKcA4sVzSBjkoseF7y5BWJag5wK /Hcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yCBQoiMd; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id p3sm1168937ljn.78.2019.10.10.04.40.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 04:40:20 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 10/13] cpuidle: psci: Add a helper to attach a CPU to its PM domain Date: Thu, 10 Oct 2019 13:39:34 +0200 Message-Id: <20191010113937.15962-11-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010113937.15962-1-ulf.hansson@linaro.org> References: <20191010113937.15962-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Introduce a PSCI DT helper function, psci_dt_attach_cpu(), which takes a CPU number as an in-parameter and tries to attach the CPU's struct device to its corresponding PM domain. Let's makes use of dev_pm_domain_attach_by_name(), as it allows us to specify "psci" as the "name" of the PM domain to attach to. Additionally, let's also prepare the attached device to be power managed via runtime PM. Signed-off-by: Ulf Hansson --- drivers/cpuidle/cpuidle-psci-domain.c | 21 +++++++++++++++++++++ drivers/cpuidle/cpuidle-psci.h | 6 ++++++ 2 files changed, 27 insertions(+) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c index 3f5143ccc3e0..7429fd7626a1 100644 --- a/drivers/cpuidle/cpuidle-psci-domain.c +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -9,9 +9,11 @@ #define pr_fmt(fmt) "CPUidle PSCI: " fmt +#include #include #include #include +#include #include #include #include @@ -279,3 +281,22 @@ static int __init psci_idle_init_domains(void) return ret; } subsys_initcall(psci_idle_init_domains); + +struct device *psci_dt_attach_cpu(int cpu) +{ + struct device *dev; + + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (!psci_has_osi_support()) + return NULL; + + dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), "psci"); + if (IS_ERR_OR_NULL(dev)) + return dev; + + pm_runtime_irq_safe(dev); + if (cpu_online(cpu)) + pm_runtime_get_sync(dev); + + return dev; +} diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h index e593de1784c3..d2e55cad9ac6 100644 --- a/drivers/cpuidle/cpuidle-psci.h +++ b/drivers/cpuidle/cpuidle-psci.h @@ -8,4 +8,10 @@ struct device_node; void psci_set_domain_state(u32 state); int __init psci_dt_parse_state_node(struct device_node *np, u32 *state); +#ifdef CONFIG_PM_GENERIC_DOMAINS_OF +struct device *psci_dt_attach_cpu(int cpu); +#else +static inline struct device *psci_dt_attach_cpu(int cpu) { return NULL; } +#endif + #endif /* __CPUIDLE_PSCI_H */ From patchwork Thu Oct 10 11:39:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 175753 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2186643ocf; Thu, 10 Oct 2019 04:40:36 -0700 (PDT) X-Google-Smtp-Source: APXvYqzb1jiUJ/UWBEjgv20hUBav4wgVnkBy2lf/r/23RxHbyVX5nSgTT1ZZUdeYC3aptymqB3+r X-Received: by 2002:a17:906:b24c:: with SMTP id ce12mr7576375ejb.327.1570707636344; Thu, 10 Oct 2019 04:40:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570707636; cv=none; d=google.com; s=arc-20160816; b=Dmjdr3YzorXGacJcE6KBuPvEEJtunBqPFUgys/aGitWtKKFD9PDudsYDasFv8XIYTt SExa2EiyrOk6noWPrao46NVrkm+v6biIh14e96h/iG2bA44lLmPrl4dtC3T+x0IB7Lzk rpJ1pAuCg7WzsE1UuxO2HI5bMUZt3XA3HA/R0yaxn4WoxcTWsgrKSYr88PPRJatjz2Bt xeItslqDG3k3xXRPNtZf7ySCjvnwELR7rMRGMwX1Hsq/yPQ7WEit+CQqHClm2b/FqQey fjDblR3A4SD4o2pjCC1UFEhPdxQZ4XjCPI4zDsEaDY4tGSSPCa1ppjD1NaqP/gnWwhE5 2qtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=seqtCL6qQP1lHpVV6JxVbCofE6J8aEcyzCDtbKaRiuo=; b=Ed9r0NdgH9i6+aRLS0P2muXSOeoQCr92I9T3X1CPI6MfG783iG4ZNAhydu0nKwgS1Y l3KmgBfjod4TfzS69CSFQGhFaHHVAn9iljLYglTN/gPxjxIlbQg3UJcTGD7nIXrfSwKJ s2lYZAE296fH/XRUWmWTL7jQ6s1YBSXjlke4oMwBvS/9KrDkLcV3khn8ZW4IdgLltOk5 YhrLiTj1TFQ9DqZzTzxrE3+ErFszf2joeCrq8N20zS0TxLJvWsdmCegkAD0jz0ARdjOW JKouM32MihzYYji1xt+j+7aHwPWsGa1LQ7Uwqjv/pJFeGp5junk47WFYwkdklAJMy38M RofQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ttocmxpO; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id p3sm1168937ljn.78.2019.10.10.04.40.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 04:40:25 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Andy Gross , Lina Iyer Subject: [PATCH 13/13] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Date: Thu, 10 Oct 2019 13:39:37 +0200 Message-Id: <20191010113937.15962-14-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010113937.15962-1-ulf.hansson@linaro.org> References: <20191010113937.15962-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org To enable the OS to better support PSCI OS initiated CPU suspend mode, let's convert from the flattened layout to the hierarchical layout. In the hierarchical layout, let's create a power domain provider per CPU and describe the idle states for each CPU inside the power domain provider node. To group the CPUs into a cluster, let's add another power domain provider and make it act as the master domain. Note that, the CPU's idle states remains compatible with "arm,idle-state", while the cluster's idle state becomes compatible with "domain-idle-state". Cc: Andy Gross Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 57 +++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5ea9fb8f2f87..1ece0c763592 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -102,10 +102,11 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; CPU1: cpu@1 { @@ -114,10 +115,11 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; CPU2: cpu@2 { @@ -126,10 +128,11 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; CPU3: cpu@3 { @@ -138,10 +141,11 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; L2_0: l2-cache { @@ -161,12 +165,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000012>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000032>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu {