From patchwork Thu Oct 10 08:35:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 175734 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1992317ill; Thu, 10 Oct 2019 01:58:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqwFGTUd6dCbbPvh9MHTlnCqyx3tPb4PjixaUcdked4ENrpv2+XP08Gq2hUcWmImwT6fxwki X-Received: by 2002:a05:6402:1514:: with SMTP id f20mr7104295edw.35.1570697930892; Thu, 10 Oct 2019 01:58:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570697930; cv=none; d=google.com; s=arc-20160816; b=iDKEjs8DfDrcI1fVDxNdDT717YKP1iGG+xABVPKkoLIEDasNdPbmSG4PS4QbJo68Gi 4375EpYFD/w9H1Sl+L/GwrEzf7VMBPHAMuDSPjEplc5RE3S9W/atZlO0Xee7xK61oSZP JNY4mH1bvUAJ0rqg1nTUy2GTwzQiI/p1fXy4KeqgcNwux9mLQVrMfxZHfo5i2xUfoK17 F397OL45XN892hrtLzJedlLWcn5DN+NctJdG8KvZah5OMqRka4w9Oj0lmH6qm45kaGvR w5SgqxpBOz2J6zrqU7fyRKeepUULV68SLoYBs4mGnU4GhDxd947tIpPJKrXZMIWv9ezE ID3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FE+1wEawqtBxi025TOTIuWTjnHUOgZN51bocypmwzD8=; b=CaCwaY+MVTMR1+AegtTjsiSILUEs5RW2KS35G13bfpniJwfdDxJOg25v+x2OSryFGE wJDObD+C4d1uE0lWNVo0stkYcL2+1VcM2GzhjXIUlx/+6z+FSummq8r+layCWJvFZnr3 w0z/INBUUeup3FWh5yLQyyTrmN2k2azsNH1qYFn8sOXaIOkIlj3Pt3sti0Bo+LLoBegm TWiJeC5N7HK5cdoyZrRkdkIwN+G7volVPh0506UKejrz8mr1+UoqwjT3wTxZDmVnNyDr NNCK4u5Hd3lngSgQHWAwR6e7+MYf3jvoEb8UD2mc+5++xU43IqjVsG7B9L7zSaxhx9XV f52A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=OSToX5To; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h26si3309693edb.141.2019.10.10.01.58.50; Thu, 10 Oct 2019 01:58:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=OSToX5To; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389116AbfJJIpV (ORCPT + 26 others); Thu, 10 Oct 2019 04:45:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:50874 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388040AbfJJIpT (ORCPT ); Thu, 10 Oct 2019 04:45:19 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B32082190F; Thu, 10 Oct 2019 08:45:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697119; bh=ZwsGgjl9+rpPm+dqONwrfFcqeSGtvnpm4WmFQaz5YAQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OSToX5ToT7bCOOYatyymi+59f8TuFk6CFvXEr5XVvSKjAorhg/Dv2t3MrkwxC3myj IQkuyn0IaBO62FoE8Dpch/TwYf6mK8egKcWaW4hFrod8vM3q9Kw5E57Uu+ZQDrPBlO wJyua5buN0fG+LgyWIpw89abo4k61xz5XaW6mbK4= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Gilad Ben-Yossef , Herbert Xu Subject: [PATCH 4.19 025/114] crypto: ccree - account for TEE not ready to report Date: Thu, 10 Oct 2019 10:35:32 +0200 Message-Id: <20191010083555.614023425@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gilad Ben-Yossef commit 76a95bd8f9e10cade9c4c8df93b5c20ff45dc0f5 upstream. When ccree driver runs it checks the state of the Trusted Execution Environment CryptoCell driver before proceeding. We did not account for cases where the TEE side is not ready or not available at all. Fix it by only considering TEE error state after sync with the TEE side driver. Signed-off-by: Gilad Ben-Yossef Fixes: ab8ec9658f5a ("crypto: ccree - add FIPS support") CC: stable@vger.kernel.org # v4.17+ Signed-off-by: Herbert Xu Signed-off-by: Greg Kroah-Hartman --- drivers/crypto/ccree/cc_fips.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) --- a/drivers/crypto/ccree/cc_fips.c +++ b/drivers/crypto/ccree/cc_fips.c @@ -21,7 +21,13 @@ static bool cc_get_tee_fips_status(struc u32 reg; reg = cc_ioread(drvdata, CC_REG(GPR_HOST)); - return (reg == (CC_FIPS_SYNC_TEE_STATUS | CC_FIPS_SYNC_MODULE_OK)); + /* Did the TEE report status? */ + if (reg & CC_FIPS_SYNC_TEE_STATUS) + /* Yes. Is it OK? */ + return (reg & CC_FIPS_SYNC_MODULE_OK); + + /* No. It's either not in use or will be reported later */ + return true; } /* From patchwork Thu Oct 10 08:35:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 175716 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1980428ill; Thu, 10 Oct 2019 01:45:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqzrQ0yDzt3tbU0REYHQEd929mW0KbSzF5quE9iU6MCWjbhwmQ7UEZ3ppmASCp7yqJg9JM/P X-Received: by 2002:a17:906:a88e:: with SMTP id ha14mr6809273ejb.92.1570697125318; Thu, 10 Oct 2019 01:45:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570697125; cv=none; d=google.com; s=arc-20160816; b=svEfCo1AaDKo32XXose3hBebWAG2daNUEinWviu2VtxPxFVg9gdvlwTHgJczjPFw6D wpb8jq2QoWna/KLuKBy0LMJVKNnhwA8qLsSBbNds0+DOZtbLJsK1uUdeHESBAXEwFjF5 K//TE3ToU+58aka9wRKIwPQnAb24SU+RQhb2Mn6COMihxrgVPrjuQz6laTpmcftDJALS epVV1U1h5pqD1mCNxNrUDHK8Po19NgC+JfIiC7V06MVLOw9kiQk+NPqAUfPR+FUctCFM CFXIXCAGh1ISR+NX16+2nooPeKV8mhJ9ScE+cynCcu3LKC8ApW3MIbj9jXn2YtsYkMhu SCJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=xzunCaB/1lXWA8njgxihmYT5N88JnlcqcIrxV8y9XJk=; b=j9nX4VdsrYFyX3QOP5xJtoRyv6nGyzCLMGGg03rP/Hod5ardrdx5DMB9OLvkAjJrCd 6GWF37nU7ECSOlrOdBLQf9FtNI/Nc9WMNLROu1uU6z4E9xt25GOZSUdMj9B9U+m+tqYP aS1ykkTqcCzUxE27BgUraNFbBJXn5A444Xx+IR4wyCIy6W4/aAa1Sb7wlUbDAjq/L+82 AQpaQlDmWWjZ5wgLpfUEaKMPIMsg7BvzTGWgfpq8SD3ClJI7bqJljNOJx9WGLF4rLNvG WCyydWipZl8N6MY2AszKu9oRHLh3rAf1LKugb3bC3I2DIX8b4qWE3noX2+DE4hg7aXHj xplA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=GA7uD6YA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a15si2682155eda.222.2019.10.10.01.45.25; Thu, 10 Oct 2019 01:45:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=GA7uD6YA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387711AbfJJIpY (ORCPT + 26 others); Thu, 10 Oct 2019 04:45:24 -0400 Received: from mail.kernel.org ([198.145.29.99]:50928 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389123AbfJJIpW (ORCPT ); Thu, 10 Oct 2019 04:45:22 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 827E921A4A; Thu, 10 Oct 2019 08:45:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697122; bh=+ziAXTDsobAVyPGnV9cjpxWdeSyfaxpVevwpVRrRxBw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GA7uD6YA8BupOk4XpI2BQxBRgD6rkD1B5k0bj3BEAs0r+DDgb40x9ACiG+kmbBwug mB5Dpggfbqez0GGV+g5x/4E6ePhn9jwWNSFEEclGYsDdGkLysxmrOHKWmg18lkYNoJ zdOfC4K+oW2D4EXd6H7xqcjztLCjI1n7zFOfrrNU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Gilad Ben-Yossef , Herbert Xu Subject: [PATCH 4.19 026/114] crypto: ccree - use the full crypt length value Date: Thu, 10 Oct 2019 10:35:33 +0200 Message-Id: <20191010083556.445175875@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gilad Ben-Yossef commit 7a4be6c113c1f721818d1e3722a9015fe393295c upstream. In case of AEAD decryption verifcation error we were using the wrong value to zero out the plaintext buffer leaving the end of the buffer with the false plaintext. Signed-off-by: Gilad Ben-Yossef Fixes: ff27e85a85bb ("crypto: ccree - add AEAD support") CC: stable@vger.kernel.org # v4.17+ Signed-off-by: Herbert Xu Signed-off-by: Greg Kroah-Hartman --- drivers/crypto/ccree/cc_aead.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/crypto/ccree/cc_aead.c +++ b/drivers/crypto/ccree/cc_aead.c @@ -227,7 +227,7 @@ static void cc_aead_complete(struct devi /* In case of payload authentication failure, MUST NOT * revealed the decrypted message --> zero its memory. */ - cc_zero_sgl(areq->dst, areq_ctx->cryptlen); + cc_zero_sgl(areq->dst, areq->cryptlen); err = -EBADMSG; } } else { /*ENCRYPT*/ From patchwork Thu Oct 10 08:35:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 175717 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1981366ill; Thu, 10 Oct 2019 01:46:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqxFSkXk1UZTvlRwKfja7OIkiuZyEAhwVFCRbXvCZXEm4cE8xSiMF1IVZ+Alnp8Sz+8xdEMT X-Received: by 2002:a50:b966:: with SMTP id m93mr6968334ede.228.1570697175751; Thu, 10 Oct 2019 01:46:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570697175; cv=none; d=google.com; s=arc-20160816; b=DzRNsEhwb/0nwfJKAhf7ffQnAf44p+chKUq1/qtszWGuC5m+f5dcJSXTimPZZSdBaZ nJVVR5nJwe/+xZeTR1BqL6tGN6hFVXLjFnOXr6k7+PBo54/yEn/a/5YWaXvnkWAtwkx/ ErMEAZQR5xDd59s41/kJVtSpUGK/++TxM9sJXvg/c9RC9GD91MhQpIYy5gE6f1vaqgxX I7TT9RBpeyunyJsfRaZZN596ICh0Tl64W2i16xL4DZjqWLuPypexSlM3Ow8q2wZ/CrfR IdGnplk3uFuElp61lIMOVURw9f2S8wJkTvMKB0SBsB1A0SF2bgjWP0WhOVHUODa17QAg zF7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=luBUIeew/WB9kyCOdRGlIl0vk6kCemCKhZEPfFyusrU=; b=1CIkrB5hxkl0G5IxXo2nNG654mvKuZ1kM7Kb4R5sJ+rfxaceQE/t1NV9DHRxL5odO8 4UB9DhiRjGtu1oXqdSLdFciNSNBMjL9q7kWaJSSZI1eYC4CzoVwVfY/UvJQKTdDpXqLm GI8TYuQ/68zpr6QnVnuY1iDAruGhurLkfGq9tjxwhsT0aBk6hlyuYavMDT7/NKJUs2i8 g28oJWCnV7eE5qv7KLY8+IHbj2fWYbKDpHPSpSJGmMMg7ey/5OECd/2AT4CzjwY+gsE2 xfIsYgrfbgIje89CqJjjZ0IB5IWfyV2sGAxnzmWw8lyePJnSX3/S8BcdxYVJ4ieZQ80I hnaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=B+72YhTu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c14si3536951eda.8.2019.10.10.01.46.15; Thu, 10 Oct 2019 01:46:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=B+72YhTu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389295AbfJJIqP (ORCPT + 26 others); Thu, 10 Oct 2019 04:46:15 -0400 Received: from mail.kernel.org ([198.145.29.99]:51980 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389269AbfJJIqM (ORCPT ); Thu, 10 Oct 2019 04:46:12 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C0384208C3; Thu, 10 Oct 2019 08:46:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697171; bh=ULwYx4Q1NCG16srlI3fJS7zmEXdK3GkZILdEY+2LNlY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B+72YhTuXkOp0DgnemKSAuUU3HRntgcmL0y9by+U3Nd5505MZXOXsiWrBzbOV4VV8 Ayr/K2JZTqb9I5U0sv5xmoCUgRb4+6BPkK5DaqUgcG7VJ9eF3q9br6eFJjLnyoT88S kxWOey4vGY8x61OV1gM+dmBR/pa8ctuKDHduOwgs= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Tomi Valkeinen , Adam Ford , Jyri Sarha Subject: [PATCH 4.19 037/114] drm/omap: fix max fclk divider for omap36xx Date: Thu, 10 Oct 2019 10:35:44 +0200 Message-Id: <20191010083603.611123885@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tomi Valkeinen commit e2c4ed148cf3ec8669a1d90dc66966028e5fad70 upstream. The OMAP36xx and AM/DM37x TRMs say that the maximum divider for DSS fclk (in CM_CLKSEL_DSS) is 32. Experimentation shows that this is not correct, and using divider of 32 breaks DSS with a flood or underflows and sync losts. Dividers up to 31 seem to work fine. There is another patch to the DT files to limit the divider correctly, but as the DSS driver also needs to know the maximum divider to be able to iteratively find good rates, we also need to do the fix in the DSS driver. Signed-off-by: Tomi Valkeinen Cc: Adam Ford Cc: stable@vger.kernel.org Link: https://patchwork.freedesktop.org/patch/msgid/20191002122542.8449-1-tomi.valkeinen@ti.com Tested-by: Adam Ford Reviewed-by: Jyri Sarha Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/omapdrm/dss/dss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/gpu/drm/omapdrm/dss/dss.c +++ b/drivers/gpu/drm/omapdrm/dss/dss.c @@ -1110,7 +1110,7 @@ static const struct dss_features omap34x static const struct dss_features omap3630_dss_feats = { .model = DSS_MODEL_OMAP3, - .fck_div_max = 32, + .fck_div_max = 31, .fck_freq_max = 173000000, .dss_fck_multiplier = 1, .parent_clk_name = "dpll4_ck", From patchwork Thu Oct 10 08:35:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 175718 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1981534ill; Thu, 10 Oct 2019 01:46:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqyUcA44j7FZ54he79hY0GvV7kGs2yrAKrDLZA40MkMpsSYazV3m2pzJJLQ8dhogf88SYwyw X-Received: by 2002:a05:6402:7cc:: with SMTP id u12mr7007023edy.63.1570697185920; Thu, 10 Oct 2019 01:46:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570697185; cv=none; d=google.com; s=arc-20160816; b=nWVLXA522Mou4Z/QeyXUMYSfmWG0maG9R83czRimHtzg2wm3o3xO5AUuwfhOwZ2onQ CigbM7c0Qc/0SK0XGcQf8010F8USOzKRufbu8Sptm38tP5vMtlzlqt35aDcWJv1KGnKL TfogTqcUC3SBYItilLc1daWscsL6ww0AKtBWmJXP1dv/x60e7l02aA1FatkwtpqGunat hWEK3ok03drpQxFGpTpx91rRHW3f00vCzjgFBAE7srmTuIjJJaJtInGVMg67YjRw1r+i WTcgq+o8GDc5SF+sV+LFC30+2DyrVoKdUC/SlxZySJjDeeyz3QmANhBre48uwDG/Is2O w4ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=6sr2l59DSYqesSBEnTHZ5Fvu3vFVS+moFYRTEM1UJ6o=; b=ba4vE/3KaKKrSDQ5G9l5jq9nFKTP8M3OerRqQ1yfB/hNW/vT9hK8wyaIdAfcJ2YtTG 6xbAf9wcb+oT8dYadx0p3aGuAw1Rlv6iYgY+dfwxYWDRRNGcM89kVNi+xl5SeR7VC9iO XVk3vbB/5vMyBwBNmBapEYu9AHMpqcQ1oOSgm37B6Uwknm4jmXz8mRPV/J17IcvKwoDe WTRx4A6LurGWA6F64KLcw6Ipdj2FG6n/SHdTAA42nW+EvWyiGSuN66npnQfuJlWrVsSg /BZAMLT5WztgoTWhUkK5g0tE0VUWZCvyWPXG7EekvIwKChLV+3A/HIV14WgFflI9Gycy dM6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=N45Mz1hE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c38si3409443eda.46.2019.10.10.01.46.25; Thu, 10 Oct 2019 01:46:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=N45Mz1hE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389318AbfJJIqY (ORCPT + 26 others); Thu, 10 Oct 2019 04:46:24 -0400 Received: from mail.kernel.org ([198.145.29.99]:52086 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388626AbfJJIqW (ORCPT ); Thu, 10 Oct 2019 04:46:22 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D02BE2064A; Thu, 10 Oct 2019 08:46:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697179; bh=bHx2Nen2pMglkYlQK9u15VZ8MUtk/xz7zTgunM6DuCA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N45Mz1hEBZmO3l6YH+q7WtZ7PCBHYtwJ16jOm2XE/Q7W/dAy7P8vbNuLgSimmjZws lA8zMzcyIZ/8/sqUlSettfN4BHYfEk2G1gf19A/8KQRg0/A0F1bpCSU35SeEZxpNZA /4YxIwW2XzSUdfIVM88M2vBtbcxLVy8qkvlujpic= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Suzuki K Poulose , Will Deacon , Catalin Marinas , Ard Biesheuvel Subject: [PATCH 4.19 048/114] arm64: cpufeature: Detect SSBS and advertise to userspace Date: Thu, 10 Oct 2019 10:35:55 +0200 Message-Id: <20191010083607.971782064@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Will Deacon commit d71be2b6c0e19180b5f80a6d42039cc074a693a2 upstream. Armv8.5 introduces a new PSTATE bit known as Speculative Store Bypass Safe (SSBS) which can be used as a mitigation against Spectre variant 4. Additionally, a CPU may provide instructions to manipulate PSTATE.SSBS directly, so that userspace can toggle the SSBS control without trapping to the kernel. This patch probes for the existence of SSBS and advertise the new instructions to userspace if they exist. Reviewed-by: Suzuki K Poulose Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- arch/arm64/include/asm/cpucaps.h | 3 ++- arch/arm64/include/asm/sysreg.h | 16 ++++++++++++---- arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/kernel/cpufeature.c | 19 +++++++++++++++++-- arch/arm64/kernel/cpuinfo.c | 1 + 5 files changed, 33 insertions(+), 7 deletions(-) --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -52,7 +52,8 @@ #define ARM64_MISMATCHED_CACHE_TYPE 31 #define ARM64_HAS_STAGE2_FWB 32 #define ARM64_WORKAROUND_1463225 33 +#define ARM64_SSBS 34 -#define ARM64_NCAPS 34 +#define ARM64_NCAPS 35 #endif /* __ASM_CPUCAPS_H */ --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -419,6 +419,7 @@ #define SYS_ICH_LR15_EL2 __SYS__LR8_EL2(7) /* Common SCTLR_ELx flags. */ +#define SCTLR_ELx_DSSBS (1UL << 44) #define SCTLR_ELx_EE (1 << 25) #define SCTLR_ELx_IESB (1 << 21) #define SCTLR_ELx_WXN (1 << 19) @@ -439,7 +440,7 @@ (1 << 10) | (1 << 13) | (1 << 14) | (1 << 15) | \ (1 << 17) | (1 << 20) | (1 << 24) | (1 << 26) | \ (1 << 27) | (1 << 30) | (1 << 31) | \ - (0xffffffffUL << 32)) + (0xffffefffUL << 32)) #ifdef CONFIG_CPU_BIG_ENDIAN #define ENDIAN_SET_EL2 SCTLR_ELx_EE @@ -453,7 +454,7 @@ #define SCTLR_EL2_SET (SCTLR_ELx_IESB | ENDIAN_SET_EL2 | SCTLR_EL2_RES1) #define SCTLR_EL2_CLEAR (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | \ SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_WXN | \ - ENDIAN_CLEAR_EL2 | SCTLR_EL2_RES0) + SCTLR_ELx_DSSBS | ENDIAN_CLEAR_EL2 | SCTLR_EL2_RES0) #if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffff #error "Inconsistent SCTLR_EL2 set/clear bits" @@ -477,7 +478,7 @@ (1 << 29)) #define SCTLR_EL1_RES0 ((1 << 6) | (1 << 10) | (1 << 13) | (1 << 17) | \ (1 << 27) | (1 << 30) | (1 << 31) | \ - (0xffffffffUL << 32)) + (0xffffefffUL << 32)) #ifdef CONFIG_CPU_BIG_ENDIAN #define ENDIAN_SET_EL1 (SCTLR_EL1_E0E | SCTLR_ELx_EE) @@ -494,7 +495,7 @@ ENDIAN_SET_EL1 | SCTLR_EL1_UCI | SCTLR_EL1_RES1) #define SCTLR_EL1_CLEAR (SCTLR_ELx_A | SCTLR_EL1_CP15BEN | SCTLR_EL1_ITD |\ SCTLR_EL1_UMA | SCTLR_ELx_WXN | ENDIAN_CLEAR_EL1 |\ - SCTLR_EL1_RES0) + SCTLR_ELx_DSSBS | SCTLR_EL1_RES0) #if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffff #error "Inconsistent SCTLR_EL1 set/clear bits" @@ -544,6 +545,13 @@ #define ID_AA64PFR0_EL0_64BIT_ONLY 0x1 #define ID_AA64PFR0_EL0_32BIT_64BIT 0x2 +/* id_aa64pfr1 */ +#define ID_AA64PFR1_SSBS_SHIFT 4 + +#define ID_AA64PFR1_SSBS_PSTATE_NI 0 +#define ID_AA64PFR1_SSBS_PSTATE_ONLY 1 +#define ID_AA64PFR1_SSBS_PSTATE_INSNS 2 + /* id_aa64mmfr0 */ #define ID_AA64MMFR0_TGRAN4_SHIFT 28 #define ID_AA64MMFR0_TGRAN64_SHIFT 24 --- a/arch/arm64/include/uapi/asm/hwcap.h +++ b/arch/arm64/include/uapi/asm/hwcap.h @@ -48,5 +48,6 @@ #define HWCAP_USCAT (1 << 25) #define HWCAP_ILRCPC (1 << 26) #define HWCAP_FLAGM (1 << 27) +#define HWCAP_SSBS (1 << 28) #endif /* _UAPI__ASM_HWCAP_H */ --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -164,6 +164,11 @@ static const struct arm64_ftr_bits ftr_i ARM64_FTR_END, }; +static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = { + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_SSBS_SHIFT, 4, ID_AA64PFR1_SSBS_PSTATE_NI), + ARM64_FTR_END, +}; + static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = { /* * We already refuse to boot CPUs that don't support our configured @@ -379,7 +384,7 @@ static const struct __ftr_reg_entry { /* Op1 = 0, CRn = 0, CRm = 4 */ ARM64_FTR_REG(SYS_ID_AA64PFR0_EL1, ftr_id_aa64pfr0), - ARM64_FTR_REG(SYS_ID_AA64PFR1_EL1, ftr_raz), + ARM64_FTR_REG(SYS_ID_AA64PFR1_EL1, ftr_id_aa64pfr1), ARM64_FTR_REG(SYS_ID_AA64ZFR0_EL1, ftr_raz), /* Op1 = 0, CRn = 0, CRm = 5 */ @@ -669,7 +674,6 @@ void update_cpu_features(int cpu, /* * EL3 is not our concern. - * ID_AA64PFR1 is currently RES0. */ taint |= check_update_ftr_reg(SYS_ID_AA64PFR0_EL1, cpu, info->reg_id_aa64pfr0, boot->reg_id_aa64pfr0); @@ -1254,6 +1258,16 @@ static const struct arm64_cpu_capabiliti .cpu_enable = cpu_enable_hw_dbm, }, #endif + { + .desc = "Speculative Store Bypassing Safe (SSBS)", + .capability = ARM64_SSBS, + .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, + .matches = has_cpuid_feature, + .sys_reg = SYS_ID_AA64PFR1_EL1, + .field_pos = ID_AA64PFR1_SSBS_SHIFT, + .sign = FTR_UNSIGNED, + .min_field_value = ID_AA64PFR1_SSBS_PSTATE_ONLY, + }, {}, }; @@ -1299,6 +1313,7 @@ static const struct arm64_cpu_capabiliti #ifdef CONFIG_ARM64_SVE HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_SVE_SHIFT, FTR_UNSIGNED, ID_AA64PFR0_SVE, CAP_HWCAP, HWCAP_SVE), #endif + HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_SSBS_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_SSBS_PSTATE_INSNS, CAP_HWCAP, HWCAP_SSBS), {}, }; --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -81,6 +81,7 @@ static const char *const hwcap_str[] = { "uscat", "ilrcpc", "flagm", + "ssbs", NULL }; From patchwork Thu Oct 10 08:36:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 175730 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1984579ill; Thu, 10 Oct 2019 01:49:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqzr4Fmf9Rk9coKDqdDgLnb5xxgSNPwjCqljCj6JJVdv3GQufARam8ZbArXZtVPcYSULVUHJ X-Received: by 2002:a17:906:cc85:: with SMTP id oq5mr6779707ejb.81.1570697387385; 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[209.132.180.67]) by mx.google.com with ESMTP id m24si2573831ejx.286.2019.10.10.01.49.47; Thu, 10 Oct 2019 01:49:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=TXwnPRpf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389354AbfJJItp (ORCPT + 26 others); Thu, 10 Oct 2019 04:49:45 -0400 Received: from mail.kernel.org ([198.145.29.99]:56342 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389839AbfJJItj (ORCPT ); Thu, 10 Oct 2019 04:49:39 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2440B218AC; Thu, 10 Oct 2019 08:49:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697378; bh=hjClmTpggnb7L6mcq55UzXAa9IIEoGjT4X6BTvjO7nk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TXwnPRpfDTRsA+RaSjJASFx8VUh0CkIUN1GC5D+4CafIAHuTQcqy4qWTFa8SOqPjl B9eyopdfhoc0C8zuJtlxG+d8hhcjLTZLPjyNXCEvlnBGYltMttiMY4m47kLpd3lA5Q TsAspoomustQfmxRJtQW1PmRZT6issoTPayUGwQM= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Will Deacon , Catalin Marinas , Ard Biesheuvel Subject: [PATCH 4.19 091/114] arm64: docs: Document SSBS HWCAP Date: Thu, 10 Oct 2019 10:36:38 +0200 Message-Id: <20191010083612.904076126@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Will Deacon [ Upstream commit ee91176120bd584aa10c564e7e9fdcaf397190a1 ] We advertise the MRS/MSR instructions for toggling SSBS at EL0 using an HWCAP, so document it along with the others. Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- Documentation/arm64/elf_hwcaps.txt | 4 ++++ 1 file changed, 4 insertions(+) --- a/Documentation/arm64/elf_hwcaps.txt +++ b/Documentation/arm64/elf_hwcaps.txt @@ -178,3 +178,7 @@ HWCAP_ILRCPC HWCAP_FLAGM Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001. + +HWCAP_SSBS + + Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010. 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[209.132.180.67]) by mx.google.com with ESMTP id si30si2807785ejb.92.2019.10.10.01.48.39; Thu, 10 Oct 2019 01:48:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Wzt4W63e; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389671AbfJJIsf (ORCPT + 26 others); Thu, 10 Oct 2019 04:48:35 -0400 Received: from mail.kernel.org ([198.145.29.99]:54652 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389120AbfJJIs1 (ORCPT ); Thu, 10 Oct 2019 04:48:27 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3B50E208C3; Thu, 10 Oct 2019 08:48:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697304; bh=oao8EGCviC1uG/vEmaLziTEieGml2DsRK5XwBRMeSjI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wzt4W63e5aEs8+tagvcGuRu+xpgd3IxESPsj8tFtF0GvHyEMzAE8pDbIjMUdJtbxH VmUJ6ziI1wWLzZon3XYhPenzC6eJk6d8Siec0IzKxXaFgX8nwFbme22Q4hskYOYQAz TwaZaIp0QiQtdOwz50kAQXQUTpcG2WHjfh9mnTjg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jeremy Linton , Suzuki K Poulose , Andre Przywara , Catalin Marinas , Stefan Wahren , Will Deacon , Ard Biesheuvel Subject: [PATCH 4.19 094/114] arm64: add sysfs vulnerability show for meltdown Date: Thu, 10 Oct 2019 10:36:41 +0200 Message-Id: <20191010083613.091754245@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jeremy Linton [ Upstream commit 1b3ccf4be0e7be8c4bd8522066b6cbc92591e912 ] We implement page table isolation as a mitigation for meltdown. Report this to userspace via sysfs. Signed-off-by: Jeremy Linton Reviewed-by: Suzuki K Poulose Reviewed-by: Andre Przywara Reviewed-by: Catalin Marinas Tested-by: Stefan Wahren Signed-off-by: Will Deacon Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kernel/cpufeature.c | 58 +++++++++++++++++++++++++++++++---------- 1 file changed, 44 insertions(+), 14 deletions(-) --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -889,7 +889,7 @@ static bool has_cache_dic(const struct a return ctr & BIT(CTR_DIC_SHIFT); } -#ifdef CONFIG_UNMAP_KERNEL_AT_EL0 +static bool __meltdown_safe = true; static int __kpti_forced; /* 0: not forced, >0: forced on, <0: forced off */ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, @@ -908,6 +908,16 @@ static bool unmap_kernel_at_el0(const st { /* sentinel */ } }; char const *str = "command line option"; + bool meltdown_safe; + + meltdown_safe = is_midr_in_range_list(read_cpuid_id(), kpti_safe_list); + + /* Defer to CPU feature registers */ + if (has_cpuid_feature(entry, scope)) + meltdown_safe = true; + + if (!meltdown_safe) + __meltdown_safe = false; /* * For reasons that aren't entirely clear, enabling KPTI on Cavium @@ -919,6 +929,19 @@ static bool unmap_kernel_at_el0(const st __kpti_forced = -1; } + /* Useful for KASLR robustness */ + if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0) { + if (!__kpti_forced) { + str = "KASLR"; + __kpti_forced = 1; + } + } + + if (!IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0)) { + pr_info_once("kernel page table isolation disabled by kernel configuration\n"); + return false; + } + /* Forced? */ if (__kpti_forced) { pr_info_once("kernel page table isolation forced %s by %s\n", @@ -926,18 +949,10 @@ static bool unmap_kernel_at_el0(const st return __kpti_forced > 0; } - /* Useful for KASLR robustness */ - if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) - return true; - - /* Don't force KPTI for CPUs that are not vulnerable */ - if (is_midr_in_range_list(read_cpuid_id(), kpti_safe_list)) - return false; - - /* Defer to CPU feature registers */ - return !has_cpuid_feature(entry, scope); + return !meltdown_safe; } +#ifdef CONFIG_UNMAP_KERNEL_AT_EL0 static void kpti_install_ng_mappings(const struct arm64_cpu_capabilities *__unused) { @@ -962,6 +977,12 @@ kpti_install_ng_mappings(const struct ar return; } +#else +static void +kpti_install_ng_mappings(const struct arm64_cpu_capabilities *__unused) +{ +} +#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */ static int __init parse_kpti(char *str) { @@ -975,7 +996,6 @@ static int __init parse_kpti(char *str) return 0; } early_param("kpti", parse_kpti); -#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */ #ifdef CONFIG_ARM64_HW_AFDBM static inline void __cpu_enable_hw_dbm(void) @@ -1196,7 +1216,6 @@ static const struct arm64_cpu_capabiliti .field_pos = ID_AA64PFR0_EL0_SHIFT, .min_field_value = ID_AA64PFR0_EL0_32BIT_64BIT, }, -#ifdef CONFIG_UNMAP_KERNEL_AT_EL0 { .desc = "Kernel page table isolation (KPTI)", .capability = ARM64_UNMAP_KERNEL_AT_EL0, @@ -1212,7 +1231,6 @@ static const struct arm64_cpu_capabiliti .matches = unmap_kernel_at_el0, .cpu_enable = kpti_install_ng_mappings, }, -#endif { /* FP/SIMD is not implemented */ .capability = ARM64_HAS_NO_FPSIMD, @@ -1853,3 +1871,15 @@ void cpu_clear_disr(const struct arm64_c /* Firmware may have left a deferred SError in this register. */ write_sysreg_s(0, SYS_DISR_EL1); } + +ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, + char *buf) +{ + if (__meltdown_safe) + return sprintf(buf, "Not affected\n"); + + if (arm64_kernel_unmapped_at_el0()) + return sprintf(buf, "Mitigation: PTI\n"); + + return sprintf(buf, "Vulnerable\n"); +} From patchwork Thu Oct 10 08:36:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 175721 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1983578ill; Thu, 10 Oct 2019 01:48:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqyknU2NrAhkHKnUtEunvJoDeCSheLdfhEqSbIHvsYm+cCRvswQhS6RqtpDo48L1XUMC4OSA X-Received: by 2002:a17:906:27c5:: with SMTP id k5mr6856821ejc.173.1570697320229; Thu, 10 Oct 2019 01:48:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570697320; cv=none; d=google.com; s=arc-20160816; b=dZowEImYmgY2K8AUmtV1SyETpaz52/lTSYEZN3PoEagE/471Ict31QEMWgQOTAvNLi 3bQFY7xm++zgosOsJrhfk0KQekeunkPeXw+R7fXTCshouhl05X8uUV5DZcl26zfmqJsy RbrpF0vIQxKJzDX4J+uJTQMKXzzqSLZIzRSJJL1BWYhDhe6CbvOc78xb/hmYln/mjH8G B7RQBBPnDe/n0PqZ3B0jIZez/STnGFMl+lQUcO5KYf0THquhgo/AR+HO/G0VYAMs5lWG 7NWwTCbBNGJ+qQMoZWfpw+2rZ6QnFcBLH7JxMzq1emZ83YpHHUS37jXfkKVHBupjtH5T +1Jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4Gx0COiR2Ye479Vl8FELTqenTI8EfrvQSlsGvLEn7P4=; b=HsXXTMaYIF8w2l4hLqnpHN8NUXDMxFmHzGdNkpgr7MUbxR/o2yQ+01rokNZUXBaxI4 m6nrDidH7H5sTx1kxtMLa9eSKfdm2VLKwpbpPYPzAZOzyr2OXb7gFmgRNOn53C7ZKs1q n0wNenOavQyMxJkvavLkdKwTH3syLCM8J7YzkJx7Tf9QzVgZ021UZ8fsF2TUS4VCC++k aphQqts6Ce8diRiMAzECwQiZ/7GuHFg8N3zPIuOoJL2EgZTJph6QUcrwSHIKFtKsuQYX vzTrJxW/1y3mmpW/444rBTc9PXoraVLr8zK1UcGQ8kCUrJqW0bBAfKjvqVWzoEoYm8X3 Fl3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=iP8jm4F8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id si30si2807785ejb.92.2019.10.10.01.48.40; Thu, 10 Oct 2019 01:48:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=iP8jm4F8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389689AbfJJIsi (ORCPT + 26 others); Thu, 10 Oct 2019 04:48:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:54736 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389651AbfJJIsa (ORCPT ); Thu, 10 Oct 2019 04:48:30 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B54632064A; Thu, 10 Oct 2019 08:48:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570697310; bh=8/k19fIZ0kkjZNWVifZ4eztuH6N6F6LNK7/z2zqspQM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iP8jm4F8iUj1sU2k2cOVgqnpqWlStKjmZBuX7ppedxWW1X+L/kry5KaSpGxln9uBM sD9ylUVby2ZOPqwJIOVJEs9foRtyFlqGZGD1l+CXI9mmbVWejz11carR8lUrXkvZv2 WWw2m1/GmjNdJVFXj72ECgvBopwkdPqZL52D0bFA= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jeremy Linton , Andre Przywara , Catalin Marinas , Stefan Wahren , Will Deacon , Ard Biesheuvel Subject: [PATCH 4.19 096/114] arm64: Always enable ssb vulnerability detection Date: Thu, 10 Oct 2019 10:36:43 +0200 Message-Id: <20191010083613.231594675@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010083544.711104709@linuxfoundation.org> References: <20191010083544.711104709@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jeremy Linton [ Upstream commit d42281b6e49510f078ace15a8ea10f71e6262581 ] Ensure we are always able to detect whether or not the CPU is affected by SSB, so that we can later advertise this to userspace. Signed-off-by: Jeremy Linton Reviewed-by: Andre Przywara Reviewed-by: Catalin Marinas Tested-by: Stefan Wahren [will: Use IS_ENABLED instead of #ifdef] Signed-off-by: Will Deacon Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- arch/arm64/include/asm/cpufeature.h | 4 ---- arch/arm64/kernel/cpu_errata.c | 9 +++++---- 2 files changed, 5 insertions(+), 8 deletions(-) --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -525,11 +525,7 @@ static inline int arm64_get_ssbd_state(v #endif } -#ifdef CONFIG_ARM64_SSBD void arm64_set_ssbd_mitigation(bool state); -#else -static inline void arm64_set_ssbd_mitigation(bool state) {} -#endif #endif /* __ASSEMBLY__ */ --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -239,7 +239,6 @@ enable_smccc_arch_workaround_1(const str } #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ -#ifdef CONFIG_ARM64_SSBD DEFINE_PER_CPU_READ_MOSTLY(u64, arm64_ssbd_callback_required); int ssbd_state __read_mostly = ARM64_SSBD_KERNEL; @@ -312,6 +311,11 @@ void __init arm64_enable_wa2_handling(st void arm64_set_ssbd_mitigation(bool state) { + if (!IS_ENABLED(CONFIG_ARM64_SSBD)) { + pr_info_once("SSBD disabled by kernel configuration\n"); + return; + } + if (this_cpu_has_cap(ARM64_SSBS)) { if (state) asm volatile(SET_PSTATE_SSBS(0)); @@ -431,7 +435,6 @@ out_printmsg: return required; } -#endif /* CONFIG_ARM64_SSBD */ #ifdef CONFIG_ARM64_ERRATUM_1463225 DEFINE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa); @@ -710,14 +713,12 @@ const struct arm64_cpu_capabilities arm6 ERRATA_MIDR_RANGE_LIST(arm64_harden_el2_vectors), }, #endif -#ifdef CONFIG_ARM64_SSBD { .desc = "Speculative Store Bypass Disable", .capability = ARM64_SSBD, .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, .matches = has_ssbd_mitigation, }, -#endif #ifdef CONFIG_ARM64_ERRATUM_1463225 { .desc = "ARM erratum 1463225",