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[209.51.188.17]) by mx.google.com with ESMTPS id q2-20020a056214194200b0069b46024c8fsi2225769qvk.410.2024.04.18.12.26.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Apr 2024 12:26:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F4hSO3e6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rxXOD-0007Wc-Mi; Thu, 18 Apr 2024 15:25:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rxXO8-0007UA-CE for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:25:40 -0400 Received: from mail-lf1-x12e.google.com ([2a00:1450:4864:20::12e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rxXO5-0007FO-FX for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:25:40 -0400 Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-516db2214e6so1664070e87.1 for ; Thu, 18 Apr 2024 12:25:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713468335; x=1714073135; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=a05kQu+3IE9JJfcYC8SvHu7OLyLA4nojU3zTAPx26K0=; b=F4hSO3e6Nq99Q23RPlrRgQSJyhcKyRF0hhqc8N3XLNvNLL49i9X4li5zlFd1ZPaPbq AG/8vS8omBz05xV2R2lRam/vuW7m7cMl3plwui0WURyi6Kh7aHHwDXWwDpeNgYkVKgrJ mZ8eRXr+kvjm2jntI3kIgbO0zRE9hFY3uWMi2b0TVKf7xiGA8xEF/jyRVACn1ib0w46P +gTKAJLnDgGjo/8yoIOhjiH4guI+fpRUYfNQG95iUfBx2+IY6+9ezUL7VgyyIIwtE+nb f2MTmlfOZpgwu9YwSg3uHcCWOoyj3jDkhfpOMlw2sQIzrCYmBb8kS01hojo/IX3ss71q +fpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713468335; x=1714073135; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a05kQu+3IE9JJfcYC8SvHu7OLyLA4nojU3zTAPx26K0=; b=g2cfKcK/Ntn9XNMubPoBbfXUjvusgbkgORMmNwd5k3tW9MF7675pJQnPSpaVdacwMy Wqu1cJQrscmTB+4aAWsYGTK0s8873Y61DIE5vYM8UDY51LnU2e8MbEoT4HbRhj9R9DZQ GwL5t5PVsHlDoY0vdmxUbsBK4Qn6cIBR/dIcsO2bK7Gi9a+KuxOsZuK0TABX8ykaOYtM FNvHQM4cM7EdBnNpb5wQJ2q5jfzDx6YhBO+t3vVkA3OCql59ifHRjr5LrOlmVfgqZEL9 E7T3cAaNbJr7Fd5JiSPWTq0mF7GF/Qz37kDXeBMuuvU4nxTvXUGp4NR9jyPDtppj9N6+ RB8g== X-Gm-Message-State: AOJu0YwfwKmYDhWDjiG7U8Mgj04vXRs2C9LW8x2MKkV90LEJPQpQEM7w bwiyzs56xJ8RnQ1rOOj50oGdtBeDZH1W/d9ebHP2S49OLOvoFPU023m/vNEpfLTdSIprkmEkwNw Y X-Received: by 2002:a19:2d42:0:b0:519:67f6:cd93 with SMTP id t2-20020a192d42000000b0051967f6cd93mr2279810lft.49.1713468334923; Thu, 18 Apr 2024 12:25:34 -0700 (PDT) Received: from m1x-phil.lan ([176.176.151.213]) by smtp.gmail.com with ESMTPSA id h17-20020a1709070b1100b00a558206b2c5sm77249ejl.99.2024.04.18.12.25.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 18 Apr 2024 12:25:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, David Hildenbrand , =?utf-8?q?Alex_Benn=C3=A9e?= , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang Subject: [PATCH 01/24] exec: Declare MMUAccessType type in 'mmu-access-type.h' header Date: Thu, 18 Apr 2024 21:25:00 +0200 Message-ID: <20240418192525.97451-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240418192525.97451-1-philmd@linaro.org> References: <20240418192525.97451-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=philmd@linaro.org; helo=mail-lf1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The MMUAccessType enum is declared in "hw/core/cpu.h". "hw/core/cpu.h" contains declarations related to CPUState and CPUClass. Some source files only require MMUAccessType and don't need to pull in all CPU* declarations. In order to simplify, create a new "exec/mmu-access-type.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu_ldst.h | 1 + include/exec/exec-all.h | 1 + include/exec/mmu-access-type.h | 18 ++++++++++++++++++ include/hw/core/cpu.h | 8 +------- 4 files changed, 21 insertions(+), 7 deletions(-) create mode 100644 include/exec/mmu-access-type.h diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 64e0319996..5b99666702 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -64,6 +64,7 @@ #include "exec/memopidx.h" #include "exec/abi_ptr.h" +#include "exec/mmu-access-type.h" #include "qemu/int128.h" #include "cpu.h" diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index e932d364b6..5cddfea01b 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -25,6 +25,7 @@ #include "exec/abi_ptr.h" #include "exec/cpu_ldst.h" #endif +#include "exec/mmu-access-type.h" #include "exec/translation-block.h" #include "qemu/clang-tsa.h" diff --git a/include/exec/mmu-access-type.h b/include/exec/mmu-access-type.h new file mode 100644 index 0000000000..28bbb05b94 --- /dev/null +++ b/include/exec/mmu-access-type.h @@ -0,0 +1,18 @@ +/* + * QEMU MMU Access type definitions + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef EXEC_MMU_ACCESS_TYPE_H +#define EXEC_MMU_ACCESS_TYPE_H + +typedef enum MMUAccessType { + MMU_DATA_LOAD = 0, + MMU_DATA_STORE = 1, + MMU_INST_FETCH = 2 +#define MMU_ACCESS_COUNT 3 +} MMUAccessType; + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 3a66d8581e..5f0422493b 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -25,6 +25,7 @@ #include "exec/hwaddr.h" #include "exec/vaddr.h" #include "exec/memattrs.h" +#include "exec/mmu-access-type.h" #include "exec/tlb-common.h" #include "qapi/qapi-types-run-state.h" #include "qemu/bitmap.h" @@ -80,13 +81,6 @@ DECLARE_CLASS_CHECKERS(CPUClass, CPU, typedef struct ArchCPU CpuInstanceType; \ OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME); -typedef enum MMUAccessType { - MMU_DATA_LOAD = 0, - MMU_DATA_STORE = 1, - MMU_INST_FETCH = 2 -#define MMU_ACCESS_COUNT 3 -} MMUAccessType; - typedef struct CPUWatchpoint CPUWatchpoint; /* see accel-cpu.h */ From patchwork Thu Apr 18 19:25:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789829 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp734122wrm; Thu, 18 Apr 2024 12:26:16 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXIzCxqonuRNBs1hIrAQLdaambxLt9YrFFTQM5H0GVUjdgjxOKIpDvEJMRPNJupjzLlUwZh6adKG0grL1SkER2Q X-Google-Smtp-Source: AGHT+IGVQOdolT7W5Jtj5j3pdpF0fMWlzUC00JdeZdvsRS6SK+ZYW6Cdls/O51IL+6WDS6H+R3ek X-Received: by 2002:a5b:bc2:0:b0:dc7:423c:b8aa with SMTP id c2-20020a5b0bc2000000b00dc7423cb8aamr3633697ybr.12.1713468376614; Thu, 18 Apr 2024 12:26:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468376; cv=none; d=google.com; s=arc-20160816; b=odxr/K0Sl/AtPTcPVEF4ojw6YoWsDd2raMNG296MPW5yRnWx+zGIqA5qqKPJTgr8Az dvLBaQmulkxk0trsGVipzs064hNrb36hHolLCvzmoyEWk41OrnLwMsUIbrSxv/2savDG CbCELtaVNcyuM5WcmqjgW859UCQCJZxGp5RFjYMWNZeeSe05atIbgKiv3bB9WMPd9lwM PW2rEvV1NAB1ruYuXIFpko4nJrjBMJVTj0LqPeBVERLQXcOlSaM2e3HxASq1hqJP9P0T rBTP7Rxq/1qvMQcXc+Ccmg/KZvpyl+RbuFElYWIPbQmuBJFAIf/Z6+TTpN5p1BePQcoJ pdIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Rg2JOTw5ouUti560CWKRK7poJqCPTKGwJpqCuG5tVqg=; fh=r77RTboWQ1NymlN5Vnu83UfJyq0G3GmniwNhw6tKo8Q=; b=d/2gObj1zPidSEe2EHnXW1obmOhrp2uWcf1ZaOwMMc9thzpnaI8Ylh36oxouKmlzTd W2alSqszvaSnSgxfzkJ2UgAPls8LXa9uMOFG3quG1EAMTosTu9KapxcFRNRvzveStf79 +RdBJT6i/NOHSRqLeg7TvWs5oe/oOmzA4Bd4JEW38XR/FKiECWoSep1n/OnZoz6JXxy6 iDVPlLxgnd0QphFlYQkFaoYHqntDQ9BFSBKbAlAq1xevkg5+nnL9z63sO0+rL3l98DKn o/yERkPaZjznK9GEEZheLvtymx+8YF7vdG1DNDr6Jb52A0F1ENCOjUwxSwo+WcRAB3Wo 6j7A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UvG7XzXj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Thu, 18 Apr 2024 12:25:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, David Hildenbrand , =?utf-8?q?Alex_Benn=C3=A9e?= , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Peter Maydell , Nicholas Piggin , Daniel Henrique Barboza , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei Subject: [PATCH 02/24] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header Date: Thu, 18 Apr 2024 21:25:01 +0200 Message-ID: <20240418192525.97451-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240418192525.97451-1-philmd@linaro.org> References: <20240418192525.97451-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The CPUBreakpoint and CPUWatchpoint structures are declared in "hw/core/cpu.h", which contains declarations related to CPUState and CPUClass. Some source files only require the BP/WP definitions and don't need to pull in all CPU* API. In order to simplify, create a new "exec/breakpoint.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Anton Johansson --- include/exec/breakpoint.h | 23 +++++++++++++++++++++++ include/hw/core/cpu.h | 16 +--------------- target/arm/internals.h | 1 + target/ppc/internal.h | 1 + target/riscv/debug.h | 2 ++ 5 files changed, 28 insertions(+), 15 deletions(-) create mode 100644 include/exec/breakpoint.h diff --git a/include/exec/breakpoint.h b/include/exec/breakpoint.h new file mode 100644 index 0000000000..45038263e3 --- /dev/null +++ b/include/exec/breakpoint.h @@ -0,0 +1,23 @@ +#ifndef EXEC_BREAKPOINT_H +#define EXEC_BREAKPOINT_H + +#include "qemu/queue.h" +#include "exec/vaddr.h" +#include "exec/memattrs.h" //MemTxAttrs + +typedef struct CPUBreakpoint { + vaddr pc; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUBreakpoint) entry; +} CPUBreakpoint; + +typedef struct CPUWatchpoint { + vaddr vaddr; + vaddr len; + vaddr hitaddr; + MemTxAttrs hitattrs; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUWatchpoint) entry; +} CPUWatchpoint; + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5f0422493b..6f5a16e0fc 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -22,6 +22,7 @@ #include "hw/qdev-core.h" #include "disas/dis-asm.h" +#include "exec/breakpoint.h" #include "exec/hwaddr.h" #include "exec/vaddr.h" #include "exec/memattrs.h" @@ -347,21 +348,6 @@ typedef struct CPUNegativeOffsetState { bool can_do_io; } CPUNegativeOffsetState; -typedef struct CPUBreakpoint { - vaddr pc; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUBreakpoint) entry; -} CPUBreakpoint; - -struct CPUWatchpoint { - vaddr vaddr; - vaddr len; - vaddr hitaddr; - MemTxAttrs hitattrs; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUWatchpoint) entry; -}; - struct KVMState; struct kvm_run; diff --git a/target/arm/internals.h b/target/arm/internals.h index dd3da211a3..a7c5ec1849 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -25,6 +25,7 @@ #ifndef TARGET_ARM_INTERNALS_H #define TARGET_ARM_INTERNALS_H +#include "exec/breakpoint.h" #include "hw/registerfields.h" #include "tcg/tcg-gvec-desc.h" #include "syndrome.h" diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 5b20ecbd33..601c0b533f 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -18,6 +18,7 @@ #ifndef PPC_INTERNAL_H #define PPC_INTERNAL_H +#include "exec/breakpoint.h" #include "hw/registerfields.h" /* PM instructions */ diff --git a/target/riscv/debug.h b/target/riscv/debug.h index 5794aa6ee5..c347863578 100644 --- a/target/riscv/debug.h +++ b/target/riscv/debug.h @@ -22,6 +22,8 @@ #ifndef RISCV_DEBUG_H #define RISCV_DEBUG_H +#include "exec/breakpoint.h" + #define RV_MAX_TRIGGERS 2 /* register index of tdata CSRs */ From patchwork Thu Apr 18 19:25:02 2024 Content-Type: text/plain; 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index dc1f16a977..9387d38748 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -10,7 +10,11 @@ #ifndef TCG_CPU_OPS_H #define TCG_CPU_OPS_H -#include "hw/core/cpu.h" +#include "exec/breakpoint.h" +#include "exec/hwaddr.h" +#include "exec/memattrs.h" +#include "exec/mmu-access-type.h" +#include "exec/vaddr.h" struct TCGCPUOps { /** From patchwork Thu Apr 18 19:25:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789831 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp734613wrm; Thu, 18 Apr 2024 12:27:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXs/N90WK1H2j+rloOtzgrXnvG3ZOQBYLSgS5+1LDcdycFUje20GwsM+7xPqWFbWEuirqVAvjCvKJwWS8tYsYD8 X-Google-Smtp-Source: AGHT+IHN0FGmqUxRLaVHmoRp8/3JJXTXsqaWW/stTwVvXaYg/l94ADW6l9R0RwS8Gp/gEl4wVC7U X-Received: by 2002:a05:622a:1a08:b0:434:85da:4022 with SMTP id f8-20020a05622a1a0800b0043485da4022mr32309qtb.65.1713468465971; Thu, 18 Apr 2024 12:27:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468465; cv=none; d=google.com; s=arc-20160816; b=qhvOyop1Am6XIlPVBM2XQJcqcrDtlDVz0DK1w5/4+yWjYYXtCpDl1F//ARMkTQRuYx 0vD6+9Vqs2WL6j0lfk/Y8D5vyuM8XNZkL2JwHoIop/KvKKtTDWFKddyR4H12H2IKTkGB BfTNSBSAVYb3yveQ3GtFach2Qp8sSdNRbJX04/PRrzzZOpLbIEOumPQlZ2ArSFJUzUy5 IDNyTt8DyL6Mn5YAoR1DBRBcrOgeUcGrsOk/pqVzFd+mIGjgR6IvfnRtv79Lpn6Cobgp A/NhwBC3s0L1Ah5K8czK+MtjSg2/jOCeIlkWosW/xKk/Ds7lgL8/NySKKIpSP71rKOMp BQyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=akXy09tUeGr6mCjhMUDCOqgVvIVDrIu0xemDF/6ToBg=; fh=OldoyVsnxIotb3oLwZzdNfaQktZrdXn2xfyEQOuGV+M=; b=hLnJQ1Ot2OISusrx2Z5d9n6OoatX8jlccy524eDnTekQ4ukV5yOVJAfozKpprRhvUJ nYJ2NuVe+ghJsMTPK3HVPDVMAtSHb/QxGolmzRZa0OXj2BYh+3cJ7KV1RyRQVm+bi0NF bQzBUCNPbSRdl78JXzgpAFqMoEuWcnaeNDz3iPhscDskUGOrhOb9kQhv550kldY2aaT5 LAvYe+ZdkcxZJ2NAfTQwRQCzR4YrU5nZXBEJE9tBhIsUFUmG2h/Z4O1GjvFWAndp/8lF 6fiZc7fFT6XzzTjKfIFSH7LLdVm/thnS98B+MLtJDWNfoVNfXjW2crJU/j3j1XGU9PRy KK7A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=w9Tvs5yd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cputlb.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 6da1462c4f..ef18642a32 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -22,9 +22,14 @@ #include "exec/cpu-common.h" +#ifdef CONFIG_TCG + #if !defined(CONFIG_USER_ONLY) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); #endif + +#endif /* CONFIG_TCG */ + #endif From patchwork Thu Apr 18 19:25:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789834 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp734836wrm; Thu, 18 Apr 2024 12:28:19 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXbywUlBZONyz7bJOLHI5CotofTFR1V/YjErHBd4iWKr0CXPTcDrVKBwTj5fQVZYl54ZuNz0v42d7uOFctD45jO X-Google-Smtp-Source: AGHT+IHs7zq5+XP6Cc/dIx6uNzjeD8I3BItKykwLsfNJLbpTVE0iOjvpXxLpGohMKCCjZbnjuFJI X-Received: by 2002:a05:620a:c4f:b0:78e:b327:7056 with SMTP id u15-20020a05620a0c4f00b0078eb3277056mr91188qki.51.1713468499339; Thu, 18 Apr 2024 12:28:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468499; cv=none; d=google.com; s=arc-20160816; b=FoaGDG/2OGqerW4PdAVcMhvNoiykoz/C7GfZitqKUXGU8hE3J19GRNxcSFDydj30q2 96zPXDzrAvJJSTHShNU/XgC1+p7xv2528DCSabGi64cLjpClQMZKwQ8Uj11CM9bRN4WH L3MB9PLwUPlpKLPXIAoFI2GOG0rcpWsL7cw27WmmavaqGyoOCPsl7FW10ooQUA7Tlnyf kFjT0l5k+2yOhJsrkv/rZ5qowXut3Ypla6Mt0EM31N/7JOocJXfZRHHTOc8VDjBkO32z gZDgjC/EibHQS0U4/x6zC472BQ4F9go5JemjfMANGD0hro/u3HBqwLFsEI37Snk43ilF kYfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=A5AN2zfNkbZgNzq4yMXaRJrNHQuv3As8IXVhhvnN+gY=; fh=OldoyVsnxIotb3oLwZzdNfaQktZrdXn2xfyEQOuGV+M=; b=okuoolJy7C2ctigX4ydgzW50JaLxLrDtdMu+0wbGDfEkqy7J4nsPNQ+h7eAjf4Jple HvrN9TFn1AlmOvEQJ+p1pZZtztvo7/+zimFVWPUx0q7+UaAKJEu4ab/eB8ck2GAD39vT +Di1tHqWLcPSU3FAbQWcVr5eop1EFtqTueQIlUr8j8OnzAwUQctECCEUeP/npD4ytWlg A0+O7nXEWjRndsDwc7NyMGrwz/NOD17euxbOc6z9yrAkCtz/dxoiRaAOR6REEZVia13+ uGgnVF44/xh+54vZXy2KZ6siQy8267l54kKA3cyXnVYBkFJjtjP15gEM/Q47C5mR3isj Qf/Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kWfD3cqy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu_ldst.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 5b99666702..f3c2a3ca74 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -1,5 +1,5 @@ /* - * Software MMU support + * Software MMU support (per-target) * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public @@ -62,6 +62,10 @@ #ifndef CPU_LDST_H #define CPU_LDST_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/memopidx.h" #include "exec/abi_ptr.h" #include "exec/mmu-access-type.h" From patchwork Thu Apr 18 19:25:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789836 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735058wrm; Thu, 18 Apr 2024 12:29:00 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWYBxhDZxM8JEJ7p3kh+4pqCO3bVOc8YfnKsOW3rqGaAe3hOsdnqI8P6CksDlC9ogo270KJuoZ5DkpC08rHn9gU X-Google-Smtp-Source: AGHT+IE/yCMES3j33eXJX2u5LEXkWQP7Wp9ms2rei0FprBa6PxdDQHHKLSBfiKHTpWnf6HBEAOar X-Received: by 2002:a0c:c602:0:b0:69b:6413:597 with SMTP id v2-20020a0cc602000000b0069b64130597mr3405334qvi.24.1713468539868; Thu, 18 Apr 2024 12:28:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468539; cv=none; d=google.com; s=arc-20160816; b=p3a9Zd4ry7cQt43mwmYdm/CRfk/0LaEv/74gLztPjNM2znJRBss6Mj7aI+uD3Yquq1 Dmcf7r2GWcv/4qurUfRKxjiCIMJU+12xUpx/nNAhtmg1KamxgJL5DDmDU2PLtvVGkxWW hcb8wXplztkDjs/ILhWbCJ5eLxGadwebf/Ft8jgXsYBpwIFPAxoS2uhV3f4sy/B/Rhzo El9p2Y1IQbRZrhixidvyiEk072zv3VysPomq5B12S6VeYA+g6svOC2+ucm+INGx68rMx 1wtExCbEq8VGw3WzU/WFREbbnMJqmfYESYLjF/QmXpxkhtYOSiB/4ntUzpCD5rI2Cwel DoBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kMOTCzZ8G1QDoqpRuDm+110xUKe36YwlxUEiY1YFvik=; fh=OldoyVsnxIotb3oLwZzdNfaQktZrdXn2xfyEQOuGV+M=; b=wf3NT8Y1nv1kW0uTO4P0YRcjzsZ4GGGORgup7xQ8Iihktk2gM4+CwAdw6Z7ffQJvF+ zQvGgIvdBD4nwd/iiDeBCwJK3WWwvTsUCGXc+ZNBn2La7GuQGfllhGc2cBZE4Q5KbtwF JK+yotHYH8/y/jeblyCudKNK3DmQVKFJR5aiB214qRm5kY4+PPodmxxyD1cOWt2j9oA1 XJhrgSSmYx/489vhNSIAxTPJMHPGtvX2aqPNtoxUlzB5x1XT56Swry6IdhjmGgAFnyd7 AaWPR2kwFpDJwpvx2tw052OhriVX3gyOR8RXdjcNORuw08h8ty/gKU6O+/GSCSX+r8Ke TVWQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q7WYsWSZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Use size_t for the @len type. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/cpu_ldst.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index f3c2a3ca74..63186b07e4 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -92,12 +92,12 @@ static inline void *g2h(CPUState *cs, abi_ptr x) return g2h_untagged(cpu_untagged_addr(cs, x)); } -static inline bool guest_addr_valid_untagged(abi_ulong x) +static inline bool guest_addr_valid_untagged(abi_ptr x) { return x <= GUEST_ADDR_MAX; } -static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len) +static inline bool guest_range_valid_untagged(abi_ptr start, size_t len) { return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1; } From patchwork Thu Apr 18 19:25:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789832 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp734787wrm; Thu, 18 Apr 2024 12:28:13 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWNc3Np5pBzyAH45Bw/wt/0U5L3liqojWtUALn2io8/qF2RO9I8kTKeKQOoVMtKiVgGsUGYJ6+yWOG5gJ/8cvQO X-Google-Smtp-Source: AGHT+IHxhaFpaaG8FYiTQ2QdstWFGtc7JupGECbb6CycGCjnCffU5Dr6cIL4KtpPDD2gKWPoQ3lg X-Received: by 2002:a05:622a:1a9f:b0:437:46b8:76b3 with SMTP id s31-20020a05622a1a9f00b0043746b876b3mr46620qtc.10.1713468493380; Thu, 18 Apr 2024 12:28:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468493; cv=none; d=google.com; s=arc-20160816; b=S0D23zdbxtsivV2b2jGFht3FDCH6GGUc+D07GRHlsn+/kKbPw4qdLkLhSp9YXB6d3n oaHhgrvL2Nse/VqqQNkhI7Iq/dGk//1JBT2n6bdqHFgqbPj+067RqQMIGvabgFDa7H79 xQYErAVNnLFuJ3AJrutwzTAn69eDN2trHf+AiekohUgWS6qRqbwAMovPDk7+xAnOtdI+ VxBMwHDMv5CM5tKOa+uuu6pgx1KenzTT4tdff3MkjkxWir3j873+je+sASfkUxqbE38f OwPZcDvVOwlZRrW7v3e1tZNrU6p448TNRpvFhIkmD8q0NCMMsciIrJgqupUabXhbRW4i 2WWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9U+h/wZIc3z+oX/TXzP2qUKxN0wKW4ADsCvM3ymjRp0=; fh=eJzl9CJfUqF9AWcFp5UXIAXYgut6vltRmrvm+mnFSU8=; b=KBVbE/09/niUxlQRO4reYN3j7hTDgpjE4sf3Sw/YlTKoro1mI1QeaUq6eU4Q4Mpwhw sCDBPnov+nJSMOoxlMkfOdpycNhzCID2JH1Smv+/fyXXowBDm15kqgPNEq8HBwnw7nuz yCOyztd/rMIpaN39C98cRopQk3neBuWQdcP0RSnVBm8q1JcyGoAEJQjB9Wl5kZzFXs10 +WX/4QOt1EuagKzcM1jZqT0VcYSiNS3Bz+1i09HpYUP4cR0nB2ROa691OQB2gPh+GxsG VwUt41LxhkZIH0NVSrKExADmx5wda9OILC7ZI4fjR3Qg7BC0NeYHRfdFbJBppg1LkfaL weEw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="OXhY/Buh"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Thu, 18 Apr 2024 12:26:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, David Hildenbrand , =?utf-8?q?Alex_Benn=C3=A9e?= , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Riku Voipio , Peter Maydell , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Mark Cave-Ayland , Artyom Tarasenko Subject: [PATCH 07/24] exec: Un-inline tlb_vaddr_to_host() and declare it in 'exec/cputlb.h' Date: Thu, 18 Apr 2024 21:25:06 +0200 Message-ID: <20240418192525.97451-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240418192525.97451-1-philmd@linaro.org> References: <20240418192525.97451-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Declare tlb_vaddr_to_host() in "exec/cputlb.h" with the CPU TLB API. Un-inline the user emulation definition to avoid including "exec/cpu_ldst.h" (which declares g2h) in "exec/cputlb.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson --- include/exec/cpu_ldst.h | 24 ------------------------ include/exec/cputlb.h | 18 ++++++++++++++++++ accel/tcg/user-exec.c | 7 +++++++ target/arm/tcg/helper-a64.c | 1 + target/riscv/vector_helper.c | 1 + target/sparc/mmu_helper.c | 1 + 6 files changed, 28 insertions(+), 24 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 63186b07e4..7032949dba 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -418,28 +418,4 @@ static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr) return (int16_t)cpu_lduw_code(env, addr); } -/** - * tlb_vaddr_to_host: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @access_type: 0 for read, 1 for write, 2 for execute - * @mmu_idx: MMU index to use for lookup - * - * Look up the specified guest virtual index in the TCG softmmu TLB. - * If we can translate a host virtual address suitable for direct RAM - * access, without causing a guest exception, then return it. - * Otherwise (TLB entry is for an I/O access, guest software - * TLB fill required, etc) return NULL. - */ -#ifdef CONFIG_USER_ONLY -static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx) -{ - return g2h(env_cpu(env), addr); -} -#else -void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx); -#endif - #endif /* CPU_LDST_H */ diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index ef18642a32..173eb98b9a 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -20,10 +20,28 @@ #ifndef CPUTLB_H #define CPUTLB_H +#include "exec/abi_ptr.h" #include "exec/cpu-common.h" +#include "exec/mmu-access-type.h" #ifdef CONFIG_TCG +/** + * tlb_vaddr_to_host: + * @env: CPUArchState + * @addr: guest virtual address to look up + * @access_type: 0 for read, 1 for write, 2 for execute + * @mmu_idx: MMU index to use for lookup + * + * Look up the specified guest virtual index in the TCG softmmu TLB. + * If we can translate a host virtual address suitable for direct RAM + * access, without causing a guest exception, then return it. + * Otherwise (TLB entry is for an I/O access, guest software + * TLB fill required, etc) return NULL. + */ +void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, + MMUAccessType access_type, int mmu_idx); + #if !defined(CONFIG_USER_ONLY) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 1c621477ad..54b35588b9 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -23,6 +23,7 @@ #include "tcg/tcg.h" #include "qemu/bitops.h" #include "qemu/rcu.h" +#include "exec/cputlb.h" #include "exec/cpu_ldst.h" #include "exec/translate-all.h" #include "exec/helper-proto.h" @@ -138,6 +139,12 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, } } +void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, + MMUAccessType access_type, int mmu_idx) +{ + return g2h(env_cpu(env), addr); +} + typedef struct PageFlagsNode { struct rcu_head rcu; IntervalTreeNode itree; diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index ebaa7f00df..9b3ae06207 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -29,6 +29,7 @@ #include "internals.h" #include "qemu/crc32c.h" #include "exec/exec-all.h" +#include "exec/cputlb.h" #include "exec/cpu_ldst.h" #include "qemu/int128.h" #include "qemu/atomic128.h" diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index fa139040f8..d3d9c33597 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/memop.h" #include "exec/exec-all.h" +#include "exec/cputlb.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index ad1591d9fd..e79a33367a 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/cputlb.h" #include "qemu/qemu-print.h" #include "trace.h" From patchwork Thu Apr 18 19:25:07 2024 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id c22-20020a05620a135600b0078d68ef2bcbsi2066639qkl.620.2024.04.18.12.28.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Apr 2024 12:28:20 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ParLr1xC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rxXQV-0001zM-AZ; Thu, 18 Apr 2024 15:28:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rxXOo-0007zt-C4 for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:26:23 -0400 Received: from mail-ej1-x632.google.com ([2a00:1450:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rxXOl-0007T9-VM for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:26:22 -0400 Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-a519e1b0e2dso125079566b.2 for ; Thu, 18 Apr 2024 12:26:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713468378; x=1714073178; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zLjP+56aWYnnkz1DDDJchrnGcEe4NhmJ8So9/v4UjQ4=; b=ParLr1xCZ+NwFQaJIoKYvwj8nn1OnnhSqfv4v3rt2koBwPPNZh1u6rDxvG9owbfj2k S+880aDyVEfTPHmITZP4lnH9z8s3pzWjjke4MmziuxCa7JddgubhTnERenhAuIRCJ1uF +pDcqm59V/jzJlAhh4dEzrTT+cUY8jkC50mS19sqp/J6jmy/glOhcoB2zvf+IbUQAsOr uyqoqS6NzSWk/27+PMA/eafcGhko0q1OVVBJCIY/qM+qg9enrEYdkL1haltbK7eazq00 nC1keygEBxPz6ldSrLjJ6Cyz9r3h1BBS+4LLNrIhwnfrfa0UP26y5UX66ObLkCQiokbj 8BDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713468378; x=1714073178; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zLjP+56aWYnnkz1DDDJchrnGcEe4NhmJ8So9/v4UjQ4=; b=SaBXgSWB1Iodfv6mXW93NL7UsbEZQ78wZvtcOhBO3VjckvADbuXYmn3rM/NAThgHEg 4EAhjyeahrTPT5ohBOT64po/H9Wn4F1oR3+hXu3LzwWiW5lbDAqxATvU/LqMQTMbSNco cjMvPy5xKYLNb2XlWUkcwE1GiLhOGXcLAisIKE1XVjPWW0/sU0bHfsd01HTpTRKmN3Xs F9FUIz9CphgFuICtdZ8WhHpGZSVppa+Kn6ZWjHyvK6klHWqOcopK5o8Q5Bngy3wsuE6l Buw2ewtwducepEphfZaXnS1GVt9auEDcJ9vef5i6jZkoUED0MCOrXg3CcUg7P17Ew6Fs dftw== X-Gm-Message-State: AOJu0YxFNMJ9tNxjh3riqUZCu3+89WkJtmnroGov9qogOr7MIc+O60JP HNp5z1MJmspXd9T/zh4RJFfbHFzQHP9MtvS8d7d/JF9g6bht/0tcPVshmnsmE9FtwUAhoSLdZfQ o X-Received: by 2002:a17:906:19cf:b0:a52:6fca:9151 with SMTP id h15-20020a17090619cf00b00a526fca9151mr48443ejd.49.1713468377872; Thu, 18 Apr 2024 12:26:17 -0700 (PDT) Received: from m1x-phil.lan ([176.176.151.213]) by smtp.gmail.com with ESMTPSA id f5-20020a1709067f8500b00a5559f0f9dcsm1275997ejr.79.2024.04.18.12.26.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 18 Apr 2024 12:26:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, David Hildenbrand , =?utf-8?q?Alex_Benn=C3=A9e?= , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Xu Subject: [PATCH 08/24] physmem: Move TCG CPU IOTLB methods around Date: Thu, 18 Apr 2024 21:25:07 +0200 Message-ID: <20240418192525.97451-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240418192525.97451-1-philmd@linaro.org> References: <20240418192525.97451-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The next commit will restrict TCG specific code in physmem.c using some #ifdef'ry. In order to keep it simple, move iotlb_to_section() and memory_region_section_get_iotlb() around close together. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- system/physmem.c | 50 ++++++++++++++++++++++++------------------------ 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/system/physmem.c b/system/physmem.c index dd7b222942..cf6334f3a3 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -736,6 +736,31 @@ translate_fail: return &d->map.sections[PHYS_SECTION_UNASSIGNED]; } +MemoryRegionSection *iotlb_to_section(CPUState *cpu, + hwaddr index, MemTxAttrs attrs) +{ + int asidx = cpu_asidx_from_attrs(cpu, attrs); + CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx]; + AddressSpaceDispatch *d = cpuas->memory_dispatch; + int section_index = index & ~TARGET_PAGE_MASK; + MemoryRegionSection *ret; + + assert(section_index < d->map.sections_nb); + ret = d->map.sections + section_index; + assert(ret->mr); + assert(ret->mr->ops); + + return ret; +} + +/* Called from RCU critical section */ +hwaddr memory_region_section_get_iotlb(CPUState *cpu, + MemoryRegionSection *section) +{ + AddressSpaceDispatch *d = flatview_to_dispatch(section->fv); + return section - d->map.sections; +} + void cpu_address_space_init(CPUState *cpu, int asidx, const char *prefix, MemoryRegion *mr) { @@ -957,14 +982,6 @@ bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap, return false; } -/* Called from RCU critical section */ -hwaddr memory_region_section_get_iotlb(CPUState *cpu, - MemoryRegionSection *section) -{ - AddressSpaceDispatch *d = flatview_to_dispatch(section->fv); - return section - d->map.sections; -} - static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end, uint16_t section); static subpage_t *subpage_init(FlatView *fv, hwaddr base); @@ -2434,23 +2451,6 @@ static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr) return phys_section_add(map, §ion); } -MemoryRegionSection *iotlb_to_section(CPUState *cpu, - hwaddr index, MemTxAttrs attrs) -{ - int asidx = cpu_asidx_from_attrs(cpu, attrs); - CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx]; - AddressSpaceDispatch *d = cpuas->memory_dispatch; - int section_index = index & ~TARGET_PAGE_MASK; - MemoryRegionSection *ret; - - assert(section_index < d->map.sections_nb); - ret = d->map.sections + section_index; - assert(ret->mr); - assert(ret->mr->ops); - - return ret; -} - static void io_mem_init(void) { memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, From patchwork Thu Apr 18 19:25:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789848 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp736234wrm; Thu, 18 Apr 2024 12:31:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWWx+buCnylmMw0lpZKhzFYteQATw1y+xlLceZkX/k4sk4CM9oNCi17jTGP6xZreJil6dVL3QFA8RELfJyAgqIc X-Google-Smtp-Source: AGHT+IGyuEI+Ow+UcXog7L98QHs9kx5Q5GEsH32p5r2aQmy1YP4CzeCzyekmO4dnaUFa2vWFkIx2 X-Received: by 2002:ac8:58c5:0:b0:436:9fc4:6146 with SMTP id u5-20020ac858c5000000b004369fc46146mr44573qta.57.1713468706400; Thu, 18 Apr 2024 12:31:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468706; cv=none; d=google.com; s=arc-20160816; b=Z4P7UhKOXzpp1b+SROtUHMIHVqvON2tFNIXTh2dy1/EnRysKQr+jBE+0jfaoWTCaUc xIOy1sXbJgrReOCKnMJnfx1t72gkNVnBY+URu290d51qSRaDWG1aDUyl6e07qfkXo2DG iCmYXhstK+IwKRBd5peYQAoEFwzuZ1vBfrq3Nm8hIc3mstDh03w2QNnZhvDmi/8FiGrD SWJwPN+liCfjcq4BFRQHPtuFvjZg8lkYwyaTtebgFB6s16m4sZGpNvKG4bxg8gl8DN6A iGHPDYnWDZqzo7SOgUNAUhp9/DC0l3F9myiNY5GuOfmUhdUMfMRzSturDwZ1F7QOryQk JVfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cz2i/C3VQ13wYP5OhAoy8JFwTzWM+gW+I5eQgS4AVJI=; fh=7lwVkSpSFyq2WSg3nahdRwf+8admxDyXwTWRNbUBfkw=; b=QSnDnFtajtTyIJNWvsXRpgT0HWWsnMhxETBnOlRlezwTnp22lL8h6RvGMYFWGyuqXR LmnFh3qeiUCFcRjw4IOOb4cAXcBuaW5lHGYBNd7Ypl6WtgkR78eIDTH4kaf1JSWy2M01 dAu0Gk99QrYNypsGOXMXUSoK4YGdYFYQVQ4a9tJkgq5Y3gmrXwy41SKB+x/EflsTb9V/ 4F4FleokXEsAP4bqawq0bjEbT7uxiM1ZM81fAbVF+h99rW1nBf15b3wGZb2eZ7yecu0q xoHuIUGCgFIbbLSo2wMODMUxBpdJZeoMA7E+m+KlIiIO1+Sn3EDQQQq9PA0Yo1EtJQwo nUVg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rGFJFJXq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Declare them in "exec/cputlb.h". Declare iotlb_to_section() using the MemoryRegionSection typedef. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson --- include/exec/cputlb.h | 25 +++++++++++++++++++++++-- include/exec/exec-all.h | 21 --------------------- system/physmem.c | 6 ++++++ 3 files changed, 29 insertions(+), 23 deletions(-) diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 173eb98b9a..3594f904b4 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -21,6 +21,8 @@ #define CPUTLB_H #include "exec/abi_ptr.h" +#include "exec/hwaddr.h" +#include "exec/memattrs.h" #include "exec/cpu-common.h" #include "exec/mmu-access-type.h" @@ -43,10 +45,29 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, MMUAccessType access_type, int mmu_idx); #if !defined(CONFIG_USER_ONLY) -/* cputlb.c */ + void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); -#endif + +/** + * iotlb_to_section: + * @cpu: CPU performing the access + * @index: TCG CPU IOTLB entry + * + * Given a TCG CPU IOTLB entry, return the MemoryRegionSection that + * it refers to. @index will have been initially created and returned + * by memory_region_section_get_iotlb(). + */ +MemoryRegionSection *iotlb_to_section(CPUState *cpu, + hwaddr index, MemTxAttrs attrs); +MemoryRegionSection * +address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, + hwaddr *xlat, hwaddr *plen, + MemTxAttrs attrs, int *prot); +hwaddr memory_region_section_get_iotlb(CPUState *cpu, + MemoryRegionSection *section); + +#endif /* CONFIG_USER_ONLY */ #endif /* CONFIG_TCG */ diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 5cddfea01b..e4cff08db4 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -536,21 +536,6 @@ extern __thread uintptr_t tci_tb_ptr; smaller than 4 bytes, so we don't worry about special-casing this. */ #define GETPC_ADJ 2 -#if !defined(CONFIG_USER_ONLY) - -/** - * iotlb_to_section: - * @cpu: CPU performing the access - * @index: TCG CPU IOTLB entry - * - * Given a TCG CPU IOTLB entry, return the MemoryRegionSection that - * it refers to. @index will have been initially created and returned - * by memory_region_section_get_iotlb(). - */ -struct MemoryRegionSection *iotlb_to_section(CPUState *cpu, - hwaddr index, MemTxAttrs attrs); -#endif - /** * get_page_addr_code_hostp() * @env: CPUArchState @@ -659,12 +644,6 @@ void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); void tlb_set_dirty(CPUState *cpu, vaddr addr); void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); -MemoryRegionSection * -address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, - hwaddr *xlat, hwaddr *plen, - MemTxAttrs attrs, int *prot); -hwaddr memory_region_section_get_iotlb(CPUState *cpu, - MemoryRegionSection *section); #endif #endif diff --git a/system/physmem.c b/system/physmem.c index cf6334f3a3..38d3ede9f9 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -31,6 +31,7 @@ #endif /* CONFIG_TCG */ #include "exec/exec-all.h" +#include "exec/cputlb.h" #include "exec/target_page.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" @@ -585,6 +586,7 @@ typedef struct TCGIOMMUNotifier { bool active; } TCGIOMMUNotifier; +#ifdef CONFIG_TCG static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) { TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n); @@ -648,6 +650,7 @@ static void tcg_register_iommu_notifier(CPUState *cpu, notifier->active = true; } } +#endif void tcg_iommu_free_notifier_list(CPUState *cpu) { @@ -668,6 +671,7 @@ void tcg_iommu_init_notifier_list(CPUState *cpu) cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier *)); } +#ifdef CONFIG_TCG /* Called from RCU critical section */ MemoryRegionSection * address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr, @@ -761,6 +765,8 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu, return section - d->map.sections; } +#endif /* CONFIG_TCG */ + void cpu_address_space_init(CPUState *cpu, int asidx, const char *prefix, MemoryRegion *mr) { From patchwork Thu Apr 18 19:25:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789838 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735332wrm; 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Declare it statically, removing the stub. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/exec-all.h | 1 - accel/stubs/tcg-stub.c | 4 ---- accel/tcg/cputlb.c | 2 +- 3 files changed, 1 insertion(+), 6 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index e4cff08db4..778c82ba8e 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -641,7 +641,6 @@ static inline void mmap_unlock(void) {} #define WITH_MMAP_LOCK_GUARD() void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); -void tlb_set_dirty(CPUState *cpu, vaddr addr); void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); #endif diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index 8a496a2a6f..dd890d6cf6 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -18,10 +18,6 @@ void tb_flush(CPUState *cpu) { } -void tlb_set_dirty(CPUState *cpu, vaddr vaddr) -{ -} - int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t retaddr) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 93b1ca810b..e16d02a62c 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1039,7 +1039,7 @@ static inline void tlb_set_dirty1_locked(CPUTLBEntry *tlb_entry, /* update the TLB corresponding to virtual page vaddr so that it is no longer dirty */ -void tlb_set_dirty(CPUState *cpu, vaddr addr) +static void tlb_set_dirty(CPUState *cpu, vaddr addr) { int mmu_idx; From patchwork Thu Apr 18 19:25:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789842 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735626wrm; Thu, 18 Apr 2024 12:30:27 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUZBehXMAEohXnx4B8nsWjoOzkMXA5+GqWgQW4uUj9AsWpeV28m1czY7c5/tk/vXEHbDAdXvjwjW5L5zvpxp6gg X-Google-Smtp-Source: AGHT+IFaIZVykQUTIR+PKhJDHzgu2y/Lx6ClqiHMwQiqxnAHH+DmmmtHCrK9/S7yjAi37wLEbvgc X-Received: by 2002:a05:6102:a4e:b0:47a:2c9c:9da with SMTP id i14-20020a0561020a4e00b0047a2c9c09damr3409472vss.22.1713468626966; Thu, 18 Apr 2024 12:30:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468626; cv=none; d=google.com; s=arc-20160816; b=Ps7z1MbItyrV6BrH4Uk2MYCnIBg6dWKfaqOVYzfTjtsrExMvMaIqrLmEh6AGaLSoB3 fxOrBmTMUyFQnjhZNCvXeLD8W7ENcDs9AkKxtvareNiip98XImYF07nRN/4nxux/B1EE Pq/W+TJPsOCWW19rcjRv13wFNoC6dcWKNffSks4Yy4v2XRYjpMQpJJIkusPzAkHACnZl lW9TwGgvAZdP5kxnkK9XgntGXNZ29J+ZCoN1exI3UjPKnQKe4cnNZJFdIWF9GGADZLFC sx4nPMpi1XRkBWASCoufSoiLOqMAANhiJQho0aS5o7jjiN+oB4fMZ7S6vX6Gh7BBC2fx 7cXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Jio+r+AEUkjjrU5gDZl4zBsemaqAFeHzEWFaXnqFrOQ=; fh=7lwVkSpSFyq2WSg3nahdRwf+8admxDyXwTWRNbUBfkw=; b=n6pMy7PJDUv7M/JX6CRj1NdlmbXOerOchU32tK1BY4sucV42S9dvJnkJYWW2ZmZ7Fb qGii9AbhBUB1onx8Ha8GpnjiCZaMELoqBPZfXvkq/o8heL33Mbpir088DiH9rOzpjL4i Ag3/X2dfk0bQli7qTWkttuognGy/TOKHV7L+R2Xd3ioUfydynI1BFwZRP4xDlolkC0Th pVEY4kpiZ5ahVTCZyCAqJRD4SKfY/b5eb9uKr2YIAKnkXH5bcFRgDKH0tUEy5wo5TVAC HZUTG0Kh1N+n5HpV0aAl68rkzc1adJeMD0uauS81gA6UvtL0pgpXGXr4sdU/tw4nCnlc Go0w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H9ay9pzy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id if10-20020a0561022c8a00b00479d2fb8790si589436vsb.470.2024.04.18.12.30.26 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Apr 2024 12:30:26 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H9ay9pzy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rxXS3-00070H-CI; Thu, 18 Apr 2024 15:29:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rxXP9-0008D7-A3 for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:26:48 -0400 Received: from mail-ej1-x629.google.com ([2a00:1450:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rxXP6-0007W7-7d for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:26:42 -0400 Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-a51a7d4466bso134059566b.2 for ; Thu, 18 Apr 2024 12:26:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713468396; x=1714073196; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Jio+r+AEUkjjrU5gDZl4zBsemaqAFeHzEWFaXnqFrOQ=; b=H9ay9pzyZ3ABmD/RWdVRSmHZJ7NF0E3NBJrceLHGEJzh6D7hJPH+8f2V1ryKITt3ud /B3wppTVSXUgTFlvB63p+1EKTKSIGLDYekYP/JSXjD5ogQiuK89yM44cC6X0kRqw8VMq dPP4gljVL+cBnfA8M4m3V67fVvUoorMzwLr3wSy4Wg9JOhVtV8WbmGtvc/rN1bn4rP94 IfkdTDv83Dfn+TueCEwTIv5uOmw7J30z3m9GIha/9F5lkqNUyooZOiYbjS0Y81TSqkC7 qD+ALB49Pq+ZT8OnjAnk4roeyzf99jWE4yIgwVTFCCDLa+0kj5jnEdP6ueDv9/pMbc+l RIag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713468396; x=1714073196; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Jio+r+AEUkjjrU5gDZl4zBsemaqAFeHzEWFaXnqFrOQ=; b=UNSryEvuL1M2h/S/JQ5TaX97fJ0gFNcBq7/VUenXCGh8aChnqPugU3zT2r98E5zttV WJvD7sO/fGJ3WRBp6w0HQHuuR08BG+Tn5pnwRtkeJLJUJSfUsqrR8rRT9Djriix8v0Fn n25PtbQbwItqcAunJKx6Sbjzm7ubsMMNSnFGApPl1iaQN5giAeE36XbEZbt6rAyL6UTw IDtHpP/BHdctdrsp+mDlLAP8lCSiFeFh7VqVSeJYOL6kUJ+Xu0V1Pv1FcPXVpgI9xqq/ TK65o9ijcrRdKGzq8AhkSFbUUE2OQohghg/zPZG/mz327ev0XJLwfqQp7KCm2mKO9Dvk A7bQ== X-Gm-Message-State: AOJu0YwvxZZN6r716yNkvVCCqyafFK3wQgyWxQLhKZ5DhDCks/AiQW+4 7qedQ4IkFL9bdVFZ8ojm3+sGIemSx4S9oEHECxH3KWiTtPrJ7nkbnKMFprwgFgTk+wdKnJZy4rq V X-Received: by 2002:a17:906:1f48:b0:a4e:cd5c:da72 with SMTP id d8-20020a1709061f4800b00a4ecd5cda72mr43114ejk.63.1713468396179; Thu, 18 Apr 2024 12:26:36 -0700 (PDT) Received: from m1x-phil.lan ([176.176.151.213]) by smtp.gmail.com with ESMTPSA id lu10-20020a170906faca00b00a52299d8eecsm1238430ejb.135.2024.04.18.12.26.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 18 Apr 2024 12:26:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, David Hildenbrand , =?utf-8?q?Alex_Benn=C3=A9e?= , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Xu Subject: [PATCH 11/24] exec: Move tlb_reset_dirty*() declarations to 'exec/cputlb.h' Date: Thu, 18 Apr 2024 21:25:10 +0200 Message-ID: <20240418192525.97451-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240418192525.97451-1-philmd@linaro.org> References: <20240418192525.97451-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=philmd@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Declare tlb_reset_dirty() and tlb_reset_dirty_range_all() in "exec/cputlb.h". Restrict tlb_reset_dirty_range_all() to TCG accel. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/cputlb.h | 12 +++++++++++- include/exec/exec-all.h | 3 --- include/exec/ram_addr.h | 1 + system/physmem.c | 2 ++ 4 files changed, 14 insertions(+), 4 deletions(-) diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 3594f904b4..dc92befb93 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -49,6 +49,9 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); +void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); +void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); + /** * iotlb_to_section: * @cpu: CPU performing the access @@ -69,6 +72,13 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu, #endif /* CONFIG_USER_ONLY */ -#endif /* CONFIG_TCG */ +#else /* !CONFIG_TCG */ + +static inline void tlb_reset_dirty_range_all(ram_addr_t start, + ram_addr_t length) +{ +} + +#endif /* !CONFIG_TCG */ #endif diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 778c82ba8e..6f46015ab4 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -640,9 +640,6 @@ static inline void mmap_lock(void) {} static inline void mmap_unlock(void) {} #define WITH_MMAP_LOCK_GUARD() -void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); -void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); - #endif #endif diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index 3fc83587c0..f06ae9b516 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -26,6 +26,7 @@ #include "exec/ramlist.h" #include "exec/ramblock.h" #include "exec/exec-all.h" +#include "cputlb.h" #include "qemu/rcu.h" extern uint64_t total_dirty_pages; diff --git a/system/physmem.c b/system/physmem.c index 38d3ede9f9..7a7876a375 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -850,6 +850,7 @@ found: return block; } +#ifdef CONFIG_TCG void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) { CPUState *cpu; @@ -869,6 +870,7 @@ void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) tlb_reset_dirty(cpu, start1, length); } } +#endif /* Note: start and end must be within the same ram block. */ bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start, From patchwork Thu Apr 18 19:25:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789844 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735926wrm; Thu, 18 Apr 2024 12:31:06 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWxeY1UK4cM87d4mMeCtlnrXVym/bnS99H+y7TYl/Q79uMlBQndPsw6EbI+WiLujq5ueZxCRhBWkZaOqEWk4f/E X-Google-Smtp-Source: AGHT+IGN3Y9SnhFbS3NA9KOeL/FpihN3U/74xYSuw8XG9ryvosuY3wH1yYhPwr5dOer5IAEd4v/z X-Received: by 2002:a05:6102:1506:b0:47b:9caf:abb1 with SMTP id f6-20020a056102150600b0047b9cafabb1mr6492205vsv.30.1713468666339; Thu, 18 Apr 2024 12:31:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468666; cv=none; d=google.com; s=arc-20160816; b=vY/CJc02iYhIy8jbvnkCHCTdBZ0ffAR8SBY2WdRWFlNM0QYHZwiyeQFDfb0XtwwMo1 zXKVoBus4JIxspWUmWf+jd+LQdPJPiC4zqwmARIh/tWpYEy2+gzLZvPfBS5N/nhWTQCS 2yabOXEj39VpPPWZn4cCCQHuX9zH3ufCEd3ZdTE45qpRRezFO8EO0/5G19pYuxuNR3SH GNCvpTI2fLLDdFy03RqNv97RsMv68vPTNZcb5J+wDQJnJotle+AWK2e3gtqLa+tWXHOM UmA6tb/ALt6dlJ7y5Xr590T5gmT92y5E11XTJ83XbFSDQlPLkpgbuIrJ+st9KWUN9jq+ oHgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cb1njxsoj9fqYLqI6LbCARFpOVdltqpYC3ClFHXZbjY=; fh=OldoyVsnxIotb3oLwZzdNfaQktZrdXn2xfyEQOuGV+M=; b=ELEvBDN6YvrzxLVscjVOvjYdmV+eqjrORtClrV5Y2mK7L92O2Lbgh2JrO4FbN3pvlI E5ok9cNvBt1ZzplbFEGnShZJbJuRszUVQWxEdwXCKrfOYZlyQarYspL9dXDAI3WYr738 CV7cv/uyNivFhESYUichvfGzDpAUc8XTLiVqCeqmgGG54AAEu032gw7mfMh3+8LrDack +39hzFC0nr6aGQqaacPfHaqox9fz71wngoi4fcZFjhczMjjrQ+RbASGkbQ36uRP5pEpF FjcE/Uuj7zDIylZdJ3ffWkjbrmZztzrKrevumxKBj6KXbCpr52XtfKRR5hD3aDycHmjJ 3img==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SJS0cwg9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id v18-20020a056102331200b00479d86a4be6si536411vsc.798.2024.04.18.12.31.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Apr 2024 12:31:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SJS0cwg9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rxXSJ-0007dS-12; Thu, 18 Apr 2024 15:29:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rxXPD-0008EO-Hj for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:26:55 -0400 Received: from mail-ed1-x52d.google.com ([2a00:1450:4864:20::52d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rxXPA-0007Wo-14 for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:26:46 -0400 Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-56e48d0a632so1824106a12.2 for ; Thu, 18 Apr 2024 12:26:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713468402; x=1714073202; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cb1njxsoj9fqYLqI6LbCARFpOVdltqpYC3ClFHXZbjY=; b=SJS0cwg9zXXPVFCnpbkYs2cKU0yYG9UVSqhn2+Hh4aGmIjTsOnQF6DSlN7+AXnHgy2 GCPIYLsZrJRj8Kaw6VoU9pmm+fWNZ2k5FpA5x7Gk/0zTbbUQXTo6TFNZ1Dsfn0zu/chK PB7mHawBoCPYgHgI70cj3wzqd3miOGv07CSU5y7X3QeiX9eGPj9Cunk2PNj+YVfm7eq8 wuGKIh+uFZJMsh5I9QqpX7ncpWV3VpOvLwG+6qGJthe81qgcKcg3cqBh72lf5gY/aS4y NT+XGZkxsLXVhX6ZswB2EpkIAjZKTulposrNzshoi9OlpZWS2g7mgucAkznygdvasDII I7/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713468402; x=1714073202; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cb1njxsoj9fqYLqI6LbCARFpOVdltqpYC3ClFHXZbjY=; b=CxDT3zKRNQpvfqOSCMQnzZPWWtI6flNVcGdYP82Bl0MOYB4hiJ8D78E/mbEZOLb0Sf Rmodk8f00wos27dtCa7EPTZcPrUogUJ3ymXCJWpepkfYXDMcya0eAxCWBDRvAABrY1x7 wEdRXG4G9928ckVXaHZz8wkAt3v0nNBp3VC1z94iIJdJxCNL9b5dvht98y3odZwa5oML GrszzfP7N8fyWXH5IfZbA68m0s3CamyMTKxCaQNXL0FEgOqP5cX5hQgyvbVkgODuBXnv xUBUP2F6zHZfIwZJMNv3OzGO2TExBhFxckFz2wTJTuQmhoFe+kgr1UuLAm1kD8YWtuf6 tF9Q== X-Gm-Message-State: AOJu0Yzg+ftcvKRB1QhH6z62DhdRUCVWR9OTv3URZTSMyHmJLvy6Iw/4 pAvPHn6HOPooxUwdknT6savCbKeBxLzpM6xRvu4U7+btocGtHonwn7hNLOyiFsyVS7KNgAkWo6k X X-Received: by 2002:a50:d7db:0:b0:56e:d9e:f4d3 with SMTP id m27-20020a50d7db000000b0056e0d9ef4d3mr95268edj.18.1713468402179; Thu, 18 Apr 2024 12:26:42 -0700 (PDT) Received: from m1x-phil.lan ([176.176.151.213]) by smtp.gmail.com with ESMTPSA id d3-20020a50f683000000b0056e59d747b0sm1276471edn.40.2024.04.18.12.26.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 18 Apr 2024 12:26:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, David Hildenbrand , =?utf-8?q?Alex_Benn=C3=A9e?= , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 12/24] exec: Move CPUTLBEntry helpers to cputlb.c Date: Thu, 18 Apr 2024 21:25:11 +0200 Message-ID: <20240418192525.97451-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240418192525.97451-1-philmd@linaro.org> References: <20240418192525.97451-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c: - tlb_index() - tlb_entry() - tlb_read_idx() - tlb_addr_write() Move them to this file, allowing to remove the huge "cpu.h" header inclusion from "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu_ldst.h | 55 ----------------------------------------- accel/tcg/cputlb.c | 51 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 55 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 7032949dba..2c5a0a5c81 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -70,7 +70,6 @@ #include "exec/abi_ptr.h" #include "exec/mmu-access-type.h" #include "qemu/int128.h" -#include "cpu.h" #if defined(CONFIG_USER_ONLY) @@ -294,60 +293,6 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -#if !defined(CONFIG_USER_ONLY) - -#include "tcg/oversized-guest.h" - -static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry, - MMUAccessType access_type) -{ - /* Do not rearrange the CPUTLBEntry structure members. */ - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) != - MMU_DATA_LOAD * sizeof(uint64_t)); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) != - MMU_DATA_STORE * sizeof(uint64_t)); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) != - MMU_INST_FETCH * sizeof(uint64_t)); - -#if TARGET_LONG_BITS == 32 - /* Use qatomic_read, in case of addr_write; only care about low bits. */ - const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type]; - ptr += HOST_BIG_ENDIAN; - return qatomic_read(ptr); -#else - const uint64_t *ptr = &entry->addr_idx[access_type]; -# if TCG_OVERSIZED_GUEST - return *ptr; -# else - /* ofs might correspond to .addr_write, so use qatomic_read */ - return qatomic_read(ptr); -# endif -#endif -} - -static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry) -{ - return tlb_read_idx(entry, MMU_DATA_STORE); -} - -/* Find the TLB index corresponding to the mmu_idx + address pair. */ -static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, - vaddr addr) -{ - uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS; - - return (addr >> TARGET_PAGE_BITS) & size_mask; -} - -/* Find the TLB entry corresponding to the mmu_idx + address pair. */ -static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, - vaddr addr) -{ - return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; -} - -#endif /* !defined(CONFIG_USER_ONLY) */ - #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data # define cpu_ldsw_data cpu_ldsw_be_data diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index e16d02a62c..953c437ba9 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -27,6 +27,9 @@ #include "exec/tb-flush.h" #include "exec/memory-internal.h" #include "exec/ram_addr.h" +#include "exec/mmu-access-type.h" +#include "exec/tlb-common.h" +#include "exec/vaddr.h" #include "tcg/tcg.h" #include "qemu/error-report.h" #include "exec/log.h" @@ -95,6 +98,54 @@ static inline size_t sizeof_tlb(CPUTLBDescFast *fast) return fast->mask + (1 << CPU_TLB_ENTRY_BITS); } +static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry, + MMUAccessType access_type) +{ + /* Do not rearrange the CPUTLBEntry structure members. */ + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) != + MMU_DATA_LOAD * sizeof(uint64_t)); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) != + MMU_DATA_STORE * sizeof(uint64_t)); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) != + MMU_INST_FETCH * sizeof(uint64_t)); + +#if TARGET_LONG_BITS == 32 + /* Use qatomic_read, in case of addr_write; only care about low bits. */ + const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type]; + ptr += HOST_BIG_ENDIAN; + return qatomic_read(ptr); +#else + const uint64_t *ptr = &entry->addr_idx[access_type]; +# if TCG_OVERSIZED_GUEST + return *ptr; +# else + /* ofs might correspond to .addr_write, so use qatomic_read */ + return qatomic_read(ptr); +# endif +#endif +} + +static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry) +{ + return tlb_read_idx(entry, MMU_DATA_STORE); +} + +/* Find the TLB index corresponding to the mmu_idx + address pair. */ +static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, + vaddr addr) +{ + uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS; + + return (addr >> TARGET_PAGE_BITS) & size_mask; +} + +/* Find the TLB entry corresponding to the mmu_idx + address pair. */ +static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, + vaddr addr) +{ + return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; +} + static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns, size_t max_entries) { From patchwork Thu Apr 18 19:25:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789837 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735115wrm; Thu, 18 Apr 2024 12:29:12 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUEO5qg4XlMJURBLY61d8NyB29EGBv8A24/4exaAZOuntAwGNTESmIvbf7ycDHxCIllchOPpQ4Jjr/VI0SEwDsQ X-Google-Smtp-Source: AGHT+IFs3x5+bMppkmJNDQh+svOpSDFc2x3VtDSQUaGLMPHxToz7gk7myizvCO0VoVa2DUXOBSQk X-Received: by 2002:a0c:e34b:0:b0:69f:74f7:a96a with SMTP id a11-20020a0ce34b000000b0069f74f7a96amr290008qvm.11.1713468552475; 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Use the generic type to avoid to depend on the "exec/user/abitypes.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/sparc/gdbstub.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c index 07ea81ab5f..ec0036e9ef 100644 --- a/target/sparc/gdbstub.c +++ b/target/sparc/gdbstub.c @@ -108,7 +108,7 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; #if defined(TARGET_ABI32) - abi_ulong tmp; + uint32_t tmp; tmp = ldl_p(mem_buf); #else From patchwork Thu Apr 18 19:25:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789843 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735722wrm; Thu, 18 Apr 2024 12:30:38 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUCdsECJJLJI2eCMCtHCqOjKugr6uLYe1683goKS6QkUOy58HtdgyWCjePkgyh7TuDoqjpfvIopFQLNVJU+PosH X-Google-Smtp-Source: AGHT+IFvtKs6g5YGi/HJxrc0S3Lt/6u4MLWMwV+c3cF5KVjv647LZCnjoQo+JfSvHugEkKgnxqL/ X-Received: by 2002:a05:6102:dc6:b0:47b:9ca3:e03d with SMTP id e6-20020a0561020dc600b0047b9ca3e03dmr4852573vst.11.1713468638157; Thu, 18 Apr 2024 12:30:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468638; cv=none; d=google.com; s=arc-20160816; b=thQidSwLaM97bzmKmem6H09QVjaGyhuO56H46NLIB+UeaZX2fiyRHzLXezoZWyQT3d uvf0mHuyopaKDMWZC7x7toS4SOQGS+mOpDmwsT7IMdUj0zpJqY3a5VTMflOpc2R3SrZ+ 8K3lNx+2LmNSd8Vw207XnO9iPEg6hJd9pvHWR4vqEM5vcYcCGWVegpUpZxXs5Eg+XIau 2ouIUXCWP+OaYFtDWOAYUFx/hNUGpkihpn9X89XxZN1aBQJdZdEquSa766qsa2mWpXf9 HNA0nI/JEXSk7+KP81NuYFY0W0pz1dCgPmP1/wrz2X25W75JZ4rk1rmGNb6al72b9NBp ZzUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=VHCcAuBE/LTzo7Jv3JWIaIvZFf+gAOHGRyRvAagXUpM=; fh=UOfk6Ly7prQSwUwkb2aDexM0HzRPrZfdEQPmWveYblc=; b=XU1+lnPUmjmkkMVzglDPgRE97D82TkBonNwydSdOTWMh+/kcF1fehmR0+gqrSfreW9 /Vf+LK3lepPFtxJNirdG0b4BJr1wj6FxaXVKsRGdXWwKQOQuXCxDeN5WT8iDSz7CpSN/ qDgBkDAhiHyfxtJ/y6mHpe1To6Ea4pSCCRteOzn46G03Bu/vUo5sY5wOuX5Xb406Xh/z NsWPOu3sojiyZE5ZKT4qJUCBU9i8pwZDTTqVYGQgmvykS2KqjluPxwcqWLiEDpX/OU1M gMa49jzObUlR7fnIMOScbIO5Xb/gosJ+UtaXJvSHwV/VRlsADIT+Nofv+IzYi6n6iN1m 9yJQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JjvbdB1E; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Move guest-base.h there too. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson --- include/exec/cpu-all.h | 2 +- include/{exec => }/user/guest-base.h | 4 ++-- tcg/tcg.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) rename include/{exec => }/user/guest-base.h (72%) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 78848f018c..027f19e052 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -65,7 +65,7 @@ #if defined(CONFIG_USER_ONLY) #include "exec/user/abitypes.h" -#include "exec/user/guest-base.h" +#include "user/guest-base.h" extern bool have_guest_base; diff --git a/include/exec/user/guest-base.h b/include/user/guest-base.h similarity index 72% rename from include/exec/user/guest-base.h rename to include/user/guest-base.h index afe2ab7fbb..1e42bca5db 100644 --- a/include/exec/user/guest-base.h +++ b/include/user/guest-base.h @@ -4,8 +4,8 @@ * Copyright (c) 2003 Fabrice Bellard */ -#ifndef EXEC_USER_GUEST_BASE_H -#define EXEC_USER_GUEST_BASE_H +#ifndef USER_GUEST_BASE_H +#define USER_GUEST_BASE_H extern uintptr_t guest_base; diff --git a/tcg/tcg.c b/tcg/tcg.c index 0c0bb9d169..6a32656cd4 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -57,7 +57,7 @@ #include "tcg-internal.h" #include "tcg/perf.h" #ifdef CONFIG_USER_ONLY -#include "exec/user/guest-base.h" +#include "user/guest-base.h" #endif /* Forward declarations for functions declared in tcg-target.c.inc and From patchwork Thu Apr 18 19:25:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789852 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp736799wrm; Thu, 18 Apr 2024 12:33:17 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUnh9E+0hc6gctoVF4NCQCAlHw0Q9WcEH43MuYg1ojFvI4xCbQew3s/O95QdLB/4SYiO0T96PCnF862xdyHcTl7 X-Google-Smtp-Source: AGHT+IFkjCdetr5rgxWBKCPtMcKmmufzCcHX6QzJOSH+8lde+NTtPeKYB1hSJZOWq5+TemAVNfRa X-Received: by 2002:a05:622a:1347:b0:437:b866:980e with SMTP id w7-20020a05622a134700b00437b866980emr29585qtk.5.1713468797631; Thu, 18 Apr 2024 12:33:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468797; cv=none; d=google.com; s=arc-20160816; b=TvUG+hcxnKIVa8u1tDB0agMH4rnDpjrcNgVOeqrj0Fn13QAlvkssnBcLphKNLE7AxX C9eT35Yn9y0rOaVw4DUZwseEg83DkMkgql/jVuNXfc/stUGBlYR+sHKp9Q7uFpTZwJIN Sgb/QqBdLwN8Fld+8ZKIvEYffanFAYwCwj6WAt58Eyh+PCIi9Efcc+6aeJVJ7gpXzeq+ 6MIGb/dvoxIWXDKpa0SmbxtzXon3JitkPF6DSb2YdSoapq4TDH37dxy3LJ0QKEw60c3e 7Yh/Ta5GjW1OlO50lx5hVXPa4ddY+urWl/xoHpqGPqMWFYhBLPB5Z1ByvgVMk07EHQSb 3/LA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Dml4vJCRKxCVY1uFtRIPG5lLzhQacgo/ZMSZt5sIQXk=; fh=b5TQUgX01t0/Q2g3IT/oGdKd0Qft+P2m2DT1KZ3fpmM=; b=N2QyTdWa2ZjyMX12Uf0hwPx70CG4PDzXH8GyzXbdKIaGG2tvfHCfgh4b3Mn0qBHCJq wgXXaFvEGqdpBeP2B6mdh6LP30fH/iF1mF9ufIG6ChhfLantpR2FE0rGG+Y0/CUyffQz cJB2A5R/dvd8WLRjwNFcwPdzccaVra4scjipvZ/5xvDNNUdB5k+lnHg5t54fM3qRPCoi /dCGIb1XQrq5tq75L1PFTQtvYhwMARiOkTYmAMyyo97+rAdzkLwdm/SDVFzdIxV1LIqC 7wWfEvgIvqXiaqCl2VAHRO1S99+PykoiArKP69qL1X+JQBmwHt2XC6eLIg3sqHWZTMVU azAQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=s0GWNpWb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Very few files require this header, so explicitly include it there instead of "exec/cpu-all.h" which is used in many source files. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-23-philmd@linaro.org> Reviewed-by: Anton Johansson --- include/exec/cpu-all.h | 3 --- include/exec/cpu_ldst.h | 2 ++ include/user/guest-base.h | 6 ++++++ bsd-user/main.c | 1 + linux-user/elfload.c | 1 + linux-user/main.c | 1 + 6 files changed, 11 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 027f19e052..e75ec13cd0 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -65,9 +65,6 @@ #if defined(CONFIG_USER_ONLY) #include "exec/user/abitypes.h" -#include "user/guest-base.h" - -extern bool have_guest_base; /* * If non-zero, the guest virtual address space is a contiguous subset diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 2c5a0a5c81..6d47d3114a 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -73,6 +73,8 @@ #if defined(CONFIG_USER_ONLY) +#include "user/guest-base.h" + #ifndef TARGET_TAGGED_ADDRESSES static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) { diff --git a/include/user/guest-base.h b/include/user/guest-base.h index 1e42bca5db..055c1d14fe 100644 --- a/include/user/guest-base.h +++ b/include/user/guest-base.h @@ -7,6 +7,12 @@ #ifndef USER_GUEST_BASE_H #define USER_GUEST_BASE_H +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + extern uintptr_t guest_base; +extern bool have_guest_base; + #endif diff --git a/bsd-user/main.c b/bsd-user/main.c index 01b313756e..29a629d877 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -36,6 +36,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "exec/exec-all.h" +#include "user/guest-base.h" #include "tcg/startup.h" #include "qemu/timer.h" #include "qemu/envlist.h" diff --git a/linux-user/elfload.c b/linux-user/elfload.c index fc60c01d57..9ed4baa2ac 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -8,6 +8,7 @@ #include "qemu.h" #include "user/tswap-target.h" +#include "user/guest-base.h" #include "user-internals.h" #include "signal-common.h" #include "loader.h" diff --git a/linux-user/main.c b/linux-user/main.c index 149e35432e..94e4c47f05 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -38,6 +38,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "qemu/plugin.h" +#include "user/guest-base.h" #include "exec/exec-all.h" #include "exec/gdbstub.h" #include "gdbstub/user.h" From patchwork Thu Apr 18 19:25:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789840 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735567wrm; Thu, 18 Apr 2024 12:30:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVtbcZ5cgMNYjr7VI80d2LnEaxVTD6HSKMBL6Z7Jdd4A8NEtUmQXvgmAic2bwrJugw7AHsJ+oPWplfEck8yBa6h X-Google-Smtp-Source: AGHT+IEGAtRFSiIkPy78xwkIq0lml1uSlNPt/6WaIdLAcAAMxleuS4hpuvzQwGOxugzrxdMnFhX7 X-Received: by 2002:a05:620a:51cf:b0:78e:22c:c82d with SMTP id cx15-20020a05620a51cf00b0078e022cc82dmr111532qkb.36.1713468621297; Thu, 18 Apr 2024 12:30:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468621; cv=none; d=google.com; s=arc-20160816; b=xFDCYJECD94DUDm0lq1DvwhGEL9/rMlGzd9T/u/7zAvwLamKk0EUIfUdS5QG2SHZzL PSeMyd+F0VP7YjuD+tx5d2aLt+W1+dT43XltceXYo2+4J10H7qi/jARslF9x2Z2EoOOL th2ZwYbGakdVWNFmlMnZ/l7lYDBcDwNtC2r0+IMcGQueyka+IBRNASXnT6hXJc2HhOlH +FPEd5JD+qsGBFKEXhTCj7OjXHb8dVfLyr0mWmZBCt9i7x+ibz7cx3aG7BmBYsp0bPIw b87tx1ei3G8CBj8FXVCkQzK6kaevSIyshx6khVM0hqfdwSYz0lXklX1OQKitMvJEl2g1 DbQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=koVgyajCEgUVl/LMvNKONPGr1ZhJ2eug5WfoAqRNjUs=; fh=OldoyVsnxIotb3oLwZzdNfaQktZrdXn2xfyEQOuGV+M=; b=MLIGZ9MlSqunn1jZwQCgrc4AVJOcEwu4D42Arh74WVFDEp5OMf+HwRy7VsCDmOdT2/ aSZznnVSjXGtaRKQFdHBHLGqLgpvBCoV6e7SvKikLL0HkwpKRyvcjAtS6p0NdIpHOFaR IzokcQSuQ1lhSJ1cKBn/yGsgNsTuBmxuCI7k+CjekNTmY3VFLNa6ooVVEENOj8gJUnCf JCjOdh5sz5mOKLnfVP0DqWnnSQ7VcmaP9ro2XVoSK8X3y/rxCEikerYEKyvuOfwTVjYT GJHTlIbwQsx/WRZaiwLPcMN8tL56uVifCUoTFBuPdX5s+ZUI2LhFxwX+P2EFj5imLE9E ZoUw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zqKavEvU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d16-20020a05620a167000b0078ecb975c13si2101109qko.253.2024.04.18.12.30.21 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Apr 2024 12:30:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zqKavEvU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rxXRP-0004Ma-BZ; Thu, 18 Apr 2024 15:29:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rxXPn-0000RQ-8g for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:27:25 -0400 Received: from mail-ej1-x632.google.com ([2a00:1450:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rxXPl-0007cD-Ap for qemu-devel@nongnu.org; Thu, 18 Apr 2024 15:27:22 -0400 Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-a519e1b0e2dso125156766b.2 for ; Thu, 18 Apr 2024 12:27:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713468439; x=1714073239; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=koVgyajCEgUVl/LMvNKONPGr1ZhJ2eug5WfoAqRNjUs=; b=zqKavEvUwmpktzeC+ZkyMOS6iqmafM6qsXVAEzNYS8OxOXD0h7Li/SUtH2QlGSV42v gtGr1aErMgYhJG8t6ttnlJYHRlT5s6csBUSDJvKUUgKwztK9bgxfoht0Jo8n566f9xw5 WJCPSisaHKLFFhBiVCqkCZGHBtCeSRgWZo/nc6Va/Nx+1SGtZ3etaTNi0SHVMgrMNSd5 jZTvmsADsT/EuGy7blU6vJQ1I46vFsxOrstT972mzuA6rwqIh7SOEPKHLLGWIo1TYQ6o /W9EqRv6gjsOqagQZSxouEan0y/1CtFQ/QmvNJhe7Oz7fTIPkMAVefFne69uufMQ5WuQ XPJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713468439; x=1714073239; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=koVgyajCEgUVl/LMvNKONPGr1ZhJ2eug5WfoAqRNjUs=; b=KrDZl11Lzdq6Kcy4g4p5NpVVE11McaWcxMo+sSqb1Rgh3ZynCVn7apahSwH/F8Anal eRjsWjlQuKr6eB7uqIYakKc/Mj87BacPKQz2d+69tvi4GQDWwju7il2UWSfmnLPMpP4x ILJIeig1ojS/h3XkJ1k4yCqEXg7wa2MDwJ60kl5WAXdOI8xyMax2FZrBAZ1ZFZakXSOT CtlNQlW2sHksUwHrjCQyutqdcuL+eemvbpYo24SBvHzlg+Sdi+OA6OkIY8zreS8tUHRz ae3LMgAnToMfkx9qs8IkS3TtLFHrGZIcfOtKMUUw5C+rrcmhuqRu8XeX4DmYKLqp9cjX bhUw== X-Gm-Message-State: AOJu0YyseKuP//XSVJRCk9DGCQrw8bd5GstV++uslcggRF7CgZLoxVvw h45V2Z7GQeypX0OlDSCFxJAazcXT4GG2oH07lUnxbFV1vB1VzDH0hyzfsehxpFk97U1epqFGJSo a X-Received: by 2002:a17:906:6013:b0:a52:ec:a87d with SMTP id o19-20020a170906601300b00a5200eca87dmr48021ejj.74.1713468439142; Thu, 18 Apr 2024 12:27:19 -0700 (PDT) Received: from m1x-phil.lan ([176.176.151.213]) by smtp.gmail.com with ESMTPSA id n22-20020a170906119600b00a51a9d87570sm1269573eja.17.2024.04.18.12.27.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 18 Apr 2024 12:27:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, David Hildenbrand , =?utf-8?q?Alex_Benn=C3=A9e?= , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 16/24] exec: Move GUEST_ADDR_MAX definition to 'cpu_ldst.h' Date: Thu, 18 Apr 2024 21:25:15 +0200 Message-ID: <20240418192525.97451-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240418192525.97451-1-philmd@linaro.org> References: <20240418192525.97451-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org GUEST_ADDR_MAX is only used in accel/tcg/user-exec.c and "exec/cpu_ldst.h". Move it from "exec/cpu-all.h" to "exec/cpu_ldst.h" so we can avoid including "exec/cpu-all.h" in accel/tcg/user-exec.c. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson --- include/exec/cpu-all.h | 34 +--------------------------------- include/exec/cpu_ldst.h | 30 ++++++++++++++++++++++++++++++ accel/tcg/cpu-exec.c | 1 - 3 files changed, 31 insertions(+), 34 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index e75ec13cd0..554b937ddb 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -63,39 +63,7 @@ /* MMU memory access macros */ -#if defined(CONFIG_USER_ONLY) -#include "exec/user/abitypes.h" - -/* - * If non-zero, the guest virtual address space is a contiguous subset - * of the host virtual address space, i.e. '-R reserved_va' is in effect - * either from the command-line or by default. The value is the last - * byte of the guest address space e.g. UINT32_MAX. - * - * If zero, the host and guest virtual address spaces are intermingled. - */ -extern unsigned long reserved_va; - -/* - * Limit the guest addresses as best we can. - * - * When not using -R reserved_va, we cannot really limit the guest - * to less address space than the host. For 32-bit guests, this - * acts as a sanity check that we're not giving the guest an address - * that it cannot even represent. For 64-bit guests... the address - * might not be what the real kernel would give, but it is at least - * representable in the guest. - * - * TODO: Improve address allocation to avoid this problem, and to - * avoid setting bits at the top of guest addresses that might need - * to be used for tags. - */ -#define GUEST_ADDR_MAX_ \ - ((MIN_CONST(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) ? \ - UINT32_MAX : ~0ul) -#define GUEST_ADDR_MAX (reserved_va ? : GUEST_ADDR_MAX_) - -#else +#if !defined(CONFIG_USER_ONLY) #include "exec/hwaddr.h" diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 6d47d3114a..07649a01c1 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -73,8 +73,38 @@ #if defined(CONFIG_USER_ONLY) +#include "user/abitypes.h" #include "user/guest-base.h" +/* + * If non-zero, the guest virtual address space is a contiguous subset + * of the host virtual address space, i.e. '-R reserved_va' is in effect + * either from the command-line or by default. The value is the last + * byte of the guest address space e.g. UINT32_MAX. + * + * If zero, the host and guest virtual address spaces are intermingled. + */ +extern unsigned long reserved_va; + +/* + * Limit the guest addresses as best we can. + * + * When not using -R reserved_va, we cannot really limit the guest + * to less address space than the host. For 32-bit guests, this + * acts as a sanity check that we're not giving the guest an address + * that it cannot even represent. For 64-bit guests... the address + * might not be what the real kernel would give, but it is at least + * representable in the guest. + * + * TODO: Improve address allocation to avoid this problem, and to + * avoid setting bits at the top of guest addresses that might need + * to be used for tags. + */ +#define GUEST_ADDR_MAX_ \ + ((MIN_CONST(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) ? \ + UINT32_MAX : ~0ul) +#define GUEST_ADDR_MAX (reserved_va ? : GUEST_ADDR_MAX_) + #ifndef TARGET_TAGGED_ADDRESSES static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) { diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 225e5fbd3e..7bfd558027 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -31,7 +31,6 @@ #include "exec/log.h" #include "qemu/main-loop.h" #include "sysemu/cpus.h" -#include "exec/cpu-all.h" #include "sysemu/cpu-timers.h" #include "exec/replay-core.h" #include "sysemu/tcg.h" From patchwork Thu Apr 18 19:25:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789851 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp736645wrm; Thu, 18 Apr 2024 12:32:55 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVYI/n6O3z4y+02MWWJfmX05eN4coV+46R3lmTTUhDObVkH1c+vZhxsNibTjJgD0ADPegB/6eWesusvM5STH1hF X-Google-Smtp-Source: AGHT+IFlRFqHSn2nl6ezXuBl8I006rp6LqGENoSsauKsy09s4KqTooIvgT/UxaURBAXRarCN9WmZ X-Received: by 2002:a05:690c:7089:b0:615:8c1:d7ec with SMTP id jg9-20020a05690c708900b0061508c1d7ecmr3981837ywb.33.1713468775557; Thu, 18 Apr 2024 12:32:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468775; cv=none; d=google.com; s=arc-20160816; b=vW4QDFIEUzei0+GbuSE3jKrPRxIioeqHcLKWFc/MVGXZJMoGszPxRL3aUsA2smBDe1 PP+ayOo9RBUnN2XxO8jYSOvP2EIV6pKy3tEILECvBDl2I0AAWfok0Wxoc1aDZ3dTXOoh U1cyj7s6qNvrIhWxQ1BuJN1zvRmon+B5LvRK1bkt/zQhmRCRYAZp+FseGrOCxpB7cdDo yabNAap2QQq3LBjC0orwMZo16KblRV+65tIHI8nQYw07w4L1fP1YAZsLwCA/qURyZHSA G+SBCwEyNWA4XrWrhKfApZx59V3QWyRXUZ7DYaK6lvzG0DEXJThTMW0QODQRHidGVwf/ UObw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zuWZ6VCaeCTfKgGM+fcYzWiSC9LIi21t46RdwEg8Jqc=; fh=OldoyVsnxIotb3oLwZzdNfaQktZrdXn2xfyEQOuGV+M=; b=FEnHsSojNazVYVEvH7KBxIZ/2rMdkl4KaET0pGhtv+0EjN0+gPa3Usz2O6F97j+dII qvYmgocV8J5EszCwNL8al0uPP346S2I/slckDI1LuRLHz5vofKPqhsHR6VCMshmLEGr2 aA3t7PqJQjpnUD8oXq6jRkpoe5t09sOoZmpVns1gWtQGvTUaMlicRhCTJUgHr/rW+bwh 8VXUaXzoIhvO9SP1zkQW2Oiz1dHp00IUuJPm9Dtn1L4D6fTCNErMTWc2/HDsIRaJo/Cr fvAF2kzSYE4un8q7koujJt6j4I+YXkIyK8fTV4LWtEjyogRqMyc5AOeAoj90gp9bmbbp aBgA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x5wRfVcO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé --- include/exec/log.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/exec/log.h b/include/exec/log.h index 4a7375a45f..e0ff778a10 100644 --- a/include/exec/log.h +++ b/include/exec/log.h @@ -2,6 +2,7 @@ #define QEMU_EXEC_LOG_H #include "qemu/log.h" +#include "qemu/log-for-trace.h" #include "hw/core/cpu.h" #include "disas/disas.h" From patchwork Thu Apr 18 19:25:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789839 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735456wrm; Thu, 18 Apr 2024 12:30:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCURRFELaxGKipXuXpOnHfAbVXqX9hvxP547+U5S/ugBxBgCu3dJVJM12XVlVqg4d7rTpRLKEJmYrdrELTD8x9/v X-Google-Smtp-Source: AGHT+IGx4zrJg6sS1uSd91noH3knkvgJgTSzei7OX/I0PLdSuU05xXMyAEOhlI/oVlWZNFCkpu81 X-Received: by 2002:a05:6102:e09:b0:47b:b69d:3300 with SMTP id o9-20020a0561020e0900b0047bb69d3300mr5026701vst.3.1713468604615; Thu, 18 Apr 2024 12:30:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468604; cv=none; d=google.com; s=arc-20160816; b=SfXFJ2YV28wfohAetNo8QWP6XLkcjHSx0KgXWEl3vh3sOVJrrVEJmviAtssKXDttWr eOrxqK46CWo0JhvxhWnZSQekJ6AhdSyUkb0O+iSrpKRvlao+pMGbsHvzkqtQdX8myx58 wJH2UjtNnB8whwdCNHSOmhnWr65e96QgFxNEVkzKzb1iYQRocLZoChjZnYBAlBnh9ywB mQJAZNcq7VRd3AcEvvmyco9DcEbO8YepppyRIiddLeS6VAIfjgEcvhjQ+SN/rM7R1YBD 28kabtPribTeDpqYxz41eJAOJHufheC2VTh+UdZ5Sc/88ZQzknle+TDw8dDTA8aafQj1 re2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zNTjYBQSXlJdcfDAGNfhN/k6Tw+ZuKx0L+6ToWVAoUI=; fh=OldoyVsnxIotb3oLwZzdNfaQktZrdXn2xfyEQOuGV+M=; b=nptwdsvOlXKXv9NBlufkGZfNcMfzatzOoinZASOvMoO5gR/pB9tQ67PjpdqvS5V33f 4jy0y0hx1O996dgvgOaA3LLTq20Ik4yspiRszhFBxUsfrVdAPed3AbC8BB1n9b/cerr6 xkM172t3XlufQbIaotIyA2/ytglvZaN4S0fBDTU3wVxTe9NoMVN805+T+KbJSNHnBwJO g3/vFaYfoxaUkQ1xOFJtwIXMO4e84ffiz04PUMzv3UQOOLks68o2w5EFb0qG5Mbz1gP7 D3D1Zl8kSKdGUqnv42hMAf5RxxUIAmtTuM8hptmaY4s+IVhdnJJShxynr1tt2h6OppeV d9uQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZwyPaKn3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- include/qemu/plugin.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 12a96cea2a..41db748eda 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -13,6 +13,7 @@ #include "qemu/queue.h" #include "qemu/option.h" #include "qemu/plugin-event.h" +#include "qemu/bitmap.h" #include "exec/memopidx.h" #include "hw/core/cpu.h" From patchwork Thu Apr 18 19:25:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789845 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp735998wrm; Thu, 18 Apr 2024 12:31:18 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVZk4aE+JeMgQFbJxNVBoT/uLOz0+5gggIFkZMyt6n2CPUglwAZzm/QW6HuiLK3D0WuUi08XVlaEPN6HbUWsePG X-Google-Smtp-Source: AGHT+IGcV6edwudMDSiAe9StNe20TrGgVGRXz/9b1rsYGF7wGsNOWgudLpx2C4nvninZzEUs3P/H X-Received: by 2002:a05:6102:496:b0:47b:be49:8482 with SMTP id n22-20020a056102049600b0047bbe498482mr2289187vsa.6.1713468678528; Thu, 18 Apr 2024 12:31:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468678; cv=none; d=google.com; s=arc-20160816; b=vxAk2Y0OSGn9FatP+8SnW6evvEoOkDBiNtGAw7OcMKITptnujmeHc7ZuKmGnik94TG DMrZMdyqbcejbFIg2HybLmd5S6QmsSaTkSlmtua68ByKpVi1mIB1xokKYBQ4UnkZEf7n QBhAU+iSecIwyf3arZkflHTXl9hWFq61t4Jy0c6coWYM2zK6A1R0wzmMxB0tu7RNmNNg Qp4A16rBBL0HEEjDfTnmz4SrRgf/fy5gWBlqwd0dZK7D8elnodOJQq2vtNObsGTjR4OK 5L11vTgDF3btx3Mam+esXmxu5kFgCI0dWoITLl2L2ZzPP8oWq36cbas3R+AVvrQ/WTMz wsww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/V78U8y8hgVchZketDvNFCqr9+uicpA2z97iCqadZGc=; fh=e2GGFsfsy2/W8frF1jqXqbSIouVq4pCnw7ANWeCk5gI=; b=uE22SfS4Kxtau+QLxbz9RvwmnRn9v6l4gEGkrUtse1g7KwHAMcHhMvKndwvtw26dWe X5TrvvWsK3UAH/N6Txugd0yx96NtolWe0yXmFdQJ8baAF03F/HaRASD2eongrlN8qDuu 5B3JfGM+p91Z8DRGeqrkyZ1hEdXCrqfJzIM/H7GkfL8F9tocxneDbph6Q+8YIMarvpo9 GnGwKVb6MXKa5ZJEMiXZ3tJ1PwqSSbJ9UCOM2dyxpC8z8uhtFUnm2drBPOajAwbKqQX2 DjaDWWyRwq/GtM89AyE+l+s5pNfcwslfD7fJ4uIDa938VHLAqU+fFyMXkaT3n8GErBla UNzw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="wyC/eYyo"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Only include "cpu.h" in the target gdbstub.c source files. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/gdbstub/helpers.h | 3 ++- target/avr/gdbstub.c | 1 + target/tricore/gdbstub.c | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index 6277a858a1..26140ef1ac 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -16,7 +16,8 @@ #error "gdbstub helpers should only be included by target specific code" #endif -#include "cpu.h" +#include "exec/tswap.h" +#include "cpu-param.h" /* * The GDB remote protocol transfers values in target byte order. As diff --git a/target/avr/gdbstub.c b/target/avr/gdbstub.c index 2eeee2bf4e..d6d3c1479b 100644 --- a/target/avr/gdbstub.c +++ b/target/avr/gdbstub.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "gdbstub/helpers.h" +#include "cpu.h" int avr_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { diff --git a/target/tricore/gdbstub.c b/target/tricore/gdbstub.c index f9309c5e27..29a70051ff 100644 --- a/target/tricore/gdbstub.c +++ b/target/tricore/gdbstub.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "gdbstub/helpers.h" +#include "cpu.h" #define LCX_REGNUM 32 From patchwork Thu Apr 18 19:25:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789847 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp736217wrm; Thu, 18 Apr 2024 12:31:44 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV7Trds4f2YN0JFzdkp9G+SSwBjM5tmlvywsrE1OjoXeI9GypDYe+v+vXJCsCLlUi1n2NkKkmyR4bDftPGmlqAz X-Google-Smtp-Source: AGHT+IFRHvlMb4rIzRNHa3Uj0Jsg8pnqo5p6MOE1hZXaKhPhImdNWfUZCPnrzlvZqfIrEeqhJa7T X-Received: by 2002:a05:6102:d87:b0:47b:ba18:a591 with SMTP id d7-20020a0561020d8700b0047bba18a591mr3104782vst.23.1713468704455; Thu, 18 Apr 2024 12:31:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468704; cv=none; d=google.com; s=arc-20160816; b=fwDBHmw1451sMrpsoNGpKG9TRJwSNea8RQwUd3/foB1hCqiqd1qLUwIOmbOhxE7wyK 1o7gThZy65JP65F88yQY463Pz3G5jmCs9jsyjAgixw1GG2+AO+gcypIrjA6PENtBMy/2 L/FWPZIskJ6zaZEWOnhFHAauev/Fr4s4tMiLf4hpxEi7DCoQvCb7m2O7SGQEANJ8P68z EPphw5RFiC5lKB4FtL2iHOZBFyqzro7OlT7rvp94bI5iznK85BejHy5dD4GyqNah6E5Y H8XEvR9O26twmqCTzJT+D0U7CKPIVXNJYLE6/9GoNXA6USP71evG9jUnXaZPRUlIObUJ dj9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=o0/TLkq+0Cek1YtUvPVSPSPpKhvNS+eTx919tWRRKxo=; fh=jJ96xODqnM8zbyjiVNDLhsiv78uQw19fLOINA9SNLgc=; b=I6HYm+Y7QTWrM6JAL8j36R2T31JKTw04Fblr7b00Df3e9r4qfktdKqFiX248ze5IG7 IkmE2+hY9SkfW9ZWmS+wUa8Yb1JKVa+nKjYmvfQCYO/MpQfmLe6wXyHuh8vgHcKlCgaS jXuEwKf4ior9Y7WGKStzCBTNUABx0s2lHoPT/f9JIsI5h64pXoKBFJJFhcN5JWrvb2/a V989jqiv1x3wVCQkMATW7Fm9u47zOC6iO9e6O1YkoIDzYK1nn5XY3GmBSsLKOQt2ERxA qkbxSLMy2a38YL5Mcgm7Q3lN1lZm5EESk16HL562eoDx3mGooWx2JtEHvhddo1P/YNPc fYww==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="c/IqhHd5"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson --- hw/xtensa/bootparam.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/xtensa/bootparam.h b/hw/xtensa/bootparam.h index ade7891ec5..f57ff850bc 100644 --- a/hw/xtensa/bootparam.h +++ b/hw/xtensa/bootparam.h @@ -1,6 +1,8 @@ #ifndef HW_XTENSA_BOOTPARAM_H #define HW_XTENSA_BOOTPARAM_H +#include "exec/cpu-common.h" + #define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated string)*/ #define BP_TAG_INITRD 0x1002 /* ramdisk addr and size (bp_meminfo) */ #define BP_TAG_MEMORY 0x1003 /* memory addr and size (bp_meminfo) */ From patchwork Thu Apr 18 19:25:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789846 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp736056wrm; Thu, 18 Apr 2024 12:31:27 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUBobr9jU/0lwZtTKHhOpEve7mP7pen9tw65H6wUCkkXUpq0iTZw/xmvFlw2PRLYwq0tBEtu8OwbwcewZ2/ZgQ+ X-Google-Smtp-Source: AGHT+IGzm8zq/dRM0okMyTp4hoq6kTHUMHEqlKtudJOK1+aY1deiKUSZcZ+ApV3GA8Zd5EUF/h+X X-Received: by 2002:a67:f90a:0:b0:47b:bba6:2c8f with SMTP id t10-20020a67f90a000000b0047bbba62c8fmr3051038vsq.20.1713468686843; Thu, 18 Apr 2024 12:31:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468686; cv=none; d=google.com; s=arc-20160816; b=Z0fnxRWwxnBhXFV0ZMJxphCDGYSzu3KO/ib4ma1AtOi0uRPyvuS8rIw380ErPui3aX LC5UMiX8WaqZNGe3ma3n6jiGKZoYf/C9LkumXC+1SDy5SpmoLYTubtzMmRlSSnInNBTl APu9czbvydtfi2L/W3R3yzquqTvDymyp/8lZZwkF9Dde/BvoEH+ZGegChG0Kt7ROgMrs jUZaa+nyw3661QOFBOFT84W7aRi5eMEJTPTwo7R2NJOnd0pVD/NxBRYkSwzhJomWfVS/ f6ti+Adk1zABGTgujE6YKBOL/p8dC6dD9GWjsZVsmfVFNapn08lyuXexMzmF61ps7tsr gmTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Hca3+XmwqR0YOlaHOdTYyVt5U6rBmejaVD76pmxE3UI=; fh=sjtlXEq9AKZX+M8uPT6LqNYn3M8GwZJ7Ax5I5xvYU1c=; b=pUQ43qbm5f6XPRnYn21BorIFVhxAS1iSLITSnkLTO9nCO4KnSA1Y5wDKqcgyPjuhQn mv//kIEt6fgtaJdsDsaToA0MAYfE92ZIG78L8j8ETNXDdCuoKE4USIG8nusvO+dKLeBL scNmGTagud83PuhNys9CcCN9ApPMD+zXgcwbGYNkDO+blJRGNrN1LmsdCra+7PxIY2g2 W1ZIDlW9oM/L4HE2QudBdDjIx7dJ23M8Vg1Jy/HThIV9j2WFJWCOsNpU0dS29fkslj1O uyEJuRfAhTUyKmXzuZR9tA8fVBb2bnWI55wIIw502i4T9hoqG8T+z3lGnLT/sqslPFEW +/lA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U+62dtAQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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In order to avoid including it, un-inline qemu_plugin_disable_mem_helpers(). Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/plugin.h | 6 +----- plugins/core.c | 5 +++++ 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 41db748eda..28467c4a28 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -15,7 +15,6 @@ #include "qemu/plugin-event.h" #include "qemu/bitmap.h" #include "exec/memopidx.h" -#include "hw/core/cpu.h" /* * Option parsing/processing. @@ -227,10 +226,7 @@ void qemu_plugin_atexit_cb(void); void qemu_plugin_add_dyn_cb_arr(GArray *arr); -static inline void qemu_plugin_disable_mem_helpers(CPUState *cpu) -{ - cpu->plugin_mem_cbs = NULL; -} +void qemu_plugin_disable_mem_helpers(CPUState *cpu); /** * qemu_plugin_user_exit(): clean-up callbacks before calling exit callbacks diff --git a/plugins/core.c b/plugins/core.c index 11ca20e626..b25092abb5 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -493,6 +493,11 @@ void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) } } +void qemu_plugin_disable_mem_helpers(CPUState *cpu) +{ + cpu->plugin_mem_cbs = NULL; +} + void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { From patchwork Thu Apr 18 19:25:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789850 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp736563wrm; Thu, 18 Apr 2024 12:32:42 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUyNJ+BGwYLkESZE+pKUWcdPqFR22Y4QA8VhvLqb/cPTwg1o5YKFCyYoUZUo3nT+F+xH5RsXA1Srh9cxijXgzFD X-Google-Smtp-Source: AGHT+IHq3QIDPsKLCAhXCv/wQI86Qada3SEEbAZG6YdEwIxD9ArvgUt+K/GGCAmcJenW77iVRbwB X-Received: by 2002:a05:620a:b8f:b0:78e:e9bb:c0ec with SMTP id k15-20020a05620a0b8f00b0078ee9bbc0ecmr95571qkh.42.1713468762268; Thu, 18 Apr 2024 12:32:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468762; cv=none; d=google.com; s=arc-20160816; b=EJ5L494tvS/ozk3627sRjr2zws4VXOoLuKhXwpmqUNSfBRYJOfiJqqb3Obh0vqPe2j opp5PrTddjJ/uyuOO8M9aGBk4EJ3PKmGJfvJ1Rf/1jFiMnx4dPHBWuhZSfWXvddwq/Vr rPEDOIVS55ZEI8KR1saWIWvLsUL4zhKIS9KYcrLZE3tbBMWT2DifpltD6ACqzecJf9vr zQ8QwUhko9JeRktmk3oZzmKaMj/ZdLUEq+LbQN4mYLuO5r3iqsHevxmEnWVnnorx5yGE Xwo6CYb+3VFvnK0xJi+MkbE+v8/pNYKFrpU0ATU/pcFTlirL/iaTmV5qmJRLjDu3VIwI OEmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZdGtqepmHp/hs0/Z1yrPy9JbSuxwne+2qc6kJd/9zb0=; fh=dMOmq/SFjQBWgxa3k/9pyEOQukVSiCKX/YLMWs+EoZU=; b=q6737bDCl2ewjmBuWce1SyQ9MK7qt4qYxjYKiDFDMoFTYmvHnhjaV0Y6SY0TgfznHh YMuufHwOEaIWDPkF4pIAq2EAswopRNZKNjLpQZI1wod2rhBG+SoMk8jrDBcIeIyWyxR6 5bX2yMXA1aMRFdBcDPvhAPn4u/hbGplgB5pyQyxOjP+02K5kXItLl2XLRcROx2y8I3WW +gETxSHddd6T1dj6fUOwqJQWUSAb5/vsMG5Fm7Do3XHpkzPiGJnm5BKJ6GbqVb+OnixW TjriN3HGOTNkCPGFNGASRQxnafDB60S8ztriupo6WrKbMNEXJAY9P+dRaF76bbnVrg2I hwIA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aYkuFhDx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , Yoshinori Sato , Magnus Damm , Max Filippov Subject: [PATCH 22/24] exec: Remove 'exec/tswap.h' from 'exec/cpu-all.h' Date: Thu, 18 Apr 2024 21:25:21 +0200 Message-ID: <20240418192525.97451-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240418192525.97451-1-philmd@linaro.org> References: <20240418192525.97451-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=philmd@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "exec/cpu-all.h" doesn't require "exec/tswap.h". Remove it, including it in the sources when required. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Harsh Prateek Bora --- hw/xtensa/bootparam.h | 1 + include/exec/cpu-all.h | 1 - accel/tcg/translator.c | 1 + hw/arm/boot.c | 1 + hw/arm/npcm7xx.c | 1 + hw/mips/fuloong2e.c | 1 + hw/mips/malta.c | 1 + hw/ppc/sam460ex.c | 1 + hw/ppc/spapr.c | 1 + hw/ppc/virtex_ml507.c | 1 + hw/sh4/r2d.c | 1 + target/arm/gdbstub.c | 1 + target/xtensa/xtensa-semi.c | 1 + 13 files changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/xtensa/bootparam.h b/hw/xtensa/bootparam.h index f57ff850bc..e1d47b503c 100644 --- a/hw/xtensa/bootparam.h +++ b/hw/xtensa/bootparam.h @@ -1,6 +1,7 @@ #ifndef HW_XTENSA_BOOTPARAM_H #define HW_XTENSA_BOOTPARAM_H +#include "exec/tswap.h" #include "exec/cpu-common.h" #define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated string)*/ diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 554b937ddb..cfbf51822c 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -21,7 +21,6 @@ #include "exec/cpu-common.h" #include "exec/memory.h" -#include "exec/tswap.h" #include "hw/core/cpu.h" /* some important defines: diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 6832e55135..85950377d9 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -12,6 +12,7 @@ #include "qemu/error-report.h" #include "exec/exec-all.h" #include "exec/translator.h" +#include "exec/tswap.h" #include "exec/cpu_ldst.h" #include "exec/plugin-gen.h" #include "tcg/tcg-op-common.h" diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 84ea6a807a..93945a1a15 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -22,6 +22,7 @@ #include "sysemu/reset.h" #include "hw/loader.h" #include "elf.h" +#include "exec/tswap.h" #include "sysemu/device_tree.h" #include "qemu/config-file.h" #include "qemu/option.h" diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index cc68b5d8f1..1ef303415b 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -27,6 +27,7 @@ #include "qemu/units.h" #include "sysemu/sysemu.h" #include "target/arm/cpu-qom.h" +#include "exec/tswap.h" /* * This covers the whole MMIO space. We'll use this to catch any MMIO accesses diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index a45aac368c..1d0613a76f 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -40,6 +40,7 @@ #include "sysemu/reset.h" #include "sysemu/sysemu.h" #include "qemu/error-report.h" +#include "exec/tswap.h" #define ENVP_PADDR 0x2000 #define ENVP_VADDR cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index af74008c82..3dca0f100c 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -56,6 +56,7 @@ #include "semihosting/semihost.h" #include "hw/mips/cps.h" #include "hw/qdev-clock.h" +#include "exec/tswap.h" #include "target/mips/internal.h" #include "trace.h" #include "cpu.h" diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index d42b677898..abc02f0817 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -24,6 +24,7 @@ #include "hw/loader.h" #include "elf.h" #include "exec/memory.h" +#include "exec/tswap.h" #include "ppc440.h" #include "hw/pci-host/ppc4xx.h" #include "hw/block/flash.h" diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index e9bc97fee0..b4b1f43983 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -74,6 +74,7 @@ #include "hw/virtio/virtio-scsi.h" #include "hw/virtio/vhost-scsi-common.h" +#include "exec/tswap.h" #include "exec/ram_addr.h" #include "hw/usb.h" #include "qemu/config-file.h" diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index d02f330650..fd23afebf5 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -38,6 +38,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/option.h" +#include "exec/tswap.h" #include "hw/intc/ppc-uic.h" #include "hw/ppc/ppc.h" diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index e5ac6751bd..5f4420f534 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -43,6 +43,7 @@ #include "hw/loader.h" #include "hw/usb.h" #include "hw/block/flash.h" +#include "exec/tswap.h" #define FLASH_BASE 0x00000000 #define FLASH_SIZE (16 * MiB) diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index a3bb73cfa7..f2b001afdd 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/gdbstub.h" +#include "exec/tswap.h" #include "gdbstub/helpers.h" #include "sysemu/tcg.h" #include "internals.h" diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c index fa21b7e11f..dbc42d1587 100644 --- a/target/xtensa/xtensa-semi.c +++ b/target/xtensa/xtensa-semi.c @@ -29,6 +29,7 @@ #include "cpu.h" #include "chardev/char-fe.h" #include "exec/helper-proto.h" +#include "exec/tswap.h" #include "semihosting/semihost.h" #include "qapi/error.h" #include "qemu/log.h" From patchwork Thu Apr 18 19:25:22 2024 Content-Type: text/plain; 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Remove it, including it in the sources when required. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/log.h | 1 - target/avr/translate.c | 1 + target/hexagon/translate.c | 1 + target/loongarch/tcg/translate.c | 1 + target/rx/translate.c | 1 + tcg/tcg.c | 1 + 6 files changed, 5 insertions(+), 1 deletion(-) diff --git a/include/exec/log.h b/include/exec/log.h index e0ff778a10..ee33981aab 100644 --- a/include/exec/log.h +++ b/include/exec/log.h @@ -4,7 +4,6 @@ #include "qemu/log.h" #include "qemu/log-for-trace.h" #include "hw/core/cpu.h" -#include "disas/disas.h" /* cpu_dump_state() logging functions: */ /** diff --git a/target/avr/translate.c b/target/avr/translate.c index 87e2bd5ef1..b2005f3cbe 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -29,6 +29,7 @@ #include "exec/helper-gen.h" #include "exec/log.h" #include "exec/translator.h" +#include "disas/disas.h" #define HELPER_H "helper.h" #include "exec/helper-info.c.inc" diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 47a870f42d..6bec38404e 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -25,6 +25,7 @@ #include "exec/translation-block.h" #include "exec/cpu_ldst.h" #include "exec/log.h" +#include "disas/disas.h" #include "internal.h" #include "attribs.h" #include "insn.h" diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/translate.c index 7567712655..ae87a68c69 100644 --- a/target/loongarch/tcg/translate.c +++ b/target/loongarch/tcg/translate.c @@ -14,6 +14,7 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" #include "exec/log.h" +#include "disas/disas.h" #include "qemu/qemu-print.h" #include "fpu/softfloat.h" #include "translate.h" diff --git a/target/rx/translate.c b/target/rx/translate.c index f6e9e0ec90..4259ad6d74 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -27,6 +27,7 @@ #include "exec/helper-gen.h" #include "exec/translator.h" #include "exec/log.h" +#include "disas/disas.h" #define HELPER_H "helper.h" #include "exec/helper-info.c.inc" diff --git a/tcg/tcg.c b/tcg/tcg.c index 6a32656cd4..e7e0ab6846 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -51,6 +51,7 @@ #endif #include "elf.h" +#include "disas/disas.h" #include "exec/log.h" #include "tcg/tcg-ldst.h" #include "tcg/tcg-temp-internal.h" From patchwork Thu Apr 18 19:25:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 789849 Delivered-To: patch@linaro.org Received: by 2002:adf:e6ca:0:b0:346:15ad:a2a with SMTP id y10csp736355wrm; Thu, 18 Apr 2024 12:32:07 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVBh95y+xCGZcBCgwOZqslABmtC+mEflIChfd1QCm7noflLiSYfCBU22fS91LhDSBb/dJ4GFT+W/mv8i3iy+9D7 X-Google-Smtp-Source: AGHT+IEn6DSJIImOUTojGr284t5X/yLrXXCXXrvhyubkUUB3RtX0I08DmADolvcgTmZpUM50o2og X-Received: by 2002:a05:620a:1903:b0:78d:5d7c:9896 with SMTP id bj3-20020a05620a190300b0078d5d7c9896mr5580629qkb.36.1713468727455; Thu, 18 Apr 2024 12:32:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1713468727; cv=none; d=google.com; s=arc-20160816; b=MHAl++Attjp4oEsrHdizy1V6YonVFwFiYM8Vn4VeVZ+4ac4l0Tib21AORJn+oTXLJq Ic+zr0r8tKp4moq0MicG10QbcwwLVH06fS2Sj7M2RtDdX+TnZjC4E1uE8bWeUx/zGXWv qoo0RXKngOW6gwiMsSc+fd7z0jdV8GPcH2lSn1ucLTdv53k32W6OsyZliLRskUaztryZ dNG00C26kvJ6dCJ/lQvx93K3TFkv2YnOS4qAJSUd65JJLTsQB1W9Fj2sxEcbaqPfuUve jDS3m6HqPCIgOkYOBlKVLmXhyjTlqiiM5mqWyXCf2oLFn9oBOlrN7kRe5eid75gAUvpl rZpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1RS5jD62Ba4lXsw4t8DJy1DGdcN7GiTei/ES6lsX54Q=; fh=Saq6WcXEHkZGDKV5MNEf/aKd3AchrMxT8ymIntLDDxA=; b=gzfC2OTsivG9TCqMrzGfakvbrtysNkQU6EZ1YOrvUCAd0j71swB59taKfh4voSUOmQ Y9oMB17wSNGQhgAjj2zHAqOPridLiQ5WQiHl53AIodt9vppHNZBry6LekVW7qFpFiiO+ Or5fW1BlZcMkx9tlRqzwmESEKuQ273VGHAklC/9cXgm6uxIjEP4KuXyXrjBWTkxSWy7m WFXvQ/3kZQtfulrv6MOWA1VaZslsEvZU9udHsQDh3MCv03ltleD6c0wBt/YwgGwZj3/G m6Q0Wp/s/zcgHQj7BHETC+xgw9RQRA8fpDla66ZJgul1BCFj2lukr3g6/n39MI+xNjE+ KDqg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QNPxqinr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 1 - include/exec/cpu-defs.h | 1 - include/hw/boards.h | 1 - include/hw/ppc/openpic.h | 1 - include/sysemu/hw_accel.h | 1 - 5 files changed, 5 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index cfbf51822c..03963442a0 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -21,7 +21,6 @@ #include "exec/cpu-common.h" #include "exec/memory.h" -#include "hw/core/cpu.h" /* some important defines: * diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 0dbef3010c..2b88db71a8 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -29,7 +29,6 @@ #include "exec/hwaddr.h" #endif #include "exec/memattrs.h" -#include "hw/core/cpu.h" #include "cpu-param.h" diff --git a/include/hw/boards.h b/include/hw/boards.h index 8b8f6d5c00..2daa23082f 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -9,7 +9,6 @@ #include "qapi/qapi-types-machine.h" #include "qemu/module.h" #include "qom/object.h" -#include "hw/core/cpu.h" #define TYPE_MACHINE_SUFFIX "-machine" diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h index 9c6af8e207..8fe3a5902f 100644 --- a/include/hw/ppc/openpic.h +++ b/include/hw/ppc/openpic.h @@ -2,7 +2,6 @@ #define OPENPIC_H #include "hw/sysbus.h" -#include "hw/core/cpu.h" #include "qom/object.h" #define MAX_CPU 32 diff --git a/include/sysemu/hw_accel.h b/include/sysemu/hw_accel.h index c71b77e71f..6aca3c6178 100644 --- a/include/sysemu/hw_accel.h +++ b/include/sysemu/hw_accel.h @@ -11,7 +11,6 @@ #ifndef QEMU_HW_ACCEL_H #define QEMU_HW_ACCEL_H -#include "hw/core/cpu.h" #include "sysemu/kvm.h" #include "sysemu/hvf.h" #include "sysemu/whpx.h"