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Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1101; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=4uJRDTqomRDGI6+FwBgmpcca266Nn8+WZpUZNQ2q9OE=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmEzSQIK6fMWhogvncnT3r0gvhh6Q4N2FAMxz/f hTNsKTo5DSJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZhM0kAAKCRCLPIo+Aiko 1b95B/9bDJ/aYI/5iyuzUbZIznl3vuhJ0MUupGmy6mU8PZtPz/bXXqReevRONuIzovVVqOamvof 40QgDbH/KKdYz2Nt/qdndxg3HmXowhS9jEKSVSFqXumDSawT4QREyKBdfI+qfHPt9WIBJf6+ufR H93JT6XKDss1PaSnOfWqkEwePjvtOU51PaQdrz87ZVp1hQXRafsal3IL2/AV99unhWscypS/z9L J050x4QKLw7j2+xE72112TOcgQisFTcyP5K6G+WFpsN6pTKlpy2iKqlvJFUUAy6W8MoQ5x30XAR F4vlI0Vrm9smGkYVo6e/pe06gdah04VW9HwyQ0s33Bw8+cax X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Follow the example of other platforms and specify core_clk frequencies in the frequency table in addition to the core_clk_src frequencies. The driver should be setting the leaf frequency instead of some interim clock freq. Suggested-by: Nitin Rawat Fixes: 57fc67ef0d35 ("arm64: dts: qcom: msm8996: Add ufs related nodes") Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 1601e46549e7..42ad4872f94d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2072,7 +2072,7 @@ ufshc: ufshc@624000 { <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; freq-table-hz = <100000000 200000000>, - <0 0>, + <100000000 200000000>, <0 0>, <0 0>, <0 0>, From patchwork Mon Apr 8 00:04:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 787637 Received: from mail-lj1-f170.google.com (mail-lj1-f170.google.com [209.85.208.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7898AD4C for ; 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Sun, 07 Apr 2024 17:04:35 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n9-20020a2e86c9000000b002d2191e20e1sm947077ljj.92.2024.04.07.17.04.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Apr 2024 17:04:34 -0700 (PDT) From: Dmitry Baryshkov Date: Mon, 08 Apr 2024 03:04:32 +0300 Subject: [PATCH v4 2/4] arm64: dts: qcom: msm8996: set GCC_UFS_ICE_CORE_CLK freq directly Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240408-msm8996-fix-ufs-v4-2-ee1a28bf8579@linaro.org> References: <20240408-msm8996-fix-ufs-v4-0-ee1a28bf8579@linaro.org> In-Reply-To: <20240408-msm8996-fix-ufs-v4-0-ee1a28bf8579@linaro.org> To: Manivannan Sadhasivam , Bjorn Andersson , Konrad Dybcio , "James E.J. Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=930; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=aRYQeL4Y8toOXnkm/Yr4Y1fKV2VEuxZ++Bc+tR+WFvg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmEzSQv043H5v3I8wskLuSYpY4T5Q0DSjfkySq3 7WWrh+dVVWJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZhM0kAAKCRCLPIo+Aiko 1efiCACtQV4p+1ZDOD2mn5pK/s4Nt7O9hVrFenLdII11PAOU2E18yOzudBiHJX66LFujZeKJeoC ux0UBI/gE0RNAD54vq2eaHI9sF0fIVZvLxxMJn1/RTOhUJXIyLx45fe3uf2l0eLFtGM3AYs5LRP yhaQ8UOWmJxYIRmqPLI9nYUwxqPSPSFjY+rwRgDfsZXcTQOjQBehmLa4Pfv1mS5sg7CmG/Pla/k avqtbJoIIktc6EMR6cb+cMARXHm1w1dCGBPEIkPWxbQKs+qEPRgy9A8s9MUo4nOtQT7YGIiLop9 iEA1wV+z10uSi7mZ5BYvE5M+sW1P881XmyIUQWW5rFYkRdIR X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Instead of setting the frequency of the interim UFS_ICE_CORE_CLK_SRC clock, set the frequency of the leaf GCC_UFS_ICE_CORE_CLK clock directly. Reviewed-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 42ad4872f94d..da7f599bd2a5 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2076,9 +2076,9 @@ ufshc: ufshc@624000 { <0 0>, <0 0>, <0 0>, - <150000000 300000000>, - <75000000 150000000>, <0 0>, + <75000000 150000000>, + <150000000 300000000>, <0 0>, <0 0>, <0 0>; From patchwork Mon Apr 8 00:04:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 787028 Received: from mail-lj1-f182.google.com (mail-lj1-f182.google.com [209.85.208.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C4616B65F for ; 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Sun, 07 Apr 2024 17:04:35 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n9-20020a2e86c9000000b002d2191e20e1sm947077ljj.92.2024.04.07.17.04.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Apr 2024 17:04:35 -0700 (PDT) From: Dmitry Baryshkov Date: Mon, 08 Apr 2024 03:04:33 +0300 Subject: [PATCH v4 3/4] dt-bindings: ufs: qcom,ufs: drop source clock entries Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240408-msm8996-fix-ufs-v4-3-ee1a28bf8579@linaro.org> References: <20240408-msm8996-fix-ufs-v4-0-ee1a28bf8579@linaro.org> In-Reply-To: <20240408-msm8996-fix-ufs-v4-0-ee1a28bf8579@linaro.org> To: Manivannan Sadhasivam , Bjorn Andersson , Konrad Dybcio , "James E.J. Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1735; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=ujbZGwCQVSFicv5U4QZnOYsJOvN6YgwCkXPaQJFXvlU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmEzSQH6Xu+f4sKTcOZgOBk88mBu3dwm8nIQgXZ KjzQz592N6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZhM0kAAKCRCLPIo+Aiko 1a/sCACqSzi0I0S/2zfYNr8MFZkwVzw/aGSqUhxhzw7U886308UpRqwsu9EfwToW4SfHKp5MG2I zqxOnQk+bqi+clAXD7z1ngxa+ZcfhSrWlReV2kAFwuvALByRm2NOAHxwyUs3JrWP/m783/ApoEE qYqcDdKq8qmroZMprGvpCL/DBUawWljMq9Lo/HxIVdd+BBJkKnQS+4LT1aafFaKPkDS6gQSH70Q 3d0IuPMf3+G+oUBTSnFbM8bxQOW3x/D1B9eJlUlsl90PybL2roZ6jtQoZaPSBR9R9DmOmjVpSJs gBAFx/2JEOJdyF7pjJG3jvwPpy1I+IOE7BP2SxOH/Uce/5/W X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is no need to mention and/or to touch in any way the intermediate (source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow the example lead by all other platforms. Reviewed-by: Krzysztof Kozlowski Acked-by: Manivannan Sadhasivam Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index cd3680dc002f..25a5edeea164 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -46,11 +46,11 @@ properties: clocks: minItems: 7 - maxItems: 11 + maxItems: 9 clock-names: minItems: 7 - maxItems: 11 + maxItems: 9 dma-coherent: true @@ -217,16 +217,14 @@ allOf: then: properties: clocks: - minItems: 11 - maxItems: 11 + minItems: 9 + maxItems: 9 clock-names: items: - - const: core_clk_src - const: core_clk - const: bus_clk - const: bus_aggr_clk - const: iface_clk - - const: core_clk_unipro_src - const: core_clk_unipro - const: core_clk_ice - const: ref_clk @@ -287,7 +285,7 @@ allOf: maxItems: 2 clocks: minItems: 7 - maxItems: 11 + maxItems: 9 unevaluatedProperties: false From patchwork Mon Apr 8 00:04:34 2024 Content-Type: text/plain; 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Sun, 07 Apr 2024 17:04:36 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n9-20020a2e86c9000000b002d2191e20e1sm947077ljj.92.2024.04.07.17.04.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Apr 2024 17:04:36 -0700 (PDT) From: Dmitry Baryshkov Date: Mon, 08 Apr 2024 03:04:34 +0300 Subject: [PATCH v4 4/4] arm64: dts: qcom: msm8996: drop source clock entries from the UFS node Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240408-msm8996-fix-ufs-v4-4-ee1a28bf8579@linaro.org> References: <20240408-msm8996-fix-ufs-v4-0-ee1a28bf8579@linaro.org> In-Reply-To: <20240408-msm8996-fix-ufs-v4-0-ee1a28bf8579@linaro.org> To: Manivannan Sadhasivam , Bjorn Andersson , Konrad Dybcio , "James E.J. Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1595; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=nAYKKMjqM3Kb8RFCha5OI1S6EWj+PTGtIqzAtlEkxmQ=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ5qwyYTVklLe1943zd6sOMNEMdP4517zT+lm7tall/p/c nx5KqfayWjMwsDIxSArpsjiU9AyNWZTctiHHVPrYQaxMoFMYeDiFICJOP9j/6clU7YoVvTI7sIw tT3VKpG/M+NVbm5sE7p+cQ/3NJulTcKGy5pmhn8RDbgo/rrTcXvjjbokFuWennMTF3xsXpah2L9 VZ1HwlZI09mM3WY8F/aiIn7OjMuMJyxFRr+rzdQWMD+MesmZ5HePy9y9njNkxmeW9nvWXRRd9mw 5ul1or1Wwcwnf6G9/eRN0wJvY105/qOC5r3MiRly8dte9oWYVD5PM/hfuezj1360tAoGhvh+kBk /d73k6vOj21fl1ke0/G5ofWvIa7bTpn+rRfjo39q3ujVdLp2IPORi/9J8J3GpMYmOw6iuy/PhSK y9srcmWj1z854TxpcXeHyjYfgS5LJ4GVrw2N8t5vtngDAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is no need to mention and/or to touch in any way the intermediate (source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow the example lead by all other platforms. Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index da7f599bd2a5..708f797f1b44 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2047,24 +2047,20 @@ ufshc: ufshc@624000 { power-domains = <&gcc UFS_GDSC>; clock-names = - "core_clk_src", "core_clk", "bus_clk", "bus_aggr_clk", "iface_clk", - "core_clk_unipro_src", "core_clk_unipro", "core_clk_ice", "ref_clk", "tx_lane0_sync_clk", "rx_lane0_sync_clk"; clocks = - <&gcc UFS_AXI_CLK_SRC>, <&gcc GCC_UFS_AXI_CLK>, <&gcc GCC_SYS_NOC_UFS_AXI_CLK>, <&gcc GCC_AGGRE2_UFS_AXI_CLK>, <&gcc GCC_UFS_AHB_CLK>, - <&gcc UFS_ICE_CORE_CLK_SRC>, <&gcc GCC_UFS_UNIPRO_CORE_CLK>, <&gcc GCC_UFS_ICE_CORE_CLK>, <&rpmcc RPM_SMD_LN_BB_CLK>, @@ -2072,8 +2068,6 @@ ufshc: ufshc@624000 { <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; freq-table-hz = <100000000 200000000>, - <100000000 200000000>, - <0 0>, <0 0>, <0 0>, <0 0>,