From patchwork Thu Apr 4 19:03:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pierre-Louis Bossart X-Patchwork-Id: 785863 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A6A0CD1292 for ; Thu, 4 Apr 2024 19:05:28 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 6B0692CF0; Thu, 4 Apr 2024 21:05:16 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 6B0692CF0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1712257526; bh=gvWvwJz1TMcsZ+arLk6e5VFQm8nhkbazC2Uqjo8O/ic=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=T2yuum1DXqI79JWpS9ehzzKI3cHU97YGLQVwQBBUL/baHOHH2NKCdE0EsxMhK6l1G hr2KI9Gb8MtrwFV1ztJAe9kdz+fIp71ZP6ljJ4sCV5SEXssfC76bAFWYy86zHjMgt5 GSXsGeN0TyoVY5hkU6hdWeqtxP8U8q1TNUIxRsSo= Received: by alsa1.perex.cz (Postfix, from userid 50401) id 34A61F80606; Thu, 4 Apr 2024 21:04:26 +0200 (CEST) Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id D46C4F805FA; Thu, 4 Apr 2024 21:04:25 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 1FCAFF8020D; Thu, 4 Apr 2024 21:04:18 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id D7AFEF80114 for ; Thu, 4 Apr 2024 21:04:06 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz D7AFEF80114 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=ED/w7CNJ DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712257449; x=1743793449; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gvWvwJz1TMcsZ+arLk6e5VFQm8nhkbazC2Uqjo8O/ic=; b=ED/w7CNJu12U1EbZoDn4E8qy8oVJc9h+WrJwdQQcUQg75iRUv2v5WKOa uww+ao1qxzU3oiWutpP5qfQU92a/J9x8i/n0z8PJDzcNMB9iEBgkSY90h HEGl3WYOWbl0wLufWnz6JTaUrFVWd3/3+aPbIfB5Jax2yoJ1eYtotv9Kf fl/T5VEjtb35G/q7J9oQe8uUHqlhubkmJEpkWmIgsKbiE+BVFlnwtmy5E E+6HV3iimjWm5mK3KMXKkKjVwqbg3qd8TG4/UQl97IMvm39qQBp2ink8Y uv70KiiWe6raH+8QQBOOc/SaG7nV8aqxkBvvTpYjSRn2YEHRiBdZus3NH w==; X-CSE-ConnectionGUID: wudPjVd4SqqLfU1gcJ5Xfg== X-CSE-MsgGUID: NOPpGBgXQ4ydRW+kQP79iA== X-IronPort-AV: E=McAfee;i="6600,9927,11034"; a="7433861" X-IronPort-AV: E=Sophos;i="6.07,179,1708416000"; d="scan'208";a="7433861" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 12:04:04 -0700 X-CSE-ConnectionGUID: KHTE80dDQGaUdnzi4OBsNA== X-CSE-MsgGUID: xF8Og7J8Sc63xgcAh590cw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,179,1708416000"; d="scan'208";a="19492306" Received: from sparrish-mobl1.amr.corp.intel.com (HELO pbossart-mobl6.intel.com) ([10.212.119.106]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 12:04:04 -0700 From: Pierre-Louis Bossart To: linux-sound@vger.kernel.org Cc: alsa-devel@alsa-project.org, tiwai@suse.de, broonie@kernel.org, Pierre-Louis Bossart , =?utf-8?q?P?= =?utf-8?q?=C3=A9ter_Ujfalusi?= , Bard Liao Subject: [PATCH 1/4] ASoC: SOF: Intel: hda-ctrl: add missing WAKE_STS clear Date: Thu, 4 Apr 2024 14:03:54 -0500 Message-Id: <20240404190357.138073-2-pierre-louis.bossart@linux.intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240404190357.138073-1-pierre-louis.bossart@linux.intel.com> References: <20240404190357.138073-1-pierre-louis.bossart@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: DLEEMKKUZJSKLJDISRAQFBNKRS5DLMYK X-Message-ID-Hash: DLEEMKKUZJSKLJDISRAQFBNKRS5DLMYK X-MailFrom: pierre-louis.bossart@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: For some reason, the programming sequences in the SOF driver do not include a clear of the WAKE_STS bits before resetting the controller. This clear is not formally required by the HDaudio specification, but was added to harden the snd-hda-reset back in 2007. Adding this sequence back avoids an issue reported by the Intel CI. Closes: https://github.com/thesofproject/linux/issues/4889 Reviewed-by: Péter Ujfalusi Reviewed-by: Bard Liao Signed-off-by: Pierre-Louis Bossart --- sound/soc/sof/intel/hda-ctrl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/sof/intel/hda-ctrl.c b/sound/soc/sof/intel/hda-ctrl.c index 84bf01bd360a..b4f0756e21f6 100644 --- a/sound/soc/sof/intel/hda-ctrl.c +++ b/sound/soc/sof/intel/hda-ctrl.c @@ -184,6 +184,7 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev) struct hdac_bus *bus = sof_to_bus(sdev); struct hdac_stream *stream; int sd_offset, ret = 0; + u32 gctl; if (bus->chip_init) return 0; @@ -192,6 +193,12 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev) hda_dsp_ctrl_misc_clock_gating(sdev, false); + /* clear WAKE_STS if not in reset */ + gctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL); + if (gctl & SOF_HDA_GCTL_RESET) + snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, + SOF_HDA_WAKESTS, SOF_HDA_WAKESTS_INT_MASK); + /* reset HDA controller */ ret = hda_dsp_ctrl_link_reset(sdev, true); if (ret < 0) { From patchwork Thu Apr 4 18:54:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pierre-Louis Bossart X-Patchwork-Id: 785866 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF142CD1284 for ; Thu, 4 Apr 2024 18:55:55 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id BC5212CD3; Thu, 4 Apr 2024 20:55:43 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz BC5212CD3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1712256953; bh=7Vqpp8s8GADSIu4ctRnp2HLxEpXCDfxMtr3oyM65+Ew=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=SZrjJsuDXlvbqG3peNyiFDQjCAHcswnTHtWaPLJPdFs61H57mtRYXxQG/+c1+OLE9 0LoELkI9Oc8zaLukL41to1Fd1UWOYvIRYVz+CMSNfbdib67pKWtaYKR5wzUjpKorAt 7I80q3qV6k1NM8/gqHdqCeXy9Isupvp2uFaPqlr8= Received: by alsa1.perex.cz (Postfix, from userid 50401) id 4257CF8057A; Thu, 4 Apr 2024 20:55:17 +0200 (CEST) Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id A9364F805D4; Thu, 4 Apr 2024 20:55:16 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 46C50F805B3; Thu, 4 Apr 2024 20:55:10 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 014E7F8016E for ; Thu, 4 Apr 2024 20:55:01 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 014E7F8016E Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=EonWesa8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712256903; x=1743792903; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7Vqpp8s8GADSIu4ctRnp2HLxEpXCDfxMtr3oyM65+Ew=; b=EonWesa8mG5QUap7JwUf3JbI2DVwH9COvZhIc5TlXJdPKaFv9RIM2rkg vknX09kEwxLz4UTVgsNYbSJlN4ckyrM3ChOASQE+3SbAroE7hffQZVfPg LinWdykpKQMseAZakFrLYKeVRa0fj3ryuYbCzyTMV8yfMYY5XSDiiQviu ZXwVswyQJ0w74l+tK+BDVYRic/QDO6bYy6Zg7aycWYHcbs89Etv9MUUEf f/m6ZgE0NZIIXOUZwD1QSNz6BF2YsC1+TfgFq9nu0Czhn7xw+wvR5MVF0 GDq4PXdf0oGnl4cZpxirD89MBSA1IzfVqp6uccKPaySwVhG5GieIs/3fw A==; X-CSE-ConnectionGUID: ajJoHQcZRp2QWYGnQaCuzQ== X-CSE-MsgGUID: torOyVzfRWGQRXa/uASF0g== X-IronPort-AV: E=McAfee;i="6600,9927,11034"; a="7432801" X-IronPort-AV: E=Sophos;i="6.07,179,1708416000"; d="scan'208";a="7432801" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 11:54:59 -0700 X-CSE-ConnectionGUID: hIGp+16oRMSN+lFmvC04lA== X-CSE-MsgGUID: Os4jl9RSSO6zchGDjqKePQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,179,1708416000"; d="scan'208";a="23574626" Received: from sparrish-mobl1.amr.corp.intel.com (HELO pbossart-mobl6.intel.com) ([10.212.119.106]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 11:54:58 -0700 From: Pierre-Louis Bossart To: linux-sound@vger.kernel.org Cc: alsa-devel@alsa-project.org, tiwai@suse.de, broonie@kernel.org, Pierre-Louis Bossart , =?utf-8?q?P?= =?utf-8?q?=C3=A9ter_Ujfalusi?= , Rander Wang , Ranjani Sridharan Subject: [PATCH 2/4] ASoC: SOF: Intel: hda-loader: change signature of code loader helpers Date: Thu, 4 Apr 2024 13:54:46 -0500 Message-Id: <20240404185448.136157-3-pierre-louis.bossart@linux.intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240404185448.136157-1-pierre-louis.bossart@linux.intel.com> References: <20240404185448.136157-1-pierre-louis.bossart@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: HGWXTAKK2DNSCAXM443RBSTUXWYE5M4X X-Message-ID-Hash: HGWXTAKK2DNSCAXM443RBSTUXWYE5M4X X-MailFrom: pierre-louis.bossart@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: We need to reuse cl_prepare, cl_trigger and cl_cleanup helpers from a SoundWire context where only the device information is available. Rather than pass the 'sdev' argument, use get_drvdata() to retrieve the required structure. For consistency, rename hda_cl_stream_prepare() as hda_cl_prepare(). These three helpers are also exported so that they can be referenced from another module. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Péter Ujfalusi Reviewed-by: Rander Wang Reviewed-by: Ranjani Sridharan --- sound/soc/sof/intel/hda-loader.c | 50 +++++++++++++++++--------------- sound/soc/sof/intel/hda.h | 11 ++++--- 2 files changed, 34 insertions(+), 27 deletions(-) diff --git a/sound/soc/sof/intel/hda-loader.c b/sound/soc/sof/intel/hda-loader.c index dafb6b3ebb20..5716772a7a91 100644 --- a/sound/soc/sof/intel/hda-loader.c +++ b/sound/soc/sof/intel/hda-loader.c @@ -44,13 +44,13 @@ static void hda_ssp_set_cbp_cfp(struct snd_sof_dev *sdev) } } -struct hdac_ext_stream *hda_cl_stream_prepare(struct snd_sof_dev *sdev, unsigned int format, - unsigned int size, struct snd_dma_buffer *dmab, - int direction, bool is_iccmax) +struct hdac_ext_stream *hda_cl_prepare(struct device *dev, unsigned int format, + unsigned int size, struct snd_dma_buffer *dmab, + int direction, bool is_iccmax) { + struct snd_sof_dev *sdev = dev_get_drvdata(dev); struct hdac_ext_stream *hext_stream; struct hdac_stream *hstream; - struct pci_dev *pci = to_pci_dev(sdev->dev); int ret; hext_stream = hda_dsp_stream_get(sdev, direction, 0); @@ -63,7 +63,7 @@ struct hdac_ext_stream *hda_cl_stream_prepare(struct snd_sof_dev *sdev, unsigned hstream->substream = NULL; /* allocate DMA buffer */ - ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV_SG, &pci->dev, size, dmab); + ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV_SG, dev, size, dmab); if (ret < 0) { dev_err(sdev->dev, "error: memory alloc failed: %d\n", ret); goto out_put; @@ -96,6 +96,7 @@ struct hdac_ext_stream *hda_cl_stream_prepare(struct snd_sof_dev *sdev, unsigned hda_dsp_stream_put(sdev, direction, hstream->stream_tag); return ERR_PTR(ret); } +EXPORT_SYMBOL_NS(hda_cl_prepare, SND_SOC_SOF_INTEL_HDA_COMMON); /* * first boot sequence has some extra steps. @@ -220,9 +221,9 @@ int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, bool imr_boot) return ret; } -static int cl_trigger(struct snd_sof_dev *sdev, - struct hdac_ext_stream *hext_stream, int cmd) +int hda_cl_trigger(struct device *dev, struct hdac_ext_stream *hext_stream, int cmd) { + struct snd_sof_dev *sdev = dev_get_drvdata(dev); struct hdac_stream *hstream = &hext_stream->hstream; int sd_offset = SOF_STREAM_SD_OFFSET(hstream); @@ -246,10 +247,12 @@ static int cl_trigger(struct snd_sof_dev *sdev, return hda_dsp_stream_trigger(sdev, hext_stream, cmd); } } +EXPORT_SYMBOL_NS(hda_cl_trigger, SND_SOC_SOF_INTEL_HDA_COMMON); -int hda_cl_cleanup(struct snd_sof_dev *sdev, struct snd_dma_buffer *dmab, +int hda_cl_cleanup(struct device *dev, struct snd_dma_buffer *dmab, struct hdac_ext_stream *hext_stream) { + struct snd_sof_dev *sdev = dev_get_drvdata(dev); struct hdac_stream *hstream = &hext_stream->hstream; int sd_offset = SOF_STREAM_SD_OFFSET(hstream); int ret = 0; @@ -278,6 +281,7 @@ int hda_cl_cleanup(struct snd_sof_dev *sdev, struct snd_dma_buffer *dmab, return ret; } +EXPORT_SYMBOL_NS(hda_cl_cleanup, SND_SOC_SOF_INTEL_HDA_COMMON); int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream) { @@ -286,7 +290,7 @@ int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream unsigned int reg; int ret, status; - ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_START); + ret = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_START); if (ret < 0) { dev_err(sdev->dev, "error: DMA trigger start failed\n"); return ret; @@ -309,7 +313,7 @@ int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream __func__, chip->rom_status_reg); } - ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_STOP); + ret = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_STOP); if (ret < 0) { dev_err(sdev->dev, "error: DMA trigger stop failed\n"); if (!status) @@ -334,8 +338,8 @@ int hda_dsp_cl_boot_firmware_iccmax(struct snd_sof_dev *sdev) * Prepare capture stream for ICCMAX. We do not need to store * the data, so use a buffer of PAGE_SIZE for receiving. */ - iccmax_stream = hda_cl_stream_prepare(sdev, HDA_CL_STREAM_FORMAT, PAGE_SIZE, - &dmab_bdl, SNDRV_PCM_STREAM_CAPTURE, true); + iccmax_stream = hda_cl_prepare(sdev->dev, HDA_CL_STREAM_FORMAT, PAGE_SIZE, + &dmab_bdl, SNDRV_PCM_STREAM_CAPTURE, true); if (IS_ERR(iccmax_stream)) { dev_err(sdev->dev, "error: dma prepare for ICCMAX stream failed\n"); return PTR_ERR(iccmax_stream); @@ -347,7 +351,7 @@ int hda_dsp_cl_boot_firmware_iccmax(struct snd_sof_dev *sdev) * Perform iccmax stream cleanup. This should be done even if firmware loading fails. * If the cleanup also fails, we return the initial error */ - ret1 = hda_cl_cleanup(sdev, &dmab_bdl, iccmax_stream); + ret1 = hda_cl_cleanup(sdev->dev, &dmab_bdl, iccmax_stream); if (ret1 < 0) { dev_err(sdev->dev, "error: ICCMAX stream cleanup failed\n"); @@ -419,9 +423,9 @@ int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev) init_waitqueue_head(&sdev->boot_wait); /* prepare DMA for code loader stream */ - hext_stream = hda_cl_stream_prepare(sdev, HDA_CL_STREAM_FORMAT, - stripped_firmware.size, - &dmab, SNDRV_PCM_STREAM_PLAYBACK, false); + hext_stream = hda_cl_prepare(sdev->dev, HDA_CL_STREAM_FORMAT, + stripped_firmware.size, + &dmab, SNDRV_PCM_STREAM_PLAYBACK, false); if (IS_ERR(hext_stream)) { dev_err(sdev->dev, "error: dma prepare for fw loading failed\n"); return PTR_ERR(hext_stream); @@ -494,7 +498,7 @@ int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev) * This should be done even if firmware loading fails. * If the cleanup also fails, we return the initial error */ - ret1 = hda_cl_cleanup(sdev, &dmab, hext_stream); + ret1 = hda_cl_cleanup(sdev->dev, &dmab, hext_stream); if (ret1 < 0) { dev_err(sdev->dev, "error: Code loader DSP cleanup failed\n"); @@ -536,9 +540,9 @@ int hda_dsp_ipc4_load_library(struct snd_sof_dev *sdev, stripped_firmware.size = fw_lib->sof_fw.fw->size - fw_lib->sof_fw.payload_offset; /* prepare DMA for code loader stream */ - hext_stream = hda_cl_stream_prepare(sdev, HDA_CL_STREAM_FORMAT, - stripped_firmware.size, - &dmab, SNDRV_PCM_STREAM_PLAYBACK, false); + hext_stream = hda_cl_prepare(sdev->dev, HDA_CL_STREAM_FORMAT, + stripped_firmware.size, + &dmab, SNDRV_PCM_STREAM_PLAYBACK, false); if (IS_ERR(hext_stream)) { dev_err(sdev->dev, "%s: DMA prepare failed\n", __func__); return PTR_ERR(hext_stream); @@ -581,7 +585,7 @@ int hda_dsp_ipc4_load_library(struct snd_sof_dev *sdev, goto cleanup; } - ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_START); + ret = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_START); if (ret < 0) { dev_err(sdev->dev, "%s: DMA trigger start failed\n", __func__); goto cleanup; @@ -598,7 +602,7 @@ int hda_dsp_ipc4_load_library(struct snd_sof_dev *sdev, ret = sof_ipc_tx_message_no_reply(sdev->ipc, &msg, 0); /* Stop the DMA channel */ - ret1 = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_STOP); + ret1 = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_STOP); if (ret1 < 0) { dev_err(sdev->dev, "%s: DMA trigger stop failed\n", __func__); if (!ret) @@ -607,7 +611,7 @@ int hda_dsp_ipc4_load_library(struct snd_sof_dev *sdev, cleanup: /* clean up even in case of error and return the first error */ - ret1 = hda_cl_cleanup(sdev, &dmab, hext_stream); + ret1 = hda_cl_cleanup(sdev->dev, &dmab, hext_stream); if (ret1 < 0) { dev_err(sdev->dev, "%s: Code loader DSP cleanup failed\n", __func__); diff --git a/sound/soc/sof/intel/hda.h b/sound/soc/sof/intel/hda.h index 30a185d4c7ab..b4b037758fcb 100644 --- a/sound/soc/sof/intel/hda.h +++ b/sound/soc/sof/intel/hda.h @@ -703,10 +703,13 @@ void hda_dsp_get_state(struct snd_sof_dev *sdev, const char *level); int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev); int hda_dsp_cl_boot_firmware_iccmax(struct snd_sof_dev *sdev); int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream); -struct hdac_ext_stream *hda_cl_stream_prepare(struct snd_sof_dev *sdev, unsigned int format, - unsigned int size, struct snd_dma_buffer *dmab, - int direction, bool is_iccmax); -int hda_cl_cleanup(struct snd_sof_dev *sdev, struct snd_dma_buffer *dmab, + +struct hdac_ext_stream *hda_cl_prepare(struct device *dev, unsigned int format, + unsigned int size, struct snd_dma_buffer *dmab, + int direction, bool is_iccmax); +int hda_cl_trigger(struct device *dev, struct hdac_ext_stream *hext_stream, int cmd); + +int hda_cl_cleanup(struct device *dev, struct snd_dma_buffer *dmab, struct hdac_ext_stream *hext_stream); int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, bool imr_boot); #define HDA_CL_STREAM_FORMAT 0x40 From patchwork Thu Apr 4 18:54:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pierre-Louis Bossart X-Patchwork-Id: 785865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91EAFCD1292 for ; Thu, 4 Apr 2024 18:56:36 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id B798F2CE4; Thu, 4 Apr 2024 20:56:24 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz B798F2CE4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1712256994; bh=ODRtjg2y6+4Go9UEHITSwLfxaSY3Ha8ohpfyvqr1CdY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=uSuR+ZjT6p2a7LZ651VSFDmNpDH/i08q3ob9NaW4cIa0KWutBFAY+E0HDwaEmI/jU Ih69CgklEuXKFNdDSFCJdN8bFdgXcA5TNxWKRkC+8pU2eska6no98Q6aWjeFiN8WNm GqVup6A+vMV502wbEkFx9WvOVRIAAW5AtB5kkW5w= Received: by alsa1.perex.cz (Postfix, from userid 50401) id 2D830F8061A; Thu, 4 Apr 2024 20:55:22 +0200 (CEST) Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 420DDF8061E; Thu, 4 Apr 2024 20:55:22 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id A2F8DF805C0; Thu, 4 Apr 2024 20:55:16 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 0DB7CF80114 for ; Thu, 4 Apr 2024 20:55:02 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 0DB7CF80114 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=EHP1LFE/ DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712256904; x=1743792904; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ODRtjg2y6+4Go9UEHITSwLfxaSY3Ha8ohpfyvqr1CdY=; b=EHP1LFE/7F/AGXSMKUUuwtlntOvEsp9VFg3OxYAMMC84GGvxU8CaQzcO 0Zquyo4tr0mP7inNaX/LC9IuG++RYyZUX3Ghdl30GoVMcbFq3ejZLmHxy kQcXhFniWAykM3Ae3rFVqgtR4FquaC1PG4j2UlpAJBVhCGh2M9DHOPmbF gdEBOB8T44HYgwisc9f7S2dcpyJYvwDVTqZGEG7mG8BiGlM13F1p+6Dmn AjKl9F3JtD6w+48zIb79l3usxn1PtpYrboW+dRqV2XATMD3mhUIhYaPHI XleERyrZwN3sHcr6wvQt2hYc+/nlYUdotqu9rgooyRVLnEWhx3SvEs/AB Q==; X-CSE-ConnectionGUID: vmbV80zBTGWl1JQpR4SVRA== X-CSE-MsgGUID: OPNW45YNQ8ieqtgPySt5Xg== X-IronPort-AV: E=McAfee;i="6600,9927,11034"; a="7432805" X-IronPort-AV: E=Sophos;i="6.07,179,1708416000"; d="scan'208";a="7432805" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 11:55:00 -0700 X-CSE-ConnectionGUID: T0pV+aVoReqQchE8EOsKWw== X-CSE-MsgGUID: Rq8RaG1MQ6uCiqZi61F+kQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,179,1708416000"; d="scan'208";a="23574630" Received: from sparrish-mobl1.amr.corp.intel.com (HELO pbossart-mobl6.intel.com) ([10.212.119.106]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 11:54:59 -0700 From: Pierre-Louis Bossart To: linux-sound@vger.kernel.org Cc: alsa-devel@alsa-project.org, tiwai@suse.de, broonie@kernel.org, Pierre-Louis Bossart , =?utf-8?q?P?= =?utf-8?q?=C3=A9ter_Ujfalusi?= , Rander Wang , Ranjani Sridharan Subject: [PATCH 3/4] ASoC: SOF: Intel: don't ignore IOC interrupts for non-audio transfers Date: Thu, 4 Apr 2024 13:54:47 -0500 Message-Id: <20240404185448.136157-4-pierre-louis.bossart@linux.intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240404185448.136157-1-pierre-louis.bossart@linux.intel.com> References: <20240404185448.136157-1-pierre-louis.bossart@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: GX5TMRCGESIPSM646EML373W4J7TGNQL X-Message-ID-Hash: GX5TMRCGESIPSM646EML373W4J7TGNQL X-MailFrom: pierre-louis.bossart@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: The HDaudio stream interrupts are ignored unless the stream is PCM or compressed audio. For alternate non-audio usages, such as code loader or SoundWire BPT case, the IOC interrupt on the last buffer transferred is silently ignored. This patch adds a 'struct completion' for each HDaudio stream. This capability helps detect if the non-audio data transfers completed. There is no performance impact for audio streams. In the code loader case, the code currently starts the DMA and directly checks if the firmware status changes, without checking if the DMA succeeded. With a first pass waiting for the DMA to complete, system validation engineers can gather more precise timing information on firmware boot time or root-cause boot failures more accurately. A timeout of 500ms was selected for the code loader DMA. This is an experimental value which should be more than enough - higher values would certainly be problematic from a usage/latency perspective. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Péter Ujfalusi Reviewed-by: Rander Wang Reviewed-by: Ranjani Sridharan --- sound/soc/sof/intel/hda-loader.c | 28 ++++++++++++++++++++++++++++ sound/soc/sof/intel/hda-stream.c | 22 +++++++++++++++++++--- sound/soc/sof/intel/hda.h | 2 ++ 3 files changed, 49 insertions(+), 3 deletions(-) diff --git a/sound/soc/sof/intel/hda-loader.c b/sound/soc/sof/intel/hda-loader.c index 5716772a7a91..dc88b7ea599e 100644 --- a/sound/soc/sof/intel/hda-loader.c +++ b/sound/soc/sof/intel/hda-loader.c @@ -226,10 +226,15 @@ int hda_cl_trigger(struct device *dev, struct hdac_ext_stream *hext_stream, int struct snd_sof_dev *sdev = dev_get_drvdata(dev); struct hdac_stream *hstream = &hext_stream->hstream; int sd_offset = SOF_STREAM_SD_OFFSET(hstream); + struct sof_intel_hda_stream *hda_stream; /* code loader is special case that reuses stream ops */ switch (cmd) { case SNDRV_PCM_TRIGGER_START: + hda_stream = container_of(hext_stream, struct sof_intel_hda_stream, + hext_stream); + reinit_completion(&hda_stream->ioc); + snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 1 << hstream->index, 1 << hstream->index); @@ -283,19 +288,38 @@ int hda_cl_cleanup(struct device *dev, struct snd_dma_buffer *dmab, } EXPORT_SYMBOL_NS(hda_cl_cleanup, SND_SOC_SOF_INTEL_HDA_COMMON); +#define HDA_CL_DMA_IOC_TIMEOUT_MS 500 + int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream) { struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; const struct sof_intel_dsp_desc *chip = hda->desc; + struct sof_intel_hda_stream *hda_stream; + unsigned long time_left; unsigned int reg; int ret, status; + hda_stream = container_of(hext_stream, struct sof_intel_hda_stream, + hext_stream); + + dev_dbg(sdev->dev, "Code loader DMA starting\n"); + ret = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_START); if (ret < 0) { dev_err(sdev->dev, "error: DMA trigger start failed\n"); return ret; } + /* Wait for completion of transfer */ + time_left = wait_for_completion_timeout(&hda_stream->ioc, + msecs_to_jiffies(HDA_CL_DMA_IOC_TIMEOUT_MS)); + + if (!time_left) { + dev_err(sdev->dev, "Code loader DMA did not complete\n"); + return -ETIMEDOUT; + } + dev_dbg(sdev->dev, "Code loader DMA done, waiting for FW_ENTERED status\n"); + status = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, chip->rom_status_reg, reg, (FSR_TO_STATE_CODE(reg) == FSR_STATE_FW_ENTERED), @@ -311,6 +335,8 @@ int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream dev_err(sdev->dev, "%s: timeout with rom_status_reg (%#x) read\n", __func__, chip->rom_status_reg); + } else { + dev_dbg(sdev->dev, "Code loader FW_ENTERED status\n"); } ret = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_STOP); @@ -318,6 +344,8 @@ int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream dev_err(sdev->dev, "error: DMA trigger stop failed\n"); if (!status) status = ret; + } else { + dev_dbg(sdev->dev, "Code loader DMA stopped\n"); } return status; diff --git a/sound/soc/sof/intel/hda-stream.c b/sound/soc/sof/intel/hda-stream.c index 0c189d3b19c1..76c33795ade4 100644 --- a/sound/soc/sof/intel/hda-stream.c +++ b/sound/soc/sof/intel/hda-stream.c @@ -765,10 +765,25 @@ static bool hda_dsp_stream_check(struct hdac_bus *bus, u32 status) writeb(sd_status, s->sd_addr + SOF_HDA_ADSP_REG_SD_STS); active = true; - if ((!s->substream && !s->cstream) || - !s->running || - (sd_status & SOF_HDA_CL_DMA_SD_INT_COMPLETE) == 0) + if (!s->running) continue; + if ((sd_status & SOF_HDA_CL_DMA_SD_INT_COMPLETE) == 0) + continue; + if (!s->substream && !s->cstream) { + /* + * when no substream is found, the DMA may used for code loading + * or data transfers which can rely on wait_for_completion() + */ + struct sof_intel_hda_stream *hda_stream; + struct hdac_ext_stream *hext_stream; + + hext_stream = stream_to_hdac_ext_stream(s); + hda_stream = container_of(hext_stream, struct sof_intel_hda_stream, + hext_stream); + + complete(&hda_stream->ioc); + continue; + } /* Inform ALSA only in case not do that with IPC */ if (s->substream && sof_hda->no_ipc_position) { @@ -880,6 +895,7 @@ int hda_dsp_stream_init(struct snd_sof_dev *sdev) return -ENOMEM; hda_stream->sdev = sdev; + init_completion(&hda_stream->ioc); hext_stream = &hda_stream->hext_stream; diff --git a/sound/soc/sof/intel/hda.h b/sound/soc/sof/intel/hda.h index b4b037758fcb..b59d1a572bce 100644 --- a/sound/soc/sof/intel/hda.h +++ b/sound/soc/sof/intel/hda.h @@ -11,6 +11,7 @@ #ifndef __SOF_INTEL_HDA_H #define __SOF_INTEL_HDA_H +#include #include #include #include @@ -559,6 +560,7 @@ struct sof_intel_hda_stream { struct sof_intel_stream sof_intel_stream; int host_reserved; /* reserve host DMA channel */ u32 flags; + struct completion ioc; }; #define hstream_to_sof_hda_stream(hstream) \ From patchwork Thu Apr 4 19:03:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre-Louis Bossart X-Patchwork-Id: 785862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3645CD1292 for ; Thu, 4 Apr 2024 19:05:59 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id E525C2CF7; Thu, 4 Apr 2024 21:05:47 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz E525C2CF7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1712257557; bh=B0x6Qj2oJDAKQ1Pdrq4ENFEU6JUEvp6eTkcc5HdjsWg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=iTBnnTSruMrdTgSieFUavFEBR7ql2PwWXN/RgPaD2EzyWreTnDt7EkfaR+bfXdIpC kvSMPe8t8Hlkydck5B28LfcRrkA9xOYqX11gijrmXoTCFZcyFxtIIr65QVnrkV2XLM p64DKeJCWO5ZSPT08aFBiO9xTqagY3jGfKdo8kzQ= Received: by alsa1.perex.cz (Postfix, from userid 50401) id BB007F80637; Thu, 4 Apr 2024 21:04:30 +0200 (CEST) Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 1520EF80656; Thu, 4 Apr 2024 21:04:30 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 85B69F805C6; Thu, 4 Apr 2024 21:04:21 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id EFE50F80236 for ; Thu, 4 Apr 2024 21:04:09 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz EFE50F80236 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=FbhWEjBG DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712257451; x=1743793451; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=B0x6Qj2oJDAKQ1Pdrq4ENFEU6JUEvp6eTkcc5HdjsWg=; b=FbhWEjBGyrkwAUVNtMPYiI0+PN1Pyb08JvcKsMfwzjRimSbJUbRPlr4V O0QnRAvOvIyYYud2oEk4kdmmRWItbdxjZ6EmMN3UcHy/qt/UQLCHxG9Iq AGlrG7QzEXIhXXfRxFVN6FM+C4C+oQNN0BupurAvHKzFebtmIMDkJVAN6 Z9FS7FSHndc8RRKJfbzQ+5te2yzjsHqPmydbPYbPCM50BOmAdQJ60lyQm OJhmAm0rqxggialCaPONrIj98psPbH1MIfHOHp+ES68JU+pTDjk8ZSSgR kgR2LtzoUzdtMO9yciRJ4CrAV7pFVd9podOV7MDN3xbbojrMsGZ8sJeY1 Q==; X-CSE-ConnectionGUID: w86In1cHQae7ZJWfY35Z+A== X-CSE-MsgGUID: aJFETTWIRuuRnHffCRbstg== X-IronPort-AV: E=McAfee;i="6600,9927,11034"; a="7433876" X-IronPort-AV: E=Sophos;i="6.07,179,1708416000"; d="scan'208";a="7433876" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 12:04:07 -0700 X-CSE-ConnectionGUID: 0c2LHNSvR/2Me+42bP4DTA== X-CSE-MsgGUID: n9hlvTysRp+tGEPcu0YZGw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,179,1708416000"; d="scan'208";a="19492318" Received: from sparrish-mobl1.amr.corp.intel.com (HELO pbossart-mobl6.intel.com) ([10.212.119.106]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 12:04:06 -0700 From: Pierre-Louis Bossart To: linux-sound@vger.kernel.org Cc: alsa-devel@alsa-project.org, tiwai@suse.de, broonie@kernel.org, Pierre-Louis Bossart , Bard Liao , Keqiao Zhang Subject: [PATCH 4/4] ASoC: SOF: Intel: hda-ctrl: only clear WAKESTS for HDaudio codecs Date: Thu, 4 Apr 2024 14:03:57 -0500 Message-Id: <20240404190357.138073-5-pierre-louis.bossart@linux.intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240404190357.138073-1-pierre-louis.bossart@linux.intel.com> References: <20240404190357.138073-1-pierre-louis.bossart@linux.intel.com> MIME-Version: 1.0 Message-ID-Hash: ZNZMTTB74NHNCUU7JFB5T6O43HFDMTD2 X-Message-ID-Hash: ZNZMTTB74NHNCUU7JFB5T6O43HFDMTD2 X-MailFrom: pierre-louis.bossart@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: When a PME wake happens due to a SoundWire wake, we currently clear all WAKESTS bits during the resume operation initiated by the PCI subsystem. As a result, we are unable to identify which SoundWire links need to be resumed and don't properly handle jack detection. This patch only clears the WAKESTS bits for the HDaudio codecs detected earlier. Note that we still clear all WAKESTS bits unconditionally in hda_dsp_ctrl_stop_chip(). The existing behavior is potentially racy if e.g. a jack event happens during a suspend routine, but there's a risk of breaking shutdown or reboot sequences so the code is left as is for now. Closes: https://github.com/thesofproject/linux/issues/4687 Co-developed-by: Bard Liao Signed-off-by: Bard Liao Signed-off-by: Pierre-Louis Bossart Reviewed-by: Keqiao Zhang Reviewed-by: Bard Liao --- sound/soc/sof/intel/hda-ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sof/intel/hda-ctrl.c b/sound/soc/sof/intel/hda-ctrl.c index b4f0756e21f6..6d941209847f 100644 --- a/sound/soc/sof/intel/hda-ctrl.c +++ b/sound/soc/sof/intel/hda-ctrl.c @@ -228,7 +228,7 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev) /* clear WAKESTS */ snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS, - SOF_HDA_WAKESTS_INT_MASK); + bus->codec_mask); hda_codec_rirb_status_clear(sdev);