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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id f13-20020a1709062c4d00b00a4df82aa6a7sm882455ejh.219.2024.03.28.08.54.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:54:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 01/29] hw/i386/pc: Declare CPU QOM types using DEFINE_TYPES() macro Date: Thu, 28 Mar 2024 16:54:09 +0100 Message-ID: <20240328155439.58719-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. In few commits we are going to add more types, so replace the type_register_static() to ease further reviews. Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 31 ++++++++++++++----------------- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0be8f08c47..2c41b08478 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1810,23 +1810,20 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pc_machine_set_fd_bootchk); } -static const TypeInfo pc_machine_info = { - .name = TYPE_PC_MACHINE, - .parent = TYPE_X86_MACHINE, - .abstract = true, - .instance_size = sizeof(PCMachineState), - .instance_init = pc_machine_initfn, - .class_size = sizeof(PCMachineClass), - .class_init = pc_machine_class_init, - .interfaces = (InterfaceInfo[]) { - { TYPE_HOTPLUG_HANDLER }, - { } +static const TypeInfo pc_machine_types[] = { + { + .name = TYPE_PC_MACHINE, + .parent = TYPE_X86_MACHINE, + .abstract = true, + .instance_size = sizeof(PCMachineState), + .instance_init = pc_machine_initfn, + .class_size = sizeof(PCMachineClass), + .class_init = pc_machine_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + }, }, }; -static void pc_machine_register_types(void) -{ - type_register_static(&pc_machine_info); -} - -type_init(pc_machine_register_types) +DEFINE_TYPES(pc_machine_types) From patchwork Thu Mar 28 15:54:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783594 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2798419wrt; Thu, 28 Mar 2024 08:55:44 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXVpyYpsrnGphFKewxtcNvXtRxn7Fe4ApA7AywHoMXMAdo97TcRRu2KtGRxAAQ82kz3ipXFjFDmdffbtMSgAVbl X-Google-Smtp-Source: AGHT+IH86CEOWNILOqDWStBq8RZMOme0tXdp9NvJRCfDMDtcVxuQtb76Stxzo6mULVu1WRa2DKea X-Received: by 2002:a37:e20e:0:b0:78a:3fa2:cd7d with SMTP id g14-20020a37e20e000000b0078a3fa2cd7dmr3015613qki.25.1711641344728; Thu, 28 Mar 2024 08:55:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641344; cv=none; d=google.com; s=arc-20160816; b=Vk3eQpjReEBmTB5dmVDdZYK6JF16m38JATsmwDMObX8J5ODmtABJhF3tv15uxCQUHY azNQ7bci52fov6zuquXRry4lRj47PrvGx6X1D7THiQeM60yHzM3QQQ4ynojGOvoDoKIO OguDuHvGdQvm/ZISgc5CZgdBcLUiBExEcApKv28HSj+lVYdU0cgz8tdVTWj9CBmawM63 e1r0ruKA9SM2QUCyOMFvIPwJqV4SteUE02uP2GYgpuyqdoRmJzotQ9ITqC5NY0JQrnsL 65HlmTSRIzy69UXYoihq6HawAt7lMQHRxaBhCL7Uz2ghWym/z7cZHOVHpbv1kabNWgzm nfhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=2NXhpW96pCgkEoWuYwRT5cvChay+RSkHkEuAn7B/Dd0=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=iuLaNt8Zu9+ymuNSONDj+gH3lyC7ri3Q2SHp+gkhITn7iMmDEHdIxY6KvAJ35P9f0i 2oDL1n/SEM/jfDKPHtTPNnEkFVdagC76mVYPjIe0ZR6zGKycmbGkOumh7zP3uc3olKIS wqly8E/ZIaMGtmIX9VRQ0Q9vLO9OoxxtpwnQzew35KJ7kzXZDQ9IIH96lPkgr9dgsg61 wHexpkEZ5iiMBgqIbYpde07TBhVWG+ujToELJDCB5l0Dn1wg6ty9VX3XnXIcar/u7bz7 GCJcljlXbbV1HHEZPulz6WCTBJpT/Y0+Sg5CelmqZCVcDBDbzeszPrI4rZRow9WLkrL8 9zzQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x97DBHoV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id d15-20020a056402400f00b0056c5395e581sm753171eda.70.2024.03.28.08.54.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:55:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 03/29] hw/i386/pc: Pass base machine type as argument to DEFINE_PC_MACHINE() Date: Thu, 28 Mar 2024 16:54:11 +0100 Message-ID: <20240328155439.58719-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently PC machines are based on TYPE_PC_MACHINE. In preparation of being based on different types, pass the current type as argument. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 4 ++-- hw/i386/pc_piix.c | 9 +++++---- hw/i386/pc_q35.c | 3 ++- 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 6b885424bb..33023ebbbe 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -268,7 +268,7 @@ extern const size_t pc_compat_2_4_len; extern GlobalProperty pc_compat_2_3[]; extern const size_t pc_compat_2_3_len; -#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ +#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn, parent_class) \ static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ { \ MachineClass *mc = MACHINE_CLASS(oc); \ @@ -277,7 +277,7 @@ extern const size_t pc_compat_2_3_len; } \ static const TypeInfo pc_machine_type_##suffix = { \ .name = namestr TYPE_MACHINE_SUFFIX, \ - .parent = TYPE_PC_MACHINE, \ + .parent = parent_class, \ .class_init = pc_machine_##suffix##_class_init, \ }; \ static void pc_machine_init_##suffix(void) \ diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 1be1e050c7..b9f85148e3 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -462,7 +462,8 @@ static void pc_xen_hvm_init(MachineState *machine) } \ pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \ } \ - DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) + DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn, \ + TYPE_PC_MACHINE) static void pc_i440fx_machine_options(MachineClass *m) { @@ -824,7 +825,7 @@ static void isapc_machine_options(MachineClass *m) } DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, - isapc_machine_options); + isapc_machine_options, TYPE_PC_MACHINE); #endif #ifdef CONFIG_XEN @@ -837,7 +838,7 @@ static void xenfv_4_2_machine_options(MachineClass *m) } DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, - xenfv_4_2_machine_options); + xenfv_4_2_machine_options, TYPE_PC_MACHINE); static void xenfv_3_1_machine_options(MachineClass *m) { @@ -849,5 +850,5 @@ static void xenfv_3_1_machine_options(MachineClass *m) } DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, - xenfv_3_1_machine_options); + xenfv_3_1_machine_options, TYPE_PC_MACHINE); #endif diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 43ee1e595c..7dbee38f03 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -338,7 +338,8 @@ static void pc_q35_init(MachineState *machine) } \ pc_q35_init(machine); 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id x15-20020a170906710f00b00a46cc48ab13sm898792ejj.62.2024.03.28.08.55.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:55:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 04/29] hw/i386/pc: Introduce PC_PCI_MACHINE QOM type Date: Thu, 28 Mar 2024 16:54:12 +0100 Message-ID: <20240328155439.58719-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Introduce TYPE_PC_PCI_MACHINE for machines where PCI is expected (as opposition to the ISA-only PC machine). This type inherits from the well known TYPE_PC_MACHINE. Convert I440FX/PIIX and Q35 machines to use it. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 25 ++++++++++++++++--------- hw/i386/pc.c | 25 +++++++++++++++++++++++++ hw/i386/pc_piix.c | 6 +++--- hw/i386/pc_q35.c | 2 +- 4 files changed, 45 insertions(+), 13 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 33023ebbbe..1a4a61148a 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -22,11 +22,8 @@ * @boot_cpus: number of present VCPUs */ typedef struct PCMachineState { - /*< private >*/ X86MachineState parent_obj; - /* */ - /* State for other subsystems/APIs: */ Notifier machine_done; @@ -60,6 +57,12 @@ typedef struct PCMachineState { CXLState cxl_devices_state; } PCMachineState; +typedef struct PcPciMachineState { + PCMachineState parent_obj; + + Notifier machine_done; +} PcPciMachineState; + #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" #define PC_MACHINE_VMPORT "vmport" @@ -80,12 +83,9 @@ typedef struct PCMachineState { * way we can use 1GByte pages in the host. * */ -struct PCMachineClass { - /*< private >*/ +typedef struct PCMachineClass { X86MachineClass parent_class; - /*< public >*/ - /* Device configuration: */ bool pci_enabled; const char *default_south_bridge; @@ -124,13 +124,20 @@ struct PCMachineClass { * check for memory. */ bool broken_32bit_mem_addr_check; -}; +} PCMachineClass; -#define TYPE_PC_MACHINE "generic-pc-machine" +typedef struct PcPciMachineClass { + PCMachineClass parent_class; +} PcPciMachineClass; + +#define TYPE_PC_MACHINE "common-pc-machine" OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) bool pc_machine_is_pci_enabled(PCMachineState *pcms); +#define TYPE_PC_PCI_MACHINE "pci-pc-machine" +OBJECT_DECLARE_TYPE(PcPciMachineState, PcPciMachineClass, PC_PCI_MACHINE) + /* ioapic.c */ GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 7065f11e97..eafd521489 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -621,6 +621,10 @@ void pc_machine_done(Notifier *notifier, void *data) pc_cmos_init_late(pcms); } +static void pc_pci_machine_done(Notifier *notifier, void *data) +{ +} + /* setup pci memory address space mapping into system address space */ void pc_pci_as_mapping_init(MemoryRegion *system_memory, MemoryRegion *pci_address_space) @@ -1678,6 +1682,14 @@ static void pc_machine_initfn(Object *obj) qemu_add_machine_init_done_notifier(&pcms->machine_done); } +static void pc_pci_machine_initfn(Object *obj) +{ + PcPciMachineState *ppms = PC_PCI_MACHINE(obj); + + ppms->machine_done.notify = pc_pci_machine_done; + qemu_add_machine_init_done_notifier(&ppms->machine_done); +} + static void pc_machine_reset(MachineState *machine, ShutdownCause reason) { CPUState *cs; @@ -1812,6 +1824,10 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pc_machine_set_fd_bootchk); } +static void pc_pci_machine_class_init(ObjectClass *oc, void *data) +{ +} + bool pc_machine_is_pci_enabled(PCMachineState *pcms) { return PC_MACHINE_GET_CLASS(pcms)->pci_enabled; @@ -1831,6 +1847,15 @@ static const TypeInfo pc_machine_types[] = { { } }, }, + { + .name = TYPE_PC_PCI_MACHINE, + .parent = TYPE_PC_MACHINE, + .abstract = true, + .instance_size = sizeof(PcPciMachineState), + .instance_init = pc_pci_machine_initfn, + .class_size = sizeof(PcPciMachineClass), + .class_init = pc_pci_machine_class_init, + }, }; DEFINE_TYPES(pc_machine_types) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index b9f85148e3..7ada452f91 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -463,7 +463,7 @@ static void pc_xen_hvm_init(MachineState *machine) pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \ } \ DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn, \ - TYPE_PC_MACHINE) + TYPE_PC_PCI_MACHINE) static void pc_i440fx_machine_options(MachineClass *m) { @@ -838,7 +838,7 @@ static void xenfv_4_2_machine_options(MachineClass *m) } DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, - xenfv_4_2_machine_options, TYPE_PC_MACHINE); + xenfv_4_2_machine_options, TYPE_PC_PCI_MACHINE); static void xenfv_3_1_machine_options(MachineClass *m) { @@ -850,5 +850,5 @@ static void xenfv_3_1_machine_options(MachineClass *m) } DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, - xenfv_3_1_machine_options, TYPE_PC_MACHINE); + xenfv_3_1_machine_options, TYPE_PC_PCI_MACHINE); #endif diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 7dbee38f03..c3b0467ef3 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -339,7 +339,7 @@ static void pc_q35_init(MachineState *machine) pc_q35_init(machine); \ } \ DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn, \ - TYPE_PC_MACHINE) + TYPE_PC_PCI_MACHINE) static void pc_q35_machine_options(MachineClass *m) From patchwork Thu Mar 28 15:54:13 2024 Content-Type: text/plain; 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id ig3-20020a056402458300b0056c0a668316sm970627edb.3.2024.03.28.08.55.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:55:13 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 05/29] hw/i386/pc: Remove PCMachineClass::pci_enabled field Date: Thu, 28 Mar 2024 16:54:13 +0100 Message-ID: <20240328155439.58719-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All TYPE_PC_PCI_MACHINE-based machines have pci_enabled set to %true. By checking a TYPE_PC_MACHINE inherits the TYPE_PC_PCI_MACHINE base class, we don't need this field anymore. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 1 - hw/i386/pc.c | 3 +-- hw/i386/pc_piix.c | 1 - 3 files changed, 1 insertion(+), 4 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 1a4a61148a..0b23e5ec7b 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -87,7 +87,6 @@ typedef struct PCMachineClass { X86MachineClass parent_class; /* Device configuration: */ - bool pci_enabled; const char *default_south_bridge; /* Compat options: */ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index eafd521489..a16bb1554c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1740,7 +1740,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) PCMachineClass *pcmc = PC_MACHINE_CLASS(oc); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); - pcmc->pci_enabled = true; pcmc->has_acpi_build = true; pcmc->smbios_defaults = true; pcmc->gigabyte_align = true; @@ -1830,7 +1829,7 @@ static void pc_pci_machine_class_init(ObjectClass *oc, void *data) bool pc_machine_is_pci_enabled(PCMachineState *pcms) { - return PC_MACHINE_GET_CLASS(pcms)->pci_enabled; + return !!object_dynamic_cast(OBJECT(pcms), TYPE_PC_PCI_MACHINE); } static const TypeInfo pc_machine_types[] = { diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 7ada452f91..776d02db73 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -813,7 +813,6 @@ static void isapc_machine_options(MachineClass *m) m->max_cpus = 1; m->option_rom_has_mr = true; m->rom_file_has_mr = false; - pcmc->pci_enabled = false; pcmc->has_acpi_build = false; pcmc->smbios_defaults = false; pcmc->gigabyte_align = false; From patchwork Thu Mar 28 15:54:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783598 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2798574wrt; Thu, 28 Mar 2024 08:56:03 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVmFUbvpSIL26AY3s0LoKnMQ3DdgGpxbXvixJGne3F8jR/r/lg9eVxJnNTfQiEC7sPd3YqOOHlrkuFOCMGi/8KG X-Google-Smtp-Source: AGHT+IFENoK2smGXvmqXAVdoseLMFIKblChiyHSw2YbEK9MYtJXwwafrhOEpEOkgnLpOoCwg94Va X-Received: by 2002:a05:622a:1105:b0:431:7f0a:d914 with SMTP id e5-20020a05622a110500b004317f0ad914mr3485703qty.18.1711641363101; Thu, 28 Mar 2024 08:56:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641363; cv=none; d=google.com; s=arc-20160816; b=TAphHBm5VNjy1ajXpkyb2a1LPLujG3Fxak/LG5AmhkxLKzFdLIvlrxPVGyCvwpqw3y G7Gut9715qrH6BBTMOUW7KYhNv+RyjRwtSjJCdMnLehEYZrf4o3UhMWBzAQMvmjj4j4Z 1l347Mmjt2e5jsHVgiDxgG9zG5omJhFbIFxZPo87GaaE+jK1dUpNgNdIYcENQsZTT0B9 XRbEgg+wla8efo+lEAyAghx3azgRO2lxE8ei2hFzPf4A7i4w9r3G/bN9kYmGzfFCb3aP aGYJVqp6TTPbQzvVX1JSmtBPoPZNg7i76HhCSyuPZQX/gFNazJg7TGWnxQ5umTS6xPes qYFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Qqj3zRF0zkE64TiaxdKa2OyadNVq3wsX7i8167PhhDk=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=MVSvUmQOfif67ehj8yA0AxPj69SFCZdFKl5zN6YuxYSsnGIaNWIAji+RptT54OVTO0 J/WGOknuzplGn77z96xksF7qB5aYEJjt3IGRetxNwVdqQ5JdTJf0mvrXHi3vwcYgSZOc RP/zqiovLow4pAVwZK6L9Akfexna4A1Y+iJZoTNizVQ4/iaUnieVRaFKZz/MlZE2Ve26 Oq6JCtRwouJ0RqyUoa+kmZCQ647WRbPzo33Kt3wdoPwlEqYQ5IVTSuqdtJKIXS/HHClQ MfJ3kUPXd2WceUl+FZ0U8rP3+VII9HnUIAY77tNrnOp48/kIf7/EZbR+vgnOmmq0IsE0 xeyw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fpFpEreO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id ef15-20020a05640228cf00b0056c1380a972sm963818edb.74.2024.03.28.08.55.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:55:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 06/29] hw/i386/pc: Move pci_root_uid field to PcPciMachineClass Date: Thu, 28 Mar 2024 16:54:14 +0100 Message-ID: <20240328155439.58719-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The 'pci_root_uid' field is irrelevant for non-PCI machines, restrict it to the PcPciMachineClass. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 4 +++- hw/i386/acpi-build.c | 9 +++++++-- hw/i386/pc_piix.c | 7 +++++-- hw/i386/pc_q35.c | 7 +++++-- 4 files changed, 20 insertions(+), 7 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 0b23e5ec7b..24c8e17e62 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -96,7 +96,6 @@ typedef struct PCMachineClass { /* ACPI compat: */ bool has_acpi_build; - int pci_root_uid; /* SMBIOS compat: */ bool smbios_defaults; @@ -127,6 +126,9 @@ typedef struct PCMachineClass { typedef struct PcPciMachineClass { PCMachineClass parent_class; + + /* ACPI compat: */ + int pci_root_uid; } PcPciMachineClass; #define TYPE_PC_MACHINE "common-pc-machine" diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 6f9925d176..b9890886f6 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1426,6 +1426,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, CrsRangeSet crs_range_set; PCMachineState *pcms = PC_MACHINE(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(machine); + PcPciMachineClass *ppmc; X86MachineState *x86ms = X86_MACHINE(machine); AcpiMcfgInfo mcfg; bool mcfg_valid = !!acpi_get_mcfg(&mcfg); @@ -1448,10 +1449,12 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, build_dbg_aml(dsdt); if (i440fx) { + ppmc = PC_PCI_MACHINE_GET_CLASS(machine); + sb_scope = aml_scope("_SB"); dev = aml_device("PCI0"); aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03"))); - aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))); + aml_append(dev, aml_name_decl("_UID", aml_int(ppmc->pci_root_uid))); aml_append(dev, aml_pci_edsm()); aml_append(sb_scope, dev); aml_append(dsdt, sb_scope); @@ -1461,11 +1464,13 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, } build_piix4_pci0_int(dsdt); } else if (q35) { + ppmc = PC_PCI_MACHINE_GET_CLASS(machine); + sb_scope = aml_scope("_SB"); dev = aml_device("PCI0"); aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08"))); aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"))); - aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))); + aml_append(dev, aml_name_decl("_UID", aml_int(ppmc->pci_root_uid))); aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en)); aml_append(dev, aml_pci_edsm()); aml_append(sb_scope, dev); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 776d02db73..c42dd46e59 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -468,9 +468,11 @@ static void pc_xen_hvm_init(MachineState *machine) static void pc_i440fx_machine_options(MachineClass *m) { PCMachineClass *pcmc = PC_MACHINE_CLASS(m); + PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m); ObjectClass *oc = OBJECT_CLASS(m); + pcmc->default_south_bridge = TYPE_PIIX3_DEVICE; - pcmc->pci_root_uid = 0; + ppmc->pci_root_uid = 0; pcmc->default_cpu_version = 1; m->family = "pc_piix"; @@ -622,12 +624,13 @@ DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, static void pc_i440fx_5_1_machine_options(MachineClass *m) { PCMachineClass *pcmc = PC_MACHINE_CLASS(m); + PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m); pc_i440fx_5_2_machine_options(m); compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); pcmc->kvmclock_create_always = false; - pcmc->pci_root_uid = 1; + ppmc->pci_root_uid = 1; } DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index c3b0467ef3..dc0bf85464 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -345,7 +345,9 @@ static void pc_q35_init(MachineState *machine) static void pc_q35_machine_options(MachineClass *m) { PCMachineClass *pcmc = PC_MACHINE_CLASS(m); - pcmc->pci_root_uid = 0; + PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m); + + ppmc->pci_root_uid = 0; pcmc->default_cpu_version = 1; m->family = "pc_q35"; @@ -495,12 +497,13 @@ DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL, static void pc_q35_5_1_machine_options(MachineClass *m) { PCMachineClass *pcmc = PC_MACHINE_CLASS(m); + PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m); pc_q35_5_2_machine_options(m); compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); pcmc->kvmclock_create_always = false; - pcmc->pci_root_uid = 1; + ppmc->pci_root_uid = 1; } DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL, From patchwork Thu Mar 28 15:54:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783600 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2798942wrt; Thu, 28 Mar 2024 08:56:48 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWE+qLWX3fh5v54f9dRLA66aXPjGZaWKC3Vl2aIfrQhC28IfhCh2ipb05gY4J2vyyaSRxc9QqKS0FsSNPznaOWT X-Google-Smtp-Source: AGHT+IGy3ml49z/SyrBcjGWjghdNXCaeIMIUufPszREon7xGT1weAtHyLM2/lO22W7c5Y/LMjMJV X-Received: by 2002:a05:620a:1709:b0:78a:3e97:4114 with SMTP id az9-20020a05620a170900b0078a3e974114mr3861144qkb.5.1711641408031; Thu, 28 Mar 2024 08:56:48 -0700 (PDT) ARC-Seal: i=1; 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id j15-20020a170906254f00b00a473362062fsm894249ejb.220.2024.03.28.08.55.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:55:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 09/29] hw/i386/pc: Pass PCMachineState argument to acpi_setup() Date: Thu, 28 Mar 2024 16:54:17 +0100 Message-ID: <20240328155439.58719-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org acpi_setup() caller knows about the machine state, so pass it as argument to avoid a qdev_get_machine() call. We already resolved X86_MACHINE(pcms) as 'x86ms' so use the latter. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bernhard Beschow --- hw/i386/acpi-build.h | 3 ++- hw/i386/acpi-build.c | 5 ++--- hw/i386/pc.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h index 0dce155c8c..31de5bddbd 100644 --- a/hw/i386/acpi-build.h +++ b/hw/i386/acpi-build.h @@ -2,6 +2,7 @@ #ifndef HW_I386_ACPI_BUILD_H #define HW_I386_ACPI_BUILD_H #include "hw/acpi/acpi-defs.h" +#include "hw/i386/pc.h" extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio; @@ -9,7 +10,7 @@ extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio; #define ACPI_PCIHP_SEJ_BASE 0x8 #define ACPI_PCIHP_BNMR_BASE 0x10 -void acpi_setup(void); +void acpi_setup(PCMachineState *pcms); Object *acpi_get_i386_pci_host(void); #endif diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 6e8e32e5d2..e702d5e9d2 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2749,9 +2749,8 @@ static const VMStateDescription vmstate_acpi_build = { }, }; -void acpi_setup(void) +void acpi_setup(PCMachineState *pcms) { - PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); X86MachineState *x86ms = X86_MACHINE(pcms); AcpiBuildTables tables; AcpiBuildState *build_state; @@ -2771,7 +2770,7 @@ void acpi_setup(void) return; } - if (!x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { + if (!x86_machine_is_acpi_enabled(x86ms)) { ACPI_BUILD_DPRINTF("ACPI disabled. Bailing out.\n"); return; } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 6d87d1d4c2..dfc0247bb6 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -601,7 +601,7 @@ void pc_machine_done(Notifier *notifier, void *data) /* set the number of CPUs */ x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); - acpi_setup(); + acpi_setup(pcms); if (x86ms->fw_cfg) { fw_cfg_build_smbios(pcms, x86ms->fw_cfg, pcms->smbios_entry_point_type); fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg); From patchwork Thu Mar 28 15:54:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783599 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2798747wrt; Thu, 28 Mar 2024 08:56:22 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVF4gYT7hucnsoTGHZIUUBV+fsOqDw+qQxA+fKyFqmU5tX3OcL9AFJuPpOg1d2qd08Ks/gBoWf/s1ZO5xU6tjs2 X-Google-Smtp-Source: AGHT+IF/FKWRBKmRML/wAHbeln12tf5QkOYSTi0ZQHJYTa6F5nyv1Ez0BZllntc3wIr9uQwLqAAp X-Received: by 2002:a05:6214:5098:b0:696:7631:8e7c with SMTP id kk24-20020a056214509800b0069676318e7cmr3587528qvb.59.1711641382525; Thu, 28 Mar 2024 08:56:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641382; cv=none; d=google.com; s=arc-20160816; b=nisQnXHetdjFdnhkOM0RfCaGeLjIyCQFxEPbATZwQDyzxYwwSepZJ1IC49u/MhoHWX IHIrjnUOd0l286v4WmShuW4Y+TdXZ2S0fZ396vUtHxwzoK5LHJWOuZRfPKkcP8tsRuJ6 cuMrXvGA72gNpQWd0jSzwdVtqodlM8+14ZTWEsjXuDtUAypBziGeIsFL6pF3UyQj8ssO BMeBuYdiiTzTk8f01pB3wmL8e85CNJecnU5U+pzgiiaYrsDDrXdARTB8fyKry9FwUQy6 F8q3We5v0qA9uDSfiT8WpbY6AVNSrA4aU4H50EuBgcalfLSVEU6zyG6XtDHNP/FXMb7b BgAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=HtUfcj3aTDn2mvaMR/QsDVngwC1CAz/OBQXAMI7WNPQ=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=H5PLv+xoN3Y6oT0VBOvRgb9wkd63jsCYtntf8Iij8H4MD3afEOr7hPdXX8ee7jkD5/ 3VcNSxK1CyUR2OW2DB0wfjvystCy3ZJOq1iMQW1LhTP3dKbX5hdQvtV81WbezfBSku5L P+PS46jWL/XQKUVPgocAfUtDVjlzi/o42EsKGg06sLM0/wBiqI84ztkfE8ZRJBVt7zX7 ww6N7Gu5rUJ2v6lATT/CwlMO8MbGQmsLRP+7qdoDupFsa8tUdyWFEKLA4qiUiIn/wQ6r 1f8IGS0WhNU1SHdWxStNw5i2NNiljaoaD5s+Try1tPRehL1GFtCE/jvXa2eJKtWQFKfC EBtg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FRsHW38G; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id r18-20020a170906c29200b00a4e2a1146f8sm298044ejz.48.2024.03.28.08.55.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:55:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 10/29] hw/i386/pc: Remove PCMachineClass::has_acpi_build field Date: Thu, 28 Mar 2024 16:54:18 +0100 Message-ID: <20240328155439.58719-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=philmd@linaro.org; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org PCMachineClass::has_acpi_build is always %true for PCI based machines. Remove it, setting the 'acpi_build_enabled' field once in pc_pci_machine_initfn(). Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 3 --- hw/i386/pc.c | 6 +++--- hw/i386/pc_piix.c | 1 - 3 files changed, 3 insertions(+), 7 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index a97493d29d..dd5ee448ef 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -95,9 +95,6 @@ typedef struct PCMachineClass { /* Default CPU model version. See x86_cpu_set_default_version(). */ int default_cpu_version; - /* ACPI compat: */ - bool has_acpi_build; - /* SMBIOS compat: */ bool smbios_defaults; bool smbios_legacy_mode; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index dfc0247bb6..f0dc04e2fc 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1664,8 +1664,6 @@ static void pc_machine_initfn(Object *obj) pcms->smbios_entry_point_type = pcmc->default_smbios_ep_type; pcms->south_bridge = pcmc->default_south_bridge; - /* acpi build is enabled by default if machine supports it */ - pcms->acpi_build_enabled = pcmc->has_acpi_build; pcms->smbus_enabled = true; pcms->sata_enabled = true; pcms->i8042_enabled = true; @@ -1688,6 +1686,9 @@ static void pc_machine_initfn(Object *obj) static void pc_pci_machine_initfn(Object *obj) { PcPciMachineState *ppms = PC_PCI_MACHINE(obj); + PCMachineState *pcms = PC_MACHINE(obj); + + pcms->acpi_build_enabled = true; cxl_machine_init(obj, &ppms->cxl_devices_state); @@ -1745,7 +1746,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) PCMachineClass *pcmc = PC_MACHINE_CLASS(oc); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); - pcmc->has_acpi_build = true; pcmc->smbios_defaults = true; pcmc->gigabyte_align = true; pcmc->has_reserved_memory = true; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index c42dd46e59..7aa2598e10 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -816,7 +816,6 @@ static void isapc_machine_options(MachineClass *m) m->max_cpus = 1; m->option_rom_has_mr = true; m->rom_file_has_mr = false; - pcmc->has_acpi_build = false; pcmc->smbios_defaults = false; pcmc->gigabyte_align = false; pcmc->smbios_legacy_mode = true; From patchwork Thu Mar 28 15:54:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783615 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2801383wrt; Thu, 28 Mar 2024 09:01:12 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXWeHNAIxh02Vy4mjp13l2Rlmb0Ux5SVX/XnQX9qCTalXKXat/ky4b7VQTwtcCOVtT13Ms1+riuqOcn+5X5e6AZ X-Google-Smtp-Source: AGHT+IFE6CKn1Rq10KKaM0qetu38hUFEoZVwFTuhVZAPzbBJP/HONS8V3F9l8nyPBoiRdwKln4Zw X-Received: by 2002:a5b:b09:0:b0:dcb:b3dd:4f95 with SMTP id z9-20020a5b0b09000000b00dcbb3dd4f95mr3384202ybp.43.1711641671757; Thu, 28 Mar 2024 09:01:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641671; cv=none; d=google.com; s=arc-20160816; b=CpoviyOxREi9qnvAucPlvJY8EjGtNSnbg5py0uBecqbiJEoSmL6K7CCAbtXVoh2enn aN38x1uYPPLkJAQCsZPOljzi2MuWC2HdtHT5vy8rH9b57DMaYpqu7GIGGGg/cYs+WBB6 rLrM1xc/4YFhHEpT0SMAgVBWN2lo2PrYnqGhowV89ZYtbrcBc3yCPD9t+/RkkGoWfNDc gufLgzITTlfBWEVCeBykuH1jo+AA8PK9pgUgj/ZtRonsJBlpl+Nzu7SggKh+uYMKqsRK JkPS4rgGbqPSjHi5BRnVlwxLU/FIPx1c44/Ki2BXDd4TkuQCIHrAalvdMYNIWUAlQJVl yLRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=tmBHuqnVEd7WMmkqyo1h18jdjcgOKQnVi/P8Phxm0vQ=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=Wr7GkFu0uOUpaBgvvHcTZFBW47avsWCXfGacXPGNzX+Em6nmJmfT+O7xvwWpbRyQIa o+EH5ru8HCHhopcHHw0OOoan91PyRbfiiV+M6LtuaR5zeaG8NMuaMGHPWNz0VG1CTits w4ASXtNF4bfvHdWg/QP6FcBQjdVw4W8blmuA9vtAM2pSSqymrNzoGdm64M2LneoTQk42 +2+rOLRutE2EtIUr07l8prmWF2tB36Ro7n00GPSp7cue1okV6cxTqu+FoyfmGBXXS/iF MwZjqtzvPDQszBb0ARbErZetIt1H8DeZrQ6jlv7n5WZCeSUOLWftHKJt3UkbWX38zy7O DzAg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fzEr0irz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id ds17-20020a170907725100b00a471b5b25b9sm887001ejc.127.2024.03.28.08.56.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:10 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 14/29] hw/i386/pc: Move pc_system_flash_create() to pc_pci_machine_initfn() Date: Thu, 28 Mar 2024 16:54:22 +0100 Message-ID: <20240328155439.58719-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::129; envelope-from=philmd@linaro.org; helo=mail-lf1-x129.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pc_system_flash_create() is only useful for PCI-based machines. Move the call to the PCI-based init() handler. Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 2 +- hw/i386/pc_sysfw.c | 10 ++++------ 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 5b96daa414..33724791fd 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1679,7 +1679,6 @@ static void pc_machine_initfn(Object *obj) pcms->fd_bootchk = true; pcms->default_bus_bypass_iommu = false; - pc_system_flash_create(pcms); pcms->pcspk = isa_new(TYPE_PC_SPEAKER); object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", OBJECT(pcms->pcspk), "audiodev"); @@ -1694,6 +1693,7 @@ static void pc_pci_machine_initfn(Object *obj) ppms->acpi_build_enabled = true; + pc_system_flash_create(PC_MACHINE(obj)); cxl_machine_init(obj, &ppms->cxl_devices_state); ppms->machine_done.notify = pc_pci_machine_done; diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 541dcaef71..167ff24fcb 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -93,12 +93,10 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, void pc_system_flash_create(PCMachineState *pcms) { - if (pc_machine_is_pci_enabled(pcms)) { - pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", - "pflash0"); - pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", - "pflash1"); - } + assert(pc_machine_is_pci_enabled(pcms)); + + pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", "pflash0"); + pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", "pflash1"); } void pc_system_flash_cleanup_unused(PCMachineState *pcms) From patchwork Thu Mar 28 15:54:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783601 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2799051wrt; Thu, 28 Mar 2024 08:57:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV20a6Zvg7LBW0a8P8XVlMb/lBMDSuxLnhboqUu616QZVAXtkqXS4oqIEoP2P8trfSYocK9B+WATBaZfiqvIS/T X-Google-Smtp-Source: AGHT+IE8t4qxnrJQ3nsL7Hl/rvx6Nw73FaR7MlwLVFgsSIo0MqHaEU3vJL3XwBGSUXmSXs16yPU4 X-Received: by 2002:a05:620a:1379:b0:78a:5fe9:dcdd with SMTP id d25-20020a05620a137900b0078a5fe9dcddmr2978970qkl.71.1711641424381; Thu, 28 Mar 2024 08:57:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641424; cv=none; d=google.com; s=arc-20160816; b=DcygtP16cLE31xKINwHVC4I3cMiiRrrfJ4Yu7VoHOYyZDIcG4BTOa72IgSWRz7SkEG 7tfjyqNu3pYPc2TYsOhMhoslSzKWSIswhvFr+XAbVSCL1L2O8eNSnHgGYgfKku950i2X tgOWvTrmE79FCALMNHjJAU9debwohdHIZaQDpBt+tuS5DXhXbZeerXTzw8Zqnq3v17b4 +jsNMXK7sIlU68v0GyD1bsDwmcl1HKeX5G43xWZuB4gxaHeiHtc50LKIRquFbw8Aitag OSGzJZ0Q/opY8OAuqykCtsCbvOII4ZSSfANk4PQjw4ULh63vyVL4JrGwR2Tr58p47fHz Doyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=a1jNCFtYZSmUOBchzYP/5PRkNu6FHAH8wzcx932FlSY=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=TnD+H9+9YrIQWnmAucPNXPP86mq6Hqgb20layNhNV5ABw+eCLy/OOk5OuFKHfIi+i7 liKgyApjT6oYTRMMAF/Y+3XBAbXaK6G67UaHglM/qOzyd89lD7rGgMgHtxh9+bgmWa/r kDEjpbZ2UvwoO2bB2dBbey3evLDfU2LJLgFujkKSYg6907XXrK9++FzWkamAQRupdgrX HsyZVoYP6udmRti63Z2w24cg27sRVxnCSIvELpT8bOtJt84N1mczTcjxW5kSvg3GdggU trGGf6+rYY67it9JkpAvj9gEO8WjlLh1cP1N544RT7mJtlnMbgLcSrM/A8XxgknisrpK ClTQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XbWjQnxC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id z1-20020a170906668100b00a474b7bbc76sm886773ejo.56.2024.03.28.08.56.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:16 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 15/29] hw/i386/pc: Move FW/pflash related fields to PcPciMachineState Date: Thu, 28 Mar 2024 16:54:23 +0100 Message-ID: <20240328155439.58719-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::133; envelope-from=philmd@linaro.org; helo=mail-lf1-x133.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Only PCI-based machines use the set of parallel flash devices. Move the fields from PCMachineState to PcPciMachineState. Directly pass a PcPciMachineState argument to the pc_system_flash/fw methods. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 10 ++++---- hw/i386/pc.c | 25 +++++++++--------- hw/i386/pc_piix.c | 3 ++- hw/i386/pc_sysfw.c | 60 +++++++++++++++++++------------------------- 4 files changed, 45 insertions(+), 53 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 67f8f4730b..668347c248 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -30,7 +30,6 @@ typedef struct PCMachineState { /* Pointers to devices and objects: */ PCIBus *pcibus; I2CBus *smbus; - PFlashCFI01 *flash[2]; ISADevice *pcspk; DeviceState *iommu; BusState *idebus[MAX_IDE_BUS]; @@ -47,7 +46,6 @@ typedef struct PCMachineState { bool i8042_enabled; bool default_bus_bypass_iommu; bool fd_bootchk; - uint64_t max_fw_size; /* ACPI Memory hotplug IO base address */ hwaddr memhp_io_base; @@ -61,7 +59,9 @@ typedef struct PcPciMachineState { Notifier machine_done; bool acpi_build_enabled; + uint64_t max_fw_size; + PFlashCFI01 *flash[2]; CXLState cxl_devices_state; } PcPciMachineState; @@ -184,9 +184,9 @@ void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); #define TYPE_PORT92 "port92" /* pc_sysfw.c */ -void pc_system_flash_create(PCMachineState *pcms); -void pc_system_flash_cleanup_unused(PCMachineState *pcms); -void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); +void pc_system_flash_create(PcPciMachineState *ppms); +void pc_system_flash_cleanup_unused(PcPciMachineState *ppms); +void pc_system_firmware_init(PcPciMachineState *ppms, MemoryRegion *rom_memory); bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, int *data_len); void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 33724791fd..5753a3ff0b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -957,7 +957,7 @@ void pc_memory_init(PCMachineState *pcms, /* Initialize PC system firmware */ if (pci_enabled) { - pc_system_firmware_init(pcms, rom_memory); + pc_system_firmware_init(ppms, rom_memory); } else { x86_bios_rom_init(machine, "bios.bin", rom_memory, true); } @@ -1617,8 +1617,8 @@ static void pc_machine_get_max_fw_size(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - PCMachineState *pcms = PC_MACHINE(obj); - uint64_t value = pcms->max_fw_size; + PcPciMachineState *ppms = PC_PCI_MACHINE(obj); + uint64_t value = ppms->max_fw_size; visit_type_size(v, name, &value, errp); } @@ -1627,7 +1627,7 @@ static void pc_machine_set_max_fw_size(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - PCMachineState *pcms = PC_MACHINE(obj); + PcPciMachineState *ppms = PC_PCI_MACHINE(obj); uint64_t value; if (!visit_type_size(v, name, &value, errp)) { @@ -1651,7 +1651,7 @@ static void pc_machine_set_max_fw_size(Object *obj, Visitor *v, return; } - pcms->max_fw_size = value; + ppms->max_fw_size = value; } @@ -1672,7 +1672,6 @@ static void pc_machine_initfn(Object *obj) pcms->smbus_enabled = true; pcms->sata_enabled = true; pcms->i8042_enabled = true; - pcms->max_fw_size = 8 * MiB; #ifdef CONFIG_HPET pcms->hpet_enabled = true; #endif @@ -1692,8 +1691,9 @@ static void pc_pci_machine_initfn(Object *obj) PcPciMachineState *ppms = PC_PCI_MACHINE(obj); ppms->acpi_build_enabled = true; + ppms->max_fw_size = 8 * MiB; - pc_system_flash_create(PC_MACHINE(obj)); + pc_system_flash_create(ppms); cxl_machine_init(obj, &ppms->cxl_devices_state); ppms->machine_done.notify = pc_pci_machine_done; @@ -1815,12 +1815,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pc_machine_get_default_bus_bypass_iommu, pc_machine_set_default_bus_bypass_iommu); - object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size", - pc_machine_get_max_fw_size, pc_machine_set_max_fw_size, - NULL, NULL); - object_class_property_set_description(oc, PC_MACHINE_MAX_FW_SIZE, - "Maximum combined firmware size"); - object_class_property_add(oc, PC_MACHINE_SMBIOS_EP, "str", pc_machine_get_smbios_ep, pc_machine_set_smbios_ep, NULL, NULL); @@ -1834,6 +1828,11 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) static void pc_pci_machine_class_init(ObjectClass *oc, void *data) { + object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size", + pc_machine_get_max_fw_size, + pc_machine_set_max_fw_size, NULL, NULL); + object_class_property_set_description(oc, PC_MACHINE_MAX_FW_SIZE, + "Maximum combined firmware size"); } bool pc_machine_is_pci_enabled(PCMachineState *pcms) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 7aa2598e10..6b3403d0bd 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -118,6 +118,7 @@ static void pc_init1(MachineState *machine, const char *pci_type) ram_addr_t lowmem; uint64_t hole64_size = 0; bool pci_enabled = pc_machine_is_pci_enabled(pcms); + PcPciMachineState *ppms = pci_enabled ? PC_PCI_MACHINE(pcms) : NULL; /* * Calculate ram split, for memory below and above 4G. It's a bit @@ -228,7 +229,7 @@ static void pc_init1(MachineState *machine, const char *pci_type) assert(machine->ram_size == x86ms->below_4g_mem_size + x86ms->above_4g_mem_size); - pc_system_flash_cleanup_unused(pcms); + pc_system_flash_cleanup_unused(ppms); if (machine->kernel_filename != NULL) { /* For xen HVM direct kernel boot, load linux here */ xen_load_linux(pcms); diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 167ff24fcb..54d15afa49 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -71,7 +71,7 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory, memory_region_set_readonly(isa_bios, true); } -static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, +static PFlashCFI01 *pc_pflash_create(PcPciMachineState *ppms, const char *name, const char *alias_prop_name) { @@ -80,8 +80,8 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, qdev_prop_set_uint64(dev, "sector-length", FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 1); qdev_prop_set_string(dev, "name", name); - object_property_add_child(OBJECT(pcms), name, OBJECT(dev)); - object_property_add_alias(OBJECT(pcms), alias_prop_name, + object_property_add_child(OBJECT(ppms), name, OBJECT(dev)); + object_property_add_alias(OBJECT(ppms), alias_prop_name, OBJECT(dev), "drive"); /* * The returned reference is tied to the child property and @@ -91,28 +91,24 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, return PFLASH_CFI01(dev); } -void pc_system_flash_create(PCMachineState *pcms) +void pc_system_flash_create(PcPciMachineState *ppms) { - assert(pc_machine_is_pci_enabled(pcms)); - - pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", "pflash0"); - pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", "pflash1"); + ppms->flash[0] = pc_pflash_create(ppms, "system.flash0", "pflash0"); + ppms->flash[1] = pc_pflash_create(ppms, "system.flash1", "pflash1"); } -void pc_system_flash_cleanup_unused(PCMachineState *pcms) +void pc_system_flash_cleanup_unused(PcPciMachineState *ppms) { char *prop_name; int i; - assert(pc_machine_is_pci_enabled(pcms)); - - for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { - if (!qdev_is_realized(DEVICE(pcms->flash[i]))) { + for (i = 0; i < ARRAY_SIZE(ppms->flash); i++) { + if (!qdev_is_realized(DEVICE(ppms->flash[i]))) { prop_name = g_strdup_printf("pflash%d", i); - object_property_del(OBJECT(pcms), prop_name); + object_property_del(OBJECT(ppms), prop_name); g_free(prop_name); - object_unparent(OBJECT(pcms->flash[i])); - pcms->flash[i] = NULL; + object_unparent(OBJECT(ppms->flash[i])); + ppms->flash[i] = NULL; } } } @@ -130,7 +126,7 @@ void pc_system_flash_cleanup_unused(PCMachineState *pcms) * pc_isa_bios_init(). Merging several flash devices for isa-bios is * not supported. */ -static void pc_system_flash_map(PCMachineState *pcms, +static void pc_system_flash_map(PcPciMachineState *ppms, MemoryRegion *rom_memory) { hwaddr total_size = 0; @@ -142,10 +138,8 @@ static void pc_system_flash_map(PCMachineState *pcms, void *flash_ptr; int flash_size; - assert(pc_machine_is_pci_enabled(pcms)); - - for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { - system_flash = pcms->flash[i]; + for (i = 0; i < ARRAY_SIZE(ppms->flash); i++) { + system_flash = ppms->flash[i]; blk = pflash_cfi01_get_blk(system_flash); if (!blk) { break; @@ -166,10 +160,10 @@ static void pc_system_flash_map(PCMachineState *pcms, } if ((hwaddr)size != size || total_size > HWADDR_MAX - size - || total_size + size > pcms->max_fw_size) { + || total_size + size > ppms->max_fw_size) { error_report("combined size of system firmware exceeds " "%" PRIu64 " bytes", - pcms->max_fw_size); + ppms->max_fw_size); exit(1); } @@ -194,23 +188,21 @@ static void pc_system_flash_map(PCMachineState *pcms, } } -void pc_system_firmware_init(PCMachineState *pcms, +void pc_system_firmware_init(PcPciMachineState *ppms, MemoryRegion *rom_memory) { int i; - BlockBackend *pflash_blk[ARRAY_SIZE(pcms->flash)]; - - assert(pc_machine_is_pci_enabled(pcms)); + BlockBackend *pflash_blk[ARRAY_SIZE(ppms->flash)]; /* Map legacy -drive if=pflash to machine properties */ - for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { - pflash_cfi01_legacy_drive(pcms->flash[i], + for (i = 0; i < ARRAY_SIZE(ppms->flash); i++) { + pflash_cfi01_legacy_drive(ppms->flash[i], drive_get(IF_PFLASH, 0, i)); - pflash_blk[i] = pflash_cfi01_get_blk(pcms->flash[i]); + pflash_blk[i] = pflash_cfi01_get_blk(ppms->flash[i]); } /* Reject gaps */ - for (i = 1; i < ARRAY_SIZE(pcms->flash); i++) { + for (i = 1; i < ARRAY_SIZE(ppms->flash); i++) { if (pflash_blk[i] && !pflash_blk[i - 1]) { error_report("pflash%d requires pflash%d", i, i - 1); exit(1); @@ -219,7 +211,7 @@ void pc_system_firmware_init(PCMachineState *pcms, if (!pflash_blk[0]) { /* Machine property pflash0 not set, use ROM mode */ - x86_bios_rom_init(MACHINE(pcms), "bios.bin", rom_memory, false); + x86_bios_rom_init(MACHINE(ppms), "bios.bin", rom_memory, false); } else { if (kvm_enabled() && !kvm_readonly_mem_enabled()) { /* @@ -231,10 +223,10 @@ void pc_system_firmware_init(PCMachineState *pcms, exit(1); } - pc_system_flash_map(pcms, rom_memory); + pc_system_flash_map(ppms, rom_memory); } - pc_system_flash_cleanup_unused(pcms); + pc_system_flash_cleanup_unused(ppms); } void x86_firmware_configure(void *ptr, int size) From patchwork Thu Mar 28 15:54:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783613 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2800443wrt; Thu, 28 Mar 2024 09:00:01 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXo9jddLyurOOqhTgY01C9oyAVuhAzX0R2eEPD3z8nldywcUQAbkuzqrjSbIy34C1Q5dsxIB6MMOwProccjVick X-Google-Smtp-Source: AGHT+IHDlUQ+gzac/86mlRuUvHxzlFMo4bqTG4VSXWjkuk558Ueb0VD1N2ZlROGAOlOOOudgCiEa X-Received: by 2002:ac8:5896:0:b0:431:7519:45ae with SMTP id t22-20020ac85896000000b00431751945aemr3891998qta.56.1711641600959; Thu, 28 Mar 2024 09:00:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641600; cv=none; d=google.com; s=arc-20160816; b=cnl75b7y7Q5BT0lQ6P0VDFLmCp5bN2sFV8g6j11ub4RNq+zs9kA86g7anz1a0bqxw3 wkeYIt05F2eC+RfN0dza9peBp+hdLdjz5x+NmaWCcdmxWG8y5hzpsPOFk9cE2IifoCG3 tb65e1bk2374d8905qdTv4Hp0VZyXqopMO0sMfLwfHkGlzHqs8/r4YQvaItdijp2hAiB zE0etq/s4nYacvGtj2f4uDqK5lffsSr3eIF8YB3ylhnkJTo70cdSmK8bhMFXoKJp0S8U YR9gBSVd378xLYeSCTpVJpvgQ46MB5sS+kgSdsBWRxnJAwyTClpLjBS2CgGhcPmF8k3H e9yQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=YADozrynE6WAolQE0PpJsPO9+XRuTB0w7hXGd8JOVMk=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=eduWXwTBLLPPeleFuyk6uZJL2ZDoabk0u/vzP5q3XTnB/Q/1YhZFmMCFz8x0PGyNfR K1JiEw09gEoIV1/Q7VNKb3M5XjAWKPaHUfcIK48FzVHbkxCpMI67QjLP/R8+KWyT0K5D CKzUajKSrK+UtEaJNMsvat3dgENv3s9nzeY0cWYyuczMF/lvjvjXQKuXmE2wQ+1E5yk1 lqtw8/P0krOiBeYt9D3gmwi08IkZYscR4RTN/fia5Zgqwnxk2ZnuCSpY8kSormbZOCaZ nZwnKyZuAy8lAqK308bsiYgyEt4NucE9A5xtduKoMb5J4zGjy2GpuuRktjaGC90VjqJa og3g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bNgcRPVC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id i23-20020a170906265700b00a4749a1de50sm911948ejc.176.2024.03.28.08.56.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:22 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 16/29] hw/i386/pc: Move south-bridge related fields to PcPciMachine Date: Thu, 28 Mar 2024 16:54:24 +0100 Message-ID: <20240328155439.58719-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=philmd@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org South bridge type is only relevant for the i440fx/piix machine, which is PCI-based. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 8 ++++---- hw/i386/pc.c | 3 ++- hw/i386/pc_piix.c | 12 ++++++------ 3 files changed, 12 insertions(+), 11 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 668347c248..2db2aa03d3 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -38,7 +38,6 @@ typedef struct PCMachineState { uint64_t max_ram_below_4g; OnOffAuto vmport; SmbiosEntryPointType smbios_entry_point_type; - const char *south_bridge; bool smbus_enabled; bool sata_enabled; @@ -59,6 +58,7 @@ typedef struct PcPciMachineState { Notifier machine_done; bool acpi_build_enabled; + const char *southbridge_typename; uint64_t max_fw_size; PFlashCFI01 *flash[2]; @@ -88,9 +88,6 @@ typedef struct PcPciMachineState { typedef struct PCMachineClass { X86MachineClass parent_class; - /* Device configuration: */ - const char *default_south_bridge; - /* Compat options: */ /* Default CPU model version. See x86_cpu_set_default_version(). */ @@ -126,6 +123,9 @@ typedef struct PCMachineClass { typedef struct PcPciMachineClass { PCMachineClass parent_class; + /* Device configuration: */ + const char *default_southbridge_typename; + /* ACPI compat: */ int pci_root_uid; } PcPciMachineClass; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 5753a3ff0b..dd44df0470 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1667,7 +1667,6 @@ static void pc_machine_initfn(Object *obj) #endif /* CONFIG_VMPORT */ pcms->max_ram_below_4g = 0; /* use default */ pcms->smbios_entry_point_type = pcmc->default_smbios_ep_type; - pcms->south_bridge = pcmc->default_south_bridge; pcms->smbus_enabled = true; pcms->sata_enabled = true; @@ -1689,9 +1688,11 @@ static void pc_machine_initfn(Object *obj) static void pc_pci_machine_initfn(Object *obj) { PcPciMachineState *ppms = PC_PCI_MACHINE(obj); + PcPciMachineClass *ppmc = PC_PCI_MACHINE_GET_CLASS(ppms); ppms->acpi_build_enabled = true; ppms->max_fw_size = 8 * MiB; + ppms->southbridge_typename = ppmc->default_southbridge_typename; pc_system_flash_create(ppms); cxl_machine_init(obj, &ppms->cxl_devices_state); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 6b3403d0bd..2043a7022a 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -243,7 +243,7 @@ static void pc_init1(MachineState *machine, const char *pci_type) DeviceState *dev; size_t i; - pci_dev = pci_new_multifunction(-1, pcms->south_bridge); + pci_dev = pci_new_multifunction(-1, ppms->southbridge_typename); object_property_set_bool(OBJECT(pci_dev), "has-usb", machine_usb(machine), &error_abort); object_property_set_bool(OBJECT(pci_dev), "has-acpi", @@ -385,12 +385,12 @@ static const QEnumLookup PCSouthBridgeOption_lookup = { static int pc_get_south_bridge(Object *obj, Error **errp) { - PCMachineState *pcms = PC_MACHINE(obj); + PcPciMachineState *ppms = PC_PCI_MACHINE(obj); int i; for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) { if (g_strcmp0(PCSouthBridgeOption_lookup.array[i], - pcms->south_bridge) == 0) { + ppms->southbridge_typename) == 0) { return i; } } @@ -401,7 +401,7 @@ static int pc_get_south_bridge(Object *obj, Error **errp) static void pc_set_south_bridge(Object *obj, int value, Error **errp) { - PCMachineState *pcms = PC_MACHINE(obj); + PcPciMachineState *ppms = PC_PCI_MACHINE(obj); if (value < 0) { error_setg(errp, "Value can't be negative"); @@ -413,7 +413,7 @@ static void pc_set_south_bridge(Object *obj, int value, Error **errp) return; } - pcms->south_bridge = PCSouthBridgeOption_lookup.array[value]; + ppms->southbridge_typename = PCSouthBridgeOption_lookup.array[value]; } /* Looking for a pc_compat_2_4() function? It doesn't exist. @@ -472,7 +472,7 @@ static void pc_i440fx_machine_options(MachineClass *m) PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m); ObjectClass *oc = OBJECT_CLASS(m); - pcmc->default_south_bridge = TYPE_PIIX3_DEVICE; + ppmc->default_southbridge_typename = TYPE_PIIX3_DEVICE; ppmc->pci_root_uid = 0; pcmc->default_cpu_version = 1; From patchwork Thu Mar 28 15:54:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783605 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2799254wrt; Thu, 28 Mar 2024 08:57:33 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUyaaGcyjfymAKrqRXpavt7LhXFy9iS1QDuB97GdmS5FHb4q1W3PlFTtPjFFesCJvfHb/omqacj/zpl6rdDXMgd X-Google-Smtp-Source: AGHT+IG3iBQ3Ai44FChS1rUJzN2HjLwKImSOzobFWZ8jzSxZusLZFiQ3giaK/oKFLgqUWdAPw8G1 X-Received: by 2002:a05:6214:5587:b0:696:7b17:4428 with SMTP id mi7-20020a056214558700b006967b174428mr4948814qvb.29.1711641452728; Thu, 28 Mar 2024 08:57:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641452; cv=none; d=google.com; s=arc-20160816; b=olzrhpNg+HtDIgn4CHnrVa2tUmbfl8X2iy5Vyu/e0SEiJ9qyYxsnd+yB0JDZdCYbjX RyYP3Z9MUeDWM+aAAbfQdsmYlHDyDRjvakcCjuFEoHYVJw2CaGvPdSyj2jNoHh7ddhu1 zPB//tHcAyY8ZGLTif9yl8xiCqPoUDOk5dg63NmPW0k3EhllFzpUA7+NrtuA7aMQQtFx qPQ/TY1riiYkBezbfw7636V0aLXPIobwt4xLUucajTulRTteTkNzR6CCpt/yunFBz9jc 1OiCpa+4koXrPRcZt9BOfsxdcyduKNlpNEvN24Cw8wn1xtN7pdBhVZB0zRdgVplAxB4c pWtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=yelmGOzPahdn50NTFTioUrFj9NGQyALSAi158EJljHU=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=zVq8OBLOCApIAtyPf+dFYuFTXyjBEronMaFIgQTcDZq8lZpAlodbhGr8JnmA0au7Fc x1lnd5+b2MyWqelWqX+9/1MhNx0OrGRNPxAHsNUhG7bPSjy0ED61LWx4U8cVc5orJPLA 3LXubSnI6SrEqp9XN/bQxndHpX2UZzkmyBeIb3SOcBmgUFKqBZA+CR3yvRZYJS4wtLuO 4CTxMX/5512lcbr2bxWrBAthd479DaHK9cybVFZWl7RMVUdIpLLi2AWSaCzT3xtd4eX7 2uCk0fEgeY25/uDxFNr19hUIxm2vyCjwKK5DEP2+G1Akoj8k1lpujL6U9tMMypYgFVYi c32A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=krvbD78O; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id c12-20020a170906170c00b00a47464a6ee4sm907178eje.173.2024.03.28.08.56.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 17/29] hw/i386/pc: Inline gigabyte_align() Date: Thu, 28 Mar 2024 16:54:25 +0100 Message-ID: <20240328155439.58719-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All PCI-based machines have the gigabyte_align field set to %true. Simplify by using an inlined helper checking whether the machine is PCI-based or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 9 --------- hw/i386/pc.c | 1 - hw/i386/pc_piix.c | 16 +++++++++++++--- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 2db2aa03d3..758dd5f29b 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -76,14 +76,6 @@ typedef struct PcPciMachineState { /** * PCMachineClass: - * - * Compat fields: - * - * @gigabyte_align: Make sure that guest addresses aligned at - * 1Gbyte boundaries get mapped to host - * addresses aligned at 1Gbyte boundaries. This - * way we can use 1GByte pages in the host. - * */ typedef struct PCMachineClass { X86MachineClass parent_class; @@ -99,7 +91,6 @@ typedef struct PCMachineClass { SmbiosEntryPointType default_smbios_ep_type; /* RAM / address space compat: */ - bool gigabyte_align; bool has_reserved_memory; bool broken_reserved_end; bool enforce_amd_1tb_hole; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index dd44df0470..093a7c35f7 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1752,7 +1752,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); pcmc->smbios_defaults = true; - pcmc->gigabyte_align = true; pcmc->has_reserved_memory = true; pcmc->enforce_amd_1tb_hole = true; pcmc->pvh_enabled = true; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 2043a7022a..0bc14da768 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -99,6 +99,17 @@ static void piix_intx_routing_notifier_xen(PCIDevice *dev) } } +/* + * gigabyte_align: Make sure that guest addresses aligned at + * 1Gbyte boundaries get mapped to host + * addresses aligned at 1Gbyte boundaries. + * This way we can use 1GByte pages in the host. + */ +static bool gigabyte_align(PCMachineState *pcms) +{ + return pc_machine_is_pci_enabled(pcms); +} + /* PC hardware initialisation */ static void pc_init1(MachineState *machine, const char *pci_type) { @@ -130,7 +141,7 @@ static void pc_init1(MachineState *machine, const char *pci_type) * - Then, to gigabyte align the memory, we move the split to 3G * (lowmem = 0xc0000000). But only in case we have to split in * the first place, i.e. ram_size is larger than (traditional) - * lowmem. And for new machine types (gigabyte_align = true) + * lowmem. And for new machine types (gigabyte_align() = true) * only, for live migration compatibility reasons. * * - Next the max-ram-below-4g option was added, which allowed to @@ -160,7 +171,7 @@ static void pc_init1(MachineState *machine, const char *pci_type) } lowmem = pcms->max_ram_below_4g; if (machine->ram_size >= pcms->max_ram_below_4g) { - if (pcmc->gigabyte_align) { + if (gigabyte_align(pcms)) { if (lowmem > 0xc0000000) { lowmem = 0xc0000000; } @@ -818,7 +829,6 @@ static void isapc_machine_options(MachineClass *m) m->option_rom_has_mr = true; m->rom_file_has_mr = false; pcmc->smbios_defaults = false; - pcmc->gigabyte_align = false; pcmc->smbios_legacy_mode = true; pcmc->has_reserved_memory = false; m->default_nic = "ne2k_isa"; From patchwork Thu Mar 28 15:54:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783604 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2799238wrt; Thu, 28 Mar 2024 08:57:30 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUNyRW+YnqU+N1MU6o/ORODHzxFNMM5to4BfJgxRHhqL4Hce0CR1ShYTMaNtUyJopAtj+dwyKe2R/Q1pxDkhJ/J X-Google-Smtp-Source: AGHT+IGa6E011wtUhOCCF8OB8wQBLIjYJqt/FDY9LCp7g18SGUvQKoxO3Ce3PkNSNoNUDeOy01fX X-Received: by 2002:a05:620a:5657:b0:78a:5ed6:e3a1 with SMTP id vw23-20020a05620a565700b0078a5ed6e3a1mr4344025qkn.6.1711641450143; Thu, 28 Mar 2024 08:57:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641450; cv=none; d=google.com; s=arc-20160816; b=BG/wS6BmUTRTSXrXp3fW4ZzpSS/HMvZk52RzRrzw1qtEC/Ouuc7rYgm7/NJXOwTDay bjy+iofEZe0OAVFRq7pPxcu3SmCFFEcRNS81kQbIcnENLJaW7+elSh8bpR+u4u5sLlS9 PpwVKM+8Ex6KzEniXj9pRudnM3mxsyN+XHfqcDbKWkPtu1T6RASvSTPcM2Ch35FLb6wF yjCnlvUFHp9Cn7yNwYHW4KaCU/ccMlDVWtAxr8mW7AhkkZqhcrReb17u/BrTzyYbabRG w8YIyi4KFJMfLkf7jEPkRR7yI5wY/upogI3o/MlfvFME54BMpMbrN/XZOzhiRjVPPurj d30Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=mvS5b4mOvRgBMXReEbw8mHkHwY6O9r1j8WjPX6hg3zo=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=vszZV2nqwt+8WeTeE9SGeQK09BkVy1WV0U7AZcBo4/B2OpSBqMXyCicVM92t/hBy3W /aj2p0UPgX0kQwyEtXL8elQFBG2S4Hh7bi+CwBisD3+oktCcO8zg8TEve0aydD9PzwbO xy+SxoWtgpL7UjuaDUwcXE0UOvNg0WNgkRvjVnWGN8O1gfn+iSZIE/r3ZK5uBx2y83JL 8j8RnNuXMu6VUjalon0H/TFlNHV5myIpyLRFFyZwgDmmYVZ3O8kBWQpsd700+mhPkYHn 5gTjm2yUFbAcDv4qLpeBGo8oqiR/0T54PdCyTBOExf2yVvxmCw4JrfkjOQf0dmFpOODL T2yw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yQG8nxLX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id l13-20020a056402028d00b0056bfa6ad5eesm959518edv.91.2024.03.28.08.56.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 18/29] hw/i386/pc: Inline has_reserved_memory() Date: Thu, 28 Mar 2024 16:54:26 +0100 Message-ID: <20240328155439.58719-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=philmd@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All PCI-based machines have the has_reserved_memory field set to %true. Simplify by using an inlined helper checking whether the machine is PCI-based or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 1 - hw/i386/pc.c | 17 ++++++++++------- hw/i386/pc_piix.c | 1 - 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 758dd5f29b..df4c813854 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -91,7 +91,6 @@ typedef struct PCMachineClass { SmbiosEntryPointType default_smbios_ep_type; /* RAM / address space compat: */ - bool has_reserved_memory; bool broken_reserved_end; bool enforce_amd_1tb_hole; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 093a7c35f7..e36d76656b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -671,6 +671,11 @@ void xen_load_linux(PCMachineState *pcms) #define PC_ROM_ALIGN 0x800 #define PC_ROM_SIZE (PC_ROM_MAX - PC_ROM_MIN_VGA) +static bool has_reserved_memory(PCMachineState *pcms) +{ + return pc_machine_is_pci_enabled(pcms); +} + static hwaddr pc_above_4g_end(PCMachineState *pcms) { X86MachineState *x86ms = X86_MACHINE(pcms); @@ -702,12 +707,11 @@ static void pc_get_device_memory_range(PCMachineState *pcms, static uint64_t pc_get_cxl_range_start(PCMachineState *pcms) { - PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); MachineState *ms = MACHINE(pcms); hwaddr cxl_base; ram_addr_t size; - if (pcmc->has_reserved_memory && + if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) { pc_get_device_memory_range(pcms, &cxl_base, &size); cxl_base += size; @@ -760,7 +764,7 @@ static hwaddr pc_max_used_gpa(PCMachineState *pcms, uint64_t pci_hole64_size) * calculating the highest possible GPA so that we can properly report * if someone configures them on a CPU that cannot possibly address them. */ - if (pcmc->has_reserved_memory && + if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) { hwaddr devmem_start; ram_addr_t devmem_size; @@ -891,7 +895,7 @@ void pc_memory_init(PCMachineState *pcms, e820_add_entry(pcms->sgx_epc.base, pcms->sgx_epc.size, E820_RESERVED); } - if (!pcmc->has_reserved_memory && + if (!has_reserved_memory(pcms) && (machine->ram_slots || (machine->maxram_size > machine->ram_size))) { @@ -901,7 +905,7 @@ void pc_memory_init(PCMachineState *pcms, } /* initialize device memory address space */ - if (pcmc->has_reserved_memory && + if (has_reserved_memory(pcms) && (machine->ram_size < machine->maxram_size)) { ram_addr_t device_mem_size; hwaddr device_mem_base; @@ -1024,7 +1028,7 @@ uint64_t pc_pci_hole64_start(void) if (ppms->cxl_devices_state.is_enabled) { hole64_start = pc_get_cxl_range_end(pcms); - } else if (pcmc->has_reserved_memory && (ms->ram_size < ms->maxram_size)) { + } else if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) { pc_get_device_memory_range(pcms, &hole64_start, &size); if (!pcmc->broken_reserved_end) { hole64_start += size; @@ -1752,7 +1756,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); pcmc->smbios_defaults = true; - pcmc->has_reserved_memory = true; pcmc->enforce_amd_1tb_hole = true; pcmc->pvh_enabled = true; pcmc->kvmclock_create_always = true; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 0bc14da768..e6178f8653 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -830,7 +830,6 @@ static void isapc_machine_options(MachineClass *m) m->rom_file_has_mr = false; pcmc->smbios_defaults = false; pcmc->smbios_legacy_mode = true; - pcmc->has_reserved_memory = false; m->default_nic = "ne2k_isa"; m->default_cpu_type = X86_CPU_TYPE_NAME("486"); m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); From patchwork Thu Mar 28 15:54:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783602 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2799162wrt; Thu, 28 Mar 2024 08:57:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUelRnfrsIySg6Ub9VvXBcnG42OCf4MzHh1oNcBdmni3zLo4wEd9rgNT2+863AbAvVBLwne6H4NbUSQ0jAFEwSw X-Google-Smtp-Source: AGHT+IFG1Pa6t8RE552tKiZFwuRzeqa+0YEV8EQacPjZg+mA9TDAMpCW6ScZXM8Ck5fXzVkyxrD9 X-Received: by 2002:a05:6808:11cf:b0:3c3:bc2d:1801 with SMTP id p15-20020a05680811cf00b003c3bc2d1801mr3133835oiv.51.1711641441481; Thu, 28 Mar 2024 08:57:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641441; 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id dr3-20020a170907720300b00a4a38d10801sm896023ejc.35.2024.03.28.08.56.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 19/29] hw/i386/pc: Pass PcPciMachineState argument to CXL helpers Date: Thu, 28 Mar 2024 16:54:27 +0100 Message-ID: <20240328155439.58719-20-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since CXL helpers expect a PCI-based machine, we can directly pass them a PcPciMachineState argument. Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index e36d76656b..d8e91d18b8 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -705,14 +705,14 @@ static void pc_get_device_memory_range(PCMachineState *pcms, *device_mem_size = size; } -static uint64_t pc_get_cxl_range_start(PCMachineState *pcms) +static uint64_t pc_get_cxl_range_start(PcPciMachineState *ppms) { + PCMachineState *pcms = PC_MACHINE(ppms); MachineState *ms = MACHINE(pcms); hwaddr cxl_base; ram_addr_t size; - if (has_reserved_memory(pcms) && - (ms->ram_size < ms->maxram_size)) { + if ((ms->ram_size < ms->maxram_size)) { pc_get_device_memory_range(pcms, &cxl_base, &size); cxl_base += size; } else { @@ -722,10 +722,9 @@ static uint64_t pc_get_cxl_range_start(PCMachineState *pcms) return cxl_base; } -static uint64_t pc_get_cxl_range_end(PCMachineState *pcms) +static uint64_t pc_get_cxl_range_end(PcPciMachineState *ppms) { - PcPciMachineState *ppms = PC_PCI_MACHINE(pcms); - uint64_t start = pc_get_cxl_range_start(pcms) + MiB; + uint64_t start = pc_get_cxl_range_start(ppms) + MiB; if (ppms->cxl_devices_state.fixed_windows) { GList *it; @@ -937,7 +936,7 @@ void pc_memory_init(PCMachineState *pcms, MemoryRegion *mr = &ppms->cxl_devices_state.host_mr; hwaddr cxl_size = MiB; - cxl_base = pc_get_cxl_range_start(pcms); + cxl_base = pc_get_cxl_range_start(ppms); memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size); memory_region_add_subregion(system_memory, cxl_base, mr); cxl_resv_end = cxl_base + cxl_size; @@ -1027,7 +1026,7 @@ uint64_t pc_pci_hole64_start(void) ram_addr_t size = 0; if (ppms->cxl_devices_state.is_enabled) { - hole64_start = pc_get_cxl_range_end(pcms); + hole64_start = pc_get_cxl_range_end(ppms); } else if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) { pc_get_device_memory_range(pcms, &hole64_start, &size); if (!pcmc->broken_reserved_end) { From patchwork Thu Mar 28 15:54:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783607 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2799975wrt; Thu, 28 Mar 2024 08:59:11 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXIVIlHbVH4+Zk9eaAt6pRFuAi0tAQGY7Td1u+LP6d/y3Gve3QglVohJKQkvATQIfa+trUB1w/wO6d/wcbSalmD X-Google-Smtp-Source: AGHT+IFNnd6uiB8shc87S7sGaiRBE0EoupJeRFsnCSJfBUIz2r9y4sQJ2SDNvuhvt5Gk1bwn5fQJ X-Received: by 2002:a05:6808:ecd:b0:3c3:d1e6:2ecc with SMTP id q13-20020a0568080ecd00b003c3d1e62eccmr3311879oiv.6.1711641550927; Thu, 28 Mar 2024 08:59:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641550; cv=none; d=google.com; s=arc-20160816; b=r5UqEoINVZ1hhWtnwDNh3OIqz2UKqjNxQzilLkTLDAy/HfoGYG1LZvPESpYhJRuf26 8xC+G2MUxpse+HD+f1Dp+BSWtzZwFnsDjlR3hSUNhH6JiUUXgSMVezVC1VBzMdnJhgOh 3ZKSjtIrPuTOg4907pQhq6h8ioxZ8ioMrfYgmdHj2y6rTbGQzF4p2ECjnWui5mDRbzyB TlhlPGwZwffDbh3zbkNlnPUhdHoSdXXgk2jOB7hAVIIGr2kfGSlMU5EuNfOWUbG2+CVJ K0O95GOUOzIAVTc8s3gD60QVi+B78Dub+bup4v9wdUMsz87iYsRiN++e8te+0XWvyPSh Ct0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=3Aa27ZqAQEFmCBsiqy9XwiiPf6EIjcNyjahGDi9IpJg=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=Q4O0c0Ij3psXAkF6LRq3M6aZh2q4cEkHW3tT5CCpU0Az37mC0YYrEx0zWjQ/8MayL7 Py3oOCA7W1mPG45yG9u1hOkCSHyIBU4zueI5g11NY/WuTfP9eA/uiv03NrOj1GHNZZzd knzjARjb4gJc8Dg1b7qnsnBQrqcpxwVeqN/8bMwrZr6gmR0nGuyTUudPq24ZvvvLB8lW j0gqetp4tdQ+uNOtQdYVFW1WfR13zp/kG4/a2nquhcw+IAsP5rgvSgCsJZ6W9dr+zxTQ INW1dZcF4QjI7UQDxYgrtEAAMJd4xzS4XAzF1rKzRlD5NS0F/jujbrrDfMfmnwsYyPq3 BMpw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wmdnFLj8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id u23-20020a170906125700b00a47522c193asm892212eja.196.2024.03.28.08.56.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 20/29] hw/i386/pc: Pass PcPciMachineState argument to pc_pci_hole64_start() Date: Thu, 28 Mar 2024 16:54:28 +0100 Message-ID: <20240328155439.58719-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pc_pci_hole64_start() is only used by PCI-based machines. Pass it a PcPciMachineState argument, removing a qdev_get_machine() call. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 2 +- hw/i386/pc.c | 8 ++++---- hw/pci-host/i440fx.c | 2 +- hw/pci-host/q35.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index df4c813854..7da0bc8aa4 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -157,7 +157,7 @@ void pc_memory_init(PCMachineState *pcms, MemoryRegion *system_memory, MemoryRegion *rom_memory, uint64_t pci_hole64_size); -uint64_t pc_pci_hole64_start(void); +uint64_t pc_pci_hole64_start(PcPciMachineState *ppms); DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); void pc_basic_device_init(struct PCMachineState *pcms, ISABus *isa_bus, qemu_irq *gsi, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d8e91d18b8..b83abee8e9 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -747,7 +747,8 @@ static hwaddr pc_max_used_gpa(PCMachineState *pcms, uint64_t pci_hole64_size) if (cpu->env.features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { /* 64-bit systems */ - return pc_pci_hole64_start() + pci_hole64_size - 1; + PcPciMachineState *ppms = PC_PCI_MACHINE(pcms); + return pc_pci_hole64_start(ppms) + pci_hole64_size - 1; } /* 32-bit systems */ @@ -1016,11 +1017,10 @@ void pc_memory_init(PCMachineState *pcms, * The 64bit pci hole starts after "above 4G RAM" and * potentially the space reserved for memory hotplug. */ -uint64_t pc_pci_hole64_start(void) +uint64_t pc_pci_hole64_start(PcPciMachineState *ppms) { - PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); + PCMachineState *pcms = PC_MACHINE(ppms); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); - PcPciMachineState *ppms = PC_PCI_MACHINE(pcms); MachineState *ms = MACHINE(pcms); uint64_t hole64_start = 0; ram_addr_t size = 0; diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 4f0a0438d7..add99e4f76 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -180,7 +180,7 @@ static uint64_t i440fx_pcihost_get_pci_hole64_start_value(Object *obj) pci_bus_get_w64_range(h->bus, &w64); value = range_is_empty(&w64) ? 0 : range_lob(&w64); if (!value && s->pci_hole64_fix) { - value = pc_pci_hole64_start(); + value = pc_pci_hole64_start(PC_PCI_MACHINE(qdev_get_machine())); } return value; } diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 0d7d4e3f08..baf55897b2 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -123,7 +123,7 @@ static uint64_t q35_host_get_pci_hole64_start_value(Object *obj) pci_bus_get_w64_range(h->bus, &w64); value = range_is_empty(&w64) ? 0 : range_lob(&w64); if (!value && s->pci_hole64_fix) { - value = pc_pci_hole64_start(); + value = pc_pci_hole64_start(PC_PCI_MACHINE(qdev_get_machine())); } return value; } From patchwork Thu Mar 28 15:54:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783609 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2800132wrt; Thu, 28 Mar 2024 08:59:28 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXzBFESMRmEYLbrLVrYAiOH9oEaeoJ4oW2ZkZetVxoE0KwgHUXDJ/Winm4RfJy4yJQ07I/t2a8j5kpvjYVOWC31 X-Google-Smtp-Source: AGHT+IEyGaYx3cCjzYQ49wOZSJYCikyKm0gesPuhlDlOBAcAWcjc4Zq53xHnSpcGb96NeBc2dIaW X-Received: by 2002:a0c:e283:0:b0:696:b0fc:3bfa with SMTP id r3-20020a0ce283000000b00696b0fc3bfamr2773522qvl.14.1711641568376; Thu, 28 Mar 2024 08:59:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641568; cv=none; d=google.com; s=arc-20160816; b=vpTrpNsn/SuG8E3ywouV/sdUfubeNexoE7H5ipX49QbSX9X0SeihLG2FZgncFYX56/ w2P+uYocRoBA5RA4o1ABnVJm5psfPCaanurdpgUap+GTM6LtP4gpKjgOG8C7Ce/dS671 28phUR7AKs1r682TLvyn6fpIUDmQzkLyE8a30I/fT0aQq3p8y7tzGkp/maUwa5DRblr1 xHs83xD1eEf3gEavMlUy7Y2A66EHM8dUEI4v5FwllrUR/4ZDZI+lsYZOHjChNfiS4NHi LEpcmzWuPSqvP7vtkCfO4Ze+/4IQ71UbyhaYzquLEwowLg9CIyCnc4X9lBnEYk7LMnNh 4Mxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wAY/yw6dYKkUP/WFLvpvljjwD9mQwkPWyyzr0cq0w+A=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=r8574RUue50/rTDMxyWfIbkgCzQ7f0BZAGBOCTMnWsUgevUbPXEXm2AaJkYYApiZqJ 1uQXDWXq94DBOnSsjauucKzWYFUzRQGp0AztKy7BNuL+UUmH/Ox/K1ldb4ZQddiLRp+R cmn8w+3atevtJphY+AM6og3f/SruVFDT9gWJ19p4YmZOghzRNOQiAxi8UW4qnlYHlhPA hcrfWmRcQl6YMU3bUCmZz2ThLQ13oYWXtql83Gs0S+ld4JGfbjXMOVgJPSbT/DTnI3iP V6gLXwHDx0HNqp9qHHNvv0LbLzzJ+A5+dnAdqUrTOfthe6AAkcdEFCEd6PuiBs1qKgD6 uCJg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JNDl9J4S; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id x16-20020a170906135000b00a46ee3c31afsm884227ejb.154.2024.03.28.08.56.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 21/29] hw/i386/fw_cfg: Include missing 'qapi-types-machine.h' header Date: Thu, 28 Mar 2024 16:54:29 +0100 Message-ID: <20240328155439.58719-22-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "fw_cfg.h" declares fw_cfg_build_smbios() which use SmbiosEntryPointType, itself declared in "qapi-types-machine.h". void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, SmbiosEntryPointType ep_type); ^^^^^^^^^^^^^^^^^^^^ Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/fw_cfg.h | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h index 92e310f5fd..7a426119f8 100644 --- a/hw/i386/fw_cfg.h +++ b/hw/i386/fw_cfg.h @@ -12,6 +12,7 @@ #include "hw/boards.h" #include "hw/i386/pc.h" #include "hw/nvram/fw_cfg.h" +#include "qapi/qapi-types-machine.h" #define FW_CFG_IO_BASE 0x510 From patchwork Thu Mar 28 15:54:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783608 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2799983wrt; Thu, 28 Mar 2024 08:59:12 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXW5frfUscZKqT9evH65nSQjLQ2B98ut7RxdCCKTbZhpJIgvX/mwIHch5fL6pNO3Woeb0SAIIXyLi1ttA2gGWJo X-Google-Smtp-Source: AGHT+IGmGZkkiqDNE2uyY37aZAbJuTwsgxMX/X561dlWqW9rQbgqsDEbZRVV9mXd44nYUtBY0OQy X-Received: by 2002:a05:620a:4ad1:b0:78a:72cd:b8b6 with SMTP id sq17-20020a05620a4ad100b0078a72cdb8b6mr3245234qkn.18.1711641552003; Thu, 28 Mar 2024 08:59:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641551; cv=none; d=google.com; s=arc-20160816; b=tAD3/uaTJokSpT2kx2ecHMFI7M5R/4XuTAxBO5d4Md/JNkepUuJSuUeZcc4B0VJ1Tf LZDwYK9fQrGXyv+zIsREoNRl85Gs+Dqh79SC8dQjs8r8uqNMA9fkVGe8Pfaro+vOBAQr 9FynRfq0c5/r2qwIr8vLkBCYPqko8R1KF+9mQIeC/SNxl+8TnTZPAVekOKGqoR5iqs0y Uz+jaFr52M4jQKZr6KFzHMMJWo0stxdHXzu7uleMNCtuky0O7TvdZjQJhrb5M/vnXpT/ ile/qN5LEH/bGo4KgC/F+6bYM3VukuwsAI4t7NOmbvAoC9RCebIUILzK4E0bTsEtmagS Jjwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=EBrGlAtp7IiqJxUt6Mnv7AOEnMWPJd0FVBqTzh3q09E=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=nloBPW+2ex5KkWRFqrbpqtpV2Se2rcSjWS6bYrxEnDAm17GodqrnIIYrF7bPj2Zns6 A+x5v0bz1YTuRXlXFe9kXQheDZGcEEIT3QGKBbUk1A22jceEXK1X/M3R+RxEyzmAI5mj jytAVupnSSt0tfjVUvflFMjOndUn3ynzY9/SYle3hj/nvW+NF1g9es35UbFq4W76sdRD H1pJS4hZTbjQSM2CMhdqjSIFa0P1INRofpVdVslWMwb2Bw/uHjxfnl2NGSmy8WOuacOA MEfNEYCa3Og2mP0uQFNKvYqWT15zNAkxNbF5GILMeFlr0qzp2eHeBj2tLPhDMuSV50nm jMcw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=I7d976Me; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id c7-20020a170906340700b00a468bf8586bsm906768ejb.174.2024.03.28.08.56.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:00 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 22/29] hw/i386/fw_cfg: Define fw_cfg_build_smbios() stub Date: Thu, 28 Mar 2024 16:54:30 +0100 Message-ID: <20240328155439.58719-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We are going to refactor fw_cfg_build_smbios() in the next patches. In order to avoid too much #ifdef'ry in it, define a stub. Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/fw_cfg-smbios-stub.c | 15 +++++++++++++++ hw/i386/fw_cfg.c | 4 ++-- hw/i386/meson.build | 1 + 3 files changed, 18 insertions(+), 2 deletions(-) create mode 100644 hw/i386/fw_cfg-smbios-stub.c diff --git a/hw/i386/fw_cfg-smbios-stub.c b/hw/i386/fw_cfg-smbios-stub.c new file mode 100644 index 0000000000..37dbfdee7c --- /dev/null +++ b/hw/i386/fw_cfg-smbios-stub.c @@ -0,0 +1,15 @@ +/* + * QEMU fw_cfg/SMBIOS stubs + * + * SPDX-License-Identifier: GPL-2.0-or-later + * SPDX-FileCopyrightText: 2024 Linaro Ltd. + */ + +#include "qemu/osdep.h" +#include "hw/firmware/smbios.h" +#include "fw_cfg.h" + +void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, + SmbiosEntryPointType ep_type) +{ +} diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index ecc4047a4b..14a7dfbdc9 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -48,10 +48,10 @@ const char *fw_cfg_arch_key_name(uint16_t key) return NULL; } +#ifdef CONFIG_SMBIOS void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, SmbiosEntryPointType ep_type) { -#ifdef CONFIG_SMBIOS uint8_t *smbios_tables, *smbios_anchor; size_t smbios_tables_len, smbios_anchor_len; struct smbios_phys_mem_area *mem_array; @@ -100,8 +100,8 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor", smbios_anchor, smbios_anchor_len); } -#endif } +#endif FWCfgState *fw_cfg_arch_create(MachineState *ms, uint16_t boot_cpus, diff --git a/hw/i386/meson.build b/hw/i386/meson.build index d8b70ef3e9..1a6e731196 100644 --- a/hw/i386/meson.build +++ b/hw/i386/meson.build @@ -6,6 +6,7 @@ i386_ss.add(files( 'multiboot.c', 'x86.c', )) +i386_ss.add(when: 'CONFIG_SMBIOS', if_false: files('fw_cfg-smbios-stub.c')) i386_ss.add(when: 'CONFIG_X86_IOMMU', if_true: files('x86-iommu.c'), if_false: files('x86-iommu-stub.c')) From patchwork Thu Mar 28 15:54:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783603 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2799177wrt; Thu, 28 Mar 2024 08:57:24 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWulW74Aa6V6B7XhkXzfSMVlcRjsqQ8MFMAVBcjtuQJXDf4iGoHESexCz2dxDzKKMYF33lIlOP6XIMQupiX30bq X-Google-Smtp-Source: AGHT+IH4sjHEZ7iSZQSvrQSkxfiBAVKNhrxOM4yU0QdxEdqPuom5O+g6yJoPMVLBnSZoIKvCttAc X-Received: by 2002:a05:6102:5491:b0:478:43f6:9ade with SMTP id bk17-20020a056102549100b0047843f69ademr3972631vsb.19.1711641443778; Thu, 28 Mar 2024 08:57:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641442; cv=none; d=google.com; s=arc-20160816; b=O+jvYqx2lERSWekXiyhbrpLhVJzD2vRsaIZkg3IEmJ5BLtxJajpGxQ6QAoPtHf++2N qYK4Yh6Z9MZvvdwWMfSrfQ/AZrWx0ecngJMfTC23MRzsGktACswnnIwQKpSPZLgCgnBq YK3eU3QZUySzMqvEzPzPSs+qYsMHj8nasNtEeBcAubztVNWnFRJI/b9EJ3iXgKGpttqc OPCvYIyFeqUFfEwRSywM3Yf+A3rRTobZsYO+giyz3HpPsVoMEj0eschkoR7NImoCqbzR KYuPzestMNUhQoTGdgDmRl0zEZ3Vo9emEAaG/hdWsML0nZ6tYhENNucUvL2z4OLu3KLz 7Dng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4BSXB7GHW5TBQXIjnxuyxFyj9B1iDsM8cHi/htTyRxs=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=p7aKJTkW5tXlOrGJb0t5YoaToEIUMt20660NCzEzd/e0VL75C/wq/gm9AHugGdgwOx g362ky27gnYx0sldqhDMaMaEKG2vY+yRapZ79rV4o8pzdg56PpbNLBUR+cPJS8fLvWVl Oozl8iCDVU+DXqkpEiFHw7Xqo4Lu5zi7Dl8zyaKePLyEMDtZh25vgBqURX6WAY0MGT+d 2VCkBU9YQmHwSUs6KBFN5i50D0tLKZlp9U70nx23WfJGh0G6KGKmgbO6nxTSr42fMCjf HD7ANUPkE4BdL0I6vwtx/lBWgHiw88O3eFjmZRGsPrByCpGjzNJo25zEe6AlfptsPXbt t40g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bamZfs6Z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id f8-20020a17090624c800b00a46fbff47a6sm891626ejb.168.2024.03.28.08.57.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:06 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 23/29] hw/i386/fw_cfg: Inline smbios_defaults() Date: Thu, 28 Mar 2024 16:54:31 +0100 Message-ID: <20240328155439.58719-24-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All PCI-based machines have the smbios_defaults field set to %true. Simplify by using an inlined helper checking whether the machine is PCI-based or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 1 - hw/i386/fw_cfg.c | 7 ++++++- hw/i386/pc.c | 1 - hw/i386/pc_piix.c | 1 - 4 files changed, 6 insertions(+), 4 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 7da0bc8aa4..6a6a8df005 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -86,7 +86,6 @@ typedef struct PCMachineClass { int default_cpu_version; /* SMBIOS compat: */ - bool smbios_defaults; bool smbios_legacy_mode; SmbiosEntryPointType default_smbios_ep_type; diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 14a7dfbdc9..f60390ed56 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -49,6 +49,11 @@ const char *fw_cfg_arch_key_name(uint16_t key) } #ifdef CONFIG_SMBIOS +static bool smbios_defaults(PCMachineState *pcms) +{ + return pc_machine_is_pci_enabled(pcms); +} + void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, SmbiosEntryPointType ep_type) { @@ -61,7 +66,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, MachineClass *mc = MACHINE_GET_CLASS(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); - if (pcmc->smbios_defaults) { + if (smbios_defaults(pcms)) { /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", mc->desc, mc->name); } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b83abee8e9..7a758a2e84 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1754,7 +1754,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) PCMachineClass *pcmc = PC_MACHINE_CLASS(oc); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); - pcmc->smbios_defaults = true; pcmc->enforce_amd_1tb_hole = true; pcmc->pvh_enabled = true; pcmc->kvmclock_create_always = true; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index e6178f8653..70dc8686f9 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -828,7 +828,6 @@ static void isapc_machine_options(MachineClass *m) m->max_cpus = 1; m->option_rom_has_mr = true; m->rom_file_has_mr = false; - pcmc->smbios_defaults = false; pcmc->smbios_legacy_mode = true; m->default_nic = "ne2k_isa"; m->default_cpu_type = X86_CPU_TYPE_NAME("486"); From patchwork Thu Mar 28 15:54:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783610 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2800167wrt; Thu, 28 Mar 2024 08:59:31 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX7Kf4upE0jJ7PrMjmd31MgiyBuTKXBWu9MiwQutvhVVfptkGWSZGxA8013vXSUNigQu9lbdBwfojrrpqHW9bIh X-Google-Smtp-Source: AGHT+IE0VYv3y68IZANUJcF66shXYDE59gT1gn6Zm6AC26dGL+sOGfhgXpPyX4fLYyx03+GOSPak X-Received: by 2002:a05:622a:1045:b0:431:1df3:6c3e with SMTP id f5-20020a05622a104500b004311df36c3emr3594420qte.34.1711641570818; Thu, 28 Mar 2024 08:59:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641570; cv=none; d=google.com; s=arc-20160816; b=lJkWmkXs8JuZ24MyJjj6D5lu532aaoi/aQyR4/QlajIid77Pyqzp1H/J0RrtHgqaCl QPhsagLLF+hAttPcsxReFOW7OwP5gphyqPG7ay6/tcKqo8wONdbyQ4CcIokY51SkWUEh FN5y0ANGSvcR/7gI1ABghzx3VpwHsyYowN/anqIc4mnazapfpSMhzCkeilfb8XgSaVQP T8Gqz5AvusOAP6MlCogpIw+aWwRjBfcJmz831wyryjYT+1mE1MF98MmPlXMbzyTB/Uxp sNxEJT/AfQT5YU2zlqf2XuVimEF6rEDoWrH2VHfx/hP+kOFdz98bneP2HvxKG1CMuLjO NEtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Jd0AyxLTXxReg2ZsCl/5FvAkstq2JBvxx9RU6rO30AU=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=XExIk4qaXxyW6fgrREpdDkF4L6rdhXhbiamgqodK8jjPYHUo1fdq8vN5AkpAYDzOmQ tXxo4UOZa+KAp2yH4MAA5/BEASAOZO9w3gY/56CuUJeiCIA2jBJch6PpzvPAMBug5XG0 xhL4kAY+byHW5iaRXingTcN/htCYlTeqig4QUH2rs5ycH9vrCp0g1XQsnMjRI/M3dGwv zS5+JXLvIi1Zi7/sWC3WZ7kKUcM5sGDwBuhlSSPS72hNVbRWVddyVVm2Lei4AOb7ft4y nVEQAMpxS4xsKAtqfLsBJ9KKj16Wr/L7tDSlrtoqO6ruHmpxx+PwZB4qpnt+S81y3m8D xXZQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YaFF0AYh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id lh23-20020a170906f8d700b00a46ab5aaffcsm898765ejb.178.2024.03.28.08.57.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:12 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 24/29] hw/i386/fw_cfg: Inline smbios_legacy_mode() Date: Thu, 28 Mar 2024 16:54:32 +0100 Message-ID: <20240328155439.58719-25-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::232; envelope-from=philmd@linaro.org; helo=mail-lj1-x232.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All PCI-based machines have the smbios_legacy_mode field set to %false. Simplify by using an inlined helper checking whether the machine is PCI-based or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 1 - hw/i386/fw_cfg.c | 8 ++++++-- hw/i386/pc_piix.c | 2 -- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 6a6a8df005..6510914803 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -86,7 +86,6 @@ typedef struct PCMachineClass { int default_cpu_version; /* SMBIOS compat: */ - bool smbios_legacy_mode; SmbiosEntryPointType default_smbios_ep_type; /* RAM / address space compat: */ diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index f60390ed56..ffa60a4a33 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -54,6 +54,11 @@ static bool smbios_defaults(PCMachineState *pcms) return pc_machine_is_pci_enabled(pcms); } +static bool smbios_legacy_mode(PCMachineState *pcms) +{ + return !pc_machine_is_pci_enabled(pcms); +} + void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, SmbiosEntryPointType ep_type) { @@ -62,7 +67,6 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, struct smbios_phys_mem_area *mem_array; unsigned i, array_count; MachineState *ms = MACHINE(pcms); - PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); MachineClass *mc = MACHINE_GET_CLASS(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); @@ -74,7 +78,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, /* tell smbios about cpuid version and features */ smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]); - if (pcmc->smbios_legacy_mode) { + if (smbios_legacy_mode(pcms)) { smbios_tables = smbios_get_table_legacy(&smbios_tables_len, &error_fatal); fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 70dc8686f9..4f07476cfa 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -823,12 +823,10 @@ DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, #ifdef CONFIG_ISAPC static void isapc_machine_options(MachineClass *m) { - PCMachineClass *pcmc = PC_MACHINE_CLASS(m); m->desc = "ISA-only PC"; m->max_cpus = 1; m->option_rom_has_mr = true; m->rom_file_has_mr = false; - pcmc->smbios_legacy_mode = true; m->default_nic = "ne2k_isa"; m->default_cpu_type = X86_CPU_TYPE_NAME("486"); m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); From patchwork Thu Mar 28 15:54:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783606 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2799968wrt; Thu, 28 Mar 2024 08:59:10 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX2Zr37bMX3t1WFkQ/4sb3//zex5PKEaaoedIZDtBWnK3AV2s/w/IZ7/0HMdbqMHgQxnGD7LGohVyiEr0+qvn6R X-Google-Smtp-Source: AGHT+IHYSETA8cvT54qcPQ4jQ03iUEr4P0KdwXU5rlW+kqYm8szs2NjraK06VAQy71BLXGM74ZtF X-Received: by 2002:a05:620a:44c4:b0:78a:6546:7e80 with SMTP id y4-20020a05620a44c400b0078a65467e80mr3536138qkp.54.1711641550581; Thu, 28 Mar 2024 08:59:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641550; cv=none; d=google.com; s=arc-20160816; b=du2rF3ZQKdlZR+7zxwOyqHDrBXYy1sZ/Ik8knONIxIrhxVVROqtZlEZSj02EOyK0+e WdtFEBRy2HU4E6JSmeDkW1wxaVfbJaV+sd4iAY1sN5mhYjz8kMlMwulSpnbwCJcsrav5 yWuBs47/LPNMDNgSD6zebJ4isuyrNONyZPfpBPNk+HYov1iZPiBrfCicNPIl0Ni1vcKg /S6+Dnc0Ie7PhyQ96ZW/FCDWbbuFFaqyK1yrhat4UH1djQXEp4Os8+tMK/iSXwyaynQx HgNJxUwvW8PYfsUPYyVfv9ajoYfVDbdoDE6Y3O1HQLzbpq14bnt2cV4b2ckFHpaQeKWq G9PQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=KZcClnRjP7+/0e8fY+P9N5bd75aoGZ6efgZZhKhlNAY=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=sag9fOHBTiYWOTftdobNgxbNujknjXbzkaF7AeF0aKG7sRw0U1DuQECnjJRYQEWEsR i13CJmv3cu0lEsKP3v3J3DTgOJzrFKywv+K4nhcct7DezuFUh1RK23bfz8rUl+bm9+gp ydkLu/KCa+kMwT8RQtlopWoj821xM7gCrgQ8TV45P9JGluLiCn5sPAwOfVloW9s62CvE N7PFxQznY6M6ueAGr+f8XMJU1GWwW3EV8zRpolRrp8F5u4H482HHrxaZcw6rCLyrCSf6 gcodKxdnOge9jB9R7S/8rbHhm1FtWRSVa4XahqguJ3A0QgZWn43OTXa7Fw0bK7z4vnqE Ik1Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TyCwPyPh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id eb16-20020a170907281000b00a4e0df9e793sm887845ejc.136.2024.03.28.08.57.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 25/29] hw/i386/fw_cfg: Replace smbios_defaults() by !smbios_legacy_mode() Date: Thu, 28 Mar 2024 16:54:33 +0100 Message-ID: <20240328155439.58719-26-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=philmd@linaro.org; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org smbios_defaults() and smbios_legacy_mode() are logical opposite. Simplify using the latter. Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/fw_cfg.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index ffa60a4a33..df05fe060c 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -49,11 +49,6 @@ const char *fw_cfg_arch_key_name(uint16_t key) } #ifdef CONFIG_SMBIOS -static bool smbios_defaults(PCMachineState *pcms) -{ - return pc_machine_is_pci_enabled(pcms); -} - static bool smbios_legacy_mode(PCMachineState *pcms) { return !pc_machine_is_pci_enabled(pcms); @@ -70,7 +65,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, MachineClass *mc = MACHINE_GET_CLASS(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); - if (smbios_defaults(pcms)) { + if (!smbios_legacy_mode(pcms)) { /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", mc->desc, mc->name); } From patchwork Thu Mar 28 15:54:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783614 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2801378wrt; Thu, 28 Mar 2024 09:01:11 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWtBceccaDyTRKCqOAtrF3zDymJN7VoRDS/ygXCeYfI61HuG/H0oyWwv/0hYD9ThWZwzJ5DMoC5vGweWsaITTfm X-Google-Smtp-Source: AGHT+IGb36CCplZBjY7POLZir1M12QFcrPk1rMHNi5WBsfESDP3OKbJWeb1RUMf77cg/HyV1YXo1 X-Received: by 2002:a25:b87:0:b0:dcf:a4a8:5fb3 with SMTP id 129-20020a250b87000000b00dcfa4a85fb3mr1880139ybl.11.1711641671044; Thu, 28 Mar 2024 09:01:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641671; cv=none; d=google.com; s=arc-20160816; b=j6E8s8n7oAmiJ+qcd0LePQ9lzKkIdI0bLeMwyleciOfbue6Oi+pv/nGhn25WS175n1 jwefSWNkKp4WgOkVcN4k1JL+qNaqJefwT2n4XFq9TUMB3re6PSFr6ah+nYaj/uq0n52d bQGkIaLt/RN1BL5FMzaaQ/Nv3ZXrxChpU/g00cozCwhNf8+ydg9KSWN/0ttSgMJVANs8 eVbajPy8YH6ZBuzzPNm/WHaHhJEdOKm/DRoezd04+n/0lRYOFsvD77IfceIt1oeAeChs nSlN7EGg/+sanFfpTst061ZBRzhejNh5nylAgmWXYuyt2E6oS3nSOnWgpB4Fcr30u4Vu rnIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9JGjTd1WToEahvAfY8NVbIAQ8SXrGvIMBj7UnII/d+c=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=ThlPrxd9d1cg8Izw3p6eJEiT3LXn8/hgz42UaP5Fp6p4YaE+QbE8Y2o9rJWXw/mvy8 a8g5EBp6DKyl6GLYscoBM+7JzFhiX3+z2LtD5IaTobabRHrz45culOoc6Sq2uDBjhNvs RUDnFYo8RLe7a8k/YcrUh20FuUTlNajK6wBS9puGUCzP3elzMIyzGMLaPfzexIwi01aL iw9X1GvvBaYllEoPgmHI2LFLxMx4WmctJ4pt32Ou6Z234Xx7pbOyuVkV6XqPgKCLDawL IQglYXer87kJrsRRPJM7rnVynbeqMqjLjas5/uA6RWoC6ty7fL8NeRzYfnLT3msS056J 7Qjg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tlzTTWfd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id k13-20020a1709067acd00b00a47df55cf5esm914850ejo.13.2024.03.28.08.57.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:24 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 26/29] hw/i386/fw_cfg: Factor fw_cfg_build_smbios_legacy() out Date: Thu, 28 Mar 2024 16:54:34 +0100 Message-ID: <20240328155439.58719-27-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Factor fw_cfg_build_smbios_legacy() out of fw_cfg_build_smbios(). Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/fw_cfg.h | 1 + hw/i386/fw_cfg-smbios-stub.c | 4 ++++ hw/i386/fw_cfg.c | 33 ++++++++++++++++++++++----------- 3 files changed, 27 insertions(+), 11 deletions(-) diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h index 7a426119f8..25ce86ec1b 100644 --- a/hw/i386/fw_cfg.h +++ b/hw/i386/fw_cfg.h @@ -24,6 +24,7 @@ FWCfgState *fw_cfg_arch_create(MachineState *ms, uint16_t boot_cpus, uint16_t apic_id_limit); +void fw_cfg_build_smbios_legacy(PCMachineState *pcms, FWCfgState *fw_cfg); void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, SmbiosEntryPointType ep_type); void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg); diff --git a/hw/i386/fw_cfg-smbios-stub.c b/hw/i386/fw_cfg-smbios-stub.c index 37dbfdee7c..da00ffc9ae 100644 --- a/hw/i386/fw_cfg-smbios-stub.c +++ b/hw/i386/fw_cfg-smbios-stub.c @@ -13,3 +13,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, SmbiosEntryPointType ep_type) { } + +void fw_cfg_build_smbios_legacy(PCMachineState *pcms, FWCfgState *fw_cfg) +{ +} diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index df05fe060c..be37e28f46 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -54,6 +54,22 @@ static bool smbios_legacy_mode(PCMachineState *pcms) return !pc_machine_is_pci_enabled(pcms); } +void fw_cfg_build_smbios_legacy(PCMachineState *pcms, FWCfgState *fw_cfg) +{ + uint8_t *smbios_tables; + size_t smbios_tables_len; + MachineState *ms = MACHINE(pcms); + X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); + + /* tell smbios about cpuid version and features */ + smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]); + + smbios_tables = smbios_get_table_legacy(&smbios_tables_len, + &error_fatal); + fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, + smbios_tables, smbios_tables_len); +} + void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, SmbiosEntryPointType ep_type) { @@ -65,22 +81,17 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, MachineClass *mc = MACHINE_GET_CLASS(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); - if (!smbios_legacy_mode(pcms)) { - /* These values are guest ABI, do not change */ - smbios_set_defaults("QEMU", mc->desc, mc->name); + if (smbios_legacy_mode(pcms)) { + fw_cfg_build_smbios_legacy(pcms, fw_cfg); + return; } + /* These values are guest ABI, do not change */ + smbios_set_defaults("QEMU", mc->desc, mc->name); + /* tell smbios about cpuid version and features */ smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]); - if (smbios_legacy_mode(pcms)) { - smbios_tables = smbios_get_table_legacy(&smbios_tables_len, - &error_fatal); - fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, - smbios_tables, smbios_tables_len); - return; - } - /* build the array of physical mem area from e820 table */ mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries()); for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) { From patchwork Thu Mar 28 15:54:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783612 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2800329wrt; Thu, 28 Mar 2024 08:59:48 -0700 (PDT) X-Forwarded-Encrypted: i=2; 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id o19-20020a17090637d300b00a46cc48ab07sm894776ejc.221.2024.03.28.08.57.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 27/29] hw/i386/pc: Call fw_cfg_build_smbios_legacy() in pc_machine_done() Date: Thu, 28 Mar 2024 16:54:35 +0100 Message-ID: <20240328155439.58719-28-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Keep fw_cfg_build_smbios() for PCI-based machines, call fw_cfg_build_smbios_legacy() directly from pc_machine_done(). Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/fw_cfg.c | 10 ---------- hw/i386/pc.c | 12 +++++++++++- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index be37e28f46..92e058446f 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -49,11 +49,6 @@ const char *fw_cfg_arch_key_name(uint16_t key) } #ifdef CONFIG_SMBIOS -static bool smbios_legacy_mode(PCMachineState *pcms) -{ - return !pc_machine_is_pci_enabled(pcms); -} - void fw_cfg_build_smbios_legacy(PCMachineState *pcms, FWCfgState *fw_cfg) { uint8_t *smbios_tables; @@ -81,11 +76,6 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, MachineClass *mc = MACHINE_GET_CLASS(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); - if (smbios_legacy_mode(pcms)) { - fw_cfg_build_smbios_legacy(pcms, fw_cfg); - return; - } - /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", mc->desc, mc->name); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 7a758a2e84..7d06a088cf 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -591,6 +591,11 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level) } } +static bool smbios_legacy_mode(PCMachineState *pcms) +{ + return !pc_machine_is_pci_enabled(pcms); +} + static void pc_machine_done(Notifier *notifier, void *data) { @@ -602,7 +607,12 @@ void pc_machine_done(Notifier *notifier, void *data) x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); if (x86ms->fw_cfg) { - fw_cfg_build_smbios(pcms, x86ms->fw_cfg, pcms->smbios_entry_point_type); + if (smbios_legacy_mode(pcms)) { + fw_cfg_build_smbios_legacy(pcms, x86ms->fw_cfg); + } else { + fw_cfg_build_smbios(pcms, x86ms->fw_cfg, + pcms->smbios_entry_point_type); + } fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); From patchwork Thu Mar 28 15:54:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783616 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2801417wrt; Thu, 28 Mar 2024 09:01:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUvSyKrXi44pOciyWuZmFq6ysu8+9RO1pfkLX8kuijUpdUv+xNP0UH2TMotLfUWTR6+2Lo+qvLKxyTjfitcbhI/ X-Google-Smtp-Source: AGHT+IFnmhts45583iq4L3bYkIFMTizyPSYupLshpnHI/FCe/cMn/9HX1uIOHLTsHgDarun+Uqck X-Received: by 2002:a25:abb0:0:b0:dbd:8f9:a71 with SMTP id v45-20020a25abb0000000b00dbd08f90a71mr3545781ybi.28.1711641674626; Thu, 28 Mar 2024 09:01:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641674; cv=none; d=google.com; s=arc-20160816; b=OHA9uwxNZtaMC8PqudoOp1ctQyJKm8F4bSqsEPojFpwLCxQNg4phykeEP6MlTMQuIM XmBRm8AuKkgTZuKHLKr8tGbiTsjJIJoY+KBjqJbafo/b9ZotlMSbt2PS+Br/ItMtqnxl RxUcqjwOEkvhaNN3GnZNIvV0jzhVR3EcPxg8d9kkHYYZx3SUIRPTOeM3JWEoiru7PYUr 96OAGR19r2K5G3K7FS7PzYstei0qU66/5TpX8TUvX3sqsk93SJHq7IrKQ848/yk01LEk AWgWTPThoNreTLoascMYWIUkc9fr/yGCX+6XbcwG5r0BR1ruGciP9WEXb6UJ5HnYb6oX gl8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=WrzkMtkcnF1yss3niHYQFeUj6lW7JvFYG513ZWQp60s=; fh=FCDpobIq9h/Qd47aTTjoRzdcc3B/MJjoHRopvMjPTWM=; b=fd7tYPpwalnVbA+rJAd3Ic2k6fV3QFROVPkYEE7QVUDwsK3Rb71o3+zSI6IrNBjkTY U5IRVpaNaLPgJmKgvFl3q3mZPjX51bbAaI9zTgDBwz0abssbf7Kx/utyhFJA87rJV9hp HjZCO5x05gg/KaX++KryMfHWqVPVpi2/+tI8M1qrGlqDu7ykEoVJKol9kmQrl5jrqT00 S8xIKMJXXZdYdiHa6nK4b1Jg0/bEvWRg2Tw1A/jhmETwn1qmoSzlnyqPKjbqBjRLyqui JdttGgpNE9vHNALGIuMaBYmrAi9ZlaSemxlpIfhwN6BCAC/Ocn2bzuw+r33EkFoGY5q7 Ya0w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uIgXU92O; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id ek25-20020a056402371900b0056bdc4a5cd6sm959160edb.62.2024.03.28.08.57.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , =?utf-8?q?Herv=C3=A9_Poussineau?= Subject: [RFC PATCH-for-9.1 28/29] hw/i386/pc: Rename pc_init1() -> pc_piix_init() Date: Thu, 28 Mar 2024 16:54:36 +0100 Message-ID: <20240328155439.58719-29-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=philmd@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pc_init1() is specific to the isapc and i440fx/piix machines, rename it as pc_piix_init(). Expose it in "hw/i386/pc.h" to be able to call it externally (see next patch). Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 1 + hw/i386/pc_piix.c | 8 ++++---- hw/isa/piix.c | 2 +- hw/pci-host/i440fx.c | 2 +- 4 files changed, 7 insertions(+), 6 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 6510914803..9a11835b7e 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -163,6 +163,7 @@ void pc_basic_device_init(struct PCMachineState *pcms, bool create_fdctrl, uint32_t hpet_irqs); void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); +void pc_piix_init(MachineState *machine, const char *pci_type); void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 4f07476cfa..4a3ae72fe4 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -111,7 +111,7 @@ static bool gigabyte_align(PCMachineState *pcms) } /* PC hardware initialisation */ -static void pc_init1(MachineState *machine, const char *pci_type) +void pc_piix_init(MachineState *machine, const char *pci_type) { PCMachineState *pcms = PC_MACHINE(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); @@ -437,7 +437,7 @@ static void pc_set_south_bridge(Object *obj, int value, Error **errp) #ifdef CONFIG_ISAPC static void pc_init_isa(MachineState *machine) { - pc_init1(machine, NULL); + pc_piix_init(machine, NULL); } #endif @@ -447,7 +447,7 @@ static void pc_xen_hvm_init_pci(MachineState *machine) const char *pci_type = xen_igd_gfx_pt_enabled() ? TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; - pc_init1(machine, pci_type); + pc_piix_init(machine, pci_type); } static void pc_xen_hvm_init(MachineState *machine) @@ -472,7 +472,7 @@ static void pc_xen_hvm_init(MachineState *machine) if (compat) { \ compat(machine); \ } \ - pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \ + pc_piix_init(machine, TYPE_I440FX_PCI_DEVICE); \ } \ DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn, \ TYPE_PC_PCI_MACHINE) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index 2d30711b17..14dc9e78be 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -432,7 +432,7 @@ static void pci_piix_class_init(ObjectClass *klass, void *data) k->class_id = PCI_CLASS_BRIDGE_ISA; /* * Reason: part of PIIX southbridge, needs to be wired up by e.g. - * pc_piix.c's pc_init1() + * pc_piix.c's pc_piix_init() */ dc->user_creatable = false; device_class_set_props(dc, pci_piix_props); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index add99e4f76..9f47d5507a 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -374,7 +374,7 @@ static void i440fx_pcihost_class_init(ObjectClass *klass, void *data) dc->realize = i440fx_pcihost_realize; dc->fw_name = "pci"; device_class_set_props(dc, i440fx_props); - /* Reason: needs to be wired up by pc_init1 */ + /* Reason: needs to be wired up by pc_piix_init */ dc->user_creatable = false; object_class_property_add(klass, PCI_HOST_PROP_PCI_HOLE_START, "uint32", From patchwork Thu Mar 28 15:54:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 783611 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp2800304wrt; Thu, 28 Mar 2024 08:59:45 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWbBnbUf0oY5qJwQvvlGbSGuObPPJLhJtv3B9/+0iuafXf/jbjBIGAS2aNhRy0sXjLMedd/2Pokmoa2ETFI6jyR X-Google-Smtp-Source: AGHT+IGkXQ0lkhE9oozJOmOHMaB316CYykQXJbsdwI/Je40J1H8Bj3uqjNeJONCF3qLIVVTODWg1 X-Received: by 2002:a0c:9d01:0:b0:696:755f:c0c9 with SMTP id m1-20020a0c9d01000000b00696755fc0c9mr3052437qvf.0.1711641585720; Thu, 28 Mar 2024 08:59:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711641585; cv=none; d=google.com; s=arc-20160816; b=Y4wQcVO1tzRYwX89zwXSj9YHuMa3x1B0WKkbtk1jvCvdEhNpDE3gwJ3MNSpLjNHB/u ZMcQQdk5Q8Rq/YQX4p7R1+Fae3xVw/HvB8Zxsb8KHZv/F/iT+2bFFN4jHrNdGZIURrg4 XkxSOFCxu34+2NBCk2zzaKxR10Isuuq6M128TMhw41eFcPcfEvsmz2XKJmDJJPbImn6H 4lpXI39ZHqSfuNTPDgdfBtKSmV+N6x1QCZbUOYkctCzqIHZuHOHUpjw8Ah9aISN5MRZP 4XPnxyPw5NPNP/14NWUtZZeFBpwDRTffJO0gLXywrPcflX8ODRoI48ExurDdCYzDrUVT kwdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=K6394pyfYpf5VBXUXIwRMOR2ZbX+o8CbfYrADQtuSgY=; fh=UDxTSeEolXQUwGzf6K2+0ghcCN8FdfJ4W87Ih9funHA=; b=panjPX+ctoETO7jtlcAxI5F+/gEo2JhjrrQkRkFzhPP2WKOCuEe3k8m05iyZIA8JEG 0AItD7ok1T6gPd0QnBIhWXggHFtmfVuwgPEmlo+ciF02XtF1GX5l0ZLmd04n+wZ1qy/6 RhNREdrX8i4NpuSjccxPyoiRsLZ7vBBTPR1/YmelFBgMofaWYnk2cT/iuK0sQVRgysyX pJ7CfhgtHW/vb4opFCpg6A3zN58MCAEedXUQP0LDD5m5787OQvu6kyPD80JPV8LBcr39 drppvBTxQ19AWPFatQMLhmMNL6DB7lKzt23AT8PUZKnvKtInVi2QLXhpRZf7laqgC3Zx re/g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jhd29j4M; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id p12-20020a50c94c000000b005689bfe2688sm980668edh.39.2024.03.28.08.57.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:57:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 29/29] hw/i386/pc: Move ISA-only PC machine to pc_isa.c Date: Thu, 28 Mar 2024 16:54:37 +0100 Message-ID: <20240328155439.58719-30-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Extract the ISA-only PC machine code from pc_piix.c to a new file, pc_isa.c. Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 + hw/i386/pc_isa.c | 33 +++++++++++++++++++++++++++++++++ hw/i386/pc_piix.c | 23 ----------------------- hw/i386/meson.build | 1 + 4 files changed, 35 insertions(+), 23 deletions(-) create mode 100644 hw/i386/pc_isa.c diff --git a/MAINTAINERS b/MAINTAINERS index a07af6b9d4..a68fa813b8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1812,6 +1812,7 @@ M: Marcel Apfelbaum S: Supported F: include/hw/i386/ F: hw/i386/ +X: hw/i386/pc_isa.c F: hw/pci-host/i440fx.c F: hw/pci-host/q35.c F: hw/pci-host/pam.c diff --git a/hw/i386/pc_isa.c b/hw/i386/pc_isa.c new file mode 100644 index 0000000000..a98c75f3ae --- /dev/null +++ b/hw/i386/pc_isa.c @@ -0,0 +1,33 @@ +/* + * QEMU ISA PC System Emulator + * + * Copyright (c) 2003-2004 Fabrice Bellard + * + * SPDX-License-Identifier: MIT + */ + +#include "qemu/osdep.h" +#include "qom/object.h" +#include "hw/boards.h" +#include "hw/i386/pc.h" +#include "hw/char/parallel-isa.h" +#include "target/i386/cpu-qom.h" + +static void pc_init_isa(MachineState *machine) +{ + pc_piix_init(machine, NULL); +} + +static void isapc_machine_options(MachineClass *m) +{ + m->desc = "ISA-only PC"; + m->max_cpus = 1; + m->option_rom_has_mr = true; + m->rom_file_has_mr = false; + m->default_nic = "ne2k_isa"; + m->default_cpu_type = X86_CPU_TYPE_NAME("486"); + m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); +} + +DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, + isapc_machine_options, TYPE_PC_MACHINE); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 4a3ae72fe4..f94221ab92 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -434,13 +434,6 @@ static void pc_set_south_bridge(Object *obj, int value, Error **errp) * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). */ -#ifdef CONFIG_ISAPC -static void pc_init_isa(MachineState *machine) -{ - pc_piix_init(machine, NULL); -} -#endif - #ifdef CONFIG_XEN static void pc_xen_hvm_init_pci(MachineState *machine) { @@ -820,22 +813,6 @@ static void pc_i440fx_2_4_machine_options(MachineClass *m) DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, pc_i440fx_2_4_machine_options) -#ifdef CONFIG_ISAPC -static void isapc_machine_options(MachineClass *m) -{ - m->desc = "ISA-only PC"; - m->max_cpus = 1; - m->option_rom_has_mr = true; - m->rom_file_has_mr = false; - m->default_nic = "ne2k_isa"; - m->default_cpu_type = X86_CPU_TYPE_NAME("486"); - m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL); -} - -DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, - isapc_machine_options, TYPE_PC_MACHINE); -#endif - #ifdef CONFIG_XEN static void xenfv_4_2_machine_options(MachineClass *m) { diff --git a/hw/i386/meson.build b/hw/i386/meson.build index 1a6e731196..0576fc6541 100644 --- a/hw/i386/meson.build +++ b/hw/i386/meson.build @@ -12,6 +12,7 @@ i386_ss.add(when: 'CONFIG_X86_IOMMU', if_true: files('x86-iommu.c'), if_false: files('x86-iommu-stub.c')) i386_ss.add(when: 'CONFIG_AMD_IOMMU', if_true: files('amd_iommu.c'), if_false: files('amd_iommu-stub.c')) +i386_ss.add(when: 'CONFIG_ISAPC', if_true: files('pc_isa.c')) i386_ss.add(when: 'CONFIG_I440FX', if_true: files('pc_piix.c')) i386_ss.add(when: 'CONFIG_MICROVM', if_true: files('microvm.c', 'acpi-microvm.c', 'microvm-dt.c')) i386_ss.add(when: 'CONFIG_Q35', if_true: files('pc_q35.c'))