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Acked-by: Krzysztof Kozlowski Reviewed-by: Mukesh Ojha Signed-off-by: Kathiravan Thirumoorthy --- include/dt-bindings/arm/qcom,ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index d040033dc8ee..a2958952a9ec 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -272,6 +272,7 @@ #define QCOM_ID_QCS8550 603 #define QCOM_ID_QCM8550 604 #define QCOM_ID_IPQ5300 624 +#define QCOM_ID_IPQ5321 650 /* * The board type and revision information, used by Qualcomm bootloaders and From patchwork Mon Mar 25 15:49:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 782766 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80E8114AD0F; Mon, 25 Mar 2024 15:50:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711381823; cv=none; b=ouEEZ0zw/Wqym8m1v23jhgvPUkuzj4uB8fFtPpO2iONHovA+NRTKKaD5HQGYYs5ebeda/vB57Ie6m68XUwJwkdenyxOtNOwpvGKoA2ekym9GNo2ElXEVICDg1Z9IEh0VoOz+1yTeJwxtQnXwIqgz1n6gzcZgmHqMAZI33AYSPl0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711381823; c=relaxed/simple; bh=L6eAQT01UwjooOaRaAv+MlN39/Mt+Kq8bgG92V4Ywuk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=hFwahHdRVA3v91zn1zECXDexw+cN9obkJSWVXVCzR3LinuHO9fwQ5s40Alwm0FxRSuzF3RCzSvmxIegW6WzuuzYHBgEiURxoWBgp35h14MOD74HmFqzMLZ/dsyTCkqnWJgm9IqfAaSgZVoPcqV6gP/YZq1eUKIW45mxOLjmZQCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=YcSz9C4W; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="YcSz9C4W" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42PF0TAv010542; Mon, 25 Mar 2024 15:50:18 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:date:subject:mime-version:content-type :content-transfer-encoding:message-id:references:in-reply-to:to :cc; s=qcppdkim1; bh=oiq3itImfZFjYsnbUThxlqIuSDzh3zeTFUr1Rt52iYk =; b=YcSz9C4W40rq/BbG/OIdrctOnFNzXi8vfzABy4vDR1Z1BiKG8IkFBaz5sBJ w4+KzA01u3IIh9FkHH0L4vaorAOnOdl74NZI3eqiBQUYLTbH3JvI5t3LLyYKxjao 1DZScpw6HvN8PoAy2k2mSecuG0eTuoDQbIHJsDp2bBxna2/W7HnMj7GERDbQXulT HDs3cJ3wi3c1PIkFlQnbJazjmubYzBL5FcCB56Ydb7otOBjlztIyfoMzvyXO7lpK rjuXaY5O8y6o+0Rhlemsq6Bi7b/gvui4FUJON10gjhPxWISUCI0aNzP3lasfgX/Z lSusss9qOowQswOpv5DWADLNyMw== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3x381e8q7e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Mar 2024 15:50:17 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42PFoGuj000817 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Mar 2024 15:50:16 GMT Received: from hu-kathirav-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 25 Mar 2024 08:50:12 -0700 From: Kathiravan Thirumoorthy Date: Mon, 25 Mar 2024 21:19:50 +0530 Subject: [PATCH v2 3/3] cpufreq: qcom-nvmem: add support for IPQ5321 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240325-ipq5321-sku-support-v2-3-f30ce244732f@quicinc.com> References: <20240325-ipq5321-sku-support-v2-0-f30ce244732f@quicinc.com> In-Reply-To: <20240325-ipq5321-sku-support-v2-0-f30ce244732f@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Ilia Lin , "Rafael J. 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Add support for the same. Acked-by: Viresh Kumar Reviewed-by: Mukesh Ojha Signed-off-by: Kathiravan Thirumoorthy --- drivers/cpufreq/qcom-cpufreq-nvmem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index ea05d9d67490..0a46b5d49d32 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -191,6 +191,7 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, case QCOM_ID_IPQ5312: case QCOM_ID_IPQ5302: case QCOM_ID_IPQ5300: + case QCOM_ID_IPQ5321: case QCOM_ID_IPQ9514: case QCOM_ID_IPQ9550: case QCOM_ID_IPQ9554: