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[34.125.73.210]) by smtp.gmail.com with ESMTPSA id c14-20020a170903234e00b001e0e2fde71fsm526533plh.9.2024.03.25.16.37.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Mar 2024 16:37:30 -0700 (PDT) From: Pavan Holla Date: Mon, 25 Mar 2024 23:37:28 +0000 Subject: [PATCH 1/3] usb: typec: ucsi: Provide interface for UCSI transport Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240325-public-ucsi-h-v1-1-7c7e888edc0a@chromium.org> References: <20240325-public-ucsi-h-v1-0-7c7e888edc0a@chromium.org> In-Reply-To: <20240325-public-ucsi-h-v1-0-7c7e888edc0a@chromium.org> To: Greg Kroah-Hartman , Heikki Krogerus Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Abhishek Pandit-Subedi , Pavan Holla X-Mailer: b4 0.12.4 The ucsi.h include can be used by driver implementations that provide transport for UCSI commands. Signed-off-by: Pavan Holla --- MAINTAINERS | 1 + include/linux/usb/ucsi.h | 66 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index aa3b947fb080..e799d67a8fa5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22987,6 +22987,7 @@ F: Documentation/ABI/testing/sysfs-class-typec F: Documentation/driver-api/usb/typec.rst F: drivers/usb/typec/ F: include/linux/usb/typec.h +F: include/linux/usb/ucsi.h USB TYPEC INTEL PMC MUX DRIVER M: Heikki Krogerus diff --git a/include/linux/usb/ucsi.h b/include/linux/usb/ucsi.h new file mode 100644 index 000000000000..3ec1db968070 --- /dev/null +++ b/include/linux/usb/ucsi.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __LINUX_USB_UCSI_H +#define __LINUX_USB_UCSI_H + +#include +#include +#include + +/* -------------------------------------------------------------------------- */ + +struct ucsi; +struct ucsi_altmode; + +/* UCSI offsets (Bytes) */ +#define UCSI_VERSION 0 +#define UCSI_CCI 4 +#define UCSI_CONTROL 8 +#define UCSI_MESSAGE_IN 16 +#define UCSI_MESSAGE_OUT 32 +#define UCSIv2_MESSAGE_OUT 272 + +/* Command Status and Connector Change Indication (CCI) bits */ +#define UCSI_CCI_CONNECTOR(_c_) (((_c_) & GENMASK(7, 1)) >> 1) +#define UCSI_CCI_LENGTH(_c_) (((_c_) & GENMASK(15, 8)) >> 8) +#define UCSI_CCI_NOT_SUPPORTED BIT(25) +#define UCSI_CCI_CANCEL_COMPLETE BIT(26) +#define UCSI_CCI_RESET_COMPLETE BIT(27) +#define UCSI_CCI_BUSY BIT(28) +#define UCSI_CCI_ACK_COMPLETE BIT(29) +#define UCSI_CCI_ERROR BIT(30) +#define UCSI_CCI_COMMAND_COMPLETE BIT(31) + +/** + * struct ucsi_operations - UCSI I/O operations + * @read: Read operation + * @sync_write: Blocking write operation + * @async_write: Non-blocking write operation + * @update_altmodes: Squashes duplicate DP altmodes + * + * Read and write routines for UCSI interface. @sync_write must wait for the + * Command Completion Event from the PPM before returning, and @async_write must + * return immediately after sending the data to the PPM. + */ +struct ucsi_operations { + int (*read)(struct ucsi *ucsi, unsigned int offset, + void *val, size_t val_len); + int (*sync_write)(struct ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len); + int (*async_write)(struct ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len); + bool (*update_altmodes)(struct ucsi *ucsi, struct ucsi_altmode *orig, + struct ucsi_altmode *updated); +}; + +struct ucsi *ucsi_create(struct device *dev, const struct ucsi_operations *ops); +void ucsi_destroy(struct ucsi *ucsi); +int ucsi_register(struct ucsi *ucsi); +void ucsi_unregister(struct ucsi *ucsi); +int ucsi_resume(struct ucsi *ucsi); +void *ucsi_get_drvdata(struct ucsi *ucsi); +void ucsi_set_drvdata(struct ucsi *ucsi, void *data); + +void ucsi_connector_change(struct ucsi *ucsi, u8 num); + +#endif /* __LINUX_USB_UCSI_H */ From patchwork Mon Mar 25 23:37:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Holla X-Patchwork-Id: 782535 Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D51583CB2 for ; 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[34.125.73.210]) by smtp.gmail.com with ESMTPSA id c14-20020a170903234e00b001e0e2fde71fsm526533plh.9.2024.03.25.16.37.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Mar 2024 16:37:32 -0700 (PDT) From: Pavan Holla Date: Mon, 25 Mar 2024 23:37:30 +0000 Subject: [PATCH 3/3] platform/chrome: cros_ec_ucsi: Implement UCSI PDC driver Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240325-public-ucsi-h-v1-3-7c7e888edc0a@chromium.org> References: <20240325-public-ucsi-h-v1-0-7c7e888edc0a@chromium.org> In-Reply-To: <20240325-public-ucsi-h-v1-0-7c7e888edc0a@chromium.org> To: Greg Kroah-Hartman , Heikki Krogerus Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Abhishek Pandit-Subedi , Pavan Holla X-Mailer: b4 0.12.4 Implementation of transport driver for UCSI. This driver will be used if the ChromeOS EC implements a PPM. Signed-off-by: Pavan Holla --- drivers/platform/chrome/Kconfig | 14 ++ drivers/platform/chrome/Makefile | 1 + drivers/platform/chrome/cros_ec_ucsi.c | 247 +++++++++++++++++++++++++ include/linux/platform_data/cros_ec_commands.h | 19 ++ 4 files changed, 281 insertions(+) diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig index 7a83346bfa53..67ab79a6815b 100644 --- a/drivers/platform/chrome/Kconfig +++ b/drivers/platform/chrome/Kconfig @@ -238,6 +238,20 @@ config CROS_EC_TYPEC To compile this driver as a module, choose M here: the module will be called cros-ec-typec. +config CROS_EC_UCSI + tristate "UCSI Driver for ChromeOS EC" + depends on MFD_CROS_EC_DEV + depends on CROS_USBPD_NOTIFY + depends on TYPEC_UCSI + depends on !EXTCON_TCSS_CROS_EC + default MFD_CROS_EC_DEV + help + This driver enables UCSI support for a ChromeOS EC. The EC is + expected to implement a PPM. + + To compile the driver as a module, choose M here: the module + will be called cros_ec_ucsi. + config CROS_HPS_I2C tristate "ChromeOS HPS device" depends on HID && I2C && PM diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile index 2dcc6ccc2302..85964e165a70 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_CROS_EC_UART) += cros_ec_uart.o cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_mec.o cros-ec-typec-objs := cros_ec_typec.o cros_typec_vdm.o obj-$(CONFIG_CROS_EC_TYPEC) += cros-ec-typec.o +obj-$(CONFIG_CROS_EC_UCSI) += cros_ec_ucsi.o obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpcs.o obj-$(CONFIG_CROS_EC_PROTO) += cros_ec_proto.o cros_ec_trace.o obj-$(CONFIG_CROS_KBD_LED_BACKLIGHT) += cros_kbd_led_backlight.o diff --git a/drivers/platform/chrome/cros_ec_ucsi.c b/drivers/platform/chrome/cros_ec_ucsi.c new file mode 100644 index 000000000000..9fee300a3d93 --- /dev/null +++ b/drivers/platform/chrome/cros_ec_ucsi.c @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * UCSI driver for ChromeOS EC + * + * Copyright 2024 Google LLC. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "cros-ec-ucsi" + +#define MAX_EC_DATA_SIZE 256 +#define WRITE_TMO_MS 500 + +#define COMMAND_PENDING 1 +#define ACK_PENDING 2 + +#define UCSI_COMMAND(_cmd_) ((_cmd_) & 0xff) +#define UCSI_ACK_CC_CI 0x04 + +struct cros_ucsi_data { + struct device *dev; + struct ucsi *ucsi; + + struct cros_ec_device *ec; + struct notifier_block nb; + struct work_struct work; + + struct completion complete; + unsigned long flags; +}; + +static int cros_ucsi_read(struct ucsi *ucsi, unsigned int offset, void *val, + size_t val_len) +{ + struct cros_ucsi_data *udata = ucsi_get_drvdata(ucsi); + struct ec_params_ucsi_ppm_get req = { + .offset = offset, + .size = val_len, + }; + int ret; + + if (val_len > MAX_EC_DATA_SIZE) { + dev_err(udata->dev, "Can't read %zu bytes. Too big.", val_len); + return -EINVAL; + } + + ret = cros_ec_cmd(udata->ec, 0, EC_CMD_UCSI_PPM_GET, + &req, sizeof(req), val, val_len); + if (ret < 0) { + dev_warn(udata->dev, "Failed to send EC message UCSI_PPM_GET: error=%d", ret); + return ret; + } + return 0; +} + +static int cros_ucsi_async_write(struct ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct cros_ucsi_data *udata = ucsi_get_drvdata(ucsi); + uint8_t ec_buffer[MAX_EC_DATA_SIZE + sizeof(struct ec_params_ucsi_ppm_set)]; + struct ec_params_ucsi_ppm_set *req = (struct ec_params_ucsi_ppm_set *)ec_buffer; + int ret = 0; + + if (val_len > MAX_EC_DATA_SIZE) { + dev_err(udata->dev, "Can't write %zu bytes. Too big.", val_len); + return -EINVAL; + } + + memset(req, 0, sizeof(ec_buffer)); + req->offset = offset; + memcpy(req->data, val, val_len); + ret = cros_ec_cmd(udata->ec, 0, EC_CMD_UCSI_PPM_SET, + req, sizeof(struct ec_params_ucsi_ppm_set) + val_len, NULL, 0); + + if (ret < 0) { + dev_warn(udata->dev, "Failed to send EC message UCSI_PPM_SET: error=%d", ret); + return ret; + } + return 0; +} + +static int cros_ucsi_sync_write(struct ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct cros_ucsi_data *udata = ucsi_get_drvdata(ucsi); + bool ack = UCSI_COMMAND(*(u64 *)val) == UCSI_ACK_CC_CI; + int ret; + + if (ack) + set_bit(ACK_PENDING, &udata->flags); + else + set_bit(COMMAND_PENDING, &udata->flags); + + ret = cros_ucsi_async_write(ucsi, offset, val, val_len); + if (ret) + goto out; + + if (!wait_for_completion_timeout(&udata->complete, WRITE_TMO_MS)) + ret = -ETIMEDOUT; + +out: + if (ack) + clear_bit(ACK_PENDING, &udata->flags); + else + clear_bit(COMMAND_PENDING, &udata->flags); + return ret; +} + +struct ucsi_operations cros_ucsi_ops = { + .read = cros_ucsi_read, + .async_write = cros_ucsi_async_write, + .sync_write = cros_ucsi_sync_write, +}; + +static void cros_ucsi_work(struct work_struct *work) +{ + struct cros_ucsi_data *udata = container_of(work, struct cros_ucsi_data, work); + u32 cci; + int ret; + + ret = cros_ucsi_read(udata->ucsi, UCSI_CCI, &cci, sizeof(cci)); + if (ret) + return; + + if (UCSI_CCI_CONNECTOR(cci)) + ucsi_connector_change(udata->ucsi, UCSI_CCI_CONNECTOR(cci)); + + if (cci & UCSI_CCI_ACK_COMPLETE && test_bit(ACK_PENDING, &udata->flags)) + complete(&udata->complete); + if (cci & UCSI_CCI_COMMAND_COMPLETE && + test_bit(COMMAND_PENDING, &udata->flags)) + complete(&udata->complete); +} + +static int cros_ucsi_event(struct notifier_block *nb, + unsigned long host_event, void *_notify) +{ + struct cros_ucsi_data *udata = container_of(nb, struct cros_ucsi_data, nb); + + if (!(host_event & PD_EVENT_PPM)) + return NOTIFY_OK; + + dev_dbg(udata->dev, "UCSI notification received"); + flush_work(&udata->work); + schedule_work(&udata->work); + + return NOTIFY_OK; +} + +static int cros_ucsi_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct cros_ucsi_data *udata; + int ret; + + udata = devm_kzalloc(dev, sizeof(*udata), GFP_KERNEL); + if (!udata) + return -ENOMEM; + + udata->dev = dev; + + udata->ec = ((struct cros_ec_dev *) dev_get_drvdata(pdev->dev.parent))->ec_dev; + if (!udata->ec) { + dev_err(dev, "couldn't find parent EC device\n"); + return -ENODEV; + } + + platform_set_drvdata(pdev, udata); + + INIT_WORK(&udata->work, cros_ucsi_work); + init_completion(&udata->complete); + + udata->ucsi = ucsi_create(udata->dev, &cros_ucsi_ops); + if (IS_ERR(udata->ucsi)) { + dev_err(dev, "failed to allocate UCSI instance\n"); + return PTR_ERR(udata->ucsi); + } + + ucsi_set_drvdata(udata->ucsi, udata); + + ret = ucsi_register(udata->ucsi); + if (ret) { + ucsi_destroy(udata->ucsi); + udata->ucsi = NULL; + return ret; + } + + udata->nb.notifier_call = cros_ucsi_event; + ret = cros_usbpd_register_notify(&udata->nb); + return ret; +} + +static int cros_ucsi_remove(struct platform_device *dev) +{ + struct cros_ucsi_data *udata = platform_get_drvdata(dev); + + if (udata->ucsi) { + ucsi_unregister(udata->ucsi); + ucsi_destroy(udata->ucsi); + udata->ucsi = NULL; + } + return 0; +} + +static int cros_ucsi_suspend(struct device *dev) +{ + struct cros_ucsi_data *udata = dev_get_drvdata(dev); + + cancel_work_sync(&udata->work); + + return 0; +} + +static int cros_ucsi_resume(struct device *dev) +{ + struct cros_ucsi_data *udata = dev_get_drvdata(dev); + + return ucsi_resume(udata->ucsi); +} + +static SIMPLE_DEV_PM_OPS(cros_ucsi_pm_ops, cros_ucsi_suspend, + cros_ucsi_resume); + +static struct platform_driver cros_ucsi_driver = { + .driver = { + .name = DRV_NAME, + .pm = &cros_ucsi_pm_ops, + }, + .probe = cros_ucsi_probe, + .remove = cros_ucsi_remove, +}; + +module_platform_driver(cros_ucsi_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("UCSI driver for ChromeOS EC."); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index ecc47d5fe239..39f6f54bbe4c 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -4933,6 +4933,7 @@ struct ec_response_pd_status { #define PD_EVENT_POWER_CHANGE BIT(1) #define PD_EVENT_IDENTITY_RECEIVED BIT(2) #define PD_EVENT_DATA_SWAP BIT(3) +#define PD_EVENT_PPM BIT(5) struct ec_response_host_event_status { uint32_t status; /* PD MCU host event status */ } __ec_align4; @@ -5994,6 +5995,24 @@ struct ec_response_typec_vdm_response { #undef VDO_MAX_SIZE +/* + * Read/write interface for UCSI OPM <-> PPM communication. + */ +#define EC_CMD_UCSI_PPM_SET 0x0140 + +/* The data size is stored in the host command protocol header. */ +struct ec_params_ucsi_ppm_set { + uint16_t offset; + uint8_t data[]; +} __ec_align2; + +#define EC_CMD_UCSI_PPM_GET 0x0141 + +struct ec_params_ucsi_ppm_get { + uint16_t offset; + uint8_t size; +} __ec_align2; + /*****************************************************************************/ /* The command range 0x200-0x2FF is reserved for Rotor. */