From patchwork Thu Mar 21 15:23:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 781639 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43AC58624E; Thu, 21 Mar 2024 15:24:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711034663; cv=none; b=s8URNSulFUk3wW5qVjnu8LED7FjkFmiqKl9C9+kswnzHj+gfvM+vHqCenAdssj363Il8nZNxlpHudoNFvaKaNs2wgHO+MYezNtHEOkLY8J8BuG+0YGEpu83aPvyhDAa2aLv67lxhuug1ysHyW0XTp8A/Vhn3wJrBETgAK5izvfQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711034663; c=relaxed/simple; bh=cIwf5+ODApnp9dDmGy58vm92m0RCRPL1X+s9JLtUT3E=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Tm9l32gnST3ueegvlf4cBhpe4vAP1MBtLqyzbZ9KZ0QLar9Ly+mi8Ngvu7Bymxs6Cqrp3YxCH8ARi9tlvn2iUQFK25GKIVrQjxDXbMvPcIQh86sJQ8lX8tv2hgF4R9A0/SYfTvmxugpaMyR2zqQ7fLP7Ywm4yqpze/iUyd/GbSg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=PSFeJn+3; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="PSFeJn+3" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42LAdwbM029392; Thu, 21 Mar 2024 15:24:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:mime-version:content-type; s= qcppdkim1; bh=cG0lVyb2TamI2l+l0k2oVPo2ORBpTsuCykTEHklUfxs=; b=PS FeJn+3koptauJaocB6xCzn3xPmKJl4i+ocNFfDyrxqfir2hI5af1Wv/nHuA+U1cL NcMe//eFgmq11DaNAezJ/8Z42Xupi9X57CrVEpYyTVHFy197rjMrV9iY9crpU/ZI L1A1p6vSleQwU3Ncq7GdlTpBcv8TnHyOSQguMoY7Sw8qxrU7zGM/mZ4wCqqlIYfN eZeG1VVs83cIP8zgb4KbMbmfr1j6uHKar5ZWzrvgwYT/eAUXa+pL1Al54e2jHcnq u/H5oXPP1LHTNGlSvn7PA3GAGqbI3ot7M4D7tsu4eEYnVyx4c3SMt+sQPi4vdvaq lq3d53P/+1vyrfEeOSug== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3x0ka60r8k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Mar 2024 15:24:16 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42LFOFIa027598 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Mar 2024 15:24:15 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 21 Mar 2024 08:24:13 -0700 From: Mukesh Ojha To: , CC: , , "Mukesh Ojha" Subject: [PATCH v2 1/4] firmware: qcom: scm: Remove log reporting memory allocation failure Date: Thu, 21 Mar 2024 20:53:59 +0530 Message-ID: <1711034642-22860-1-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ELKtj7zOupBOlmaCklLVrHxleRGZxuvw X-Proofpoint-GUID: ELKtj7zOupBOlmaCklLVrHxleRGZxuvw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-21_10,2024-03-21_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 mlxscore=0 phishscore=0 spamscore=0 impostorscore=0 clxscore=1015 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403140001 definitions=main-2403210110 Remove redundant memory allocation failure. WARNING: Possible unnecessary 'out of memory' message + if (!mdata_buf) { + dev_err(__scm->dev, "Allocation of metadata buffer failed.\n"); Signed-off-by: Mukesh Ojha Reviewed-by: Bjorn Andersson Reviewed-by: Konrad Dybcio --- Changes in v2: https://lore.kernel.org/lkml/20240227155308.18395-7-quic_mojha@quicinc.com/ - Added R-by tag drivers/firmware/qcom/qcom_scm.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 49ddbcab0680..a11fb063cc67 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -554,10 +554,9 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size, */ mdata_buf = dma_alloc_coherent(__scm->dev, size, &mdata_phys, GFP_KERNEL); - if (!mdata_buf) { - dev_err(__scm->dev, "Allocation of metadata buffer failed.\n"); + if (!mdata_buf) return -ENOMEM; - } + memcpy(mdata_buf, metadata, size); ret = qcom_scm_clk_enable(); From patchwork Thu Mar 21 15:24:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 782079 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 286BD8625B; Thu, 21 Mar 2024 15:24:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711034665; cv=none; b=O3uuuPxVc95E7GhK6L68znazT7hvUb5VFitjTP4T6LRILZbBKNEW4v016M3aCJzm4TDeRz39I3ZwUmfR43O2zmgSXLDeOjpldaZb8W0IkCQKzgPVeh124IdsA6UGQMoS97/6d3AMaUqNgliuomGwqBjNVsLGzu1nA1QprGWrzRU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711034665; c=relaxed/simple; bh=CYl0v5YsJ+8QCIXpKj3ol8u13gnpNlAw/ulUwFFvIxg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=LigmWSCJQemdZdzcmnSjHws0oMQupMPGf4SH83s2l76A2jUbpja5qEvwLO5y8jax0BVU4Ma0NeLOetwhisxfOW6xUs8KLWm9YDJfHGaT64jUo9eLXwfankfOxm+SwPbFHDEi/M3LoRsT3TTaRRIX7VtO2eXNbBmcpFY/dybyLbc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=VsOwj03M; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="VsOwj03M" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42LATfDW004545; Thu, 21 Mar 2024 15:24:20 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=c3ZKW+Z255xD6L+f9pHM L6CqPQnpb6vhYSin5j6UXWM=; b=VsOwj03MSyq1K+d0Wk247rLOP89VucpUDF5t E3kFGxiLIkCOoqHawmU+da2j6GIgggCzzwTS8o7tBIwdsLDivXJ52YBs0vWZXopU bLsCgxR/awSSM489ZZQGaCkkZdwuVeGx2rouJX+PANSVl+CeEgR70nhhJm906EaH CZC3BixfWk/MMY2QDjdaWTstKLNHr5C7M66Hgp0yg7hsKWJl+Oyv/yNCZ/9rnQ6B 2qRoID/SoQATN0dPwcKKU2+cL4BuEOhNyR1qV5DbKK12HGWCr/eNYySKxq2FT7tl zBTju0ju94NmCRijAll0uRtjgmBiGUdT14QwlRkB0WHcA1uCsA== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3x0aah1tpk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Mar 2024 15:24:20 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42LFOJ2S013274 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Mar 2024 15:24:19 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 21 Mar 2024 08:24:17 -0700 From: Mukesh Ojha To: , CC: , , "Mukesh Ojha" Subject: [PATCH v2 2/4] firmware: scm: Remove redundant scm argument from qcom_scm_waitq_wakeup() Date: Thu, 21 Mar 2024 20:54:00 +0530 Message-ID: <1711034642-22860-2-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1711034642-22860-1-git-send-email-quic_mojha@quicinc.com> References: <1711034642-22860-1-git-send-email-quic_mojha@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: yTf6Kvr--_GRfaPwQfl_QorN6sgBfsY5 X-Proofpoint-ORIG-GUID: yTf6Kvr--_GRfaPwQfl_QorN6sgBfsY5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-21_10,2024-03-21_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 clxscore=1015 suspectscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 phishscore=0 spamscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403140001 definitions=main-2403210110 Remove redundant scm argument from qcom_scm_waitq_wakeup(). Signed-off-by: Mukesh Ojha --- Changes in v2: https://lore.kernel.org/lkml/20240227155308.18395-10-quic_mojha@quicinc.com/ - Fixed incorrect word in the commit text. drivers/firmware/qcom/qcom_scm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index a11fb063cc67..d9153204cba3 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -1771,7 +1771,7 @@ int qcom_scm_wait_for_wq_completion(u32 wq_ctx) return 0; } -static int qcom_scm_waitq_wakeup(struct qcom_scm *scm, unsigned int wq_ctx) +static int qcom_scm_waitq_wakeup(unsigned int wq_ctx) { int ret; @@ -1803,7 +1803,7 @@ static irqreturn_t qcom_scm_irq_handler(int irq, void *data) goto out; } - ret = qcom_scm_waitq_wakeup(scm, wq_ctx); + ret = qcom_scm_waitq_wakeup(wq_ctx); if (ret) goto out; } while (more_pending); From patchwork Thu Mar 21 15:24:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 781638 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9A8D85943; Thu, 21 Mar 2024 15:24:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711034677; cv=none; b=V4eAHFQW43RAvGgnvrowWuzVochjAVhoJtxqicLAyYdMWq4dGKNkTi7hnhipi7Tjdz4pgRMskBgzh3hbzN6rP3cAgx3aGqw04nekcpgTfOcE9CBPIqd2+ZRzzK4kHIzp/3nK7HOsRqQb9z0g8SVIUoxJ3WNkhFkfE1ccz+6W/2g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711034677; c=relaxed/simple; bh=yrNAWirQ0B17+shzAS4Bp9GlLe3+bJ10ejmklivgc8A=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=cXQxb8XX1bxT6HxrYaZXm4j1uzAg8wPmizUzPYvfja2qrZDTXGWMfdxuRpDyYVRtqvvDlyd0ktxG0pZuZUlmiMPtfqwxBAb5axfCZ2gZp4dHcO7E3mDhRpcC4i89QYF3KJY0WS7N61ehuk2cOFFroU8R4VULe0vBnrnGGYVgdW4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=Q8Rp0buc; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Q8Rp0buc" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42LCrXAA010504; Thu, 21 Mar 2024 15:24:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=62b78Z4V7ZL5ojA+avLb RJBYsfV20bwFiMnNTgYR+kA=; b=Q8Rp0bucw7iRyPxHPxZU320fFHuNHzi5NZYD AurkcIzizD3df7WLmJWtyHwguiPTnndtVokOS3GnYLcspneYQk22dth4VoIccNHM cViCpqH+1bzcCh2OQE4g27HuvLrwPkFgGj/uTgJVZ9VwppFotAQhQYTl6ib35+QG K+ZwAUpLdlv1kjt/brXaY+q8uUirZz7Uil9NqbBjDyv+o1GWL2gWwhzKCVbb7P1F j8fDTGKhWkh3fyLk07RitAxXo899ssuesjq0BF435RyZfERQytuHt+eMKqjjS8Q1 7xZ/mkrNLmgSOyiXlJZnEWlqlJVtVtd1XLYgVh9t4Xt77kmhFw== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3x0n9ugek6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Mar 2024 15:24:32 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42LFOM4h000618 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Mar 2024 15:24:22 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 21 Mar 2024 08:24:19 -0700 From: Mukesh Ojha To: , CC: , , "Mukesh Ojha" Subject: [PATCH v2 3/4] firmware: qcom: scm: Rework dload mode availability check Date: Thu, 21 Mar 2024 20:54:01 +0530 Message-ID: <1711034642-22860-3-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1711034642-22860-1-git-send-email-quic_mojha@quicinc.com> References: <1711034642-22860-1-git-send-email-quic_mojha@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: wqex-Pu7p6JVOwUv0hxpbrRNv-N0Y_SN X-Proofpoint-GUID: wqex-Pu7p6JVOwUv0hxpbrRNv-N0Y_SN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-21_10,2024-03-21_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 bulkscore=0 mlxlogscore=999 impostorscore=0 suspectscore=0 clxscore=1015 mlxscore=0 malwarescore=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403140001 definitions=main-2403210111 QCOM_SCM_BOOT_SET_DLOAD_MODE scm command is applicable for very older SoCs where this command is supported from firmware and for newer SoCs, dload mode tcsr registers is used for setting the download mode. Currently, qcom_scm_set_download_mode() checks for availability of QCOM_SCM_BOOT_SET_DLOAD_MODE command even for SoCs where this is not used. Fix this by switching the condition to keep the command availability check only if dload mode registers are not available. Signed-off-by: Mukesh Ojha Reviewed-by: Elliot Berman Reviewed-by: Konrad Dybcio --- Changes in v2: https://lore.kernel.org/lkml/20240227155308.18395-5-quic_mojha@quicinc.com/ - Reworded the commit text. drivers/firmware/qcom/qcom_scm.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index d9153204cba3..e238ebe21099 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -495,17 +495,14 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) static void qcom_scm_set_download_mode(bool enable) { - bool avail; int ret = 0; - avail = __qcom_scm_is_call_available(__scm->dev, - QCOM_SCM_SVC_BOOT, - QCOM_SCM_BOOT_SET_DLOAD_MODE); - if (avail) { - ret = __qcom_scm_set_dload_mode(__scm->dev, enable); - } else if (__scm->dload_mode_addr) { + if (__scm->dload_mode_addr) { ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + } else if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_BOOT, + QCOM_SCM_BOOT_SET_DLOAD_MODE)) { + ret = __qcom_scm_set_dload_mode(__scm->dev, enable); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n"); From patchwork Thu Mar 21 15:24:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 782078 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99C89A947; Thu, 21 Mar 2024 15:25:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711034708; cv=none; b=IrGy8TE140MA6kXla1YQb0nbcUkzv204kyEWhJ5OcxzyiRSdVtqSKwxA6F3rZgeiLG+dDOmzCAXqtbc4Hz4rmscsVotCabG7pbleQiEM+1+cNf+eCofq2Op4ke+XP7WAv8iT+fLkjmb6FRXeP3aQYiiSxfPb+z1Ocw8Bue2n4U4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711034708; c=relaxed/simple; bh=nScFnHlL7qAuBvXIbJwu/HhkppyDJ/y3VdbR3v42IXo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OQrZ+y+jjSgxCtHChJt1biGX0HZtcqwXnDbevU+fGBV2nLnKsC9ta2Cd9VPNVIh8dK5iczFUoeZy/aTsuqdTMGottADRtHD6eA5CfxhyQzdl3M0ufvilq/E/Q7MATDI8m4ja+pUHFGL6b0fCDSFArOzN5Bqlld0tu7pDI3RkkIk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=lb0Mh8TE; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="lb0Mh8TE" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42L6Y0qL026315; Thu, 21 Mar 2024 15:25:03 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=4xUMm1i3A01jJ6DH6SDj r2kR8eQLRFI5iu89vpudroE=; b=lb0Mh8TEiX50t6rKKgfRXwNHdsMKuwBukRwu sAPLsmaxoEnWFMikTeKnPY/aWAXkKtCmxocp7rXobPvJcEPUReQ+Rcp7fbzfkMCn C65Z+oMvotshpFkFoOWb87vCyJzuNlCWGRWqCqNEaEb573hKEtyT006yZirAtKm1 MpQBYnYjyUUG7cQrYzl+OMvWLCijD0AHMY6/J5S4DgLyCQ3OPQqAYyGwKN1e6sFk DxXcfoO7yRzPzxTmMEvoxK3jtnukx0TvFRHLpFELOIZOFMG+ZqkzSO9Bt8hjw5jx xqG0+YCXpL9i2ooN6s40fT9csclsVjtgSPM/izEY7NH9BJEz/A== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3x0fqxh8py-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Mar 2024 15:25:03 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42LFOP6P013309 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 21 Mar 2024 15:24:25 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 21 Mar 2024 08:24:23 -0700 From: Mukesh Ojha To: , CC: , , "Mukesh Ojha" Subject: [PATCH v2 4/4] firmware: qcom: scm: Fix __scm and waitq completion variable initialization Date: Thu, 21 Mar 2024 20:54:02 +0530 Message-ID: <1711034642-22860-4-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1711034642-22860-1-git-send-email-quic_mojha@quicinc.com> References: <1711034642-22860-1-git-send-email-quic_mojha@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: qlzqtlVChHi5xwsx2rVUc494xtlMvSQc X-Proofpoint-GUID: qlzqtlVChHi5xwsx2rVUc494xtlMvSQc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-21_10,2024-03-21_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 mlxlogscore=999 suspectscore=0 spamscore=0 priorityscore=1501 malwarescore=0 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2403140001 definitions=main-2403210111 It is possible qcom_scm_is_available() gives wrong indication that if __scm is initialized while __scm->dev is not and similar issue is also possible with __scm->waitq_comp. Fix this appropriately by the use of release barrier and read barrier that will make sure if __scm is initialized so, is all of its field variable. Fixes: d0f6fa7ba2d6 ("firmware: qcom: scm: Convert SCM to platform driver") Fixes: 6bf325992236 ("firmware: qcom: scm: Add wait-queue handling logic") Signed-off-by: Mukesh Ojha --- Changes in v2: - Added barrier instruction to make the stores available only after __scm initialization. - Moved __scm->waitq_comp initialized slight up in program order. - Added Fixes tag. drivers/firmware/qcom/qcom_scm.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index e238ebe21099..f014a934a603 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -1737,7 +1737,7 @@ static int qcom_scm_qseecom_init(struct qcom_scm *scm) */ bool qcom_scm_is_available(void) { - return !!__scm; + return !!READ_ONCE(__scm); } EXPORT_SYMBOL_GPL(qcom_scm_is_available); @@ -1818,10 +1818,12 @@ static int qcom_scm_probe(struct platform_device *pdev) if (!scm) return -ENOMEM; + scm->dev = &pdev->dev; ret = qcom_scm_find_dload_address(&pdev->dev, &scm->dload_mode_addr); if (ret < 0) return ret; + init_completion(&scm->waitq_comp); mutex_init(&scm->scm_bw_lock); scm->path = devm_of_icc_get(&pdev->dev, NULL); @@ -1853,10 +1855,8 @@ static int qcom_scm_probe(struct platform_device *pdev) if (ret) return ret; - __scm = scm; - __scm->dev = &pdev->dev; - - init_completion(&__scm->waitq_comp); + /* Let all above stores be available after this */ + smp_store_release(&__scm, scm); irq = platform_get_irq_optional(pdev, 0); if (irq < 0) {