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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 01/18] target/s390x: Add ilen to unwind data Date: Tue, 1 Oct 2019 10:15:57 -0700 Message-Id: <20191001171614.8405-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::533 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Use ILEN_UNWIND to signal that we have in fact that cpu_restore_state will have been called by the time we arrive in do_program_interrupt. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 4 +++- target/s390x/interrupt.c | 5 ++++- target/s390x/translate.c | 20 +++++++++++++++++--- 3 files changed, 24 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index b907741858..1a5b1397da 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -34,7 +34,7 @@ /* The z/Architecture has a strong memory model with some store-after-load re-ordering */ #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) -#define TARGET_INSN_START_EXTRA_WORDS 1 +#define TARGET_INSN_START_EXTRA_WORDS 2 #define MMU_MODE0_SUFFIX _primary #define MMU_MODE1_SUFFIX _secondary @@ -804,6 +804,8 @@ int cpu_s390x_signal_handler(int host_signum, void *pinfo, void *puc); void s390_crw_mchk(void); void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); +/* instruction length set by unwind info */ +#define ILEN_UNWIND 0 /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index a841f7187d..30a9fb8852 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -28,7 +28,10 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) cs->exception_index = EXCP_PGM; env->int_pgm_code = code; - env->int_pgm_ilen = ilen; + /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ + if (ilen != ILEN_UNWIND) { + env->int_pgm_ilen = ilen; + } } void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, diff --git a/target/s390x/translate.c b/target/s390x/translate.c index a3e43ff9ec..151dfa91fb 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6309,6 +6309,9 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) /* Search for the insn in the table. */ insn = extract_insn(env, s, &f); + /* Emit insn_start now that we know the ILEN. */ + tcg_gen_insn_start(s->base.pc_next, s->cc_op, s->ilen); + /* Not found means unimplemented/illegal opcode. */ if (insn == NULL) { qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%02x%02x\n", @@ -6463,9 +6466,6 @@ static void s390x_tr_tb_start(DisasContextBase *db, CPUState *cs) static void s390x_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { - DisasContext *dc = container_of(dcbase, DisasContext, base); - - tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); } static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, @@ -6473,6 +6473,14 @@ static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, { DisasContext *dc = container_of(dcbase, DisasContext, base); + /* + * Emit an insn_start to accompany the breakpoint exception. + * The ILEN value is a dummy, since this does not result in + * an s390x exception, but an internal qemu exception which + * brings us back to interact with the gdbstub. + */ + tcg_gen_insn_start(dc->base.pc_next, dc->cc_op, 2); + dc->base.is_jmp = DISAS_PC_STALE; dc->do_debug = true; /* The address covered by the breakpoint must be included in @@ -6567,8 +6575,14 @@ void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb, target_ulong *data) { int cc_op = data[1]; + env->psw.addr = data[0]; + + /* Update the CC opcode if it is not already up-to-date. */ if ((cc_op != CC_OP_DYNAMIC) && (cc_op != CC_OP_STATIC)) { env->cc_op = cc_op; } + + /* Record ILEN. */ + env->int_pgm_ilen = data[2]; } From patchwork Tue Oct 1 17:15:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174898 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8842115ill; Tue, 1 Oct 2019 10:19:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqys7Mk3+1vXxu6vb9ibDb7Kq5TWyOhHEu3JD2gTFFIFyMEeHYTtQx/yzC37Zh/FZqy0WDCg X-Received: by 2002:a0c:ffa7:: with SMTP id d7mr25681915qvv.12.1569950389838; Tue, 01 Oct 2019 10:19:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950389; cv=none; d=google.com; s=arc-20160816; b=P/wsV7dojwniT0UQk1DvXnxQVTlufMdEyFnnl4yTNZegV898qs+Yub/BttmzHcekEG 4VdCiG5D5W6egoE+LTY7gCFyMBXnoCmU+Ghp4oJf++z1bBXDTcCmdf0iFZQ7/rHQ/N7m KualPVNUA33WCsQT3YVCcXCrMBp3Y2AlZtYA1DHpkaVVis9w+oDCc2Tw2uJaT8fV3iVD XTO8jWS2heYPGV87FdXpaM1laAeIeza5+exJyiSlx4QfhVe1zqUB6XoNwxVXmE9eSihK IXQVj9eYFs3ObFD3gk1pubw/BoZDza2UxFkW6o3j7ThKMzmE1Y56Rp3ZnbLXBQ5ETM2l 91pg== ARC-Message-Signature: i=1; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:18 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 02/18] target/s390x: Remove ilen parameter from tcg_s390_program_interrupt Date: Tue, 1 Oct 2019 10:15:58 -0700 Message-Id: <20191001171614.8405-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::531 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Since we begin the operation with an unwind, we have the proper value of ilen immediately available. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/tcg_s390x.h | 4 ++-- target/s390x/excp_helper.c | 10 +++++----- target/s390x/interrupt.c | 2 +- target/s390x/tcg-stub.c | 4 ++-- 4 files changed, 10 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/target/s390x/tcg_s390x.h b/target/s390x/tcg_s390x.h index 2813f9d48e..2f54ccb027 100644 --- a/target/s390x/tcg_s390x.h +++ b/target/s390x/tcg_s390x.h @@ -14,8 +14,8 @@ #define TCG_S390X_H void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque); -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra); +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra); void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc, uintptr_t ra); void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 892f659d5a..eb55e5ef53 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -34,15 +34,15 @@ #include "hw/boards.h" #endif -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { CPUState *cs = env_cpu(env); cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ilen); + trigger_pgm_exception(env, code, ILEN_UNWIND); cpu_loop_exit(cs); } @@ -60,7 +60,7 @@ void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc, if (env->cregs[0] & CR0_AFP) { env->fpc = deposit32(env->fpc, 8, 8, dxc); } - tcg_s390_program_interrupt(env, PGM_DATA, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_DATA, ra); } void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, @@ -75,7 +75,7 @@ void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, /* Always store the VXC into the FPC, without AFP it is undefined */ env->fpc = deposit32(env->fpc, 8, 8, vxc); - tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ra); } void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc) diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 30a9fb8852..b798e2ecbe 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -40,7 +40,7 @@ void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); } else if (tcg_enabled()) { - tcg_s390_program_interrupt(env, code, ilen, ra); + tcg_s390_program_interrupt(env, code, ra); } else { g_assert_not_reached(); } diff --git a/target/s390x/tcg-stub.c b/target/s390x/tcg-stub.c index 32adb7276a..d22c898802 100644 --- a/target/s390x/tcg-stub.c +++ b/target/s390x/tcg-stub.c @@ -18,8 +18,8 @@ void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque) { } -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { g_assert_not_reached(); } From patchwork Tue Oct 1 17:15:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174896 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8839248ill; Tue, 1 Oct 2019 10:17:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqwoxGkpF0oaOUvuOlqzWAkxEXk8RpT25V0MItLiPnSt+Xdrmb5bIh9zHhqO8vIKBMi8QkXq X-Received: by 2002:ac8:765a:: with SMTP id i26mr31978519qtr.369.1569950237907; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 03/18] target/s390x: Remove ilen parameter from s390_program_interrupt Date: Tue, 1 Oct 2019 10:15:59 -0700 Message-Id: <20191001171614.8405-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is no longer used, and many of the existing uses -- particularly within hw/s390x -- seem questionable. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 3 +- hw/s390x/s390-pci-inst.c | 58 ++++++++++++++++++------------------ target/s390x/cc_helper.c | 2 +- target/s390x/crypto_helper.c | 4 +-- target/s390x/diag.c | 14 ++++----- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 6 ++-- target/s390x/int_helper.c | 14 ++++----- target/s390x/interrupt.c | 3 +- target/s390x/ioinst.c | 40 ++++++++++++------------- target/s390x/mem_helper.c | 43 +++++++++++++------------- target/s390x/misc_helper.c | 27 ++++++----------- 12 files changed, 102 insertions(+), 114 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 1a5b1397da..18e7091763 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -809,8 +809,7 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra); +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */ void s390_sclp_extint(uint32_t parm); diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 4b3bd4a804..92c7e45df5 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -157,7 +157,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) int i; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -168,7 +168,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) reqh = (ClpReqHdr *)buffer; req_len = lduw_p(&reqh->len); if (req_len < 16 || req_len > 8184 || (req_len % 8 != 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -180,11 +180,11 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) resh = (ClpRspHdr *)(buffer + req_len); res_len = lduw_p(&resh->len); if (res_len < 8 || res_len > 8176 || (res_len % 8 != 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } if ((req_len + res_len) > 8192) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -390,12 +390,12 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) uint8_t pcias; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -429,25 +429,25 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) switch (pcias) { case ZPCI_IO_BAR_MIN...ZPCI_IO_BAR_MAX: if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result = zpci_read_bar(pbdev, pcias, offset, &data, len); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; case ZPCI_CONFIG_BAR: if (!len || (len > (4 - (offset & 0x3))) || len == 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } data = pci_host_config_read_common( pbdev->pdev, offset, pci_config_size(pbdev->pdev), len); if (zpci_endian_swap(&data, len)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -489,12 +489,12 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) uint8_t pcias; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -536,13 +536,13 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) * A length of 0 is invalid and length should not cross a double word */ if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result = zpci_write_bar(pbdev, pcias, offset, data, len); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -550,7 +550,7 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) /* ZPCI uses the pseudo BAR number 15 as configuration space */ /* possible access lengths are 1,2,4 and must not cross a word */ if (!len || (len > (4 - (offset & 0x3))) || len == 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } /* len = 1,2,4 so we do not need to test */ @@ -622,12 +622,12 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) hwaddr start, end; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -709,7 +709,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, uint8_t buffer[128]; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -772,7 +772,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, if (!memory_region_access_valid(mr, offset, len, true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -786,7 +786,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, ldq_p(buffer + i * 8), MO_64, MEMTXATTRS_UNSPECIFIED); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } } @@ -797,7 +797,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, return 0; specification_error: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -871,14 +871,14 @@ static int reg_ioat(CPUS390XState *env, S390PCIIOMMU *iommu, ZpciFib fib, pba &= ~0xfff; pal |= 0xfff; if (pba > pal || pba < ZPCI_SDMA_ADDR || pal > ZPCI_EDMA_ADDR) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } /* currently we only support designation type 1 with translation */ if (!(dt == ZPCI_IOTA_RTTO && t)) { error_report("unsupported ioat dt %d t %d", dt, t); - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } @@ -1003,7 +1003,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, uint64_t cc = ZPCI_PCI_LS_OK; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -1012,7 +1012,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, fh = env->regs[r1] >> 32; if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -1040,7 +1040,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, } if (fib.fmt != 0) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -1151,7 +1151,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, break; } default: - s390_program_interrupt(&cpu->env, PGM_OPERAND, 6, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); cc = ZPCI_PCI_LS_ERR; } @@ -1171,7 +1171,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, uint64_t cc = ZPCI_PCI_LS_OK; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -1185,7 +1185,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, } if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index cf68792733..3cb00bcb09 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -588,7 +588,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); break; } } diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 5c79790187..1f83987e9d 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -34,7 +34,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } break; @@ -42,7 +42,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } diff --git a/target/s390x/diag.c b/target/s390x/diag.c index 65eabf0461..53c2f81f2a 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -61,12 +61,12 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) IplParameterBlock *iplb; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return; } if ((subcode & ~0x0ffffULL) || (subcode > 6)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -82,13 +82,13 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) break; case 5: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), false, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb = g_new0(IplParameterBlock, 1); @@ -112,13 +112,13 @@ out: return; case 6: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb = s390_ipl_get_iplb(); @@ -130,7 +130,7 @@ out: } return; default: - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); break; } } diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index eb55e5ef53..089623a248 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, retaddr); + s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 5faf973c6c..7228eb96e2 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->fpc = deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index d13cc49be6..1d29a1fc1f 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -39,7 +39,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) int64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -47,7 +47,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -60,7 +60,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) uint64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -68,7 +68,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -79,7 +79,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b == 0 || (b == -1 && a == (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl = a % b; return a / b; @@ -92,7 +92,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah == 0) { /* 64 -> 64/64 case */ @@ -106,7 +106,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, env->retxl = a % b; ret = q; if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just abort if diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index b798e2ecbe..2b71e03914 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -34,8 +34,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) } } -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra) +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) { if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c index 83c164a168..c437a1d8c6 100644 --- a/target/s390x/ioinst.c +++ b/target/s390x/ioinst.c @@ -44,7 +44,7 @@ void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("xsch", cssid, ssid, schid); @@ -62,7 +62,7 @@ void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("csch", cssid, ssid, schid); @@ -80,7 +80,7 @@ void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("hsch", cssid, ssid, schid); @@ -116,7 +116,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &schib, sizeof(schib))) { @@ -125,7 +125,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) } if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_schib_valid(&schib)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("msch", cssid, ssid, schid); @@ -173,7 +173,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &orig_orb, sizeof(orb))) { @@ -183,7 +183,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) copy_orb_from_guest(&orb, &orig_orb); if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_orb_valid(&orb)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("ssch", cssid, ssid, schid); @@ -205,7 +205,7 @@ void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -236,7 +236,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -247,7 +247,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, * access execption if it is not) first. */ if (!s390_cpu_virt_mem_check_write(cpu, addr, ar, sizeof(schib))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); } else { s390_cpu_virt_mem_handle_exc(cpu, ra); } @@ -299,13 +299,13 @@ int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) uint8_t ar; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EIO; } trace_ioinst_sch_id("tsch", cssid, ssid, schid); addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return -EIO; } @@ -613,7 +613,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra) addr = env->regs[reg]; /* Page boundary? */ if (addr & 0xfff) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } /* @@ -629,7 +629,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra) len = be16_to_cpu(req->len); /* Length field valid? */ if ((len < 16) || (len > 4088) || (len & 7)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } memset((char *)req + len, 0, TARGET_PAGE_SIZE - len); @@ -678,7 +678,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, trace_ioinst("schm"); if (SCHM_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -687,7 +687,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, dct = SCHM_REG1_DCT(reg1); if (update && (reg2 & 0x000000000000001f)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -700,7 +700,7 @@ void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("rsch", cssid, ssid, schid); @@ -724,7 +724,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra) CPUS390XState *env = &cpu->env; if (RCHP_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -747,7 +747,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra) break; default: /* Invalid channel subsystem. */ - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } setcc(cpu, cc); @@ -758,6 +758,6 @@ void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1, uintptr_t ra) { /* We do not provide address limit checking, so let's suppress it. */ if (SAL_REG1_INVALID(reg1) || reg1 & 0x000000000000ffff) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); } } diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 08c5cc6a99..77d2eb96d4 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -71,7 +71,7 @@ static inline void check_alignment(CPUS390XState *env, uint64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } @@ -730,7 +730,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -767,7 +767,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -846,7 +846,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) S390Access srca, desta; if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } r1 = wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +879,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, uint32_t r2) int i; if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* @@ -911,8 +911,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - /* we either came here by lam or lamy, which have different lengths */ - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -932,7 +931,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1888,7 +1887,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, return cc; spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); g_assert_not_reached(); } @@ -1912,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1945,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1976,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1996,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -2168,7 +2167,7 @@ uint32_t HELPER(mvcs)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY) || psw_as == AS_HOME || psw_as == AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } l = wrap_length32(env, l); @@ -2199,7 +2198,7 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY) || psw_as == AS_HOME || psw_as == AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } l = wrap_length32(env, l); @@ -2226,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) uint16_t entries, i, index = 0; if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if (!(r2 & 0x800)) { @@ -2370,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } old_exc = cs->exception_index; @@ -2539,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, __func__, dest, src, len); if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } /* OAC (operand access control) for the first operand -> dest */ @@ -2570,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, } if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); } len = wrap_length32(env, len); @@ -2591,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, 6, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); } /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 7530dcb8f3..9fbb37cfb9 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) int r = sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) } if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val = r0; if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr = val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } qemu_mutex_lock_iothread(); @@ -573,17 +573,8 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) #ifndef CONFIG_USER_ONLY void HELPER(per_check_exception)(CPUS390XState *env) { - uint32_t ilen; - if (env->per_perc_atmid) { - /* - * FIXME: ILEN_AUTO is most probably the right thing to use. ilen - * always has to match the instruction referenced in the PSW. E.g. - * if a PER interrupt is triggered via EXECUTE, we have to use ilen - * of EXECUTE, while per_address contains the target of EXECUTE. - */ - ilen = get_ilen(cpu_ldub_code(env, env->per_address)); - s390_program_interrupt(env, PGM_PER, ilen, GETPC()); + s390_program_interrupt(env, PGM_PER, GETPC()); } } @@ -673,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) int i; if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } prepare_stfl(); @@ -746,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } } From patchwork Tue Oct 1 17:16:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174904 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8848037ill; Tue, 1 Oct 2019 10:25:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqzi7JTeyH5QdpRJoB4qjF5IPtEH9e3vYZuFO69T2g3s6wSshn9UfnIuHQGug6FRBlOI7GX1 X-Received: by 2002:a50:9f42:: with SMTP id b60mr27308912edf.192.1569950719192; Tue, 01 Oct 2019 10:25:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950719; cv=none; d=google.com; s=arc-20160816; b=L61qGdtO8XZBn3RuUi9vj9IzK4ndATwLS6U91hgiS09P0mceL2QE3x5KFP2VcKghgZ yFi5SYmV55peooyAESbQukPuyFe/aS+zm7Ns5SakJHg52RMzXGc7RpQwYnX70Cq0HrgK 9gxQZl5ycDEJEX0gTbyulV5qOiLeK8HCg+40cg0unKJ2+kyj92d51UZdqtL7JSElz3hp ji9pzIckmVi2mim5Wl5U9f3dRlkAfjmdPzQ7rQH88O8YjSD0DrKxcLOPMSemgvYf5jsk U+Cxtu2utqb56VBL/lvVA1rOdXAyE0PPUviBg+fsQ4ytjNyY85LinX8sewptgACiNAv6 yFDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=q9Mr42wDaAqxtgZGR7xHO1prxR6bIhQ0Pkgg+dKZZYM=; b=gkI3pNZQzN1GM2zv9aEMrXkkWq9dkxCJnnANjFAKFWMTzI4BHdbvpjnEpC2GxBd8lr VmOJQ3lTrFEglH4guF/cNmzzXzq82vZIemYqaT6qZuV5HyIwqV1aAAFHmFSrQssCnxHP ZKQDmK5h4ugbzu5uY1FnVsvNYqsqqVwTlLCzJT5C9IzLuRrnOO0FVrwMp8SLbm/noxXB BzoOdKJUs0XKZfqTqwrq8eNuF6fUSqIIkY1TKamPFqsqWtEFr8fGEob6PRW7kzXjh1yD WHwsYYkF83j83bQqTeExjSnPTWrEozMxR8R0B728RkDfC7VMv3fD+PMxnMXqk5bChN1t lfGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DerFKQHz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 04/18] target/s390x: Use tcg_s390_program_interrupt in TCG helpers Date: Tue, 1 Oct 2019 10:16:00 -0700 Message-Id: <20191001171614.8405-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Replace all uses of s390_program_interrupt within files that are marked CONFIG_TCG. These are necessarily tcg-only. This lets each of these users benefit from the QEMU_NORETURN attribute on tcg_s390_program_interrupt. Acked-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cc_helper.c | 4 ++-- target/s390x/crypto_helper.c | 7 +++---- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 6 +++--- target/s390x/int_helper.c | 15 +++++++------- target/s390x/mem_helper.c | 40 ++++++++++++++++++------------------ target/s390x/misc_helper.c | 18 ++++++++-------- 7 files changed, 46 insertions(+), 46 deletions(-) -- 2.17.1 diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index 3cb00bcb09..44731e4a85 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" @@ -588,8 +589,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); - break; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } #endif diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 1f83987e9d..ff3fbc3950 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -34,16 +35,14 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } break; } s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } switch (fc) { diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 089623a248..dbff772d34 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; - s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 7228eb96e2..8bb9f54fd0 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->fpc = deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index 1d29a1fc1f..658507dd6d 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" @@ -39,7 +40,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) int64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -47,7 +48,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -60,7 +61,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) uint64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -68,7 +69,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -79,7 +80,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b == 0 || (b == -1 && a == (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl = a % b; return a / b; @@ -92,7 +93,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah == 0) { /* 64 -> 64/64 case */ @@ -106,7 +107,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, env->retxl = a % b; ret = q; if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just abort if diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 77d2eb96d4..7d2a652823 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -71,7 +72,7 @@ static inline void check_alignment(CPUS390XState *env, uint64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } @@ -730,7 +731,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -767,7 +768,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -846,7 +847,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) S390Access srca, desta; if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } r1 = wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +880,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, uint32_t r2) int i; if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* @@ -911,7 +912,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -931,7 +932,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1887,8 +1888,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, return cc; spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - g_assert_not_reached(); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } uint32_t HELPER(csst)(CPUS390XState *env, uint32_t r3, uint64_t a1, uint64_t a2) @@ -1911,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1944,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1975,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1995,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -2225,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) uint16_t entries, i, index = 0; if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if (!(r2 & 0x800)) { @@ -2369,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } old_exc = cs->exception_index; @@ -2538,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, __func__, dest, src, len); if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } /* OAC (operand access control) for the first operand -> dest */ @@ -2569,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, } if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, ra); + tcg_s390_program_interrupt(env, PGM_PRIVILEGED, ra); } len = wrap_length32(env, len); @@ -2590,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, ra); + tcg_s390_program_interrupt(env, PGM_ADDRESSING, ra); } /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 9fbb37cfb9..bfb457fb63 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) int r = sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) } if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val = r0; if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr = val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } qemu_mutex_lock_iothread(); @@ -574,7 +574,7 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) void HELPER(per_check_exception)(CPUS390XState *env) { if (env->per_perc_atmid) { - s390_program_interrupt(env, PGM_PER, GETPC()); + tcg_s390_program_interrupt(env, PGM_PER, GETPC()); } } @@ -664,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) int i; if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } prepare_stfl(); @@ -737,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } } From patchwork Tue Oct 1 17:16:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174902 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8846268ill; Tue, 1 Oct 2019 10:23:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqzb81BjETcpEzHKMF53jDiUub2hYE7uV2/wUKIYZ/dcDOVuLHF/XzlR8VuhhM7bGlBi3XcM X-Received: by 2002:a17:906:3190:: with SMTP id 16mr5179983ejy.202.1569950612874; Tue, 01 Oct 2019 10:23:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950612; cv=none; d=google.com; s=arc-20160816; b=Q62fgfEjH1jilY88wcMIcwii68kHNr/Z6LKZ6J8rn84DPy6LAGtSYvkSbJhAEmftrI TAWrPPHoPnlz0WHrOEYazoiDUJ6Ew88lgl8e53eHltwL0DWeZf14pEVgW2v9TVJzq87X fhnGXUaK8TNn9E+0u/KvE5lgyf4IKeaHhuzfxsytZ0QzNOgXhFuDvgRdDj0616fQtsYl kXt+wU8VhlacYcsRTvwIzT3kZ5SacjZki2xgTPqwpO+Mxt7lYqRdjy7XmipY8K8yKpZE Z7ab9SQLG59bci/rKDm3ypgP7yECCEl6OI6D6Ims0/iXA8GgjsR5eZ77ep6uCClcNQQS Afkw== ARC-Message-Signature: i=1; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 05/18] target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fill Date: Tue, 1 Oct 2019 10:16:01 -0700 Message-Id: <20191001171614.8405-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Delay triggering an exception until the end, after we have determined ultimate success or failure, and also taken into account whether this is a non-faulting probe. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index dbff772d34..552098be5f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc; - int prot, fail; + int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,12 +141,14 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); + excp = 0; /* exception already raised */ } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); + excp = 0; /* exception already raised */ } else { g_assert_not_reached(); } @@ -159,7 +161,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, qemu_log_mask(CPU_LOG_MMU, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); - trigger_pgm_exception(env, PGM_ADDRESSING, ILEN_AUTO); + excp = PGM_ADDRESSING; fail = 1; } @@ -175,6 +177,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } + if (excp) { + trigger_pgm_exception(env, excp, ILEN_AUTO); + } cpu_restore_state(cs, retaddr, true); /* From patchwork Tue Oct 1 17:16:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174901 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8845223ill; Tue, 1 Oct 2019 10:22:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqwgVeViMVR97gFEWNXIYq1xJoRjQVKaScv+JFdmdrsi3xtqKth6YO8GbOjNvPlv7D1Q8/V1 X-Received: by 2002:a50:baa5:: with SMTP id x34mr27759351ede.148.1569950552154; Tue, 01 Oct 2019 10:22:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950552; cv=none; d=google.com; s=arc-20160816; b=nD3Vn6TfhA3/h5wy3a6BFF5AVIBLpYuDz9A2wNLPUwojR6VIwVl5/dW/Qz0APiP8mE cOM0vc/AuXV4YueKmsQZkMaSnRD/EJrYtdFSfXz7HD2TNb8Xzs1Y01ECU7uysNMXZl6F sQqletNn6/jOx3ETppf2at0o7htUA2ULZXnb1JuE+pTsBy/rcMnTAECdWeJlgBCGyAOV iB0zoQ4vJRVvp3eD5Dz6pJ1bShDr+p+Q83qTRWGh6QunMzkjW9c791+yR1xF+iIKnS9L FcaOtHnGi+EFVouOajAr5GYHUQvgOqmB/dE8i3Wo3iFaQXq+fUZaOMB2UJDn/iN35E1L qyxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=H3DBi0mNjNbESSisGeli3T+KiEWE4J/mD2CVZfFgXJw=; b=P6w5q7y48ct3FaBNPSx5u9DhTQsu9r+/1YTvgp3pwBj7XfTwm3A+C97uExLyx80mFB 2VmpIh91k8TujcrLTF8Ab/fSQnWRBMFZoXN/KjIC/mnzl8mM9HvWlyOUt8UZfDw5Im1+ y8StCoZEdk9V1Mf7f5zNt4yz22Y23zNk6uXoguBIM8J+h3E+ZN4LzITpyB/vEPMRzeoV KvVJp2epxcw45WO2yzz6LOtu5mMU/l67yXgG/UgatOrwRjkPrC1BLpVZbZOFBjxuPElz SPVL5lrwik92LUoMMQ1W5G/joqE9MgKkpTczKk8+HOmWH+R39VuKgI0Mc4GjATN3Bkof LX9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vo9TftZg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 06/18] target/s390x: Handle tec in s390_cpu_tlb_fill Date: Tue, 1 Oct 2019 10:16:02 -0700 Message-Id: <20191001171614.8405-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::642 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" As a step toward moving all excption handling out of mmu_translate, copy handling of the LowCore tec value from trigger_access_exception into s390_cpu_tlb_fill. So far this new plumbing isn't used. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 552098be5f..ab2ed47fef 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; - uint64_t asc; + uint64_t asc, tec; int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", @@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; + tec = 0; /* unused */ fail = 1; } @@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } if (excp) { + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); + } trigger_pgm_exception(env, excp, ILEN_AUTO); } cpu_restore_state(cs, retaddr, true); From patchwork Tue Oct 1 17:16:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174906 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8849657ill; Tue, 1 Oct 2019 10:26:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqzuePBadvM9jvCFy3eQ2MegxGgUjJUSc1wjafH02oHFNy+RpJFTtMZdL7BqE1BbDpzqGVbU X-Received: by 2002:ae9:e609:: with SMTP id z9mr7262605qkf.50.1569950808878; Tue, 01 Oct 2019 10:26:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950808; cv=none; d=google.com; s=arc-20160816; b=SJ72SVfU8J9H7do37IaJjCy66euU485aueRRtd8AzwV0ixAASqucX2aGTTQZjceZvu zDYX39McSVuH32QgZsgXWUGKDZloIlQ62ZUxxa4RRrNtbytX1Jx2HRm/GCHByRn3xyvn fbz77toNnJALgy66M59nPEYTTqhUpuEtBZa6Z+Evq5ILoXTPSvQcalPOYuZ6JGKT9qAu J7zbcC0X3o6FIlbLGBx/Si1PtP0tnh1Exq2czoENCUJke5GOwZzY4+3pcXS1TCGcuYdZ rlksRU3UJHqiwWg1+YtIEKgBQewX4MSoI64rQ7ea+M3f7ICkIX3LxJKiAndp22qFCPDn DeJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=bw1EswX2q2VGPW65WyDJY/ECQ0OS5tcrpjiTXgyT1jE=; b=jR9xvquEGYWTKxFJcPAgGtl9YN7vFvzin/km/TivF/z2KoXnqba5XjLhIZ+aDQHQ8z 2sX+iv7jby7CERML4rkitZDzuZQY9vafgf15bNQGyTeSNgpvKzJQoNJVcZaNGXmvyFCo 6y97YuK2tA/KYjFBuNEQcjy9VTsiUGE6iAQ4k3a0MPrG3U1eeACE4r77StP8om7z+qIv FoX0Rv19i0PB+0G+qthTfmajd390hbsntgH0E+MfMZBDVsVpR+kKs9W7l2nDePR9v+Yn NVg41w7+97EX5wCTEcPsjW2mbydhLvYFN3Ce0fwyeB+EGymyL6t+JzG8C9MGjYCmcKTT nhyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L9aSuzgq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 07/18] target/s390x: Return exception from mmu_translate_real Date: Tue, 1 Oct 2019 10:16:03 -0700 Message-Id: <20191001171614.8405-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not raise the exception directly within mmu_translate_real, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 4 ++-- target/s390x/mmu_helper.c | 14 ++++++-------- 3 files changed, 9 insertions(+), 11 deletions(-) -- 2.17.1 diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c243fa725b..c4388aaf23 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -362,7 +362,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, target_ulong *raddr, int *flags, bool exc); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags); + target_ulong *addr, int *flags, uint64_t *tec); /* misc_helper.c */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index ab2ed47fef..906b87c071 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -147,8 +147,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); - excp = 0; /* exception already raised */ + excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); + fail = excp; } else { g_assert_not_reached(); } diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 4a794dadcf..e8281d4413 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -554,14 +554,11 @@ void s390_cpu_virt_mem_handle_exc(S390CPU *cpu, uintptr_t ra) * @param rw 0 = read, 1 = write, 2 = code fetch * @param addr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer - * @return 0 if the translation was successful, < 0 if a fault occurred + * @return 0 = success, != 0, the exception to raise */ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags) + target_ulong *addr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - uint64_t tec = (raddr & TARGET_PAGE_MASK) | - (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); const bool lowprot_enabled = env->cregs[0] & CR0_LOWPROT; *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -570,9 +567,10 @@ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, *flags |= PAGE_WRITE_INV; if (is_low_address(raddr) && rw == MMU_DATA_STORE) { /* LAP sets bit 56 */ - tec |= 0x80; - trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, tec); - return -EACCES; + *tec = (raddr & TARGET_PAGE_MASK) + | (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ) + | 0x80; + return PGM_PROTECTION; } } From patchwork Tue Oct 1 17:16:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174903 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8847997ill; Tue, 1 Oct 2019 10:25:17 -0700 (PDT) X-Google-Smtp-Source: APXvYqw03QL1nBNRM9CSVStNX6KxabwuL7k6jsRmPqnSR/Aow5NRgYeV1xg4uFnT03yiZTeJ4zeg X-Received: by 2002:a50:fd10:: with SMTP id i16mr27563825eds.239.1569950716967; Tue, 01 Oct 2019 10:25:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950716; cv=none; d=google.com; s=arc-20160816; b=AnE853YV6KaiW+OYly5pSL0U+uvPCbXS0huT/EndnGst4T65aDwC/K60vRKI/eZUB6 Z4+0+WlIP9XvDtGUVHHB/1nI3ScV0t5MGXTaQWfVmclid5/5rQpYNC8178RRe6h2rCiy IBdCqmKY6QD4H13s2C8N5rBlED0H0Wsim20E47VJeHiFluI8rBmFMRGw600tWlUaeN0s WPaLoZZBETuPtUJUe//YR+t25w0mzqaNzQq8sPmSc4CI5POXgK+Q+ICSNotbMjkSBOuX fmTztBmOBNg94lhiMHPILY7EqjeCCFeJxw0u2q0AXURMui9WPOFX6mfJeIeWPqesPO0w nP5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=sktqWg5A8zjUbfven4iBrOAszFjwQxlijBBfeL/atZo=; b=m7IZRZXeHrwzxq8YpEon8GXKoBZR6g4ZzX9V2cS+yhEd/rRmBoFKdczjYGbxsPC8FH 2cVt44vwxXYjg0buqzUrCZWepmfl1GixaQqdmgKq3w1IFx19r6bJFzMESb0W+O3o1o30 oC4H4PBaAdeHNW2nFuly4KXkiAM0FE/6pBA6nZIjYExNy0YSdXgxtbEy7wn+B5sQ0yhZ tFsQ71fDKPlIVuM7T7HWD72pHKsRXFYwncDfrPvbQ/RZ2etTO0itrOOPReQZ/vcaIG9X fxIwXQ7K+sLRpO8WYti1rClq5cGFJqyFDeq0troEVzUA+BGiybRDL8xxVFDnTS124CfS QubA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Npxz1//4"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 08/18] target/s390x: Remove exc argument to mmu_translate_asce Date: Tue, 1 Oct 2019 10:16:04 -0700 Message-Id: <20191001171614.8405-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now that mmu_translate_asce returns the exception instead of raising it, the argument is unused. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index e8281d4413..e57d762f45 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -116,7 +116,7 @@ static inline bool read_table_entry(CPUS390XState *env, hwaddr gaddr, static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t asce, target_ulong *raddr, - int *flags, int rw, bool exc) + int *flags, int rw) { const bool edat1 = (env->cregs[0] & CR0_EDAT) && s390_has_feat(S390_FEAT_EDAT); @@ -423,7 +423,7 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, } /* perform the DAT translation */ - r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw, exc); + r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { if (exc) { trigger_access_exception(env, r, ilen, tec); From patchwork Tue Oct 1 17:16:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174900 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8843263ill; Tue, 1 Oct 2019 10:20:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqzEzUN1bE7jnySAzmhDzjJGH/d/a+JJ9HOM2hOscjeXWDiloQOU4NCh1GarFxRxq81QESeT X-Received: by 2002:a05:6214:12ca:: with SMTP id s10mr25623094qvv.91.1569950450582; Tue, 01 Oct 2019 10:20:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950450; cv=none; d=google.com; s=arc-20160816; b=W6IFHmoRoTJPj4xHYdel6JguV5LhaAhrMZGEb7DgMvSCbrG3sWVaxZTynyJHRzYAHY d+upeFL/X5Kz5Wr1VsYvwk2sSISVaKIwByqaoDGJjLoHm5647/gGlNlWM9QCQTh23VFS k8Qc7owfWeSY0fxgpi74KGcoLn5p3YUj84rKTlDvgZ3gCI7gfJP9SMqVbU0x9Q2sMdD1 QwqHSTrlofcMAZv/EkhcTzEfPNR+vXZiQ0YJQnLit74b27KNG0E85tQEwBkL/SlfnuoL ReHm4wrSwDdMSJk2AhdnRd2adVex2nymGjqp3bAmkVmQI7Ic3KfyhmA5kjvq2x+TXt93 YCKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=X3LTmFzczfRxgo2AFbnOMhu+tfZBTFunSRj9qIKUaA8=; b=0k9Ymj4ekE9kOA0mkkhTGTOcItty6g2DienNqEydx11bgE1XSQffNSA7r+ZKROvNZo aJAf3CWuyuuevFuqqwkAWSxbMeoD7uOWnq214nfnkNdiH51uaX/5ZmOl5L3Ww5Xk/Qr2 cnefUp9pIfbpPuDt3RLLidHUns2J5Z2ymuzwQoPXcGGf7tJ8kvCffHdGrar+35NUVVnA QY+DFPy7O4humLkFb4YsDF5oLTHfbBwaH4hQPX2MJdS5uDiqPe0Th0DWQH7nWaDrzJ7h YTPzl9m5XO7ltoeNDxOkI4VFQzk40fXTJ0cn9JNuKH3St7JPdKq7WE3vZ9bCI8JSYMy2 cN1g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=y++m4a4L; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 09/18] target/s390x: Return exception from mmu_translate Date: Tue, 1 Oct 2019 10:16:05 -0700 Message-Id: <20191001171614.8405-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not raise the exception directly within mmu_translate, but pass it back so that caller may do so. Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 4 +-- target/s390x/helper.c | 3 ++- target/s390x/mem_helper.c | 13 +++++++--- target/s390x/mmu_helper.c | 51 +++++++++++++++----------------------- 5 files changed, 35 insertions(+), 38 deletions(-) -- 2.17.1 diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c4388aaf23..c993c3ef40 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -360,7 +360,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, /* mmu_helper.c */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, - target_ulong *raddr, int *flags, bool exc); + target_ulong *raddr, int *flags, uint64_t *tec); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, target_ulong *addr, int *flags, uint64_t *tec); diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 906b87c071..6a0728b65f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -140,8 +140,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); - excp = 0; /* exception already raised */ + excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec); + fail = excp; } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { diff --git a/target/s390x/helper.c b/target/s390x/helper.c index bf503b56ee..a3a49164e4 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -52,6 +52,7 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr) target_ulong raddr; int prot; uint64_t asc = env->psw.mask & PSW_MASK_ASC; + uint64_t tec; /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { @@ -67,7 +68,7 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr) * We want to read code even if IEP is active. Use MMU_DATA_LOAD instead * of MMU_INST_FETCH. */ - if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, false)) { + if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, &tec)) { return -1; } return raddr; diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 7d2a652823..e15aa296dd 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2364,8 +2364,8 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) CPUState *cs = env_cpu(env); uint32_t cc = 0; uint64_t asc = env->psw.mask & PSW_MASK_ASC; - uint64_t ret; - int old_exc, flags; + uint64_t ret, tec; + int old_exc, flags, exc; /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { @@ -2373,7 +2373,14 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) } old_exc = cs->exception_index; - if (mmu_translate(env, addr, 0, asc, &ret, &flags, true)) { + exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); + if (exc) { + /* + * We don't care about ILEN or TEC, as we're not going to + * deliver the exception -- thus resetting exception_index below. + * TODO: clean this up. + */ + trigger_pgm_exception(env, exc, ILEN_UNWIND); cc = 3; } if (cs->exception_index == EXCP_PGM) { diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index e57d762f45..001d0a9c8a 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -365,20 +365,18 @@ static void mmu_handle_skey(target_ulong addr, int rw, int *flags) * @param raddr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer * @param exc true = inject a program check if a fault occurred - * @return 0 if the translation was successful, -1 if a fault occurred + * @return 0 = success, != 0, the exception to raise */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, - target_ulong *raddr, int *flags, bool exc) + target_ulong *raddr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - const int ilen = (rw == MMU_INST_FETCH) ? 2 : ILEN_AUTO; - uint64_t tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | - (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); uint64_t asce; int r; - + *tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | + (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + if (is_low_address(vaddr & TARGET_PAGE_MASK) && lowprot_enabled(env, asc)) { /* * If any part of this page is currently protected, make sure the @@ -390,12 +388,9 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, */ *flags |= PAGE_WRITE_INV; if (is_low_address(vaddr) && rw == MMU_DATA_STORE) { - if (exc) { - /* LAP sets bit 56 */ - tec |= 0x80; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -EACCES; + /* LAP sets bit 56 */ + *tec |= 0x80; + return PGM_PROTECTION; } } @@ -425,30 +420,21 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, /* perform the DAT translation */ r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { - if (exc) { - trigger_access_exception(env, r, ilen, tec); - } - return -1; + return r; } /* check for DAT protection */ if (unlikely(rw == MMU_DATA_STORE && !(*flags & PAGE_WRITE))) { - if (exc) { - /* DAT sets bit 61 only */ - tec |= 0x4; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* DAT sets bit 61 only */ + *tec |= 0x4; + return PGM_PROTECTION; } /* check for Instruction-Execution-Protection */ if (unlikely(rw == MMU_INST_FETCH && !(*flags & PAGE_EXEC))) { - if (exc) { - /* IEP sets bit 56 and 61 */ - tec |= 0x84; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* IEP sets bit 56 and 61 */ + *tec |= 0x84; + return PGM_PROTECTION; } nodat: @@ -472,9 +458,12 @@ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, int ret, i, pflags; for (i = 0; i < nr_pages; i++) { - ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, true); + uint64_t tec; + + ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec); if (ret) { - return ret; + trigger_access_exception(env, ret, ILEN_AUTO, tec); + return -EFAULT; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, From patchwork Tue Oct 1 17:16:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174907 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8851236ill; Tue, 1 Oct 2019 10:28:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqzCP9SG2k+ixQz9Gnh5B1phc2zsVUt3Zc60UrZE97JuQ9JsaFA2mlit2uNxtOoIP8A8NICM X-Received: by 2002:a17:906:493:: with SMTP id f19mr5219042eja.285.1569950895774; Tue, 01 Oct 2019 10:28:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950895; cv=none; d=google.com; s=arc-20160816; b=lbdT18C8kxp7R5VXTF1PzZArixWNpQp8ylDoJ5PPxZCM4zsfdoomJ6XLnOScx6JPVO zyvuuG9kBZP0D40fgzSYQrFjCxltOsyMuUvK3IU9kV3X1EYYe5bKtcmPhlUynkS3qbeO vLbeWW3T6r6kOiM/C1ZUUW4wz8OLXt2n38Mj4XIWAI+XGIODQVirlXWh9CFcT1+Bh8h7 NUNYiciu/pVuvwMz42mbwb9g3k+sxf5vjNN1CAZinWQK2gM2w2u7bPhgQFJkGqg7xAAo wMDGZ/qh/ub6ZlpJfSVbqnu15uwxWbGjMJ+VYLmg73YPe35DxgDbsod1Q/Ee85PX3fvl Pvjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=qV5DRSUK9uxLr8VUlGB8IPLCjYhHZMF32okiY81/uHY=; b=yO/vLKYaQSPY9o4DsELm+W1s/fr+4iLcM9DzeMiQTdb26zVdQ7x/B4OtevJVejrZTM uD4JQe/H8MDDuZZ/zibXo8YMgcnuNE/wVrP4GLgT8avN//ehZJOSskS6+qGr+PNJJROL Bl0t3ODJ7zwwp+fyf5Lllwn6GG1b8ob48kyAzmCn+fMD+OWF3n1aKGcx51X5jB1I27wG ZSSO2rjML3VCw8Tf5vrHSEjIEZmnc0I9qRxqKUQnDOHDqSGktPw3TfnpXRNLV/5mttOc RRUmrprdEmeAYUZheU3a0njJKtE0QzMhXhgKq5DyrIcrQ+Uwd7kJL4OdPR2e71MKwGwU jRkg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sfohzBHO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 10/18] target/s390x: Return exception from translate_pages Date: Tue, 1 Oct 2019 10:16:06 -0700 Message-Id: <20191001171614.8405-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not raise the exception directly within translate_pages, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 001d0a9c8a..869debd30a 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -451,25 +451,22 @@ nodat: * the MEMOP interface. */ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, - target_ulong *pages, bool is_write) + target_ulong *pages, bool is_write, uint64_t *tec) { uint64_t asc = cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &cpu->env; int ret, i, pflags; for (i = 0; i < nr_pages; i++) { - uint64_t tec; - - ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec); + ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, tec); if (ret) { - trigger_access_exception(env, ret, ILEN_AUTO, tec); - return -EFAULT; + return ret; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, MEMTXATTRS_UNSPECIFIED)) { - trigger_access_exception(env, PGM_ADDRESSING, ILEN_AUTO, 0); - return -EFAULT; + *tec = 0; /* unused */ + return PGM_ADDRESSING; } addr += TARGET_PAGE_SIZE; } @@ -497,6 +494,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, { int currlen, nr_pages, i; target_ulong *pages; + uint64_t tec; int ret; if (kvm_enabled()) { @@ -510,8 +508,10 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, + 1; pages = g_malloc(nr_pages * sizeof(*pages)); - ret = translate_pages(cpu, laddr, nr_pages, pages, is_write); - if (ret == 0 && hostbuf != NULL) { + ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); + if (ret) { + trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { currlen = MIN(len, TARGET_PAGE_SIZE - (laddr % TARGET_PAGE_SIZE)); From patchwork Tue Oct 1 17:16:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174909 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8855662ill; Tue, 1 Oct 2019 10:32:10 -0700 (PDT) X-Google-Smtp-Source: APXvYqxaZNcq8NPll6o9rhhi0XULX8ZiXWssMNczJDS8jVOomzQYFBcEOKLjAJU+5bGmRRGxzHUx X-Received: by 2002:a0c:cd89:: with SMTP id v9mr26299194qvm.205.1569951129970; Tue, 01 Oct 2019 10:32:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569951129; cv=none; d=google.com; s=arc-20160816; b=N73hN0S3/1meU8GzEGlRCAXPyhz7I7ZwMrY3wCRsqLkwhBCcsMzpvbKL+ma+LmUfMi uHv6KpWep5wtUgqRP5YzbuAtLXK6jrMGRuw/SEvhsNC6tG9wSCjhbnf3ThIRLuyI7Yb7 HfW1Y+6n3vGe5A0+UnB8SCiZPNLrZUmPu04HczwbNBlwh20dseBbvmccQxBOEPg5Gmrc jbPLSd4kqeFQzb41b95IxZwpvy2B3Fyq5Qq7Rok3xy6HcBYw7iIfnJz6suEeC8KM9Nfj nYqoe3WznrimW1dzdkegAki6In0R47Z3yrNuGIOw41hq6b3uCl4ZHmmGb25R+QeBx1YL YOVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=kOQn8fqkcBbOOtc4Nsvslx7elS0LZpOm6Sn3ku0T4zo=; b=f/JxZYsliemZ3xufOTM/7umBIyej+sjpbjPLZTvO5C0I2q1om+T50Qymlvqn9nGVjR zbmZK6fWRW72jYDZ2O2ZltGeOhvteA7gi5Zt/OVi4bBJPhphEJCNI0QrA1bHA3dk91Vm lhAfZBH06hEFPtjHLA069mXJA2O+0q59J+z1vV+SsqlSc0H3anYtxohM01cLqMCCRF93 MYLP/s6xbYtPIPaCYKST53+ikPsWhQ0attQE/Io46zNe0e0OJ8gL3QPVg3irRAC53/Gb xKUoGZ98eHhZXI6Vr4LyJ4t/mxCHBAnII4KwAzEdpNqKcDLGSULT+MB84inBYyIBzE3J 3RYQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qXDiBiCd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 11/18] target/s390x: Remove fail variable from s390_cpu_tlb_fill Date: Tue, 1 Oct 2019 10:16:07 -0700 Message-Id: <20191001171614.8405-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::529 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now that excp always contains a real exception number, we can use that instead of a separate fail variable. This allows a redundant test to be removed. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 6a0728b65f..98a1ee8317 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc, tec; - int prot, fail, excp; + int prot, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,20 +141,18 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec); - fail = excp; } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); - fail = excp; } else { g_assert_not_reached(); } /* check out of RAM access */ - if (!fail && + if (!excp && !address_space_access_valid(&address_space_memory, raddr, TARGET_PAGE_SIZE, access_type, MEMTXATTRS_UNSPECIFIED)) { @@ -163,10 +161,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; tec = 0; /* unused */ - fail = 1; } - if (!fail) { + if (!excp) { qemu_log_mask(CPU_LOG_MMU, "%s: set tlb %" PRIx64 " -> %" PRIx64 " (%x)\n", __func__, (uint64_t)vaddr, (uint64_t)raddr, prot); @@ -178,13 +175,11 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } - if (excp) { - if (excp != PGM_ADDRESSING) { - stq_phys(env_cpu(env)->as, - env->psa + offsetof(LowCore, trans_exc_code), tec); - } - trigger_pgm_exception(env, excp, ILEN_AUTO); + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); } + trigger_pgm_exception(env, excp, ILEN_AUTO); cpu_restore_state(cs, retaddr, true); /* From patchwork Tue Oct 1 17:16:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174911 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8857683ill; Tue, 1 Oct 2019 10:33:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqwwWzW+L8KpvIlklYnMBfiMq4CrI9w0JLPQH2zyV9AiBYX6OGwCog+M5wyGlOxMvHkerpnW X-Received: by 2002:a50:d55e:: with SMTP id f30mr27268490edj.35.1569951231087; Tue, 01 Oct 2019 10:33:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569951231; cv=none; d=google.com; s=arc-20160816; b=uoJRXIJF8y7YkoDXKwMxAPtihUEFFKzAy20Cfq2soW9WBjFXN7JgM6FvZ89tER0VXE jOHsz+Q6HbLsg1VmrKaAkRzyCqyoGG+IaYp+S4UtwFNM0eM/Ou4k3252yECjkSwxJHzR JpdZhpeeREVoiE/ttej4VgQX8Iw6mNQHa0xWLGLwaIpfFCMN0SeUqHc24CcWIjv5MajL bloMrkMv3zD1aRV2nMzzsyxjYoTZR/lKizVAzM8yMv7PzNw3yBdUnxl3B+o9gN9LF/Hg fd4wB6+EbO+0Z+WCYx3jC4Ocx8KxFFvX8YudtZUpvSBw9qm7bYCCldWvbcCRjIxFvWJn 1OQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=vJYZZP2e9BNSzbbwHk+HhznESdz192Yke+3plcKoZ6o=; b=ARQ90wedqb1WVtmquTJYpnk3cubQwyuULrSwNT2iDpCbkl1SpjI/naskszuyTyLo7G N06yfKgie30kWqpw7HtMOD9Tzv7BE9mWGdIBO9Z3sZvRwk8lp5P8UZcSJokomvN5ZkGd +/FN4ik4Ki3riYIVZTCeBwhJjlDqunyOrqmy19JaHvpiVcn2jBCTSh6Nsy4BPntYW3Ha Qcesak1O6JvHKsUSY6BqD2Pu3nT1/uAVPyjqruQQ62UmN6I8cY3e800fAerdgdgHqsNl olimC8r/s9sRYrYWJ1pIXmkwaBUskulyiX7Dwt/nOPShKXV1in8yDb+Z4+AdEhiC00FG xY/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XzIkzCRU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 12/18] target/s390x: Simplify helper_lra Date: Tue, 1 Oct 2019 10:16:08 -0700 Message-Id: <20191001171614.8405-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We currently call trigger_pgm_exception to set cs->exception_index and env->int_pgm_code and then read the values back and then reset cs->exception_index so that the exception is not delivered. Instead, use the exception type that we already have directly without ever triggering an exception that must be suppressed. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mem_helper.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) -- 2.17.1 diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index e15aa296dd..4254548935 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2361,34 +2361,23 @@ void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1) /* load real address */ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) { - CPUState *cs = env_cpu(env); - uint32_t cc = 0; uint64_t asc = env->psw.mask & PSW_MASK_ASC; uint64_t ret, tec; - int old_exc, flags, exc; + int flags, exc, cc; /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } - old_exc = cs->exception_index; exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); if (exc) { - /* - * We don't care about ILEN or TEC, as we're not going to - * deliver the exception -- thus resetting exception_index below. - * TODO: clean this up. - */ - trigger_pgm_exception(env, exc, ILEN_UNWIND); cc = 3; - } - if (cs->exception_index == EXCP_PGM) { - ret = env->int_pgm_code | 0x80000000; + ret = exc | 0x80000000; } else { + cc = 0; ret |= addr & ~TARGET_PAGE_MASK; } - cs->exception_index = old_exc; env->cc_op = cc; return ret; From patchwork Tue Oct 1 17:16:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174912 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8859576ill; Tue, 1 Oct 2019 10:35:33 -0700 (PDT) X-Google-Smtp-Source: APXvYqw4v2HUjAAirAYQ6tYBlgQK0AJAlUOuMXGMz0NqT2GLrQRV7KTE8xJvkMeSoU3y5Bot774y X-Received: by 2002:aed:2f42:: with SMTP id l60mr31160986qtd.315.1569951333237; Tue, 01 Oct 2019 10:35:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569951333; cv=none; d=google.com; s=arc-20160816; b=U4LEpUsXN+gBPz/TEE+tFbZoLegeO4q2BGlfNihasl1N8AZiclzQP1IZo3M43uUKZt RmddESkRrT9z40oGk0qF+SsjyZpCnYIiUE69Ci5if+pjrmiBjYTxdGw4fityctrDbf3e 3cjOzjEel9WTZkYSmoPWb8ApNT2+XUV6loPnVSdjk7st7RLaXx83t9xKvPI0vA+2FVWZ yV+bdifGY8vWF7CeyxDoPidNDXs0O0v9X4uZyaXe9CUCEDV500/xonf+c+IkFrjRfbzS NQe+qrvZCayO57kMyhCSeEeyaHwmzQ/zSzeOD5zLKlPQRIfkhRCyMpWNXdK3kgugZ3n6 FzQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=8sg4rb5KuIBYRa5veNL+5ohAGWn4FiKab4HtkGWajes=; b=YmgjdpU+fhpGbq3pcaJ7TiewVsfEgoiw4fXZVWlfHixfkJAGe/bWAJot1F5Ry57DBu vEHTtrpe27V28dS7ers8azijOR+xFMAhXkWfT0yZbuae+eJWNTUhdj8WOUcn10FwIe/q MKDO2brJNMeBNGRJZnwmtSki6N/E/96ZyQYfvSLDPFZ34OO5aVMqaMxGOGRhX0ZbXEhv H7q0CJLGe5O01+0y2DM4UAooAneQ+KoZmkJcBLz3IMqMSR1DKqwv/4EZBjVLE7byQtUg LuwcfDehxjLfn44M4VefXdp9Id22oguKwMmWgDfCaxvRLnIhuhSHY/GU3i5FjO2m5ZS1 bh3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AOYp1zg7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 13/18] target/s390x: Rely on unwinding in s390_cpu_tlb_fill Date: Tue, 1 Oct 2019 10:16:09 -0700 Message-Id: <20191001171614.8405-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We currently set ilen to AUTO, then overwrite that during unwinding, then overwrite that for the code access case. This can be simplified to setting ilen to our arbitrary value for the (undefined) code access case, then rely on unwinding to overwrite that with the correct value for the data access case. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 98a1ee8317..8ce992e639 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_AUTO); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. */ cpu->env.__excp_addr = address; @@ -179,24 +179,15 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, stq_phys(env_cpu(env)->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, excp, ILEN_AUTO); - cpu_restore_state(cs, retaddr, true); /* - * The ILC value for code accesses is undefined. The important - * thing here is to *not* leave env->int_pgm_ilen set to ILEN_AUTO, - * which would cause do_program_interrupt to attempt to read from - * env->psw.addr again. C.f. the condition in trigger_page_fault, - * but is not universally applied. - * - * ??? If we remove ILEN_AUTO, by moving the computation of ILEN - * into cpu_restore_state, then we may remove this entirely. + * For data accesses, ILEN will be filled in from the unwind info, + * within cpu_loop_exit_restore. For code accesses, retaddr == 0, + * and so unwinding will not occur. However, ILEN is also undefined + * for that case -- we choose to set ILEN = 2. */ - if (access_type == MMU_INST_FETCH) { - env->int_pgm_ilen = 2; - } - - cpu_loop_exit(cs); + trigger_pgm_exception(env, excp, 2); + cpu_loop_exit_restore(cs, retaddr); } static void do_program_interrupt(CPUS390XState *env) From patchwork Tue Oct 1 17:16:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174905 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8849578ill; Tue, 1 Oct 2019 10:26:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqwGvFvp5aKbQ5uHSzIry7gj1oThS8WX3/BU328AJbjDApX2ErWUVFVGpKTW3Q+aDZkYPvJu X-Received: by 2002:ae9:ee0d:: with SMTP id i13mr7082731qkg.417.1569950804934; Tue, 01 Oct 2019 10:26:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950804; cv=none; d=google.com; s=arc-20160816; b=zXnyXYDQRX5WrECb/763kQOvfgV+wrEyXA2bKKYXybA9Pyxfwcnoz3Gx71fbPT5vlr Zt89HZMarzEq/bYpUb4q/Hn13LDFGy51dKDHNFtzu1CY+eKAmeriWqAYWFY98DHYdm9r zJ+cIrLLwsj1jpk1Q4TkYIBjOh9bzjtZah8Dl+Uxvk4jaJ10LvvftEXBrZCI6tAOodYp /jj6Z0ibRBCQ3cAQxOlDU6Hg4ZBKjv8RfYEJzls1jPX+tGpohhp4+qZppOmOP76YME9A XD63vPUva1o/wceH1pW7cL8QowtcXj3rGhM18nY10tddvg+uMPTSFGg7T7qVCEUXwI1A jPmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=cLTjP6H3sgR48Oz4OVwXv1gsVIS4CDtO8U+Cy7bE7UQ=; b=W0dAaTXIEhjSv5eP0GajyYVL7i1rNvmJdkR8Wfaj2gZQmrkqLgKoNOUHkiKF0RiBnf +8O2/HIP9oHUGHQ0jiEpjG96/WxDjnWjGDXD28bBXXcBUhuw1TyuK8SYzt8ydBPFO215 kMAw70DzvcLOe8n38zGAcVwYNyx7GWyj32819UQIehAXfWoG0CZ0d7a5HKb166FXnzM2 DQ12YIEq0ZfGfvBsnkZR37/RGLeVC2nzayQsx9P2T5KHI1Q+jV5Ui/D01PtVRER9fv5w XPF/m32DTR0ZlKvRGcI9yuGEqe6VZmRL+9vCeMYNiHMBCPgLoTJwUPvYj4hpZamL6NsT QHmA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="DAzB//66"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 14/18] target/s390x: Rely on unwinding in s390_cpu_virt_mem_rw Date: Tue, 1 Oct 2019 10:16:10 -0700 Message-Id: <20191001171614.8405-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For TCG, we will always call s390_cpu_virt_mem_handle_exc, which will go through the unwinder to set ILEN. For KVM, we do not go through do_program_interrupt, so this argument is unused. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 869debd30a..df58fb73ba 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -510,7 +510,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { From patchwork Tue Oct 1 17:16:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174914 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8861859ill; Tue, 1 Oct 2019 10:37:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqygdLYVdcuqqw55O+fFZHYEbYQIbGptz0ujTcakxRvxhLaM1GUA+iMqrw+Lh+mAiMSidUFV X-Received: by 2002:ac8:5306:: with SMTP id t6mr32012335qtn.53.1569951471278; Tue, 01 Oct 2019 10:37:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569951471; cv=none; d=google.com; s=arc-20160816; b=sr0Krv5ObiePPXBPwFzq/6k9AVAC9v3Qj/gOywlKNya32FBS1ZlKo8z/VkGHS+35tm GLjutZN6mjzCfQSnNAhJeWzU5ZH4xX+Lm37z2T+cYDVpN0BwA6me1Tnof+5VI5U/Y8T5 hwl033BWCp3THdW/pgsyspeelsggODvIlCDJV/G4zFRO7NQViUY2lWCj6i5nlI2DqSu+ zdYrZOfyXdtrGN5KeG5zXtJTXBCO3KhNkyMRH4XFx7jAAZQs0RjwQxLdByV4Q4bs7jdQ lB7ZFAqeZzR8bPTEt7LgCw/DyOg8MYiHrE9yX/55RQTMH7WHILIDUJXIX01dJQ6uPToW cAwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=v4OWbCEYlAnhjvj+x+7Ps/UFUWQ5DVP1AWFH0GWe8MY=; b=gJOSb/s14N8ky6iN8n3Pnrgua5l9/pWWUSUx0cq+E8k9JKjDj08whYKNhdZLLy/N2Z wrnORnPlPsktmzUFyl9WJ2+8hFjHRiJ1ZH29E3W0bi/M9k/3BCeJava2Db6g8TTP9Sj7 D4xlrwwT0eQ+xtE2UQZzJTdfK1nI8E9giDYq7jE2Pmq4hD22dNEWQ0E4DGcfttkZ4JZ5 hJneVMA4I7X8mFTK+AevoljhP7EQPMdJLD+tBZdSYp/rkArUH0JMOzcigu4N850CivlU yPaIl65OeQAhbZiw/jmDhQ5isXlmVqbcwWZVtd6WqpgE5BloBILdeFDqJZLJZcusOKtS wd6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BMyW5teI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 15/18] target/s390x: Remove ILEN_AUTO Date: Tue, 1 Oct 2019 10:16:11 -0700 Message-Id: <20191001171614.8405-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This setting is no longer used. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 2 -- target/s390x/excp_helper.c | 3 --- 2 files changed, 5 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 18e7091763..e7a9a58e0f 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -806,8 +806,6 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); /* instruction length set by unwind info */ #define ILEN_UNWIND 0 -/* automatically detect the instruction length */ -#define ILEN_AUTO 0xff #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 8ce992e639..c252e9a7d8 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -196,9 +196,6 @@ static void do_program_interrupt(CPUS390XState *env) LowCore *lowcore; int ilen = env->int_pgm_ilen; - if (ilen == ILEN_AUTO) { - ilen = get_ilen(cpu_ldub_code(env, env->psw.addr)); - } assert(ilen == 2 || ilen == 4 || ilen == 6); switch (env->int_pgm_code) { From patchwork Tue Oct 1 17:16:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174913 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8860672ill; Tue, 1 Oct 2019 10:36:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqxPl0DB/LIRZhjIIssJumKk4gUYDyXfrpJ9vBE3pLLYn5CvKJmSChj2wwZa6CZ+LGUmh3rP X-Received: by 2002:ae9:ea12:: with SMTP id f18mr7478035qkg.204.1569951400873; Tue, 01 Oct 2019 10:36:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569951400; cv=none; d=google.com; s=arc-20160816; b=GZLMIn0lO/LEIvJZdSbdjg+4X+6Ekbtu82Lg3uM7pJASJZ1au7TYEYgg3+b0pyrJaY udRcW//S7eoT5oiDg3Rt6Ygg3MPcw+Ve5HNOYgRxPLx1v19ID16aWVzyg4T4LubBTl4C zNHPK7Uul0jPspczOPGd1AmesIYd7rlQlSoD5L1mPtAD2BwgQfs6+qOXjFtkGZYZXFqV IE+0M2MNH1PtkLRl+288EVWxaZv3yIYtodZ3Zt6zbiKaRuvQOexHLHzpL78bqXF8n47w OF85f7O8/Xl18OfqVpFoev8cHPRYV/mRUtdaHlCLLEvU2Dwv6k77TjOOO0oR/kxwtArE jl0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=T27/+7RLgsAKUaeTVz1uKZeEShCunhopOomrfELwqqY=; b=uSaCukD3FV6uHOYocgs6p5D59Cg+/I6QdpyXcrzGAhQkr6I8mA0hv2MPwnDXamatRf AZbjSoGPFk9d3sQuR7BxQuwxFVKYwFBm9fYgarwUBqAIt0LIbKC1LQO1TLX/A7ZqjTd4 4ZVpr3NzsJJfzhPRmvkvAtJUQul2hVLkvYBB7bagagXG8HNllLqQWrksWWXZ9ExEMGF2 66ybrvDtjwk4qONShJZBFB6P/rNmM+iw/sX39RQ84TGmutXPUP0aOcBlbqAfy+cW5K9z xCOZ9F3cLjuc8Je2beViVNxyHGkO4fHicl86YwAvZpKPHdlIj2zJUdgFPamQHhnHPJ6j kojg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kp5NU5ew; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 16/18] target/s390x: Remove ilen argument from trigger_access_exception Date: Tue, 1 Oct 2019 10:16:12 -0700 Message-Id: <20191001171614.8405-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The single caller passes ILEN_UNWIND; pass that along to trigger_pgm_exception directly. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index df58fb73ba..09c74f17dd 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -33,7 +33,7 @@ #define FS_WRITE 0x400 static void trigger_access_exception(CPUS390XState *env, uint32_t type, - uint32_t ilen, uint64_t tec) + uint64_t tec) { S390CPU *cpu = env_archcpu(env); @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, uint32_t type, if (type != PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, type, ilen); + trigger_pgm_exception(env, type, ILEN_UNWIND); } } @@ -510,7 +510,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); + trigger_access_exception(&cpu->env, ret, tec); } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { From patchwork Tue Oct 1 17:16:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174908 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8853009ill; Tue, 1 Oct 2019 10:29:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqzQnLGyu4UU+uGwY949WgvazbW4ASBs5HU1g+VHrJKbv2/KmNVg1VLQ3Gu8XoGotaCQNy22 X-Received: by 2002:a50:af26:: with SMTP id g35mr27473790edd.129.1569950998812; Tue, 01 Oct 2019 10:29:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569950998; cv=none; d=google.com; s=arc-20160816; b=e1Xae0sM1jmfN0nMHiYm4fKuWC1mzjNtWn/aETTMyUlVrVX93cMZxjtKU8UAFtOVxu 5nH0S5Y4AABlv2ikst4UHO+KUobwQD7n61gI3G3osr+JXoUYd8dqbGVwiQheevKhPsWM 0AygsSHnkd0vlrMV9Bulg8d3T5e+AQ9VBEriR6UAv24kUId35HhJSd/a2Vz3Z04xZcbs MTk2ESh6HcDVfKvHsba195JKeyK9/qtsBt1gfrnlql+2yUja/bn90JN9q/BBni+bxSL2 HxUazuqGOMuTi9yJ+26fWSwBAtWhlui7O1LYTFl+8V17F8i8fxedmHA67sT6iJClIqpa dpJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=zWndXgEDq38ZD9+tzMggT4V1IKonosDqt8xl6lDbLwc=; b=Yh1vcUr/ghIEEp7XfU2z+DaC+Hty098zsrkyeoDSCfgLrigYT3aG1PCmLMSdzVGZwG 62KdwI19rMzwXhYYHhJqUCGaZdq3G694vRC8LGVPQknjhDjBLsGWE6kuwl/HFpngUDkw //RkjINkrkJI3Xfn0ImN8NG8rRRr4cOuxXJPdUt53CPLyryW0+valOXBfEBMNiD8To9z +H7UckUJ+wq9FohQFm5ODMBWTWJuTB7u/Y7f/hRXEQCX/mG79apjQBjd9EZA1fXMSWHL 95es5cKURCN10fd3fiBGPp2NU4CtJgGJEWdK4QYAPPsLlnfwszDGhyfBOCFoVIssMI2h 7JUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rv6rqUR2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 17/18] target/s390x: Remove ilen argument from trigger_pgm_exception Date: Tue, 1 Oct 2019 10:16:13 -0700 Message-Id: <20191001171614.8405-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All but one caller passes ILEN_UNWIND, which is not stored. For the one use case in s390_cpu_tlb_fill, set int_pgm_ilen directly, simply to avoid the assert within do_program_interrupt. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 7 ++++--- target/s390x/interrupt.c | 7 ++----- target/s390x/mmu_helper.c | 2 +- 4 files changed, 8 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c993c3ef40..d37816104d 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -317,7 +317,7 @@ void cpu_unmap_lowcore(LowCore *lowcore); /* interrupt.c */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen); +void trigger_pgm_exception(CPUS390XState *env, uint32_t code); void cpu_inject_clock_comparator(S390CPU *cpu); void cpu_inject_cpu_timer(S390CPU *cpu); void cpu_inject_emergency_signal(S390CPU *cpu, uint16_t src_cpu_addr); diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index c252e9a7d8..e70c20d363 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -42,7 +42,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ILEN_UNWIND); + trigger_pgm_exception(env, code); cpu_loop_exit(cs); } @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. */ cpu->env.__excp_addr = address; @@ -186,7 +186,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, * and so unwinding will not occur. However, ILEN is also undefined * for that case -- we choose to set ILEN = 2. */ - trigger_pgm_exception(env, excp, 2); + env->int_pgm_ilen = 2; + trigger_pgm_exception(env, excp); cpu_loop_exit_restore(cs, retaddr); } diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 2b71e03914..4cdbbc8849 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -22,16 +22,13 @@ #endif /* Ensure to exit the TB after this call! */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) +void trigger_pgm_exception(CPUS390XState *env, uint32_t code) { CPUState *cs = env_cpu(env); cs->exception_index = EXCP_PGM; env->int_pgm_code = code; - /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ - if (ilen != ILEN_UNWIND) { - env->int_pgm_ilen = ilen; - } + /* env->int_pgm_ilen is already set, or will be set during unwinding */ } void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 09c74f17dd..90b81335f9 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, uint32_t type, if (type != PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, type, ILEN_UNWIND); + trigger_pgm_exception(env, type); } } From patchwork Tue Oct 1 17:16:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174915 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp8862842ill; Tue, 1 Oct 2019 10:38:42 -0700 (PDT) X-Google-Smtp-Source: APXvYqwqb879VqJrkfLWlLaD0OWMo2nqaLozt9lfeMXS8fztEDoJBPcy150DNo18E7W2WTvZiZiR X-Received: by 2002:a37:b184:: with SMTP id a126mr7474333qkf.105.1569951522137; Tue, 01 Oct 2019 10:38:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569951522; cv=none; d=google.com; s=arc-20160816; b=uxxhcs40Cbzi7+auqxtaef1mat0u/myb0VHJbLAhVGcSFD72uaz+TwADVAGPfTo+E9 e2zYQ6jen7fXSpMTKPEyuvUhxTo2a2X3VeIsezgWSp0V91jCs6mVFnlwcZ8vWMtsxYQH zGW/m1DTCrCPki8M5LYkbOA3qi+PGp5Z94Q+AB8JL9Wrw4802ufDwRdJR2g49dGCx9Nv M3VyKrUv3W5uDN0mYROHCr7rDtdH4ShAmFzTVlgC1Pk0YAYK2ZJlO24DoYy3txmQ9JaL kIvAlBDo8ouFlW2kW5uXDcH1t6yyYJcAuliOCURCKM7DhdjmXb4rh3KhNko3UOBqVDmx RbtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=nKLVZY0MmJdzh4WMbpWEWjNzr7fohAHeyzm16e0V7Wc=; b=lSC+SNXhaoOpAnXNhFYoXvhMl0iDukyjEVRFsgdDOC6pac6rrDGcvAFV+M6cGAXIUn JgwzHQ5dHadgiA7Z6y9EnQJ6ktkLKRTmj6YQyLo2IpeE1FhUxp1ag1QtsMUl0tDrb4Mn dPqslpUSHVF3YyZNpsr+LnV3/GspXfKmdC/p2ce6O3Y6d3wF2/tifnFE3BX5wlfDIypy e1f2PXHJzytwpvcFnW5nVPcP4D+VWf7ObQU3U9jW90b2OQu8esb5HnE1o8RNYfkFcvx8 5POG/x2TT+9rolrnqgM0Ugz0CFIMzH+ikunRmTtpPL3i/u4xy8baenUoXfMuHHmNcqk6 9V8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wDuebHO1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 18/18] target/s390x: Remove ILEN_UNWIND Date: Tue, 1 Oct 2019 10:16:14 -0700 Message-Id: <20191001171614.8405-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This setting is no longer used. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index e7a9a58e0f..17460ed7b3 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -804,8 +804,6 @@ int cpu_s390x_signal_handler(int host_signum, void *pinfo, void *puc); void s390_crw_mchk(void); void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); -/* instruction length set by unwind info */ -#define ILEN_UNWIND 0 #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */