From patchwork Tue Mar 19 13:21:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 781185 Received: from mail-lj1-f182.google.com (mail-lj1-f182.google.com [209.85.208.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0991A5A782 for ; Tue, 19 Mar 2024 13:22:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854525; cv=none; b=nfNv9RzZgvpy3RK3IpY7u4A8zubg+vmYinLaXodMAU9Ex8d/N2djF6iUFYFkOX5yof7EACYOCbQ/odvUF57VuSyPezXt0Ka2ShM6WRzqnzCipZW1gaSb9hHMmRwPs0C80C7pfz/NMA7Fcby4SE1mdMfV/qy9wdJjFoDFmIll+rw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854525; c=relaxed/simple; bh=NmZ9EICiCbbTtUxJRhya/PBGKcbwZZCO3QzN71dugWI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dShfaUnsH38HUA3cY/uMRS/sN93Anw3klg24cK7jfepXZXi0BnleDLlfPi4Ci0DhtSwFGskbBhJl2nyPEjSaNP5tfQ13y+gH2/M5eW6rvmCwqMH1JaHG2ID1ODkfWJMtuy0xC3wYSs8P3CKyHpOOqjWnsizJs78lqzMbVa4tFVc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=w7nmOh5S; arc=none smtp.client-ip=209.85.208.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="w7nmOh5S" Received: by mail-lj1-f182.google.com with SMTP id 38308e7fff4ca-2d24a727f78so64670171fa.0 for ; Tue, 19 Mar 2024 06:22:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710854522; x=1711459322; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+fNq+ljFUI7fcqD7OFiXNswdwfx8fClPGMRPkyoFRqo=; b=w7nmOh5S/Ks8tLIBW7UfPjOGFIlWuGbXPcRNdKvHY0A37MXqDZikATd45IM64utuVn KXJTXrWMsZ9y9fvEyzh8E7QGsuN8vt5HEPaaj6U/uokOUyKD/cDJAKYWzpzkTrsq0EUB eW05ypVpn+mSZBTlYAkMDqhfq9W4WAaWFOv6TnbGk8IntYSJ+Wx4p8raIxZw2/x01CbQ lh8WwmCtDD3cmYfP4ZTWaByFqTPqrZMPCzA07J2BF7wRuyQnOk5B20fKyzYkrQTlC5ux Ua8Fu5oVgY8ZXVLgKBfexzdGLSoyO5mk6hFYBYnPcLBkgBdutesEQ9cNcd9ZQHtgncCt 62eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710854522; x=1711459322; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+fNq+ljFUI7fcqD7OFiXNswdwfx8fClPGMRPkyoFRqo=; b=dvHrQ5ulB9tEwiqJcd5PL+3azJ6j+wH8STWClUsONc/PGEjfWjXayrKcG6lAcswuly IdOmY93tn31QtmE3ZKBxKm0AZagTQ3H7Kt1eKpYadR/oxl3J1TLhXGx4pX9okTyAo6Jy O45rWod29w4we5uZ3vXRlLtnwIGqnQLkNFcyR/NUnlYFzMa98iJtITSoxXGdfW7fm+vi upezb2IFjquEUJLsmSfhW3GadC/epW8lnA5PyMUPEQky6GG6TDzUpGgs8QOuj0D2LdSc eQdYvnVg81HwP2p+VUFXAVyd2uvlor7FWPRUdisZCjc2BYYaasJk0SOnn3pH4nRmmRJJ fbrw== X-Forwarded-Encrypted: i=1; AJvYcCWIN4p+g2o/FlBTEelr/r3jN7uT0zj8Xuj5v3IuTu8XgEzcxYMH+NoAD6ajMdbLAcU4t+PZOdO5OsKBdhgQdvlY7CdgQz3XUFgnxBvyhQ== X-Gm-Message-State: AOJu0YwKiIn8D/PGMJYENPedWppzIuDg8wcdcvlOAqJE57ALh0XmH/wP aBMQ2UEpB41XEwHl2IQ69Nt1G26byN4JwBDrp3sy6Nqr/sQpZZCV6jrjHFDKY/g= X-Google-Smtp-Source: AGHT+IECaHeIQblFB/9SyDMHi/valk7FklMHNymPDDVkWfEGdE2IkDgDfuLPcEW+m6WpTHKUAEujxw== X-Received: by 2002:a2e:7004:0:b0:2d4:93d3:11ab with SMTP id l4-20020a2e7004000000b002d493d311abmr6365302ljc.6.1710854522316; Tue, 19 Mar 2024 06:22:02 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id j7-20020a2e3c07000000b002d435cdf2adsm1826148lja.111.2024.03.19.06.22.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Mar 2024 06:22:01 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 19 Mar 2024 15:21:59 +0200 Subject: [PATCH 1/9] drm/msm/dpu: drop dpu_format_check_modified_format Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240319-dpu-mode-config-width-v1-1-d0fe6bf81bf1@linaro.org> References: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> In-Reply-To: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: Abel Vesa , Johan Hovold , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4389; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=NmZ9EICiCbbTtUxJRhya/PBGKcbwZZCO3QzN71dugWI=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBl+ZF3TOFe2Gz3tn4gkOTJDpz5y1bhM28EHGZbH oezmXRP0ZCJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZfmRdwAKCRCLPIo+Aiko 1RirB/wKPBpr/8QFMjPQ4Rnlfp7u0uSfs2gg71A/I9TIebeW7Q3gzrVNj0AsNj2nMNxZyF4x6fK M1+A3CFSjqpWZQHHLGYL06VAQKR/F7WYAkgVyO8fnM9/Z/hWjhcAJIWsoAXWu0ciRuHYafIkU/4 UA5x0ICEEYUwxJCSaV31YxTLQrcyd7chk3/A4mYTs5MCzq+QMiwCqdyrBWCLuBTzrV9iKTJA17O 9ymJklyBmfUXZGXVQNykhVwNzj4Ka/+nUR3eQmKu15aPbE1JgQloKjPv4mzlDPSWDCbv8jzXZpr Lx+jcdovA8ilQ4jn+29e4FMdV0Z5mrTgFT2bfDdmv4deiKpK X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The msm_kms_funcs::check_modified_format() callback is not used by the driver. Drop it completely. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 45 ----------------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 15 ---------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 - drivers/gpu/drm/msm/msm_kms.h | 5 ---- 4 files changed, 66 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index e366ab134249..ff0df478c958 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -960,51 +960,6 @@ int dpu_format_populate_layout( return ret; } -int dpu_format_check_modified_format( - const struct msm_kms *kms, - const struct msm_format *msm_fmt, - const struct drm_mode_fb_cmd2 *cmd, - struct drm_gem_object **bos) -{ - const struct drm_format_info *info; - const struct dpu_format *fmt; - struct dpu_hw_fmt_layout layout; - uint32_t bos_total_size = 0; - int ret, i; - - if (!msm_fmt || !cmd || !bos) { - DRM_ERROR("invalid arguments\n"); - return -EINVAL; - } - - fmt = to_dpu_format(msm_fmt); - info = drm_format_info(fmt->base.pixel_format); - if (!info) - return -EINVAL; - - ret = dpu_format_get_plane_sizes(fmt, cmd->width, cmd->height, - &layout, cmd->pitches); - if (ret) - return ret; - - for (i = 0; i < info->num_planes; i++) { - if (!bos[i]) { - DRM_ERROR("invalid handle for plane %d\n", i); - return -EINVAL; - } - if ((i == 0) || (bos[i] != bos[0])) - bos_total_size += bos[i]->size; - } - - if (bos_total_size < layout.total_size) { - DRM_ERROR("buffers total size too small %u expected %u\n", - bos_total_size, layout.total_size); - return -EINVAL; - } - - return 0; -} - const struct dpu_format *dpu_get_dpu_format_ext( const uint32_t format, const uint64_t modifier) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h index 84b8b3289f18..9442445f1a86 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h @@ -54,21 +54,6 @@ const struct msm_format *dpu_get_msm_format( const uint32_t format, const uint64_t modifiers); -/** - * dpu_format_check_modified_format - validate format and buffers for - * dpu non-standard, i.e. modified format - * @kms: kms driver - * @msm_fmt: pointer to the msm_fmt base pointer of an dpu_format - * @cmd: fb_cmd2 structure user request - * @bos: gem buffer object list - * - * Return: error code on failure, 0 on success - */ -int dpu_format_check_modified_format( - const struct msm_kms *kms, - const struct msm_format *msm_fmt, - const struct drm_mode_fb_cmd2 *cmd, - struct drm_gem_object **bos); /** * dpu_format_populate_layout - populate the given format layout based on diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index a1f5d7c4ab91..7257ac4020d8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -969,7 +969,6 @@ static const struct msm_kms_funcs kms_funcs = { .complete_commit = dpu_kms_complete_commit, .enable_vblank = dpu_kms_enable_vblank, .disable_vblank = dpu_kms_disable_vblank, - .check_modified_format = dpu_format_check_modified_format, .get_format = dpu_get_msm_format, .destroy = dpu_kms_destroy, .snapshot = dpu_kms_mdp_snapshot, diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index 0641f6111b93..b794ed918b56 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -96,11 +96,6 @@ struct msm_kms_funcs { const struct msm_format *(*get_format)(struct msm_kms *kms, const uint32_t format, const uint64_t modifiers); - /* do format checking on format modified through fb_cmd2 modifiers */ - int (*check_modified_format)(const struct msm_kms *kms, - const struct msm_format *msm_fmt, - const struct drm_mode_fb_cmd2 *cmd, - struct drm_gem_object **bos); /* misc: */ long (*round_pixclk)(struct msm_kms *kms, unsigned long rate, From patchwork Tue Mar 19 13:22:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 781184 Received: from mail-lj1-f172.google.com (mail-lj1-f172.google.com [209.85.208.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27E6280028 for ; Tue, 19 Mar 2024 13:22:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854528; cv=none; b=Z3Ypachquo26eyytWHDkpNnCC9gMdIciIf+usTFy/+Ez185ZEr3M3hZAucNnb+5oopu6OFNHZFR+AegwogUOqLhkIEDDwFPAeqUVEWO+RD3Xp5j53Ue8Pv7SvU8I5nRfHp+d1cXx/buo6gQlkQbapKDB+vMHpTWmc2GEH2kk77M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854528; c=relaxed/simple; bh=5iGDWVtriFGrB5YnokcGmSkKiWEPQN0KlqXQNhPq3c4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EbIvYQ4jRIq435zCRd1l27239KoUM+CLCTN15u23CdtS9sGYk+8HKzl/AFm7hEzO7uSOjNg7P9VIqtwyRbjGkE3SyvFcdmCk5Lgf0a0ASB1M2XatG6IuX6TS3gm0nXiIjoF3OJ1qvLWJjhUPN9f5vyoL34e+AODXdLIhUgVrU7g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=p8D6Iu2m; arc=none smtp.client-ip=209.85.208.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="p8D6Iu2m" Received: by mail-lj1-f172.google.com with SMTP id 38308e7fff4ca-2d46dd8b0b8so73608221fa.2 for ; Tue, 19 Mar 2024 06:22:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710854524; x=1711459324; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=uHmAL+VTrYFRdG1FcBobe9u/j58wPncf3Wah26zHOAM=; b=p8D6Iu2mcwrEqv/HeX2/ljsEgsgR2JdG5sQhqAZslhmPDXJuff6x+SgS7zNpoSduYE Cf/ErNj2hprymbCSQ3x/PUqBmWdOrXMg818CvdV7CeF9z/DsjhCoerFf3K+M4FV6J7/i 2Q6lO0f7KABRHDSn0N4y5u0YBkNf2xiapK6bKARZRopIUHxmAwyYXaQuV3/+BFr8SPWc ebVldiODnDEVCB9FoUfbuNOdvTZhXDPIHKucY08a4LF6yQMiG5DpmYNpAbU3jygjZzqr e3rcYvXCS43bVBn2zhvHcxCQez1OHjgZvvb0BydmVfrUQaSYKTPgiHfnN5lK39/0EgZ9 Rxng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710854524; x=1711459324; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uHmAL+VTrYFRdG1FcBobe9u/j58wPncf3Wah26zHOAM=; b=MoP4F27grOMYASl2Hz5Ik1SHT2d7RGXyVr217ppV24divYPPboUOJOW/LJojKNS1/C 9uG4Tp4liApvmBfQg0GjameBi98NjwmRkQwa1PqQVYoLf95XWBzkU+i2ss8cresdD65P 1pOFFlU5/vjOJiUqAHH9+efbbiNtEgHjhNqADyee6cFfWDiimdPddCOZzOlCrWarQh63 pMzDC3pnTzrpEw5CEVteUq7XeV3SJ5FFSj+0vFk7GQZzoWrq7IqjofiiHCURElDkULbI MRK3fM+okhBalJb+Y8bRJu1iho3x7E+CtS5s/2Fz/0qr8gQrT94y6+lfxffFXSe7oCpm aXrQ== X-Forwarded-Encrypted: i=1; AJvYcCUawls3bdOD6G+4USXPCXuRv6QgvqCbR4uyHjaOHUTWbelkZjvSVTTM6ZpwDx48VERw9Vw2uAdcpmhr+8NDzliGjweyPaTK7jJLtF8vOQ== X-Gm-Message-State: AOJu0YwHcIpOcC0QUFBGEq/Ej5Xf7Jm/t58xlgozvGVyPNO/YuigEsjy cy//xlcLxMa9KHZZoUdx0bN/H/NIECXhvvnVZb5ZxEQE1Ja8oiGR5zkX2rkfmgY= X-Google-Smtp-Source: AGHT+IFJrrO9iCwa2B4OniI7eX4+Qc33bMbxiuNIkOLXZh953l6UtRT+SmZY8dLVbVdizonPb60jiA== X-Received: by 2002:a2e:91cd:0:b0:2d4:24cc:b499 with SMTP id u13-20020a2e91cd000000b002d424ccb499mr10582469ljg.15.1710854524426; Tue, 19 Mar 2024 06:22:04 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id j7-20020a2e3c07000000b002d435cdf2adsm1826148lja.111.2024.03.19.06.22.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Mar 2024 06:22:03 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 19 Mar 2024 15:22:01 +0200 Subject: [PATCH 3/9] drm/msm/dpu: split dpu_format_populate_layout Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240319-dpu-mode-config-width-v1-3-d0fe6bf81bf1@linaro.org> References: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> In-Reply-To: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: Abel Vesa , Johan Hovold , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6470; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=5iGDWVtriFGrB5YnokcGmSkKiWEPQN0KlqXQNhPq3c4=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBl+ZF3xkvqOmmR0Ns8RnYUEqsRoEOkXHwQGfaON conmC/oDB6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZfmRdwAKCRCLPIo+Aiko 1aLHCACa9PuogW7mEukz9ZO7SbSgH/aZdnepACxkdM0oVbID9277heaXpKI/niF9fjPE8BPRTG7 1iSdwYY8BMSbLorrPhKRA6nt9n0mB7FuBwajb0zt054baSSQMYo5CuPE+fLrNW1pbwiLWwBf6fd 9/ptp+SsgcLJL/6a/wD9xRxYkMJWXuEhdaL5gZJ8fQipf1a/qo8mVgD3e3jHcdNSpACBTBkIjY9 2RhJO9vE7Bnu5Mk3zqaeaCmVt6lEipUxDx1Dz50cseZSXbaXbrxVmulQ9DcKFXiwSGSZU/HN0el hgJeB6/Mz7Ox/Wgy095wKPg44Oam58QME4M3Bi37v1Xs1K0Q X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Split dpu_format_populate_layout() into addess-related and pitch/format-related parts. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 8 +++- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 44 +++++++++++----------- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 8 +++- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 ++++-- 4 files changed, 45 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c index 1924a2b28e53..0fd85c0479ec 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c @@ -584,7 +584,13 @@ static void dpu_encoder_phys_wb_prepare_wb_job(struct dpu_encoder_phys *phys_enc return; } - ret = dpu_format_populate_layout(aspace, job->fb, &wb_cfg->dest); + ret = dpu_format_populate_plane_sizes(job->fb, &wb_cfg->dest); + if (ret) { + DPU_DEBUG("failed to populate plane sizes%d\n", ret); + return; + } + + ret = dpu_format_populate_addrs(aspace, job->fb, &wb_cfg->dest); if (ret) { DPU_DEBUG("failed to populate layout %d\n", ret); return; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index ff0df478c958..1fc9817278df 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -629,7 +629,7 @@ static int _dpu_format_get_media_color_ubwc(const struct dpu_format *fmt) return color_fmt; } -static int _dpu_format_get_plane_sizes_ubwc( +static int _dpu_format_populate_plane_sizes_ubwc( const struct dpu_format *fmt, const uint32_t width, const uint32_t height, @@ -708,7 +708,7 @@ static int _dpu_format_get_plane_sizes_ubwc( return 0; } -static int _dpu_format_get_plane_sizes_linear( +static int _dpu_format_populate_plane_sizes_linear( const struct dpu_format *fmt, const uint32_t width, const uint32_t height, @@ -780,27 +780,37 @@ static int _dpu_format_get_plane_sizes_linear( return 0; } -static int dpu_format_get_plane_sizes( - const struct dpu_format *fmt, - const uint32_t w, - const uint32_t h, - struct dpu_hw_fmt_layout *layout, - const uint32_t *pitches) +/* + * dpu_format_populate_addrs - populate non-address part of the layout based on + * fb, and format found in the fb + * @fb: framebuffer pointer + * @layout: format layout structure to populate + * + * Return: error code on failure or 0 if new addresses were populated + */ +int dpu_format_populate_plane_sizes( + struct drm_framebuffer *fb, + struct dpu_hw_fmt_layout *layout) { - if (!layout || !fmt) { + struct dpu_format *fmt; + + if (!layout || !fb) { DRM_ERROR("invalid pointer\n"); return -EINVAL; } - if ((w > DPU_MAX_IMG_WIDTH) || (h > DPU_MAX_IMG_HEIGHT)) { + if ((fb->width > DPU_MAX_IMG_WIDTH) || (fb->height > DPU_MAX_IMG_HEIGHT)) { DRM_ERROR("image dimensions outside max range\n"); return -ERANGE; } + fmt = to_dpu_format(msm_framebuffer_format(fb)); + if (DPU_FORMAT_IS_UBWC(fmt) || DPU_FORMAT_IS_TILE(fmt)) - return _dpu_format_get_plane_sizes_ubwc(fmt, w, h, layout); + return _dpu_format_populate_plane_sizes_ubwc(fmt, fb->width, fb->height, layout); - return _dpu_format_get_plane_sizes_linear(fmt, w, h, layout, pitches); + return _dpu_format_populate_plane_sizes_linear(fmt, fb->width, fb->height, + layout, fb->pitches); } static int _dpu_format_populate_addrs_ubwc( @@ -924,7 +934,7 @@ static int _dpu_format_populate_addrs_linear( return 0; } -int dpu_format_populate_layout( +int dpu_format_populate_addrs( struct msm_gem_address_space *aspace, struct drm_framebuffer *fb, struct dpu_hw_fmt_layout *layout) @@ -942,14 +952,6 @@ int dpu_format_populate_layout( return -ERANGE; } - layout->format = to_dpu_format(msm_framebuffer_format(fb)); - - /* Populate the plane sizes etc via get_format */ - ret = dpu_format_get_plane_sizes(layout->format, fb->width, fb->height, - layout, fb->pitches); - if (ret) - return ret; - /* Populate the addresses given the fb */ if (DPU_FORMAT_IS_UBWC(layout->format) || DPU_FORMAT_IS_TILE(layout->format)) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h index 9442445f1a86..dc050e253db9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h @@ -56,7 +56,7 @@ const struct msm_format *dpu_get_msm_format( /** - * dpu_format_populate_layout - populate the given format layout based on + * dpu_format_populate_addrs - populate buffer addresses based on * mmu, fb, and format found in the fb * @aspace: address space pointer * @fb: framebuffer pointer @@ -65,9 +65,13 @@ const struct msm_format *dpu_get_msm_format( * Return: error code on failure, -EAGAIN if success but the addresses * are the same as before or 0 if new addresses were populated */ -int dpu_format_populate_layout( +int dpu_format_populate_addrs( struct msm_gem_address_space *aspace, struct drm_framebuffer *fb, struct dpu_hw_fmt_layout *fmtl); +int dpu_format_populate_plane_sizes( + struct drm_framebuffer *fb, + struct dpu_hw_fmt_layout *layout); + #endif /*_DPU_FORMATS_H */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 5b15d8068187..d9631fe90228 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -673,10 +673,16 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane, } } + ret = dpu_format_populate_plane_sizes(new_state->fb, &pstate->layout); + if (ret) { + DPU_ERROR_PLANE(pdpu, "failed to get format plane sizes, %d\n", ret); + return ret; + } + /* validate framebuffer layout before commit */ - ret = dpu_format_populate_layout(pstate->aspace, - new_state->fb, - &pstate->layout); + ret = dpu_format_populate_addrs(pstate->aspace, + new_state->fb, + &pstate->layout); if (ret) { DPU_ERROR_PLANE(pdpu, "failed to get format layout, %d\n", ret); return ret; From patchwork Tue Mar 19 13:22:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 781183 Received: from mail-lj1-f172.google.com (mail-lj1-f172.google.com [209.85.208.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EDA58002F for ; Tue, 19 Mar 2024 13:22:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854528; cv=none; b=r2Z1WdfxA4maGedrf66GMIV7NsI+L6FGuEbbJotkBwCbiozIzaL+fsoCHJGiYkrTCMmrloQiNrCLVki0wLotx+zMnudVC4BH2wa77enXoGnwnynSktribh4M4S+/URFykD5YNE7DjuSElu9BywLN4kRrVWaxP+36VxljbDLSHaE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854528; c=relaxed/simple; bh=Cm466EMiV3rqjsRkz5DkhNg6Qor98v8Q4JQTPUTq088=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=klViMF9FxpichBxLEknb7IfjZBeIJYqVSZzcPDHrtDXt6Z5wuQ0AzyjuvPNSuxR6LRjslMGHIB4Feu5/eEhJvqug5Mg6I6zDWoG8LXqadWbsWJlClBa6ffj/u5iaJid7S+2BNzIT5tKt87Afml5JcLzm0Wf2DQkyCBMs3wN0c7o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ucftndQ+; arc=none smtp.client-ip=209.85.208.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ucftndQ+" Received: by mail-lj1-f172.google.com with SMTP id 38308e7fff4ca-2d49ca33dcaso46272981fa.3 for ; Tue, 19 Mar 2024 06:22:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710854525; x=1711459325; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=dKI2zwb8IPiI5g9nKyo02YnrtBE6ItshoGtglMZgPxM=; b=ucftndQ+lVFqhYX5FEhjwtQhBLCKbxGuHbLSskQRflXsjhP42CdCpiZ3Ec503jcR3C 7Yk/KHp8+x5jz8LlgqKDphwxZpW6wi0lv/rsE5wmIjPvpVFq3gys4Qh/Dz6ilyGGYbkC g4oBhYJTaDhP3PNK1xwWV4AlBJ9Q41wwrB+4yqjjC+wSPoVTT9i4HQv7TSkbwWkf3IGu q+BDRpf46wqiY9SKVwuLIkMk7eo2KdWJTtVXyteLXth6yd8iD0ftAjv8qRMGzFsIIyLn ee+nrwrl0iZ2hscQY1UsBaaZoPgT+99TX//EAB+efBDr24tu0ygePVjwpeQ5d3wC4Byc X0Lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710854525; x=1711459325; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dKI2zwb8IPiI5g9nKyo02YnrtBE6ItshoGtglMZgPxM=; b=GEQrk7GOT/01XSZAGPcC9iVtu4srLcIV8fOPKyMVe8w9CN1UdPN6ZznuURV/rcyX3j G78fT1AX6/jD8/LQxs1aPVDM7jGsUFHKnejXZovpi2keL9AJ1erVEzuUgU+KkAe7yQ95 A0RMN4bCPOieDhoh5EGM7JQJewlaSYvnFtddN1cLG4cwz0TzpdnB+B5AfDANsSCTFNoJ CscQjIODp6k+hb2KBiORqUfRPU/n31CBw0/Cf/RVbf15BoNrLgo/SpDjJitzI+y+HFmY hhyc8esj+ePwCUZwkBXxnx8UMqS7P23+ox5stVYq7pH/HDYNA8urmLbPf3leCHP1247n aM1Q== X-Forwarded-Encrypted: i=1; AJvYcCUFC212dWlJjoiSdSTVh634Ko3g0Zl90wOlAIwcJfVKHXGZuENB31BsbOYCAwl0nGhYp4J1poKlWbuAwiz8fW/pblACRtUbchXjEevYGg== X-Gm-Message-State: AOJu0YwwRzKBR7UE/GJaq3DJ/m48fm5oiDlvRdAUMilTQygWi49+laPZ AFJMCKx1YRn5uIEQi2s85hHpG3GAeTTz9CG78+GmZRRnlEyvWRHKavrSChZIUko= X-Google-Smtp-Source: AGHT+IHq9v3W03NLwpVVlxf9F4CRm6prQJ8JHdzaZQb95xya9Fb+3Vd1JowzCYBfImR7epuE66nlZg== X-Received: by 2002:a2e:2c05:0:b0:2d2:dfd6:8335 with SMTP id s5-20020a2e2c05000000b002d2dfd68335mr1888479ljs.22.1710854525405; Tue, 19 Mar 2024 06:22:05 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id j7-20020a2e3c07000000b002d435cdf2adsm1826148lja.111.2024.03.19.06.22.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Mar 2024 06:22:04 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 19 Mar 2024 15:22:02 +0200 Subject: [PATCH 4/9] drm/msm/dpu: move dpu_format_populate_plane_sizes to atomic_check Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240319-dpu-mode-config-width-v1-4-d0fe6bf81bf1@linaro.org> References: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> In-Reply-To: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: Abel Vesa , Johan Hovold , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1422; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Cm466EMiV3rqjsRkz5DkhNg6Qor98v8Q4JQTPUTq088=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBl+ZF3yvndp0SUw1KM5VaAh726lqpCUr5AykSQ9 4tkZJ/ktKeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZfmRdwAKCRCLPIo+Aiko 1UOSB/wL/o++N0d5TuuI6v3xEd2k+q/Uo2k0LJS6hV3hZyG1Xpp26i8LYm+608rJXZQ2C9td1CH 5XmNsV/93X1TKbucnRd/ZzJXQNd1KEwZc4e/SX5yZC+RAWIVOzOjmTt3LaUQoB/5CkV1pvjTGgN FpqqCFn7Hifw9KlgaSuntVOFsrXUO2dZ0+oHAkBLWu8bPeKaLBKsg4UBOr7hHWW9REsZYMsQzVH Wk4+DEr68cWG3/FrlNZ+gtzgEF4XTUNxxi8xeyr45HrEvpBiOijdsxCxYmifxz3AUYCOkmFaqkb 2Lz0CV4tJurf/4IUHXbku/FMPJ0oiscRnONIOhEj8wiFqC8S X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Move a call to dpu_format_populate_plane_sizes() to the atomic_check step, so that any issues with the FB layout can be reported as early as possible. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index d9631fe90228..a9de1fbd0df3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -673,12 +673,6 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane, } } - ret = dpu_format_populate_plane_sizes(new_state->fb, &pstate->layout); - if (ret) { - DPU_ERROR_PLANE(pdpu, "failed to get format plane sizes, %d\n", ret); - return ret; - } - /* validate framebuffer layout before commit */ ret = dpu_format_populate_addrs(pstate->aspace, new_state->fb, @@ -864,6 +858,12 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, return -E2BIG; } + ret = dpu_format_populate_plane_sizes(new_plane_state->fb, &pstate->layout); + if (ret) { + DPU_ERROR_PLANE(pdpu, "failed to get format plane sizes, %d\n", ret); + return ret; + } + fmt = to_dpu_format(msm_framebuffer_format(new_plane_state->fb)); max_linewidth = pdpu->catalog->caps->max_linewidth; From patchwork Tue Mar 19 13:22:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 781182 Received: from mail-lj1-f169.google.com (mail-lj1-f169.google.com [209.85.208.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E9D28060C for ; Tue, 19 Mar 2024 13:22:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854530; cv=none; b=PIenaWlKCfl9a+O1zj9HLInpNR1Q2qR5x2SX0izBHBHLCswtwCB2/281DJEO9R/gsVeop33W4LRN/1ykbStxPNazHYA7IU+SjInPNM8NV4tGVWRnFNhIPTto7JsFdzT33RiITgwjITx/IVvuZkyXOH8i2bG6Z/rmuTuxY62mqZA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854530; c=relaxed/simple; bh=PZaux6GZliSItAtHMhFoC7Cv0J9bBbkhdS1XTU0uAuA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rM5I5JHl+2YYpWUAzoevp5gWE/dMvBl6vayr34GSND45ibxq7tz5OZ6ZYh3XAXlSawJPxXYd5vEDbd76oNP6csjyvvfNbGSVI49NXofzkKOhqgSS2ii4ltjXLodkYI/1zd+UYeBi2nJ8xD94qfzY7TGfxW8GhoOUS2gnWb9sp94= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=OJP9ZhTd; arc=none smtp.client-ip=209.85.208.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="OJP9ZhTd" Received: by mail-lj1-f169.google.com with SMTP id 38308e7fff4ca-2d21cdbc85bso80244011fa.2 for ; Tue, 19 Mar 2024 06:22:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710854527; x=1711459327; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=wkg7d4NEsh9ZC2iGh7MvW0HxBI7EYVmrRUBe6AkB3qo=; b=OJP9ZhTd7NgqETG1xErRujZKxwT2JmPrAPcXTQ5AoMEmVzDeHICJNmXhb5RjJrw8oV JKsS2dqY4UriGCMVpaimIIaTuZQVaEEE6nnJR54BbNeKUL082KNQfNJVAylIClH4aB8D pajWLLpKWilY1KX25XItyehS0+J4DW3B8q+Y/fnxypBHY5qSu6aWsPcLEaU6oDyE0fyq Aaqynnwu0lyMztmSzpN6VhiMTONdj54KHfN62ekpaTdcTq50WnHjK/UGCL+q/Hzzc/I/ om/iXD0gTml+eK6oJr6hx4rjSlqq5WnodSWwpyLH9ZA2l0CzoMxt7Z9j+FnPOekpBWUU asAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710854527; x=1711459327; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wkg7d4NEsh9ZC2iGh7MvW0HxBI7EYVmrRUBe6AkB3qo=; b=A6g4AMV/4XeG5rAA3TZ/jYDTkmhF+DScVMlYDBSA9fhtarDd/snSjg2RCzOInbAwhQ xm40S149rzKjaS7sx96+toYqVs9+oBMx01KKsymtNHGKZr8Z4ApcPgqbUM/mNRIZlCL5 jb5wLMxelJo1km2nebqgQ/pRUFY1127V2YekgH9a88kzCDrzxxVfhqOCEG04hLrtVqJg 9b4xIvfzgBF3k9H7JPJz/oMIZKXGZ9pNERz8xNfVcU3uKCUiX5QwurGgaluyX7/DSTN2 h26ZzNnYlsL5ox4CRiuF3JRFHjCgaNdZi2/dUcYmGxSbGyBN2bs6Mey2g01yTO9T8ViE Yp4g== X-Forwarded-Encrypted: i=1; AJvYcCXFDrK53WRHSD51pTr2sgrFqD0HVMmR6acnl73hzTQQOiAXsn0KMwHAAXQiDnBzudd1Bwoitpw5Q6kq+bUjzN7HckMsk7FC6Vi8DanjjA== X-Gm-Message-State: AOJu0YxFoGTEY20WaAl0OsdMllB8CbzXSRmsjFjH25wo6vNYVWnd9P5U sJSTnHylI+kbuSjIfnaZAPVdq1VCT1tNEezgF57haomt1ukbuCdbXXTExTo3iJU= X-Google-Smtp-Source: AGHT+IEJOSkP21SWHRkBvJ/gKsHTLI5anClFTAmbFaNnG1iFr5mCTdKzmhe08eHXXq4zyTwWZ0jxkw== X-Received: by 2002:a2e:2c16:0:b0:2d2:c83c:ffd7 with SMTP id s22-20020a2e2c16000000b002d2c83cffd7mr7540374ljs.42.1710854527250; Tue, 19 Mar 2024 06:22:07 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id j7-20020a2e3c07000000b002d435cdf2adsm1826148lja.111.2024.03.19.06.22.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Mar 2024 06:22:06 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 19 Mar 2024 15:22:04 +0200 Subject: [PATCH 6/9] drm/msm/dpu: drop call to _dpu_crtc_setup_lm_bounds from atomic_begin Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240319-dpu-mode-config-width-v1-6-d0fe6bf81bf1@linaro.org> References: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> In-Reply-To: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: Abel Vesa , Johan Hovold , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=893; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=PZaux6GZliSItAtHMhFoC7Cv0J9bBbkhdS1XTU0uAuA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBl+ZF402eopG0n4dj6mj2TTriwPmVKnm7MzvpNe nYDXVJUWRqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZfmReAAKCRCLPIo+Aiko 1ToOB/47+iGOOAdfofKqOyaIgByjkF+X12vvIEhw8fXNxKwKiC1DATubjzcO1vVMqhlvU73a628 D2mI0z46D3oOBvpK32SEd9U9piZ/C+/WZ3dwarCmbryFKCi9+qWkIl6gRpx8R0qJsh7GZgTaKOG OAqr0z6gDgA14ot0s2Kp2oosgrpzDswzxLwGbbOGMux9slgPkVc+qzHaUTHb5cq+BBbuSEizmpU svixizDtZAx4n3YgIP2354yq9CN1vr+y00OyylH5yYtme1KJkLgD+msS3rP2729d0rXWNKPkpk4 sm9qx+Q3yfzUA2l0+V7FbNiXmXvnqOlidDshrEG0bSZD+Yrv X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The dpu_crtc_atomic_check() already calls _dpu_crtc_setup_lm_bounds(). There is no need to call it from dpu_crtc_atomic_begin(). Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 88c2e51ab166..64befead366f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -803,8 +803,6 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc, DRM_DEBUG_ATOMIC("crtc%d\n", crtc->base.id); - _dpu_crtc_setup_lm_bounds(crtc, crtc->state); - /* encoder will trigger pending mask now */ drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) dpu_encoder_trigger_kickoff_pending(encoder); From patchwork Tue Mar 19 13:22:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 781181 Received: from mail-lj1-f179.google.com (mail-lj1-f179.google.com [209.85.208.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0207C8062F for ; Tue, 19 Mar 2024 13:22:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854532; cv=none; b=VjHgzl3KmmD3r0lYVGEkaHQSSiWJzuIJr31g0xF0V7NO32zzXsO3bFDtboIpPVtjIyQP9a9f4V0ko1PowLL9YPFqUvtEZFhL4yqXQ4sKT8W0L3MCIsxmCKdhpopyn/kZXzpLbSv9ej2zddcRZc68vdNxaYun5UCZemaPNCKhhDM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710854532; c=relaxed/simple; bh=oxONTvBo3a22TAARxRZKWb7mB82JhjnItvZbZYS2bz4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XDS3iR/5ZBmD3O/+VBzldbmP1Uk3BfivKGMz/Cc9nvsqKv+R+d8y87SctTqDvEl4/d7lBl3wy+TmKDGIuKu86gYCk6duT1DVbPHi4o4/s1CoEh2+EnUhHcydUb2GybGg4DmCG4yOhCy6anhq5qr2rBJJqCoDR81dABTio7GNUo4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=NCumf5sy; arc=none smtp.client-ip=209.85.208.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="NCumf5sy" Received: by mail-lj1-f179.google.com with SMTP id 38308e7fff4ca-2d475b6609eso71155621fa.2 for ; Tue, 19 Mar 2024 06:22:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710854529; x=1711459329; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=lfmAQzn+LLNOd1P1Ei+JN2z86jgOlHY8peuyPP1BcaI=; b=NCumf5syCtsMrEb//zrEZCJrbUdKKQ3vQn95/iu24Swax0I+/DuzOVLQP2PokgYSLg hHGAfPSpY6P2EtVp+WsqGbyuE37/0GY24o1d3WuMASlYSXNsDV41uH+RJTpABGYS3u4G knIYW35Nq06DTaJnuBq0g6VyDMcOmAIf3lj+ZkkQcL51+DmY5fmaivRw8MzO//Q7873y 1xUDvlOzuTV5YMOrO0EArNRtoGcVJq4BBiJwNAkv5RVz4+4c08KE+ff7aAbat9EZ5Hma CK+hqylDHACuh/4u+JqmiiaHeueWehom9+ajCwVbfRRpjQGA8045ayqemuOgFE56R6tT BYTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710854529; x=1711459329; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lfmAQzn+LLNOd1P1Ei+JN2z86jgOlHY8peuyPP1BcaI=; b=ZH7xsmfDQUHEFATZ69iZo/562n2FkJHok+pyZYsmVnt7XPsoK0FQ1GTyyx/+8J5Bws 78BrBLJwbzUJ4/kQ+pKJGNPCIZDq1gIB4QO7cKDT5Aqa+ioVKGYNZ6tfVA8CGHtWBi3x ztXRG/RegrLaSS24eFsAGBwho1u3c68FoX1+iUkZe7LrOs7a4/QrSIDspSghfz9ox2KS ewF+27ib2RyfzCL+bix/b030mKUebb2u6nnKPinTtmsIvD/FwPtXNcyMlq7af6IzGCiD 44j4t8I2iZtjBbUPlb8I/l3hVCaq+UFmZCAXP7mwhTbExzQ7FigbQM3LKY6RmuvWQOQJ U40A== X-Forwarded-Encrypted: i=1; AJvYcCUp+tYGPB6wd9b/bhpEUlkhQGCS0mdTJzjX6musvZJW2zh8IcrHDYFTwndf37idP7ig7l3ShQZcxSEirPbnb3KKrV0Lv+f0jmYF/8Z2tw== X-Gm-Message-State: AOJu0YwMUbbMVaX3jqbekdrfjpkyw2uJDSI9/653T8dzsCCNB3cZP8Yt tg3DvX2fGM9w7Ym3/YoHohu9Tmsl43dEp38AexKMBuONYSIPcUUbAV3If9AAFIY= X-Google-Smtp-Source: AGHT+IFX1aAEpEwXPmaUZwe+U7THcR+jVQycmmL88o52TfP9WgSU/bZekNQH7YzEgPY3sCwDXKJzEA== X-Received: by 2002:a05:651c:210d:b0:2d4:64fc:65bb with SMTP id a13-20020a05651c210d00b002d464fc65bbmr2650875ljq.48.1710854529349; Tue, 19 Mar 2024 06:22:09 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id j7-20020a2e3c07000000b002d435cdf2adsm1826148lja.111.2024.03.19.06.22.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Mar 2024 06:22:08 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 19 Mar 2024 15:22:06 +0200 Subject: [PATCH 8/9] drm/msm/dpu: merge MAX_IMG_WIDTH/HEIGHT with DPU_MAX_IMG_WIDTH/HEIGHT Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240319-dpu-mode-config-width-v1-8-d0fe6bf81bf1@linaro.org> References: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> In-Reply-To: <20240319-dpu-mode-config-width-v1-0-d0fe6bf81bf1@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: Abel Vesa , Johan Hovold , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2190; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=oxONTvBo3a22TAARxRZKWb7mB82JhjnItvZbZYS2bz4=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBl+ZF41mZIEwZobtj48H7DderSIIO41YVgYGsl3 bR1W7sCgM+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZfmReAAKCRCLPIo+Aiko 1YKBB/sGizXX5biEBU53PDUittIDTEl5a4CFAeO84c9uZOzfj0tWA7dgnHYFFKR/fTDEOfhaYkL lxK7IYixXSl2qucsnL8THVdMnnn9QdvPzxCn7wkxKPQgdI/6HCOTRq3oAvIzEwiE859kXC3aJ8V Ix3usb0d8ZNTxgWTyZgOqEZEVttfGMdesazgydy3N8HmEYVyZhiV29dSfCjA0qa7z8Ln9LpVJbn 15eVr3hBAHRyU54IASZ8soCq+oAdpbmUbXs5UO720z803zL3mqAvHlKMS+++Y/Ma//W2D85VL1x rJ7V7fddxB5MdknGa/+x6+4zmxpS0mp5I21pyd4DR2Hg6MLO X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A dpu_formats.c defines DPU_MAX_IMG_WIDTH and _HEIGHT, while dpu_hw_catalog.h defines just MAX_IMG_WIDTH and _HEIGHT. Merge these constants to remove duplication. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 3 --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 4 ++-- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index 1fc9817278df..1ee78ba640b5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -20,9 +20,6 @@ #define DPU_TILE_HEIGHT_UBWC 4 #define DPU_TILE_HEIGHT_NV12 8 -#define DPU_MAX_IMG_WIDTH 0x3FFF -#define DPU_MAX_IMG_HEIGHT 0x3FFF - /* * DPU supported format packing, bpp, and other format * information. diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index d1aef778340b..af2ead1c4886 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -21,8 +21,8 @@ #define DPU_HW_BLK_NAME_LEN 16 -#define MAX_IMG_WIDTH 0x3fff -#define MAX_IMG_HEIGHT 0x3fff +#define DPU_MAX_IMG_WIDTH 0x3fff +#define DPU_MAX_IMG_HEIGHT 0x3fff #define CRTC_DUAL_MIXERS 2 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 9e57c51f5343..47165d2bd4ea 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -851,8 +851,8 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, fb_rect.y2 = new_plane_state->fb->height; /* Ensure fb size is supported */ - if (drm_rect_width(&fb_rect) > MAX_IMG_WIDTH || - drm_rect_height(&fb_rect) > MAX_IMG_HEIGHT) { + if (drm_rect_width(&fb_rect) > DPU_MAX_IMG_WIDTH || + drm_rect_height(&fb_rect) > DPU_MAX_IMG_HEIGHT) { DPU_DEBUG_PLANE(pdpu, "invalid framebuffer " DRM_RECT_FMT "\n", DRM_RECT_ARG(&fb_rect)); return -E2BIG;