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Shenoy" Signed-off-by: Gautham R. Shenoy --- include/linux/amd-pstate.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index d21838835abd..212f377d615b 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -49,6 +49,10 @@ struct amd_aperf_mperf { * @lowest_perf: the absolute lowest performance level of the processor * @prefcore_ranking: the preferred core ranking, the higher value indicates a higher * priority. + * @min_limit_perf: Cached value of the perf corresponding to policy->min + * @max_limit_perf: Cached value of the perf corresponding to policy->max + * @min_limit_freq: Cached value of policy->min + * @max_limit_freq: Cached value of policy->max * @max_freq: the frequency that mapped to highest_perf * @min_freq: the frequency that mapped to lowest_perf * @nominal_freq: the frequency that mapped to nominal_perf From patchwork Mon Mar 18 09:48:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 781018 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2084.outbound.protection.outlook.com [40.107.237.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5157328DB; 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Mon, 18 Mar 2024 04:48:57 -0500 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH v8 3/8] cpufreq: amd-pstate: Unify computation of {max,min,nominal,lowest_nonlinear}_freq Date: Mon, 18 Mar 2024 17:48:22 +0800 Message-ID: <9a8da1cf830867d29dfeeb0d0625858c33496f60.1710754409.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001509:EE_|SA0PR12MB4368:EE_ X-MS-Office365-Filtering-Correlation-Id: b4f504b8-6bac-4622-5752-08dc4730a37a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: BbBO89SssrE7vz2+K2iF0ZTLg042tE/0Z/UpXZ9DB34R/WKJA9VxQUlgm07kgsS36blQI/RXgexrQ0ZUL2APTbN1qVp4X5OC1kZ1Pf6e46viGOnjUa+SdtZJ0GR5WLCVtFpw5UsE/TBg19mQqT1SBHKHcv6owocHflJePnSefXdxZVU1nsVk7f/ppzd3HwMeWC4dx0c6C3Qrip7MSle8EI9na9V8A22nGVjlf6scPmuloItvuOmt/xJRuHXZU0Q2+elzom2zJ9RoIZFwr+7H00Dpj1ElhxxnfpAAXK6hDQjS+Af264bQvZmNURE5+ifXD4bs7Fjwt46h2dyTX6O+QR9ush6VkOXst9RLwbVR0QarxNbYoXiwslLm5DZI25Iga/Lt0H3zo7W4+kFrDts9axs79ZLW2k8BSa8nHi9i1XFLPgAH2yb1BZ3M9BLW9VcVfdTL5HjeDCYJe0i58Ha46KJpEyi7G+IFGeRREkh+1Qr8iVFck7yz0Os7027BGzHiwwzW1OWMghuy2so1RPSRkBN7HbsVyLhWqZaFiwIlMPvSkRm9shwOwMcne//PTdt/Ut3b6/hNkZgBXIM6vcYzS5gdaKc+YfFCVGrcNgJK4KzwAwmdVrwl+meIRqfPNJZIyvInLDNigwCdZqIJZXFpluZsM9SjPsu4d5oKhgzcL6BBsGScxn0Q5FLSwM5YQQYfHc9M0KugoDHbd32mY7XkPeKMXWe3r2qyv/kRXk4aw/wvR+E7sOs7AlI+qTd29gJ2 X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(82310400014)(36860700004)(1800799015)(376005); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 09:49:00.5849 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b4f504b8-6bac-4622-5752-08dc4730a37a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001509.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4368 Currently the amd_get_{min, max, nominal, lowest_nonlinear}_freq() helpers computes the values of min_freq, max_freq, nominal_freq and lowest_nominal_freq respectively afresh from cppc_get_perf_caps(). This is not necessary as there are fields in cpudata to cache these values. To simplify this, add a single helper function named amd_pstate_init_freq() which computes all these frequencies at once, and caches it in cpudata. Use the cached values everywhere else in the code. Co-developed-by: Gautham R. Shenoy Signed-off-by: Gautham R. Shenoy Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 126 ++++++++++++++++------------------- 1 file changed, 59 insertions(+), 67 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 2015c9fcc3c9..ba1baa6733e6 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -606,74 +606,22 @@ static void amd_pstate_adjust_perf(unsigned int cpu, static int amd_get_min_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - /* Switch to khz */ - return cppc_perf.lowest_freq * 1000; + return READ_ONCE(cpudata->min_freq); } static int amd_get_max_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - u32 max_perf, max_freq, nominal_freq, nominal_perf; - u64 boost_ratio; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - nominal_freq = cppc_perf.nominal_freq; - nominal_perf = READ_ONCE(cpudata->nominal_perf); - max_perf = READ_ONCE(cpudata->highest_perf); - - boost_ratio = div_u64(max_perf << SCHED_CAPACITY_SHIFT, - nominal_perf); - - max_freq = nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT; - - /* Switch to khz */ - return max_freq * 1000; + return READ_ONCE(cpudata->max_freq); } static int amd_get_nominal_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - /* Switch to khz */ - return cppc_perf.nominal_freq * 1000; + return READ_ONCE(cpudata->nominal_freq); } static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - u32 lowest_nonlinear_freq, lowest_nonlinear_perf, - nominal_freq, nominal_perf; - u64 lowest_nonlinear_ratio; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - nominal_freq = cppc_perf.nominal_freq; - nominal_perf = READ_ONCE(cpudata->nominal_perf); - - lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf; - - lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf << SCHED_CAPACITY_SHIFT, - nominal_perf); - - lowest_nonlinear_freq = nominal_freq * lowest_nonlinear_ratio >> SCHED_CAPACITY_SHIFT; - - /* Switch to khz */ - return lowest_nonlinear_freq * 1000; + return READ_ONCE(cpudata->lowest_nonlinear_freq); } static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state) @@ -828,6 +776,53 @@ static void amd_pstate_update_limits(unsigned int cpu) mutex_unlock(&amd_pstate_driver_lock); } +/** + * amd_pstate_init_freq: Initialize the max_freq, min_freq, + * nominal_freq and lowest_nonlinear_freq for + * the @cpudata object. + * + * Requires: highest_perf, lowest_perf, nominal_perf and + * lowest_nonlinear_perf members of @cpudata to be + * initialized. + * + * Returns 0 on success, non-zero value on failure. + */ +static int amd_pstate_init_freq(struct amd_cpudata *cpudata) +{ + int ret; + u32 min_freq; + u32 highest_perf, max_freq; + u32 nominal_perf, nominal_freq; + u32 lowest_nonlinear_perf, lowest_nonlinear_freq; + u32 boost_ratio, lowest_nonlinear_ratio; + struct cppc_perf_caps cppc_perf; + + + ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); + if (ret) + return ret; + + min_freq = cppc_perf.lowest_freq * 1000; + nominal_freq = cppc_perf.nominal_freq * 1000; + nominal_perf = READ_ONCE(cpudata->nominal_perf); + + highest_perf = READ_ONCE(cpudata->highest_perf); + boost_ratio = div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf); + max_freq = nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT; + + lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf); + lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf << SCHED_CAPACITY_SHIFT, + nominal_perf); + lowest_nonlinear_freq = nominal_freq * lowest_nonlinear_ratio >> SCHED_CAPACITY_SHIFT; + + WRITE_ONCE(cpudata->min_freq, min_freq); + WRITE_ONCE(cpudata->lowest_nonlinear_freq, lowest_nonlinear_freq); + WRITE_ONCE(cpudata->nominal_freq, nominal_freq); + WRITE_ONCE(cpudata->max_freq, max_freq); + + return 0; +} + static int amd_pstate_cpu_init(struct cpufreq_policy *policy) { int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; @@ -855,6 +850,10 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) if (ret) goto free_cpudata1; + ret = amd_pstate_init_freq(cpudata); + if (ret) + goto free_cpudata1; + min_freq = amd_get_min_freq(cpudata); max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); @@ -896,13 +895,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) goto free_cpudata2; } - /* Initial processor data capability frequencies */ - cpudata->max_freq = max_freq; - cpudata->min_freq = min_freq; cpudata->max_limit_freq = max_freq; cpudata->min_limit_freq = min_freq; - cpudata->nominal_freq = nominal_freq; - cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; policy->driver_data = cpudata; @@ -1317,6 +1311,10 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) if (ret) goto free_cpudata1; + ret = amd_pstate_init_freq(cpudata); + if (ret) + goto free_cpudata1; + min_freq = amd_get_min_freq(cpudata); max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); @@ -1333,12 +1331,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) /* It will be updated by governor */ policy->cur = policy->cpuinfo.min_freq; - /* Initial processor data capability frequencies */ - cpudata->max_freq = max_freq; - cpudata->min_freq = min_freq; - cpudata->nominal_freq = nominal_freq; - cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; - policy->driver_data = cpudata; cpudata->epp_cached = amd_pstate_get_epp(cpudata, 0); From patchwork Mon Mar 18 09:48:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 781017 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2053.outbound.protection.outlook.com [40.107.93.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14C7D381A1; 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Mon, 18 Mar 2024 04:49:03 -0500 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH v8 5/8] cpufreq: amd-pstate: Bail out if min/max/nominal_freq is 0 Date: Mon, 18 Mar 2024 17:48:24 +0800 Message-ID: <75c1584f93abc52ba4adc7894ccc7f8f9ca721c2.1710754409.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001509:EE_|LV8PR12MB9334:EE_ X-MS-Office365-Filtering-Correlation-Id: 92a86aa9-6091-4de5-929e-08dc4730a8e3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: SvEHQstOOxYysuNpfpLrBZ+Ox1+eWGcBrO56ebooHfFbaFsXGgwTgVgH8qELxMdK8leRCGFW+DS/a9s78kT/8l4gNPWWu/u6YR46S9Y1cUup1SBV6bFjCnRH09a8qm1thobrMOlw1NsRanGwxNs3aixxyk0L6xmyQ47ZbdCdOszdJeZOPsLwU63wIq3+s4OvV5lGmE6lSmZq41W8wFyxccOqqp3FCj6KqU75R4bUq5LoBEjv9pEHokyf97DXgBiYIG7mZzEn8QKYckgJiM1F/kxlL/GxrVqxO9fnzL/P1UQ1qbdjBt/Mu4fnRkSZ6tfRu96QTu7Whl0d25EjLf/RB0Zc0SlfUw+eqFp3tVoQ3Ps3f4RqhHM181GC0TymtlDMOHWBkK9YZEQcR1Af48NqWLlIJn/FDab5h+piFnqtkUOpqsR5KpSxSISBw7LbCXtni50ZJQHYBvg8s3taL3KSb2AMYDa11BVXK7D5ZC6gDQBvZD2WfgIr6eRNT0hsGQd9B9eZAaCVq2J8EcHbmZEllLH+K56ImHK3lWlNmstGj9Wgcg6vCaGqFgnmeOHcNK5PT/wFuPvuoSI81khdxA9vlDIFRiSWRDer+eJ4rnqMBf5y4rjGuwci3o6gkHLr2e+oCWv3Yt7Svm+KGep3jTz+yJMdDZrmm5Vzhixnxgm+EUT+QqEQWRBM9BKuUWUOuHZUsGz+eL08VCNjfpdPCMaNRxi3Swd8ecz/GrRA1CK4si8rvCgixOpvA/u+Md/Ql9tl X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(36860700004)(1800799015)(82310400014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 09:49:09.6631 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 92a86aa9-6091-4de5-929e-08dc4730a8e3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001509.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9334 The amd-pstate driver cannot work when the min_freq, nominal_freq or the max_freq is zero. When this happens it is prudent to error out early on rather than waiting failing at the time of the governor initialization. Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 132330b4942f..6708c436e1a2 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -839,9 +839,11 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) nominal_freq = READ_ONCE(cpudata->nominal_freq); lowest_nonlinear_freq = READ_ONCE(cpudata->lowest_nonlinear_freq); - if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { - dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", - min_freq, max_freq); + if (min_freq <= 0 || max_freq <= 0 || + nominal_freq <= 0 || min_freq > max_freq) { + dev_err(dev, + "min_freq(%d) or max_freq(%d) or nominal_freq (%d) value is incorrect\n", + min_freq, max_freq, nominal_freq); ret = -EINVAL; goto free_cpudata1; } @@ -1299,9 +1301,11 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) max_freq = READ_ONCE(cpudata->max_freq); nominal_freq = READ_ONCE(cpudata->nominal_freq); lowest_nonlinear_freq = READ_ONCE(cpudata->lowest_nonlinear_freq); - if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { - dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", - min_freq, max_freq); + if (min_freq <= 0 || max_freq <= 0 || + nominal_freq <= 0 || min_freq > max_freq) { + dev_err(dev, + "min_freq(%d) or max_freq(%d) or nominal_freq(%d) value is incorrect\n", + min_freq, max_freq, nominal_freq); ret = -EINVAL; goto free_cpudata1; } From patchwork Mon Mar 18 09:48:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 781016 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2083.outbound.protection.outlook.com [40.107.92.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5ACD2D605; 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Mon, 18 Mar 2024 04:49:06 -0500 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH v8 6/8] cpufreq: amd-pstate: get transition delay and latency value from ACPI tables Date: Mon, 18 Mar 2024 17:48:25 +0800 Message-ID: <097b6711995aa16fc55f2688bc5d01fb8e728ce7.1710754409.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001509:EE_|SJ0PR12MB6990:EE_ X-MS-Office365-Filtering-Correlation-Id: bbeeb424-b0cf-4828-e50e-08dc4730aa59 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PrH0oSLvl0ytpQdDmZzGaHgjxOKwMPW95vtkB62QIPGK++J/PzKIHcEnmRdfwVKkmd8IMjIZNcr2GxNZBQuYKYsrNCeynHvZLrf7/UimqFfRXTQ9dx4Ayq7vhm+s65kFsUnCyiSSughuihtyxP0AKLgj7SaC/4kQevNw4FCJj92qXo5dqOdOelLtv9CSsrDqN+5tHTHRyCzdL07AqMG2Wsx6NVRykR8WTjOvq7KZ86uoXYfeb6CygHNlA9t0+hqXH127vwlDTGiaKKSDKXZE7aYe5vaq1nk4I6zVat4cbRIgUrhuSQwaADMJn5byKRIRzCKcoEPPh/wj5EgZToECcA4OV4w11xysu04Ot5M84bBOCCeQY6sqx/hvD0XPz74lv4i7h28gWKjZJRm9XpMCazdlV6CrBLR4Yy++/wAABV4rnP/CMfhJjEOB5uxbUkfLABI02nk8f0vo8a7hGsGP2BtfA0z4q/HGFTFhortsCWdWpVKO9XvTBdKQIUBDJSMl6MPNCnnbpYQ8ff3IGvxuMjCfT46PbA0nhjFsTsk7oXS5Q9w9qF+JWJ9aWy3d4HuTgxwjgSFTwmUdLQ04vnkPu6syIGWhLTTww1Wjw9WCH7co7LO0PtPn/GW8AxMmnmv9ehi7TPLIEYcD2ruJ5D20K50moI+FjVeLydbAZEnSr+vXHLva6lFloDkL4c7kaO2YeWQBRA1/zV6+JlYhxCAChSyyLfOzUVHATuQbRcRg65fvLyVjXe6+wZEerw4SI44E X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(82310400014)(36860700004)(376005)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 09:49:12.1163 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbeeb424-b0cf-4828-e50e-08dc4730aa59 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001509.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6990 Make pstate driver initially retrieve the P-state transition delay and latency values from the BIOS ACPI tables which has more reasonable delay and latency values according to the platform design and requirements. Previously there values were hardcoded at specific value which may have conflicted with platform and it might not reflect the most accurate or optimized setting for the processor. [054h 0084 8] Preserve Mask : FFFFFFFF00000000 [05Ch 0092 8] Write Mask : 0000000000000001 [064h 0100 4] Command Latency : 00000FA0 [068h 0104 4] Maximum Access Rate : 0000EA60 [06Ch 0108 2] Minimum Turnaround Time : 0000 Reviewed-by: Mario Limonciello Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 6708c436e1a2..ec049b62b366 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -756,6 +756,36 @@ static void amd_pstate_update_limits(unsigned int cpu) mutex_unlock(&amd_pstate_driver_lock); } +/** + * Get pstate transition delay time from ACPI tables that firmware set + * instead of using hardcode value directly. + */ +static u32 amd_pstate_get_transition_delay_us(unsigned int cpu) +{ + u32 transition_delay_ns; + + transition_delay_ns = cppc_get_transition_latency(cpu); + if (transition_delay_ns == CPUFREQ_ETERNAL) + return AMD_PSTATE_TRANSITION_DELAY; + + return transition_delay_ns / NSEC_PER_USEC; +} + +/** + * Get pstate transition latency value from ACPI tables that firmware + * set instead of using hardcode value directly. + */ +static u32 amd_pstate_get_transition_latency(unsigned int cpu) +{ + u32 transition_latency; + + transition_latency = cppc_get_transition_latency(cpu); + if (transition_latency == CPUFREQ_ETERNAL) + return AMD_PSTATE_TRANSITION_LATENCY; + + return transition_latency; +} + /** * amd_pstate_init_freq: Initialize the max_freq, min_freq, * nominal_freq and lowest_nonlinear_freq for @@ -848,8 +878,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) goto free_cpudata1; } - policy->cpuinfo.transition_latency = AMD_PSTATE_TRANSITION_LATENCY; - policy->transition_delay_us = AMD_PSTATE_TRANSITION_DELAY; + policy->cpuinfo.transition_latency = amd_pstate_get_transition_latency(policy->cpu); + policy->transition_delay_us = amd_pstate_get_transition_delay_us(policy->cpu); policy->min = min_freq; policy->max = max_freq;