From patchwork Mon Sep 30 14:33:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 174760 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp7216569ill; Mon, 30 Sep 2019 07:37:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqyZnGuBcrY6iMPxMy+yBkD0wRbFKHNLCUjpSsRnYciMKUBYhz71gOjipuDZunSQiSXKba6i X-Received: by 2002:a50:a939:: with SMTP id l54mr20163080edc.214.1569854238094; Mon, 30 Sep 2019 07:37:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569854238; cv=none; d=google.com; s=arc-20160816; b=wtvzp3BbGGOGKYNav8cEdec32m1gZVtSrMLYStz4ZAmWNZz3Pd+fuX/6gDRB0nH4qi /6f6pUDo4+yJ4hqUNfHMmG82qSvyExPhOLMDpMIdtHl9PN7mhbnrwRf4j+a4uVzZd0FL JVapALFNUjVXKmqrK+wbOsSuVJlnatAgWferHLAYQKagSgmPW9Bqi6QYuWFbq4X2eoSl 0D/RBmFQz8+xcdpL0FIhQXvc943oCK9llyly8kpTnBVIb5yxnMy/j+IGpwllRnd9sCc5 PfgPc288ptiFhQK7HBhuTQmEAKFI9VMiQ1UUGOaicOHhKlNeeyNOntNk7/AzBZPYTAaH ERuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=DqOthaNwGsxZvvm5afnxhod1pGggSLORYZdIo5Zk4ZI=; b=RRKjQIQG19MrNXv8f4q/pLJSPAlf/O2LWn5H2TABgWk1kYqaOct0r1C2fIK5B5tCM1 HtukkeuFxxkrC3P8AObUt3XxWK9nSFBwAFOKP7D1kWNo+X66SMYOOQaVxIaWSGVDZ8id jz/rmKJkohim5vcg3IchLOeyzDQvy9agEh8vCGecX4//uZbmOmyS57ZJIE/XQW9nU2Im Jn9KOaZ19GqetBMie2T4fgCp73rw3O6FT1QJhFXycQIkCc5nj0blOA59/A0kj3GCC7lE K5SbWp8wtRAy9woRQ3uQGV92S6XjPEtmRukzFq9KG0SktaI1URDEum1i6VMMBSMvO5Yz a7Xw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r5si6689636edo.14.2019.09.30.07.37.17; Mon, 30 Sep 2019 07:37:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731841AbfI3OhO (ORCPT + 27 others); Mon, 30 Sep 2019 10:37:14 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:3192 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731702AbfI3OhC (ORCPT ); Mon, 30 Sep 2019 10:37:02 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 2A2F4719A77CE6655499; Mon, 30 Sep 2019 22:36:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 30 Sep 2019 22:36:48 +0800 From: John Garry To: , , , , , CC: , , , , , , , , John Garry Subject: [RFC PATCH 1/6] ACPI/IORT: Set PMCG device parent Date: Mon, 30 Sep 2019 22:33:46 +0800 Message-ID: <1569854031-237636-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1569854031-237636-1-git-send-email-john.garry@huawei.com> References: <1569854031-237636-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the IORT, a PMCG node includes a node reference to its associated device. Set the PMCG platform device parent device for future referencing. For now, we only consider setting for when the associated component is an SMMUv3. Signed-off-by: John Garry --- drivers/acpi/arm64/iort.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 8569b79e8b58..0b687520c3e7 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -1455,7 +1455,7 @@ static __init const struct iort_dev_config *iort_get_dev_cfg( * Returns: 0 on success, <0 failure */ static int __init iort_add_platform_device(struct acpi_iort_node *node, - const struct iort_dev_config *ops) + const struct iort_dev_config *ops, struct device *parent) { struct fwnode_handle *fwnode; struct platform_device *pdev; @@ -1466,6 +1466,8 @@ static int __init iort_add_platform_device(struct acpi_iort_node *node, if (!pdev) return -ENOMEM; + pdev->dev.parent = parent; + if (ops->dev_set_proximity) { ret = ops->dev_set_proximity(&pdev->dev, node); if (ret) @@ -1573,6 +1575,11 @@ static void __init iort_enable_acs(struct acpi_iort_node *iort_node) static inline void iort_enable_acs(struct acpi_iort_node *iort_node) { } #endif +static int iort_fwnode_match(struct device *dev, const void *fwnode) +{ + return dev->fwnode == fwnode; +} + static void __init iort_init_platform_devices(void) { struct acpi_iort_node *iort_node, *iort_end; @@ -1594,11 +1601,34 @@ static void __init iort_init_platform_devices(void) iort_table->length); for (i = 0; i < iort->node_count; i++) { + struct device *parent = NULL; + if (iort_node >= iort_end) { pr_err("iort node pointer overflows, bad table\n"); return; } + /* Fixme: handle parent declared in IORT after PMCG */ + if (iort_node->type == ACPI_IORT_NODE_PMCG) { + struct acpi_iort_node *iort_assoc_node; + struct acpi_iort_pmcg *pmcg; + u32 node_reference; + + pmcg = (struct acpi_iort_pmcg *)iort_node->node_data; + + node_reference = pmcg->node_reference; + iort_assoc_node = ACPI_ADD_PTR(struct acpi_iort_node, iort, + node_reference); + + if (iort_assoc_node->type == ACPI_IORT_NODE_SMMU_V3) { + struct fwnode_handle *assoc_fwnode; + + assoc_fwnode = iort_get_fwnode(iort_assoc_node); + + parent = bus_find_device(&platform_bus_type, NULL, + assoc_fwnode, iort_fwnode_match); + } + } iort_enable_acs(iort_node); ops = iort_get_dev_cfg(iort_node); @@ -1609,7 +1639,7 @@ static void __init iort_init_platform_devices(void) iort_set_fwnode(iort_node, fwnode); - ret = iort_add_platform_device(iort_node, ops); + ret = iort_add_platform_device(iort_node, ops, parent); if (ret) { iort_delete_fwnode(iort_node); acpi_free_fwnode_static(fwnode); From patchwork Mon Sep 30 14:33:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 174757 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp7216363ill; Mon, 30 Sep 2019 07:37:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqwkme3mx6g9jKlvaNaaL0TNgEACijEb2DXE25aDFDbDSozWzBl8PKSTaiOT4toZBALsuybC X-Received: by 2002:aa7:d883:: with SMTP id u3mr19880640edq.281.1569854228400; Mon, 30 Sep 2019 07:37:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569854228; cv=none; d=google.com; s=arc-20160816; b=b7F3xc6TVaQlD4qxO93SkcuJ1PZdEYnlf87U7b6WuejILCTepSdfHf/6KBXiV6qlu5 SV+ZnqQ72fYZcTKhmooKhO18JTg1vypqIrlpBH3chTRAKNmg+kqQhDy7nXVhiIooXlmX eP6o9/R9ML7MMExcLcA4WWU1h6QdmZLY6DyP+nnbbw8jVaOsIcZhSwnVCx12im4AqCZn /m4RvOt8UT5uxJxSiqjh6RpWOtmHQbRkxFFY0THSXMgkGoVdklga9geQlRa0ZvebiDuJ cuhWPMKArYxpEMJxEn/+Ln6lte+yGCTONgqZldwCYYtJewpl18sE+7dMeX88CKHMzFZ5 WsjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=te7WIQEkBQtGebL6A8E1BIyGc+OLbuFvUyAXnlX1CmU=; b=g990Kz6zuptl3z8DWGRP2zMFY4tHQBznpBc8uw7V9RcmNRjrkpnWNMorUi35QXVEEk 3TYWHELKAFlrwTzBI4FZ15DfJMaD0r+1OW8mufGnJRnHgYCNETQRvN9XRUoks32+zqX8 9lNABivqZoOlbdlz3p4C2bZvXvlVHO0kDKNP4GK7zyBq9OxsX008FU1RixaVlWyl1F2/ jN1/56l3i3Q9/2OoywqkX2EijTgxRa0OmN2kaybfHK1+9y8XoMxo6vGxYqpvF2DoK/fy 8Q63uL+gJ9s/41EMfSUADKXGflZv/iWMk/ewewup2em0mM5wSA8y/PsSJwJsCKahAk5M +jsw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x9si6790638eju.147.2019.09.30.07.37.08; Mon, 30 Sep 2019 07:37:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731818AbfI3OhE (ORCPT + 27 others); Mon, 30 Sep 2019 10:37:04 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:3195 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731715AbfI3OhD (ORCPT ); Mon, 30 Sep 2019 10:37:03 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 40F62D0A7B7A024C01A2; Mon, 30 Sep 2019 22:36:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 30 Sep 2019 22:36:48 +0800 From: John Garry To: , , , , , CC: , , , , , , , , John Garry Subject: [RFC PATCH 2/6] iommu/arm-smmu-v3: Record IIDR in arm_smmu_device structure Date: Mon, 30 Sep 2019 22:33:47 +0800 Message-ID: <1569854031-237636-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1569854031-237636-1-git-send-email-john.garry@huawei.com> References: <1569854031-237636-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To allow other devices know the SMMU HW IIDR, record the IIDR contents as the first member of the arm_smmu_device structure. In storing as the first member, it saves exposing SMMU APIs, which are nicely self-contained today. Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.17.1 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 40f4757096c3..1ed3ef0f1ec3 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -70,6 +70,8 @@ #define IDR1_SSIDSIZE GENMASK(10, 6) #define IDR1_SIDSIZE GENMASK(5, 0) +#define ARM_SMMU_IIDR 0x18 + #define ARM_SMMU_IDR5 0x14 #define IDR5_STALL_MAX GENMASK(31, 16) #define IDR5_GRAN64K (1 << 6) @@ -546,6 +548,7 @@ struct arm_smmu_strtab_cfg { /* An SMMUv3 instance */ struct arm_smmu_device { + u32 iidr; /* must be first member */ struct device *dev; void __iomem *base; @@ -3153,6 +3156,8 @@ static int arm_smmu_device_probe(struct platform_device *pdev) iommu_device_set_ops(&smmu->iommu, &arm_smmu_ops); iommu_device_set_fwnode(&smmu->iommu, dev->fwnode); + smmu->iidr = readl(smmu->base + ARM_SMMU_IIDR); + ret = iommu_device_register(&smmu->iommu); if (ret) { dev_err(dev, "Failed to register iommu\n"); From patchwork Mon Sep 30 14:33:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 174759 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp7216410ill; Mon, 30 Sep 2019 07:37:11 -0700 (PDT) X-Google-Smtp-Source: APXvYqxY/Qn0owIPbGjxJXlu9pDAbjax3+xMNiOSjpOpxoC1bYp6uiIzmIQ6H7dUTs6YvpwuoTY0 X-Received: by 2002:a17:906:1c03:: with SMTP id k3mr19361028ejg.32.1569854230883; Mon, 30 Sep 2019 07:37:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569854230; cv=none; d=google.com; s=arc-20160816; b=ue6OuHQh2nrezaBswbkHkXCZg7QY+92eYLtNwfRNqpc0BzyaHmpxvrMy+ZAsXA2YE6 bvWOamgGmY9ncdwUHBjI5opKkN6AHEMmXiionvORZVgsuPswVl7gbWGnO3ZCnaB1jjSV f3CwEmEHusdoU8JKdeA33ba0stJ7Y07cSsolwKpo/JL/2klH0eqzhGgwPHDnIz/K5d3T iqFsR6uEBWlxgNO2G/fn+rV5EYJOMnwZYPljFl4fFJfrENolwo5O8lj2ymp5vfWO3KRN 4p89TuGKM3r2Gbqip8yWPGO/AQTqeUZlwzjIZQ5XriyRpBO2TPKJ79LIccACPt1LmMbe 5f4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=xQO5Nj+k3+OiO4b622mOdJQXQPAmlS662N7gim26Q5g=; b=QQc0rgP8EajLr8k9jPCsEhMfpr83Ovg3bDTYSCUbKbr7WKTF+QRJUK/33XktYulThR tUUASemgXgTBUkdwiqqkipboe+9QjyBPegeCAEfZsTdegdzGMbYTHQWndahpzgSWYf83 lfsVfTb0acL8mQbLBlI3ZuvlEi6EcqBizNeeM4XsSs2jzEMvNYH4k6LKQR7+m1tu4CcR d90H2m1CqEIcRMcu/jnhzUc40clRIbtUeJgUQUQLarlFF4qvq8XVt0l2J2BIA4MVCzqz FSwXZ/bC9cOHQgHHZGQGtSWDrKDJCc4nmSVn7Wq/PeiWCBHbnH6bcuGdQecJX7EYHi11 oWaA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x9si6790638eju.147.2019.09.30.07.37.10; Mon, 30 Sep 2019 07:37:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731807AbfI3OhD (ORCPT + 27 others); Mon, 30 Sep 2019 10:37:03 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:58478 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730780AbfI3OhB (ORCPT ); Mon, 30 Sep 2019 10:37:01 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 63F89242D57370195736; Mon, 30 Sep 2019 22:36:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 30 Sep 2019 22:36:49 +0800 From: John Garry To: , , , , , CC: , , , , , , , , John Garry Subject: [RFC PATCH 3/6] perf/smmuv3: Retrieve parent SMMUv3 IIDR Date: Mon, 30 Sep 2019 22:33:48 +0800 Message-ID: <1569854031-237636-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1569854031-237636-1-git-send-email-john.garry@huawei.com> References: <1569854031-237636-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To support IMP DEF events per PMCG, retrieve the parent SMMUv3 IIDR. This will be used as a lookup for the IMP DEF events supported, under the assumption that a PMCG implementation has the same uniqueness as the parent SMMUv3. In this, we assume that any PMCG associated with the same SMMUv3 will have the same IMP DEF events - otherwise, some other secondary matching would need to be done. Signed-off-by: John Garry --- drivers/perf/arm_smmuv3_pmu.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index da71c741cb46..f702898c695d 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -115,6 +115,7 @@ struct smmu_pmu { bool global_filter; u32 global_filter_span; u32 global_filter_sid; + u32 parent_iidr; }; #define to_smmu_pmu(p) (container_of(p, struct smmu_pmu, pmu)) @@ -551,6 +552,11 @@ static const struct attribute_group *smmu_pmu_attr_grps[] = { NULL }; +static const struct attribute_group **smmu_pmu_lookup_attr_groups(u32 parent_smmu_iidr) +{ + return smmu_pmu_attr_grps; +} + /* * Generic device handlers */ @@ -706,11 +712,21 @@ static int smmu_pmu_probe(struct platform_device *pdev) int irq, err; char *name; struct device *dev = &pdev->dev; + struct device *parent = dev->parent; smmu_pmu = devm_kzalloc(dev, sizeof(*smmu_pmu), GFP_KERNEL); if (!smmu_pmu) return -ENOMEM; + if (parent) { + void *parent_drvdata; + + parent_drvdata = platform_get_drvdata(to_platform_device(parent)); + if (!parent_drvdata) + return -EPROBE_DEFER; + smmu_pmu->parent_iidr = *(u32 *)parent_drvdata; + } + smmu_pmu->dev = dev; platform_set_drvdata(pdev, smmu_pmu); @@ -724,7 +740,7 @@ static int smmu_pmu_probe(struct platform_device *pdev) .start = smmu_pmu_event_start, .stop = smmu_pmu_event_stop, .read = smmu_pmu_event_read, - .attr_groups = smmu_pmu_attr_grps, + .attr_groups = smmu_pmu_lookup_attr_groups(smmu_pmu->parent_iidr), .capabilities = PERF_PMU_CAP_NO_EXCLUDE, }; From patchwork Mon Sep 30 14:33:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 174756 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp7216250ill; Mon, 30 Sep 2019 07:37:02 -0700 (PDT) X-Google-Smtp-Source: APXvYqwu6GdzPL4EhQQ2d3X8GJjCePOsYmKBmcC7wSgDwNj9j1LQnMR8ASnQ95nnjCXihTED+sOA X-Received: by 2002:a17:906:5109:: with SMTP id w9mr19288897ejk.282.1569854222432; Mon, 30 Sep 2019 07:37:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569854222; cv=none; d=google.com; s=arc-20160816; b=j4fEqu127aACUIvIwV2RBEtjNGs9e8eDUEj1U/vV7pmQSThifVHT4RLj+mcf9kZzfX 0n4aFzxkBg8prNIBUZ6c1iGZr15WK0/oaYKvMftvnaxDSTWVk0sjSphZuN4v/xy29Wcd JcZw/kaK7DNsSFHQQBDI0IyPcp9aOyqoyLlkQZsPn4g24VgdyLlxuXkNlFiGD3SSuTsQ ODefZRPrhLQhwsxQiXCnJiqAaYoGkK0zW6JMzXI81mvBl3c5MZ+sOvBYDff53MXzCkly ouUs5+EqlQ5Xs3OojpAja28+dKdvOMCYLEbxW5l+Gxyy504nRh97zEkvpo2ta3wgO8dV Q5mA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=Y1wyyPPxPBkwM6saX43NkFyvbw/mZSKc3yz3vJ27Tvw=; b=IM7TzBLwnoY0K5RwBEuf168Qr3QPgY3A02aW9Cf0Yp+NJPe+hFXUXREf7s/khv6SJg EgS4EXFuxFZ47hKT/z34/UPBzprFQ6h9Ac46xlNXnD+xaq1Qphn5oq+5xGUdg3iCeDhV dOZaBarmf9jBRIBGN++RN4YfD6gXDHL0Zm/cdnp7YUzZZauvg74dJ/f/ZkSQ/IePlNRo th6kP6MwOIylkt9POGBVSLWzHtIbPzqDJco/YRcbzAXWqUikon01sF6Or2cEupQ4kYb9 90zpSUXDM4Q5U0loPskbIE+79fwPrVheEfJpA1pE3MElqWw5oqMsn36Ht1MycT4jY2ys d/fA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ng7si7198007ejb.91.2019.09.30.07.37.02; Mon, 30 Sep 2019 07:37:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731794AbfI3OhB (ORCPT + 27 others); Mon, 30 Sep 2019 10:37:01 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:3193 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731698AbfI3OhA (ORCPT ); Mon, 30 Sep 2019 10:37:00 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 3920A100FDCBCDE5F8DC; Mon, 30 Sep 2019 22:36:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 30 Sep 2019 22:36:49 +0800 From: John Garry To: , , , , , CC: , , , , , , , , John Garry Subject: [RFC PATCH 4/6] perf/smmuv3: Support HiSilicon hip08 (hi1620) IMP DEF events Date: Mon, 30 Sep 2019 22:33:49 +0800 Message-ID: <1569854031-237636-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1569854031-237636-1-git-send-email-john.garry@huawei.com> References: <1569854031-237636-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that we can identify an PMCG implementation through the parent SMMUv3 implementation, add support for IMP DEF events. For each new implementation supported, we add a new attr_grps structure for a particular implementation and do lookup matching based on the parent SMMUv3 IIDR. This could maybe be optimised in future to reduce structures required. For now, only the l1_tlb event is added for HiSilicon hip08 platform. This platform supports many more IMP DEF events, but I need something better than the electronically translated description of the event to support. Signed-off-by: John Garry --- drivers/perf/arm_smmuv3_pmu.c | 54 ++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index f702898c695d..11f28ba5fae0 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -132,6 +132,8 @@ SMMU_PMU_EVENT_ATTR_EXTRACTOR(filter_stream_id, config1, 0, 31); SMMU_PMU_EVENT_ATTR_EXTRACTOR(filter_span, config1, 32, 32); SMMU_PMU_EVENT_ATTR_EXTRACTOR(filter_enable, config1, 33, 33); +#define PARENT_SMMU_IIDR_HISI_HIP08 (0x30736) + static inline void smmu_pmu_enable(struct pmu *pmu) { struct smmu_pmu *smmu_pmu = to_smmu_pmu(pmu); @@ -505,6 +507,21 @@ static struct attribute *smmu_pmu_events[] = { NULL }; +SMMU_EVENT_ATTR(l1_tlb, 0x8a); + +static struct attribute *smmu_pmu_events_hip08[] = { + &smmu_event_attr_cycles.attr.attr, + &smmu_event_attr_transaction.attr.attr, + &smmu_event_attr_tlb_miss.attr.attr, + &smmu_event_attr_config_cache_miss.attr.attr, + &smmu_event_attr_trans_table_walk_access.attr.attr, + &smmu_event_attr_config_struct_access.attr.attr, + &smmu_event_attr_pcie_ats_trans_rq.attr.attr, + &smmu_event_attr_pcie_ats_trans_passed.attr.attr, + &smmu_event_attr_l1_tlb.attr.attr, + NULL +}; + static umode_t smmu_pmu_event_is_visible(struct kobject *kobj, struct attribute *attr, int unused) { @@ -514,7 +531,10 @@ static umode_t smmu_pmu_event_is_visible(struct kobject *kobj, pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr.attr); - if (test_bit(pmu_attr->id, smmu_pmu->supported_events)) + if (pmu_attr->id < SMMU_PMCG_ARCH_MAX_EVENTS && + test_bit(pmu_attr->id, smmu_pmu->supported_events)) + return attr->mode; + else if (pmu_attr->id >= SMMU_PMCG_ARCH_MAX_EVENTS) return attr->mode; return 0; @@ -526,6 +546,12 @@ static struct attribute_group smmu_pmu_events_group = { .is_visible = smmu_pmu_event_is_visible, }; +static struct attribute_group smmu_pmu_events_group_hip08 = { + .name = "events", + .attrs = smmu_pmu_events_hip08, + .is_visible = smmu_pmu_event_is_visible, +}; + /* Formats */ PMU_FORMAT_ATTR(event, "config:0-15"); PMU_FORMAT_ATTR(filter_stream_id, "config1:0-31"); @@ -552,8 +578,34 @@ static const struct attribute_group *smmu_pmu_attr_grps[] = { NULL }; +static const struct attribute_group *smmu_pmu_attr_grps_hip08[] = { + &smmu_pmu_cpumask_group, + &smmu_pmu_events_group_hip08, + &smmu_pmu_format_group, + NULL +}; + +struct smmu_pmu_attr_grps_custom { + u32 parent_smmu_iidr; + const struct attribute_group **attr_grps; +} smmu_pmu_attr_custom_grps[] = { + { + .parent_smmu_iidr = PARENT_SMMU_IIDR_HISI_HIP08, + .attr_grps = smmu_pmu_attr_grps_hip08, + }, +}; + static const struct attribute_group **smmu_pmu_lookup_attr_groups(u32 parent_smmu_iidr) { + int i; + + for (i = 0; i < ARRAY_SIZE(smmu_pmu_attr_custom_grps); i++) { + struct smmu_pmu_attr_grps_custom *c = &smmu_pmu_attr_custom_grps[i]; + + if (c->parent_smmu_iidr == parent_smmu_iidr) + return c->attr_grps; + } + return smmu_pmu_attr_grps; } From patchwork Mon Sep 30 14:33:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 174758 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp7216374ill; Mon, 30 Sep 2019 07:37:09 -0700 (PDT) X-Google-Smtp-Source: APXvYqzb4pujM96Loksw/JmGLNW3hvRLOAOSWYsU0dohJMd6pEoustBBAqWLey69M/llkZCUewM5 X-Received: by 2002:a50:e616:: with SMTP id y22mr19979983edm.253.1569854228973; Mon, 30 Sep 2019 07:37:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569854228; cv=none; d=google.com; s=arc-20160816; b=uR8mpOWyRRHtbQs4J12wIwumXxSkB5YIkYXzn1c3ilTvj1skjfEhg5bSPt+dM/x7bt 5p+PUnrGcYf8ZdhL3MDgzKRqmHsq3EC9yrQn7GxtYTUV3df/INRPmBhpGExASnFMqwKU b+wifHNGSiMFvO2jx7yRuOEe3CAzSVtYM5Fzb+tNmnt4W1Mf4g+i6zfFOow3sBfldmbn Ss3B+RkNRk1l+jFnCxRO0qAUI7jlmo/YywjvXXY0FL3q1cYVfQMo3vl5XECQcYzEzgxB aKSVGokjKSlm6QSvwx+OnjXjbAHLyq4ws5EZZxn+iYwJ1+yXIKvZafwFCquKasDkoA0r 9TMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=OimahqKvgaKI8HA2Aev+v6cU+ZtOIsDQVJXQQdjHTEk=; b=oj7Z8qfCSn4FPvrWxsTEiWv5btL6UOqfS4BODIhCKdETri06vAAktMZADc6ydKazOl jBpVKMsfP2TzxsVEw1spmGXpvEd4o3Ep1S7zXW8R+uX1pUdiXhPA83ci7Inq3pcEG19j jatxPFu76Yuy96CTFYOkqoNP8Xy0SugWIVASzJeGV4kIt/XgSL/XYYVpCtSXWOUVDLnk OlGjPmAWteSPhkVrG2z7VvMUtNPX29EXZz7xzxcgsW4dOVQhCX6GejvrhdMTHZSqFTwm xEbvuLJXEf1E68X9tFkkGf+YhRtp6z7QDDVaAJQd/68ZgqEZ+93hgMtYiW48DGrJS6uf KLnA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x9si6790638eju.147.2019.09.30.07.37.08; Mon, 30 Sep 2019 07:37:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731830AbfI3OhG (ORCPT + 27 others); Mon, 30 Sep 2019 10:37:06 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:3194 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731803AbfI3OhE (ORCPT ); Mon, 30 Sep 2019 10:37:04 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 324169B4856EE48EF227; Mon, 30 Sep 2019 22:36:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 30 Sep 2019 22:36:49 +0800 From: John Garry To: , , , , , CC: , , , , , , , , John Garry Subject: [RFC PATCH 5/6] perf/smmuv3: Match implementation options based on parent SMMU IIDR Date: Mon, 30 Sep 2019 22:33:50 +0800 Message-ID: <1569854031-237636-6-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1569854031-237636-1-git-send-email-john.garry@huawei.com> References: <1569854031-237636-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently we match the implementation options based on the ACPI PLATFORM OEM ID. Since we can now match based on the parent SMMUv3 IIDR, switch to this method. Signed-off-by: John Garry --- drivers/perf/arm_smmuv3_pmu.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index 11f28ba5fae0..33d1379ae525 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -739,14 +739,10 @@ static void smmu_pmu_reset(struct smmu_pmu *smmu_pmu) smmu_pmu->reloc_base + SMMU_PMCG_OVSCLR0); } -static void smmu_pmu_get_acpi_options(struct smmu_pmu *smmu_pmu) +static void smmu_pmu_get_implementation_options(struct smmu_pmu *smmu_pmu) { - u32 model; - - model = *(u32 *)dev_get_platdata(smmu_pmu->dev); - - switch (model) { - case IORT_SMMU_V3_PMCG_HISI_HIP08: + switch (smmu_pmu->parent_iidr) { + case PARENT_SMMU_IIDR_HISI_HIP08: /* HiSilicon Erratum 162001800 */ smmu_pmu->options |= SMMU_PMCG_EVCNTR_RDONLY; break; @@ -844,7 +840,7 @@ static int smmu_pmu_probe(struct platform_device *pdev) return -EINVAL; } - smmu_pmu_get_acpi_options(smmu_pmu); + smmu_pmu_get_implementation_options(smmu_pmu); /* Pick one CPU to be the preferred one to use */ smmu_pmu->on_cpu = raw_smp_processor_id(); From patchwork Mon Sep 30 14:33:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 174761 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp7216578ill; Mon, 30 Sep 2019 07:37:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqwpPcpKRZ9A6Jok7vWmixG7XG2Ehowg2rCH4f/A5sP+a94uNRKVMnh/rzn+tGJxqZ10CHql X-Received: by 2002:aa7:d508:: with SMTP id y8mr19758262edq.171.1569854238642; Mon, 30 Sep 2019 07:37:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569854238; cv=none; d=google.com; s=arc-20160816; b=qheICZiZCOdAl4ZfpJBCx0grb+9cxmVfPqoBqUuKfFqiOYHy4NmSbIex3gOuca+/CX gqjR2Ii/RtpyPks02XkpXyQUQfZ4FfDCavh92krTSgvnLlwJG99azGR2cp36TROqlcEd LNVsXVn3c9jm6+2MPUEUZR/MwQDuRl6HqDNLyfiJO3X2kf2lgeUR/6Buqtcn9VATzfRw 1Otg2IBdmMFSDvRSOVcno5eUkV1r5vlE6Wy4FQrlrX+Qw/l9OloyNIVxYQ2lYGm92ZdT CPGAF/p3EIcgUZgDgTq46Ej0GvtS9i56PJ/0wcewuMwAALbl3KfY7sY+IO5ZxSHsdGmn ijSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=soFMxh66Caxy+hfNJJ7xUOvifdP+Esvc57fd9stDiu8=; b=MaV4waiaO3C3yD9n6e55MSdFnqAyEwFk0JPMPQFEGrgiGz6qOI0BFeSdH52OR15DPw 91Cc1+0aElhuJBkXM4XPSU/+r91M/I++5s+ttcl0htaht5y7g5gfqf8pBLySYEKAquuj 0Di1PWHR+Dz69zHBGVjb5sQQiMhdh2YgUgXjykwJp4emiTskQp+lO0f42PVgGbAzf9Rc YCYXt5eoQ3hV0g6oCoWZvDhZA0stAzdnY9qRaVhz1MIGYl5sG0AuIWqt2+IiImN68lU6 hIDCnz09KNNherOEUZi5y3BuWctKfOfoKLl3iMJ5zqYdMfpPOHWDjUmXmSMgWR4qFBZH 7AYw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r5si6689636edo.14.2019.09.30.07.37.18; Mon, 30 Sep 2019 07:37:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731752AbfI3OhB (ORCPT + 27 others); Mon, 30 Sep 2019 10:37:01 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:58450 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730780AbfI3OhA (ORCPT ); Mon, 30 Sep 2019 10:37:00 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 5BFA948E40CC6B5FE5AE; Mon, 30 Sep 2019 22:36:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 30 Sep 2019 22:36:50 +0800 From: John Garry To: , , , , , CC: , , , , , , , , John Garry Subject: [RFC PATCH 6/6] ACPI/IORT: Drop code to set the PMCG software-defined model Date: Mon, 30 Sep 2019 22:33:51 +0800 Message-ID: <1569854031-237636-7-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1569854031-237636-1-git-send-email-john.garry@huawei.com> References: <1569854031-237636-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that we can identify a PMCG implementation from the parent SMMUv3 IIDR, drop all the code to match based on the ACPI OEM ID. Signed-off-by: John Garry --- drivers/acpi/arm64/iort.c | 35 +---------------------------------- include/linux/acpi_iort.h | 8 -------- 2 files changed, 1 insertion(+), 42 deletions(-) -- 2.17.1 Acked-by: Hanjun Guo diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 0b687520c3e7..d04888cb8cff 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -1377,27 +1377,6 @@ static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res, ACPI_EDGE_SENSITIVE, &res[2]); } -static struct acpi_platform_list pmcg_plat_info[] __initdata = { - /* HiSilicon Hip08 Platform */ - {"HISI ", "HIP08 ", 0, ACPI_SIG_IORT, greater_than_or_equal, - "Erratum #162001800", IORT_SMMU_V3_PMCG_HISI_HIP08}, - { } -}; - -static int __init arm_smmu_v3_pmcg_add_platdata(struct platform_device *pdev) -{ - u32 model; - int idx; - - idx = acpi_match_platform_list(pmcg_plat_info); - if (idx >= 0) - model = pmcg_plat_info[idx].data; - else - model = IORT_SMMU_V3_PMCG_GENERIC; - - return platform_device_add_data(pdev, &model, sizeof(model)); -} - struct iort_dev_config { const char *name; int (*dev_init)(struct acpi_iort_node *node); @@ -1408,7 +1387,6 @@ struct iort_dev_config { struct acpi_iort_node *node); int (*dev_set_proximity)(struct device *dev, struct acpi_iort_node *node); - int (*dev_add_platdata)(struct platform_device *pdev); }; static const struct iort_dev_config iort_arm_smmu_v3_cfg __initconst = { @@ -1430,7 +1408,6 @@ static const struct iort_dev_config iort_arm_smmu_v3_pmcg_cfg __initconst = { .name = "arm-smmu-v3-pmcg", .dev_count_resources = arm_smmu_v3_pmcg_count_resources, .dev_init_resources = arm_smmu_v3_pmcg_init_resources, - .dev_add_platdata = arm_smmu_v3_pmcg_add_platdata, }; static __init const struct iort_dev_config *iort_get_dev_cfg( @@ -1494,17 +1471,7 @@ static int __init iort_add_platform_device(struct acpi_iort_node *node, if (ret) goto dev_put; - /* - * Platform devices based on PMCG nodes uses platform_data to - * pass the hardware model info to the driver. For others, add - * a copy of IORT node pointer to platform_data to be used to - * retrieve IORT data information. - */ - if (ops->dev_add_platdata) - ret = ops->dev_add_platdata(pdev); - else - ret = platform_device_add_data(pdev, &node, sizeof(node)); - + ret = platform_device_add_data(pdev, &node, sizeof(node)); if (ret) goto dev_put; diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h index 8e7e2ec37f1b..7a8961e6a8bb 100644 --- a/include/linux/acpi_iort.h +++ b/include/linux/acpi_iort.h @@ -14,14 +14,6 @@ #define IORT_IRQ_MASK(irq) (irq & 0xffffffffULL) #define IORT_IRQ_TRIGGER_MASK(irq) ((irq >> 32) & 0xffffffffULL) -/* - * PMCG model identifiers for use in smmu pmu driver. Please note - * that this is purely for the use of software and has nothing to - * do with hardware or with IORT specification. - */ -#define IORT_SMMU_V3_PMCG_GENERIC 0x00000000 /* Generic SMMUv3 PMCG */ -#define IORT_SMMU_V3_PMCG_HISI_HIP08 0x00000001 /* HiSilicon HIP08 PMCG */ - int iort_register_domain_token(int trans_id, phys_addr_t base, struct fwnode_handle *fw_node); void iort_deregister_domain_token(int trans_id);