From patchwork Mon Feb 26 16:49:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 775876 Delivered-To: patch@linaro.org Received: by 2002:a5d:6103:0:b0:33d:da16:65b6 with SMTP id v3csp427563wrt; Mon, 26 Feb 2024 08:51:01 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXwGep6gsXeJI5AebvPyvLP+AlyELbu3YyVfgk1/hFXZzIfWBF0x28RrtWTFMX4JfrqoQpklD0OZNxSimjvkYu+ X-Google-Smtp-Source: AGHT+IH2ALsKnrfPuINDR4XYH4wnEWEInDcBsEepmX+kP5GoRFTo/tnGEn3JqF80Qg0jNtbO4M6Y X-Received: by 2002:a05:620a:4012:b0:787:c697:7d81 with SMTP id h18-20020a05620a401200b00787c6977d81mr9477307qko.11.1708966261162; Mon, 26 Feb 2024 08:51:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1708966261; cv=none; d=google.com; s=arc-20160816; b=kLc4452WZDrN8Z4+JVk6Qoe4jt+0Ykw6onVSQo9vo5xoVoaa9jTauHq9PXF2vSv8Vh n4ECTV0i5oCmOiQJWMGhJ0s/50fRtvGUMFo5m52DW4Nphliw+3X/1XG1ddxq00Rs9u6X NSYM8BZZ7FE20yaMr+KDTbaJNOLYjf1BIqOuhGokGRx4HERnUbBW7ekQrGTmy+TcK+z2 BDTQg4nzPV6vsCxqT7pkBIrDlZkmSeKRnTnBBA2/ZtaVFRhaChbUEC4+NPhlyium0QqZ m4HhhyNEFUWsQIiiWswNHAMzWZDoGbbcB5PrHAWjj9LUw/8XF+UDDfBDZzd8AwQiA6aE Tveg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=mSB3DjDUt1VhXKQ8ZY2Xf8EIy3NhP1lIXSTZpypndH8=; fh=afD/k2HZXMBaufC+DpUvb9x31uKmY7+wEY31QP4pBTk=; b=U0cEH8TGeKyoUO9hXP6Vr69EIyAdPzwATpOYR+J+QawFlNHsoPVtqSL3sLxf3RLa9x fjZoDrw/GPA012KNYTmNZgdcrHt0JNI1mjG2WUBdjUDqPw/VRFea/615UZOEB0RApf2I Vtxdl/7MAsbsIsQMAtc3YYPOzRPxuv12441kZevwhfuH7aaIdpu+ZP2V0C1Nn9d8R6tJ AXpLeG0TWhTGo5L18dKEXkh/UmzzWTgsfB/0/iW2/XsjpvFcvY+J5Et9VxdDZw8HoD9i 62MjpcF5GeC+zQ5TT8hLZQyJ4Br9P/YVTmEjw2j/qbPxhTlHRSu4JrqIJpgcp+roK1wY j53g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SBa4VDo4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z6-20020ae9f446000000b007859ff2a646si5325602qkl.115.2024.02.26.08.51.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Feb 2024 08:51:01 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SBa4VDo4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reeAT-0005x1-90; Mon, 26 Feb 2024 11:49:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reeAR-0005wN-JX for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:27 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reeAO-0006Dp-Sl for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:26 -0500 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-33d36736d4eso2066152f8f.1 for ; Mon, 26 Feb 2024 08:49:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708966163; x=1709570963; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mSB3DjDUt1VhXKQ8ZY2Xf8EIy3NhP1lIXSTZpypndH8=; b=SBa4VDo4zhD/+XOWE18BHzX4zNMessHPaigsKq4GVKh6Q/dOCJaVOhlM2FuBRa7B3w re3SAJvr0zSC2Z7ohpPBHll0VDhlnu+58gNWpFxLBj7M5W3fSb8LIK0w+jpZT8WJs1e8 UJZRAxaQtGmO9hwLi+fl9avAXdkriEsr2HIRcWlid4SgwowK1ZLb6UN0C6qV904+tFSH zUrACsugDebTPHIk4i1d/FBaDrcjkH51L0oNVJRD0Lw7HSxE4HAH3ZT1JTp6Kjc4X/9+ wbCJc02pmKK4ObwGb2aCXGzLs842a8wwUrUstELnbylHiajSBA63SDwWbbjM2dZvEZdl vJRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708966163; x=1709570963; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mSB3DjDUt1VhXKQ8ZY2Xf8EIy3NhP1lIXSTZpypndH8=; b=FmRpt/e1d6VawrCnmPmF+PLW1x3RfLB4G5XXQMEpstRVqs55QjcPnwYydJ0BAsRX1h 6YKY1DtJNocQlyBFb9Wev1/YOSQJvSKr1UCpAKYRrAWIjhaNA3o+kR6UxcSBO2VH/jug RV70yD9PM8Z8MlsJmcszTdPp+5IT/rHxuHZycf2vaqd0FKLklaN6raF5xDXUSuzNSaXt 3HDWqbmngdQU6f+TNEEt7yrwIz9JYkSsctt/zpr269d51Cdy1IAy7Xk8My6HSprtMnhA yMb02AlicoV5FqTHhisUupEukCWWNVx8VhFWvNltSUIpbbsvwi/4757VNTJY6GNtqbLg /ZlQ== X-Gm-Message-State: AOJu0Yx3j269rc6cOKiCYn2IzX+VCj+DUeU6R5XtV9W+6qCv/PtJ+TjD jEEafQLwd07rr0kvK/njfbdBOfvpGLEoHDqxs1Fq4wzI6FZFfMIEOcIKAm/Fw+Uon4PHDwzqZoI T X-Received: by 2002:a5d:64c6:0:b0:33d:db2f:b0fd with SMTP id f6-20020a5d64c6000000b0033ddb2fb0fdmr2206800wri.52.1708966163240; Mon, 26 Feb 2024 08:49:23 -0800 (PST) Received: from m1x-phil.lan ([176.187.223.153]) by smtp.gmail.com with ESMTPSA id h4-20020a5d4304000000b0033d6c928a95sm8771903wrq.63.2024.02.26.08.49.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 26 Feb 2024 08:49:22 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , "Edgar E . Iglesias" , Anton Johansson , Mark Cave-Ayland , Peter Maydell , Zhao Liu , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov , Richard Henderson , Ani Sinha , Bernhard Beschow , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , "Michael S. Tsirkin" , Laszlo Ersek , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 1/5] target/i386/cpu: Expose SMI# IRQ line via QDev Date: Mon, 26 Feb 2024 17:49:08 +0100 Message-ID: <20240226164913.94077-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240226164913.94077-1-philmd@linaro.org> References: <20240226164913.94077-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to remove calls to cpu_interrupt() from hw/ code, expose the SMI# interrupt via QDev as named GPIO. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu-internal.h | 1 + target/i386/cpu-sysemu.c | 11 +++++++++++ target/i386/cpu.c | 2 ++ 3 files changed, 14 insertions(+) diff --git a/target/i386/cpu-internal.h b/target/i386/cpu-internal.h index 9baac5c0b4..9d76bb77cf 100644 --- a/target/i386/cpu-internal.h +++ b/target/i386/cpu-internal.h @@ -62,6 +62,7 @@ GuestPanicInformation *x86_cpu_get_crash_info(CPUState *cs); void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp); +void x86_cpu_smi_irq(void *opaque, int irq, int level); void x86_cpu_apic_create(X86CPU *cpu, Error **errp); void x86_cpu_apic_realize(X86CPU *cpu, Error **errp); void x86_cpu_machine_reset_cb(void *opaque); diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c index 7422096737..7684a7f01e 100644 --- a/target/i386/cpu-sysemu.c +++ b/target/i386/cpu-sysemu.c @@ -370,3 +370,14 @@ void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v, qapi_free_GuestPanicInformation(panic_info); } +void x86_cpu_smi_irq(void *opaque, int irq, int level) +{ + DeviceState *dev = opaque; + CPUState *cs = CPU(dev); + + if (level) { + cpu_interrupt(cs, CPU_INTERRUPT_SMI); + } else { + cpu_reset_interrupt(cs, CPU_INTERRUPT_SMI); + } +} diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7f90823676..6b4462d533 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7463,6 +7463,8 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) } #ifndef CONFIG_USER_ONLY + qdev_init_gpio_in_named(dev, x86_cpu_smi_irq, "SMI", 1); + x86_cpu_apic_realize(cpu, &local_err); if (local_err != NULL) { goto out; From patchwork Mon Feb 26 16:49:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 775872 Delivered-To: patch@linaro.org Received: by 2002:a5d:6103:0:b0:33d:da16:65b6 with SMTP id v3csp427125wrt; Mon, 26 Feb 2024 08:49:56 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVxGNyXe/yQtixh7+npAqo85WeZVVc2lAUoMzbOwI8zuklifzqXm8f1CowNDS9YAt0c2eE5KNNjvezTHM1zOJ0v X-Google-Smtp-Source: AGHT+IFI2VO8w9pvAWloirGgttIM2DYQWdltxlzcll9JotKq4QfixcnG+SF/uftMPix7xOKNar0V X-Received: by 2002:a0c:e113:0:b0:68f:44eb:b944 with SMTP id w19-20020a0ce113000000b0068f44ebb944mr7443445qvk.15.1708966196531; Mon, 26 Feb 2024 08:49:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1708966196; cv=none; d=google.com; s=arc-20160816; b=QuE0gsho4Wk+4RSuOCH4ZwO8I+LqV+K3d9Tw1jkYaQ0Th8kcohUm5jHVcKDTNK0Fa3 MbZ5CClGuoI2ER+oJKLZLmQYRBg/ZA09U2biOcmQWcCq/oCn7vHCfyEmyOpa8vkrIXIP iNEmvb9HeyR6apabLZ5e/ENBhGkkKb1xn11S/KUFPaFgvdfquOmr/AwEwE+icZy471Px zWBLOALc1MiDNKFh58stkZ8CMJyQAlBkprb9fmeRohgVLkxTOGz8ciW174GeAVZhqGWU P8gnP/RJT1skWPfBgnW+gB6FStxikJUCSgFqb3HY6QvRANtrlgcdJe8V7fesrnWjccuu 0bbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=g6KcXi7ub1LWF1H0fHJ1E8fzi9Cbgex9iIz41HyRMbc=; fh=afD/k2HZXMBaufC+DpUvb9x31uKmY7+wEY31QP4pBTk=; b=C4rIXXH4hzSH23ZP7ueIggUxk8DRk8JvAXHtBzENHzcdKMf5ya3f4ELuNZ6BJg+zk3 qMBGrDvWwlIIwT84Op68I3AWv1LmribHPU9BGJOlvEWNk30VPvSUnda1Lqhs48CC1RrS j1OdEuYKQhvVnlro3pQ7Tpt4UxFjqK4tzS4aEwe62+KJrUzyD5QHr98P0V3EGmkUfUWQ oPL7LOfFx91qF0oWTKY2GOrR3N9Opt4yqdgiP8eMT0L0BWsDp/RRPlj3EYFxB5dRKSpm xMj1ByZJAa/I8jCHHV8AXSsDyWQiVc1IPGoRKMzNnHWCWrtx2L44S88B4bTjj2X5llYt 77aw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EsJYmrfl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 3-20020a05621420a300b0068f8b9e1ad4si5457371qvd.388.2024.02.26.08.49.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Feb 2024 08:49:56 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EsJYmrfl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reeAi-00069V-IB; Mon, 26 Feb 2024 11:49:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reeAg-00065O-Fe for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:42 -0500 Received: from mail-lj1-x231.google.com ([2a00:1450:4864:20::231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reeAW-0006FU-1e for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:42 -0500 Received: by mail-lj1-x231.google.com with SMTP id 38308e7fff4ca-2d22fa5c822so48223531fa.2 for ; Mon, 26 Feb 2024 08:49:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708966170; x=1709570970; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g6KcXi7ub1LWF1H0fHJ1E8fzi9Cbgex9iIz41HyRMbc=; b=EsJYmrflOD26LJS/wXzRlmsdfyjuqIZABXSpJA2z53EEm4cUm21itVZ1g0xdCCRrdW KmSAYNgO1NCaflghcL+PRcCqvENPxTpVj8ANrM/eJfGWcXhimy7EYzE6PWVY779tmSEk rY2wTlD5ZobSVSUy6gHlFaY9rH2W4FpAFKqJJdYJx+D71K75p1knsqkXaE2NmjyMAFLV ZTaPog0o9VKSdNGuFVlD4cqglMdIuK6ePBMg8Ti9POx0gS+GRYyJLGe+fRGkfxa7Utra lNS0ymkqVx+Xy5Ql858uubgNiMPl5HkW/CQayUUN1Vheun+xAidef9VP+c4W06v7ksFU aUEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708966170; x=1709570970; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g6KcXi7ub1LWF1H0fHJ1E8fzi9Cbgex9iIz41HyRMbc=; b=OhR8PWq+NeKE0uLTdPD//ZOEVjz7VPlAIEcwDWvW5ZB7VGFKGgbg+1bv+XYCr3p4+c 7+GfuTNgJd2ywpI+uOHgvw3D8EeHV/5F9jq3b7D+KhKfrGcH7SHENhNGc7mgsbRYQTyr sTLv3F05qpe/MVcSYusWmQ5s+tqQIqe10/xdVYxaJhuJJwiDn/24Ml2RySuo3duHPYrp UFCJLraama0YPeO0H+JXroyJ3zedo9mr1NsrfDTjfiv+Tqm4PD115h/4h+TqTqDQ++OL RJFEQ+Tb2MIBZ0OueXFwY1W3Bkz/ugRlUfE50TafRp86glDLNtzwotT8WORnjBBwRipX GiQQ== X-Gm-Message-State: AOJu0Yze2c3uaMUBQOIS09Sb8Qm1NJpMWY6ugYas1O7TNkvwViGsCwRU DXHmGOBpTXpgpl/TeKLJtDf+J/CaWLG8wt3CQLj/xCGjIAFp4e9xoCxPAVngw/Ul9MX+1i4IcHy H X-Received: by 2002:a2e:9607:0:b0:2d2:8a6c:3e54 with SMTP id v7-20020a2e9607000000b002d28a6c3e54mr2444119ljh.16.1708966170014; Mon, 26 Feb 2024 08:49:30 -0800 (PST) Received: from m1x-phil.lan ([176.187.223.153]) by smtp.gmail.com with ESMTPSA id l6-20020a1c7906000000b0040fddaf9ff4sm12391603wme.40.2024.02.26.08.49.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 26 Feb 2024 08:49:29 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , "Edgar E . Iglesias" , Anton Johansson , Mark Cave-Ayland , Peter Maydell , Zhao Liu , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov , Richard Henderson , Ani Sinha , Bernhard Beschow , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , "Michael S. Tsirkin" , Laszlo Ersek , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 2/5] hw/i386/piix: Set CPU SMI# interrupt using QDev GPIO API Date: Mon, 26 Feb 2024 17:49:09 +0100 Message-ID: <20240226164913.94077-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240226164913.94077-1-philmd@linaro.org> References: <20240226164913.94077-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=philmd@linaro.org; helo=mail-lj1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Use the CPU "SMI" IRQ, removing a call to cpu_interrupt() from hw/. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 2 -- hw/i386/pc.c | 9 --------- hw/i386/pc_piix.c | 4 ++-- 3 files changed, 2 insertions(+), 13 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 4bb1899602..c8227e18c3 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -148,8 +148,6 @@ GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); /* pc.c */ extern int fd_bootchk; -void pc_acpi_smi_interrupt(void *opaque, int irq, int level); - #define PCI_HOST_PROP_RAM_MEM "ram-mem" #define PCI_HOST_PROP_PCI_MEM "pci-mem" #define PCI_HOST_PROP_SYSTEM_MEM "system-mem" diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 880e95de26..1df9f5ba90 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -651,15 +651,6 @@ static gboolean pc_init_ne2k_isa(ISABus *bus, NICInfo *nd, Error **errp) return true; } -void pc_acpi_smi_interrupt(void *opaque, int irq, int level) -{ - X86CPU *cpu = opaque; - - if (level) { - cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI); - } -} - static void pc_machine_done(Notifier *notifier, void *data) { diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index ce6aad758d..447130ade1 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -345,9 +345,9 @@ static void pc_init1(MachineState *machine, pc_cmos_init(pcms, x86ms->rtc); if (piix4_pm) { - smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); - + smi_irq = qdev_get_gpio_in_named(DEVICE(first_cpu), "SMI", 0); qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); + pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); /* TODO: Populate SPD eeprom data. */ smbus_eeprom_init(pcms->smbus, 8, NULL, 0); From patchwork Mon Feb 26 16:49:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 775874 Delivered-To: patch@linaro.org Received: by 2002:a5d:6103:0:b0:33d:da16:65b6 with SMTP id v3csp427404wrt; Mon, 26 Feb 2024 08:50:35 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVA/S3RKvL0pGCbcmB4KziF3bn7vz7jMuiz+QKZYRZUtmXBC7TkOAu6S8aVleFzwE8Nhtph1ais+94g+3h3eaPv X-Google-Smtp-Source: AGHT+IHD05VkSyZ4ikR1UW4OKQL0taZcpDJGlMWDe86p+uJa1C82ildI+CYiRmIgQITBALUdffuT X-Received: by 2002:a0c:e34f:0:b0:68f:ddd2:65a8 with SMTP id a15-20020a0ce34f000000b0068fddd265a8mr8603315qvm.48.1708966235239; Mon, 26 Feb 2024 08:50:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1708966235; cv=none; d=google.com; s=arc-20160816; b=zSozlF14SUaXwDzRo7j8nVihrYo0CV8elGwnF5Q0GhJ5JEiW4fFVbUCYPrZsoPjsnN aS9CKKFOahA8EveUDWzuIb5LIbrPunh2fe0hKpeCl7EAUF18cfMt9JKEdlJpe3+PMAf0 UOxffISE3wO9MBTLa613QPTsqH18fUf7Ky0IO4nAFjFUFZZGoURcAvPyzPSCJb/TX5MJ m66agnE81QhO0zKQ2IwK/vB415p0P/HdyjMBHwo5428uL14VHkp/Wpz6E9Ha+fZPOgyQ BmrHlbCnuTi8quYCw6xeDgIXVKNQr9+YjH34f3cKYZA+GFnyP6PXDlGXGP5z0t1UasWN pLGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=BSZsP7iZ+WCm1GRQ6l/dckqzk5JVKU9/jCan+ZQ8ppM=; fh=afD/k2HZXMBaufC+DpUvb9x31uKmY7+wEY31QP4pBTk=; b=Ujhn0mS/xGWOLaCSA2zuhWTK9U7lQi42yRsoHGWRonlGHlByKbipkjqC1ErHH742ez G0nnLZjD9Rx8Rn1aztsVsGPJ2F0SAYBtbvdZvIbYEvkzjf2L9wDrrDfnydNP+OFucp9k RwocbHGqyvyy/C5FxERwK5sLPKFVjHWcBUEDoaQwExv/Pkzh92MspR+kVmL0HSKsjCkT fWJOQq25ntKPXSiX24EDK3W8rPKw9LvrRkzuimJPk0nh7Vbkp7GjWts3jQZa4YIS1KcW 2aI+yPS2QlKuXOh/JNGLy5R6P2cLSvY6nznBweyuCzbSvBjBNGOC7ylgRrqsokxlUQci dZ7g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GPopM5Kg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 1-20020a0562140dc100b0068f2b1d42d6si5562776qvt.92.2024.02.26.08.50.35 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Feb 2024 08:50:35 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GPopM5Kg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reeAf-00063o-Ts; Mon, 26 Feb 2024 11:49:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reeAe-0005y9-Jf for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:40 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reeAc-0006Gn-Hc for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:40 -0500 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-412a57832fcso7833435e9.1 for ; Mon, 26 Feb 2024 08:49:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708966176; x=1709570976; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BSZsP7iZ+WCm1GRQ6l/dckqzk5JVKU9/jCan+ZQ8ppM=; b=GPopM5Kgqxq1LK39e2qEN0yZEP86Ffebq/R8Mc2TB/iZuZsU9M4vu9z18xHV0/evAK yRBmmQYB1o+DRTO6eitcl/qT+RY+nWy34KAv6mq2CdTFK42lxLGoA0NvsRigrOM8H0L7 7EQ/NSCTBsTa++I/tumLwWgkk9CAJEiqJNZVEqU9TbjER+UObQSWOk0Nirpzr+4A/8G7 OAvQR3vwpwMVrp6aGNq88629H1e+4xFv9vIVS/DSNMY+4eqdKvmxh5dA53c758kmh3O6 dXUgXqnElSPFplYgI9jCgDGtAvHbnpm7krZQp7nz9PgRl1EOB5fSknU2iJafwa4/zbpc MtQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708966176; x=1709570976; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BSZsP7iZ+WCm1GRQ6l/dckqzk5JVKU9/jCan+ZQ8ppM=; b=VbXiFbwEqcTtVSybF20idAE37JiuColuyDETxvqTNMrr81DpYF144d+s+TL/sHgGYs npBDqd9LH8io/z3fI49WjbYGVV+SSD+GjqqEXPBeBbU/MlG8RdU4u+LnnTKwkeSYP55/ 8ZkRYVSoUMSvg1PSDAElwafVmYiqH4aFpPMQDnOhY1Is6M5QHFZxh/yyFk7ntH0psXWO cssKfhnrfLTsmsOK5cjJUSFc02Rc/xhj4Lk65IHdcmnMXwZfOHqwUqttc1C9BVavr/AA BwtPZoxUS25hcxMtBa6IZK9oCId4OOsYkw/1Gfj4yQewH3vCgJq9V1ZHU11UbzKfcTvA eLyA== X-Gm-Message-State: AOJu0YxSaL/OWlltdS6qgcFP1yXUQwCcZd0Jwb+yvGIisAP/HAa7rz7h D/g8CpqKo31Yy+CE0tlrn5UzI/GTTQ6lN2G2r/5+05X4hzvQ1XSV7gaJfoOmT45RWbxneZ7nsfl S X-Received: by 2002:a05:600c:1f86:b0:412:8306:a7bb with SMTP id je6-20020a05600c1f8600b004128306a7bbmr6393130wmb.12.1708966176308; Mon, 26 Feb 2024 08:49:36 -0800 (PST) Received: from m1x-phil.lan ([176.187.223.153]) by smtp.gmail.com with ESMTPSA id o5-20020a05600c510500b00412157dc70bsm8942178wms.30.2024.02.26.08.49.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 26 Feb 2024 08:49:35 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , "Edgar E . Iglesias" , Anton Johansson , Mark Cave-Ayland , Peter Maydell , Zhao Liu , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov , Richard Henderson , Ani Sinha , Bernhard Beschow , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , "Michael S. Tsirkin" , Laszlo Ersek , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 3/5] hw/ahci/ich9_tco: Set CPU SMI# interrupt using QDev GPIO API Date: Mon, 26 Feb 2024 17:49:10 +0100 Message-ID: <20240226164913.94077-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240226164913.94077-1-philmd@linaro.org> References: <20240226164913.94077-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Use the CPU "SMI" IRQ, removing a call to cpu_interrupt() from hw/. Keep a reference to the IRQ in the TCOIORegs structure, which while being names with the Regs suffix doesn't contain only registers. Remove ich9_generate_smi(). Signed-off-by: Philippe Mathieu-Daudé --- I suppose ideally ICH9 TCO would be a QOM object... --- include/hw/acpi/ich9.h | 1 + include/hw/acpi/ich9_tco.h | 4 ++-- hw/acpi/ich9.c | 3 ++- hw/acpi/ich9_tco.c | 13 ++++++++++--- hw/isa/ich9_lpc.c | 5 ----- 5 files changed, 15 insertions(+), 11 deletions(-) diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h index 3587a35c9f..84e1557257 100644 --- a/include/hw/acpi/ich9.h +++ b/include/hw/acpi/ich9.h @@ -49,6 +49,7 @@ typedef struct ICH9LPCPMRegs { uint32_t smi_sts; qemu_irq irq; /* SCI */ + qemu_irq smi; /* SMI */ uint32_t pm_io_base; Notifier powerdown_notifier; diff --git a/include/hw/acpi/ich9_tco.h b/include/hw/acpi/ich9_tco.h index 68ee64942f..31730b8e14 100644 --- a/include/hw/acpi/ich9_tco.h +++ b/include/hw/acpi/ich9_tco.h @@ -73,10 +73,10 @@ typedef struct TCOIORegs { uint8_t timeouts_no; MemoryRegion io; + qemu_irq smi; } TCOIORegs; -void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent); -void ich9_generate_smi(void); +void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent, qemu_irq smi); extern const VMStateDescription vmstate_ich9_sm_tco; diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index 1f41ab49c4..e0b3838365 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -318,7 +318,8 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, qemu_irq sci_irq) memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi); if (pm->enable_tco) { - ich9_acpi_pm_tco_init(&pm->tco_regs, &pm->io); + pm->smi = qdev_get_gpio_in_named(DEVICE(first_cpu), "SMI", 0); + ich9_acpi_pm_tco_init(&pm->tco_regs, &pm->io, pm->smi); } if (pm->acpi_pci_hotplug.use_acpi_hotplug_bridge) { diff --git a/hw/acpi/ich9_tco.c b/hw/acpi/ich9_tco.c index 7499ec17db..1061b18b7e 100644 --- a/hw/acpi/ich9_tco.c +++ b/hw/acpi/ich9_tco.c @@ -14,6 +14,7 @@ #include "hw/acpi/ich9_tco.h" #include "hw/isa/ich9_lpc.h" +#include "hw/irq.h" #include "trace.h" enum { @@ -31,6 +32,11 @@ enum { SW_IRQ_GEN_DEFAULT = 0x03, }; +static void ich9_generate_smi(TCOIORegs *tr) +{ + qemu_irq_raise(tr->smi); +} + static inline void tco_timer_reload(TCOIORegs *tr) { int ticks = tr->tco.tmr & TCO_TMR_MASK; @@ -72,7 +78,7 @@ static void tco_timer_expired(void *opaque) } if (pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN) { - ich9_generate_smi(); + ich9_generate_smi(tr); } tr->tco.rld = tr->tco.tmr; tco_timer_reload(tr); @@ -154,7 +160,7 @@ static void tco_ioport_writew(TCOIORegs *tr, uint32_t addr, uint32_t val) case TCO_DAT_IN: tr->tco.din = val; tr->tco.sts1 |= SW_TCO_SMI; - ich9_generate_smi(); + ich9_generate_smi(tr); break; case TCO_DAT_OUT: tr->tco.dout = val; @@ -225,7 +231,7 @@ static const MemoryRegionOps tco_io_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent) +void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent, qemu_irq smi) { *tr = (TCOIORegs) { .tco = { @@ -245,6 +251,7 @@ void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent) .tco_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tco_timer_expired, tr), .expire_time = -1, .timeouts_no = 0, + .smi = smi, }; memory_region_init_io(&tr->io, memory_region_owner(parent), &tco_io_ops, tr, "sm-tco", ICH9_PMIO_TCO_LEN); diff --git a/hw/isa/ich9_lpc.c b/hw/isa/ich9_lpc.c index 2339f66e0f..b1f41158c5 100644 --- a/hw/isa/ich9_lpc.c +++ b/hw/isa/ich9_lpc.c @@ -353,11 +353,6 @@ static PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin) return route; } -void ich9_generate_smi(void) -{ - cpu_interrupt(first_cpu, CPU_INTERRUPT_SMI); -} - /* Returns -1 on error, IRQ number on success */ static int ich9_lpc_sci_irq(ICH9LPCState *lpc) { From patchwork Mon Feb 26 16:49:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 775875 Delivered-To: patch@linaro.org Received: by 2002:a5d:6103:0:b0:33d:da16:65b6 with SMTP id v3csp427436wrt; Mon, 26 Feb 2024 08:50:40 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUYC7G7RKd7JVKvZTzvKDzfIguKEkdtwLgL4YBkFZPPbz6Gmz44gA+K2Dr534pRc4q9/di+dQfDTrzOredW1Vbb X-Google-Smtp-Source: AGHT+IGwjKFR45cQO7NGjpWe+X/oMso0XiR2tQpi7C/dLWn/LyuCADs8Kq9QeA+9o72u571zPgpt X-Received: by 2002:a81:a009:0:b0:608:d045:6efa with SMTP id x9-20020a81a009000000b00608d0456efamr4242949ywg.22.1708966240455; Mon, 26 Feb 2024 08:50:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1708966240; cv=none; d=google.com; s=arc-20160816; b=PNIVXJBs807WSg3c8pDd2XmjMGSlNh+IjMh6Xz7TvK7r+AcThqT7XcGXyIcbepmATd 64Nvtz24e6eKDT31gWn84UqrJGPe00sCH+gWNt4effompNRJM7yZPd7idNazSW1hCIW3 f83f36vqvkxetW03dLhA1vRvMf3u4S1SEq6YhdECSwCciRb5dNDjo9ZGOIQYKx0DsaWV l7wqrynaXp2BTjhRBZH1ZQGVHqmmNQMsH4XsV1lySFv6kTBLQm4ZiloFKQKjyOcbzzVx WLjJUtVcMdAg1bfEWWzzwskQey/eg03aXtiLpxo5CNWZm1k1JKVISXvbmFQwXc62H2GW GECg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wc7ekhdBLxy3L373z/Id77yNGmRbap0pwSIm6jwZffI=; fh=afD/k2HZXMBaufC+DpUvb9x31uKmY7+wEY31QP4pBTk=; b=WIigqegFJCTX2uiHnF9n3ORcgi5868NWiGZWFAoqsYW6W3MR8k3F9ivWO/quFpwST+ bBby4enOCUGfGExjod7R4BALAutIwVZ/82PLPcqhSzyeZkVnrz6Mjuq/Mw9IDDXYE3Wc a/5UKcTl+KK0p5N2jIizC7sBfm+FnLHI1PWnV3bXwXyUE2ytMHpxB5cIS0giqdg/QKt3 XHov0DVinAJ6nXE/WRn1y+GHmWPiJlbaBR/8Mxc4Ci0xW8brcXdZhIU2jMTUNrdgLWoE 77Rl5gwhdAxY3FpwFlGlKVjzhwyefx961fvKHDhy5UkzR9Lobav7CJ6HKs34ii8nF6R9 T3nA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="E4U86/Eu"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id kk11-20020a056214508b00b0068f5bff0abesi5353399qvb.442.2024.02.26.08.50.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Feb 2024 08:50:40 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="E4U86/Eu"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reeAm-0006DC-6D; Mon, 26 Feb 2024 11:49:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reeAk-0006A9-Oo for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:46 -0500 Received: from mail-lj1-x22e.google.com ([2a00:1450:4864:20::22e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reeAi-0006HN-Sr for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:46 -0500 Received: by mail-lj1-x22e.google.com with SMTP id 38308e7fff4ca-2d23d301452so46749661fa.1 for ; Mon, 26 Feb 2024 08:49:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708966183; x=1709570983; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wc7ekhdBLxy3L373z/Id77yNGmRbap0pwSIm6jwZffI=; b=E4U86/EunGPwPvsmupz3mMo7/d1tBroFq01feGnpQQXAI3mWvDgBnSuQTgohcIuOOC PfXLIDhmqA9DKGIF3UbO3VCPnA2p2jH8l9TBSWMTLLEJZZz43nhGHAF9FsOg87OWmEDe 7UwXmYF3TUieeHz4yciS52wmK8QAWctFl3OFiiT3gim4yXRU8xye6hLuUBOXtHo08cBp NylZDC7YdA08lSIqEtdPpOjclUxWpuBtYg0yDSMRybHV7nB1BuqpNVeczRfagMv0rtkc 5mkrETcw16NZMWdOMCsHfuyrAEkSCmVUHODeEyEm3ZXKpanDPJaaVfpDldQjSsa9y3sT 94IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708966183; x=1709570983; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wc7ekhdBLxy3L373z/Id77yNGmRbap0pwSIm6jwZffI=; b=ZwYkEF+7X0+AU45KkqTDMGS/I5bzS6+Jrkd68dHceoesI1NZ+ioETLgooxUvzE2E+U +iVGPHqIqGSs5g84kUgMPquPn2ECM+pHunQw4GIMSYSiAuboC2hhrDPa7MvFQ0assPHo fk6//SYudxoVtF5ETBcBJNaPClWCuH1GBi22ETA4SpCDmOLwJu8xdf1Bcw1teC5v5dQn anUGTCBhEORvswWyqYGvWwNWik3RUjf3pv7EkzqtDXJwqhVNW+8Epp64Muhn8At6TSLc EYOIFrOT3uklLexACt8fau0zjngnyHFi688Q+Q21etZk2fnIybevTVN31+evVDLT+W5C nw+Q== X-Gm-Message-State: AOJu0YxSPXhEZ3mpOQgQb0d7kFybZjqRPUVS7jhiXU4c6UOG8jVY1xhM POnOoCe594fl8EltAUuggEfqICEB2FulEYfhQJcoumuiKbWGGGQbBWNUUJhJhHmnGPd6WuyHdpW o X-Received: by 2002:a2e:6e0c:0:b0:2d2:4141:d5c3 with SMTP id j12-20020a2e6e0c000000b002d24141d5c3mr4443420ljc.7.1708966182743; Mon, 26 Feb 2024 08:49:42 -0800 (PST) Received: from m1x-phil.lan ([176.187.223.153]) by smtp.gmail.com with ESMTPSA id t17-20020a05600c451100b00412a2060d5esm5801957wmo.23.2024.02.26.08.49.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 26 Feb 2024 08:49:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , "Edgar E . Iglesias" , Anton Johansson , Mark Cave-Ayland , Peter Maydell , Zhao Liu , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov , Richard Henderson , Ani Sinha , Bernhard Beschow , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , "Michael S. Tsirkin" , Laszlo Ersek , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 4/5] hw/i386/q35: Wire virtual SMI# lines to ICH9 chipset Date: Mon, 26 Feb 2024 17:49:11 +0100 Message-ID: <20240226164913.94077-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240226164913.94077-1-philmd@linaro.org> References: <20240226164913.94077-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=philmd@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We use virtual SMI lines for the virtualized q35 machine (see commit 5ce45c7a2b "hw/isa/lpc_ich9: add broadcast SMI feature"). Expose them as QDev GPIO at the machine level. Wire them to the ICH9 chipset. This allows removing a pair of calls to cpu_interrupt() from the ICH9 model and make it target agnostic. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/ich9_lpc.h | 12 ++++++++++++ include/hw/southbridge/ich9.h | 1 + hw/i386/pc_q35.c | 26 ++++++++++++++++++++++++++ hw/isa/ich9_lpc.c | 10 ++++------ hw/southbridge/ich9.c | 1 + 5 files changed, 44 insertions(+), 6 deletions(-) diff --git a/include/hw/isa/ich9_lpc.h b/include/hw/isa/ich9_lpc.h index b64d88b395..f11ae7e762 100644 --- a/include/hw/isa/ich9_lpc.h +++ b/include/hw/isa/ich9_lpc.h @@ -21,6 +21,17 @@ OBJECT_DECLARE_SIMPLE_TYPE(ICH9LPCState, ICH9_LPC_DEVICE) #define ICH9_CC_SIZE (16 * 1024) /* 16KB. Chipset configuration registers */ +/* + * Real ICH9 contains a single SMI output line and doesn't broadcast CPUs. + * Virtualized ICH9 allows broadcasting upon negatiation with guest, see + * commit 5ce45c7a2b. + */ +enum { + ICH9_VIRT_SMI_BROADCAST, + ICH9_VIRT_SMI_CURRENT, +#define ICH9_VIRT_SMI_COUNT 2 +}; + struct ICH9LPCState { /* ICH9 LPC PCI to ISA bridge */ PCIDevice d; @@ -71,6 +82,7 @@ struct ICH9LPCState { Notifier machine_ready; qemu_irq gsi[IOAPIC_NUM_PINS]; + qemu_irq virt_smi[ICH9_VIRT_SMI_COUNT]; }; #define ICH9_MASK(bit, ms_bit, ls_bit) \ diff --git a/include/hw/southbridge/ich9.h b/include/hw/southbridge/ich9.h index a8da4a8665..48a4212ed8 100644 --- a/include/hw/southbridge/ich9.h +++ b/include/hw/southbridge/ich9.h @@ -17,6 +17,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(ICH9State, ICH9_SOUTHBRIDGE) #define ICH9_PCIE_FUNC_MAX 6 #define ICH9_GPIO_GSI "gsi" +#define ICH9_VIRT_SMI "x-virt-smi" #define ICH9_LPC_SMI_NEGOTIATED_FEAT_PROP "x-smi-negotiated-features" diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 31ab0ae77b..77fe8932e8 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -50,6 +50,7 @@ #include "hw/ide/ahci-pci.h" #include "hw/intc/ioapic.h" #include "hw/southbridge/ich9.h" +#include "hw/isa/ich9_lpc.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/numa.h" @@ -58,6 +59,25 @@ #include "hw/i386/acpi-build.h" #include "target/i386/cpu.h" +/* + * Kludge IRQ handler for ICH9 virtual SMI delivery. + * IRQ#0: broadcast + * IRQ#1: deliver to current CPU + */ +static void pc_q35_ich9_virt_smi(void *opaque, int irq, int level) +{ + assert(level); + if (irq) { + cpu_interrupt(current_cpu, CPU_INTERRUPT_SMI); + } else { + CPUState *cs; + + CPU_FOREACH(cs) { + cpu_interrupt(cs, CPU_INTERRUPT_SMI); + } + } +} + /* PC hardware initialisation */ static void pc_q35_init(MachineState *machine) { @@ -65,6 +85,7 @@ static void pc_q35_init(MachineState *machine) PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); X86MachineState *x86ms = X86_MACHINE(machine); Object *phb; + qemu_irq *smi_irq; DeviceState *ich9; Object *lpc_obj; MemoryRegion *system_memory = get_system_memory(); @@ -160,6 +181,8 @@ static void pc_q35_init(MachineState *machine) /* irq lines */ gsi_state = pc_gsi_create(&x86ms->gsi, true); + smi_irq = qemu_allocate_irqs(pc_q35_ich9_virt_smi, NULL, + ICH9_VIRT_SMI_COUNT); ich9 = qdev_new(TYPE_ICH9_SOUTHBRIDGE); object_property_add_child(OBJECT(machine), "ich9", OBJECT(ich9)); @@ -168,6 +191,9 @@ static void pc_q35_init(MachineState *machine) for (i = 0; i < IOAPIC_NUM_PINS; i++) { qdev_connect_gpio_out_named(ich9, ICH9_GPIO_GSI, i, x86ms->gsi[i]); } + for (i = 0; i < ICH9_VIRT_SMI_COUNT; i++) { + qdev_connect_gpio_out_named(ich9, ICH9_VIRT_SMI, i, smi_irq[i]); + } qdev_prop_set_bit(ich9, "d2p-enabled", false); qdev_prop_set_bit(ich9, "smm-enabled", x86_machine_is_smm_enabled(x86ms)); qdev_prop_set_bit(ich9, "sata-enabled", pcms->sata_enabled); diff --git a/hw/isa/ich9_lpc.c b/hw/isa/ich9_lpc.c index b1f41158c5..599cb0ee86 100644 --- a/hw/isa/ich9_lpc.c +++ b/hw/isa/ich9_lpc.c @@ -30,7 +30,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" -#include "cpu.h" #include "qapi/error.h" #include "qapi/visitor.h" #include "qemu/range.h" @@ -495,12 +494,9 @@ static void ich9_apm_ctrl_changed(uint32_t val, void *arg) if (lpc->pm.smi_en & ICH9_PMIO_SMI_EN_APMC_EN) { if (lpc->smi_negotiated_features & (UINT64_C(1) << ICH9_LPC_SMI_F_BROADCAST_BIT)) { - CPUState *cs; - CPU_FOREACH(cs) { - cpu_interrupt(cs, CPU_INTERRUPT_SMI); - } + qemu_irq_raise(lpc->virt_smi[ICH9_VIRT_SMI_BROADCAST]); } else { - cpu_interrupt(current_cpu, CPU_INTERRUPT_SMI); + qemu_irq_raise(lpc->virt_smi[ICH9_VIRT_SMI_CURRENT]); } } } @@ -700,6 +696,8 @@ static void ich9_lpc_initfn(Object *obj) qdev_init_gpio_out_named(DEVICE(lpc), lpc->gsi, ICH9_GPIO_GSI, IOAPIC_NUM_PINS); + qdev_init_gpio_out_named(DEVICE(lpc), lpc->virt_smi, + ICH9_VIRT_SMI, ARRAY_SIZE(lpc->virt_smi)); object_property_add_uint8_ptr(obj, ACPI_PM_PROP_SCI_INT, &lpc->sci_gsi, OBJ_PROP_FLAG_READ); diff --git a/hw/southbridge/ich9.c b/hw/southbridge/ich9.c index 521925b462..d5e131cff3 100644 --- a/hw/southbridge/ich9.c +++ b/hw/southbridge/ich9.c @@ -64,6 +64,7 @@ static void ich9_init(Object *obj) object_initialize_child(obj, "lpc", &s->lpc, TYPE_ICH9_LPC_DEVICE); qdev_pass_gpios(DEVICE(&s->lpc), DEVICE(s), ICH9_GPIO_GSI); + qdev_pass_gpios(DEVICE(&s->lpc), DEVICE(s), ICH9_VIRT_SMI); qdev_prop_set_int32(DEVICE(&s->lpc), "addr", ICH9_LPC_DEVFN); qdev_prop_set_bit(DEVICE(&s->lpc), "multifunction", true); object_property_add_alias(obj, "smm-enabled", From patchwork Mon Feb 26 16:49:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 775877 Delivered-To: patch@linaro.org Received: by 2002:a5d:6103:0:b0:33d:da16:65b6 with SMTP id v3csp427624wrt; Mon, 26 Feb 2024 08:51:11 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXJ1LCgSAPNX3D2LtjKsb4tMvdvFqAJ/MWVgQjKBCduhwJ6h6xomwKWchk4pmras9/DvRZp9TfSwrfw0duditIS X-Google-Smtp-Source: AGHT+IFNDlU0CO6TLpQ+Mpv5WaoP3Qt5vxTFTvUTp0ZkZ8rSZHtZZZo/1EqKw+7TVsqcEJRUioBn X-Received: by 2002:ae9:e604:0:b0:787:199f:23b8 with SMTP id z4-20020ae9e604000000b00787199f23b8mr8196358qkf.64.1708966271531; Mon, 26 Feb 2024 08:51:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1708966271; cv=none; d=google.com; s=arc-20160816; b=OWZlyvoNn+dcK8suf85eDpwt3Zwd6qdLuhCfqZPX8Gtqc9yB6O3gs5tp6gY2OP4N8q Cgkyhv/qmSUQuWfc55Ucsfg9q13WZjvx1x1wWfJGSAEaoSSlYgZbXixPSipTW3MCbXr0 63u7HWiq9xJBk/DclTIZpr+NfvLYroWNrM4RivHSN2gmnZz9nfaIBTk6IYYOy8qPido7 kQW0dHaffk9Pe70cCLN1a7IGIvmd9KjW0lKf+/PPEtrG535/lS+ek0OEJ4XQsjvExzjk CHfCnYvZtb4LY9QHoH+InhhZx9kSlCWWJw/EmRznhqZByXHPxekQWP04I+XoEoBQ0v5i 52xQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=O9EOnAK3G1S7aJVMzq+KHRG4+8D5fltRUtqq+3DIXP0=; fh=afD/k2HZXMBaufC+DpUvb9x31uKmY7+wEY31QP4pBTk=; b=POm0B1R5AKKOZIoP74f/xt3RWh/M3RV5oeld9tiM0W/J5VF6Y+tJsajdUuJUCRYuM6 KDsOjXyB3HhYoOxg7bXo44DZxcNAdu1buS4VPjwiaot8DNI/VNtrQ9c1grfid5lzDxzG uJ6zJT3yRB8gSJAQXDa9jjSlaaAdxs2UwS3KPAyKDbcxYoHZ/VHAWBPTKRnXLTZi4jwP mzhg5NUp3+CaQmhcE8RDzDRZ+tDbuebmjpZ29vXiKFDeObnMNmzvCc0xcU9OMNlFq5QY Guzx6hZOReL1FBNEcPhZmdvwcasJ5KV4tHZ5E1oXrkSF4a8RLXP3PTgA7Nt/oju/oFzx xhTQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="x6/Lrd1o"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m10-20020a05620a214a00b00787b85281e2si5175981qkm.312.2024.02.26.08.51.11 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Feb 2024 08:51:11 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="x6/Lrd1o"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reeAr-0006H2-Pa; Mon, 26 Feb 2024 11:49:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reeAq-0006Gg-O2 for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:52 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reeAp-0006Hh-5N for qemu-devel@nongnu.org; Mon, 26 Feb 2024 11:49:52 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-33d0a7f2424so2237839f8f.0 for ; Mon, 26 Feb 2024 08:49:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708966189; x=1709570989; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O9EOnAK3G1S7aJVMzq+KHRG4+8D5fltRUtqq+3DIXP0=; b=x6/Lrd1owNB+jwKi2KoKD4r40dk9XP8Ho7rH5dfjkyfBhg4Z8NszuA77V/Lw6it9Ad 5yenYEJHZKbbkKW+g09Q1SLvngfTc6n+FiU6ixWFU9N05rGJQIN2PGsBqEEfOREqE9ln aexM6nm24NDMMgY4A1xLDjeK0rbUNe4c3gMFjKx/NCqcXwbhbkeF3vIUeSXGYgduMewD 08qGHoMuORLzRsclJeTnM6JdRrYWO6OD2rYHMKRzzvr5UClBPhPbO8wxNOWw4hGj4Ff2 HLHCDEm9Y2n2Q+Ub46DLM7Nfd5KBnXkKvCsswoxJ/CocVV4k5LYN0k2cbjKSeUDh5FY4 pTKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708966189; x=1709570989; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O9EOnAK3G1S7aJVMzq+KHRG4+8D5fltRUtqq+3DIXP0=; b=LJc/yZzYK2K+Mn1LErnVNjEwi0iy1mba9PQhJzkFC6pRv0y4J1c3Tevnm70cqAy/g8 hCnByI1HndDSbYLOe/I1AiUGFY0uUxW8249bK4dBSwFHpNWDr8qSPsOJue9u0Rkp5Auc MpKEISem5zXgOfpXhkeW6cliY1cmtKKAHbV9koW0MiFvcFTUDtduRo5tSCMkTXivqcz5 cIPdJfL8VRjH54q2c3ZQA/sNSONPcapYwCJ8jqATECGd7t1lAe1XCKkIouCozwip6l1G 49aA8RQtAPNZpgmcJvb1tuNwxqj4wX/SNCk/UqKZYS+hlM3aAk0ws/1nAnat95T1reOq P8MA== X-Gm-Message-State: AOJu0Yw/OWjSy7ni/TDSi/P2B0g2FHIyoADm/QzVxbymLh1aI4lBBGun fEit1EVd26J2gAeAVkVKs4DX53kgOhOSYwUrVD0uj2BqyycUoMk+OPvfj/oIBt/o3fiRJ6mEf8E 8 X-Received: by 2002:a5d:6649:0:b0:33d:aa78:ed82 with SMTP id f9-20020a5d6649000000b0033daa78ed82mr5311945wrw.34.1708966188918; Mon, 26 Feb 2024 08:49:48 -0800 (PST) Received: from m1x-phil.lan ([176.187.223.153]) by smtp.gmail.com with ESMTPSA id bv20-20020a0560001f1400b0033d73e1505bsm8884920wrb.18.2024.02.26.08.49.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 26 Feb 2024 08:49:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , "Edgar E . Iglesias" , Anton Johansson , Mark Cave-Ayland , Peter Maydell , Zhao Liu , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov , Richard Henderson , Ani Sinha , Bernhard Beschow , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , "Michael S. Tsirkin" , Laszlo Ersek , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 5/5] hw/isa: Build ich9_lpc.c once Date: Mon, 26 Feb 2024 17:49:12 +0100 Message-ID: <20240226164913.94077-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240226164913.94077-1-philmd@linaro.org> References: <20240226164913.94077-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org ich9_lpc.c doesn't contain any target-specific calls, lets build it once. Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/meson.build | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/isa/meson.build b/hw/isa/meson.build index 3b5504f78d..df58287d62 100644 --- a/hw/isa/meson.build +++ b/hw/isa/meson.build @@ -3,9 +3,8 @@ system_ss.add(when: 'CONFIG_FDC37M81X', if_true: files('fdc37m81x-superio.c')) system_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c')) system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c')) system_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c')) +system_ss.add(when: 'CONFIG_LPC_ICH9', if_true: files('ich9_lpc.c')) system_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c')) system_ss.add(when: 'CONFIG_PIIX', if_true: files('piix.c')) system_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.c')) system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c')) - -specific_ss.add(when: 'CONFIG_LPC_ICH9', if_true: files('ich9_lpc.c'))