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[66.183.142.209]) by smtp.gmail.com with ESMTPSA id bn16-20020a056a00325000b006e0cfe94fc5sm2090721pfb.107.2024.02.17.13.30.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 17 Feb 2024 13:30:14 -0800 (PST) From: Doug Smythies To: srinivas.pandruvada@linux.intel.com, rafael@kernel.org, lenb@kernel.org Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, vincent.guittot@linaro.org, dsmythies@telus.net Subject: [PATCH] cpufreq: intel_pstate: fix pstate limits enforcement for adjust_perf call back Date: Sat, 17 Feb 2024 13:30:10 -0800 Message-Id: <20240217213010.2466-1-dsmythies@telus.net> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There is a loophole in pstate limit clamping for the intel_cpufreq CPU frequency scaling driver (intel_pstate in passive mode), schedutil CPU frequency scaling governor, HWP (HardWare Pstate) control enabled, when the adjust_perf call back path is used. Fix it. Signed-off-by: Doug Smythies --- drivers/cpufreq/intel_pstate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index ca94e60e705a..79619227ea51 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -2987,6 +2987,9 @@ static void intel_cpufreq_adjust_perf(unsigned int cpunum, if (min_pstate < cpu->min_perf_ratio) min_pstate = cpu->min_perf_ratio; + if (min_pstate > cpu->max_perf_ratio) + min_pstate = cpu->max_perf_ratio; + max_pstate = min(cap_pstate, cpu->max_perf_ratio); if (max_pstate < min_pstate) max_pstate = min_pstate;