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Thu, 15 Feb 2024 22:08:05 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay05.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 41FM82L034865450 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 15 Feb 2024 22:08:04 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6450158071; Thu, 15 Feb 2024 22:08:02 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 10D705806F; Thu, 15 Feb 2024 22:08:02 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.14.18]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Thu, 15 Feb 2024 22:08:02 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 01/33] dt-bindings: clock: ast2600: Add FSI clock Date: Thu, 15 Feb 2024 16:07:27 -0600 Message-Id: <20240215220759.976998-2-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: mXZ_5paJfw486B07y6yz4b9YLiZjx165 X-Proofpoint-GUID: mXZ_5paJfw486B07y6yz4b9YLiZjx165 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 phishscore=0 mlxlogscore=968 clxscore=1011 impostorscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 Add a definition for the FSI clock. Signed-off-by: Eddie James Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/ast2600-clock.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h index 712782177c90..7ae96c7bd72f 100644 --- a/include/dt-bindings/clock/ast2600-clock.h +++ b/include/dt-bindings/clock/ast2600-clock.h @@ -86,6 +86,7 @@ #define ASPEED_CLK_MAC3RCLK 69 #define ASPEED_CLK_MAC4RCLK 70 #define ASPEED_CLK_I3C 71 +#define ASPEED_CLK_FSI 72 /* Only list resets here that are not part of a clock gate + reset pair */ #define ASPEED_RESET_ADC 55 From patchwork Thu Feb 15 22:07:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773132 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6EE2C151CC6; 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Thu, 15 Feb 2024 22:08:02 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 02/33] clk: ast2600: Add FSI parent clock with correct rate Date: Thu, 15 Feb 2024 16:07:28 -0600 Message-Id: <20240215220759.976998-3-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: qu9m3EEKVKG-DGbpYkJKjIZdu1nYUI1H X-Proofpoint-ORIG-GUID: qu9m3EEKVKG-DGbpYkJKjIZdu1nYUI1H X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 mlxlogscore=999 adultscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 malwarescore=0 bulkscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 In order to calculate correct FSI bus clocks, the FSI clock must correctly calculate the rate from the parent (APLL / 4). Signed-off-by: Eddie James --- drivers/clk/clk-ast2600.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk-ast2600.c b/drivers/clk/clk-ast2600.c index 909c3137c428..faf88324f7b1 100644 --- a/drivers/clk/clk-ast2600.c +++ b/drivers/clk/clk-ast2600.c @@ -19,7 +19,7 @@ * This includes the gates (configured from aspeed_g6_gates), plus the * explicitly-configured clocks (ASPEED_CLK_HPLL and up). */ -#define ASPEED_G6_NUM_CLKS 72 +#define ASPEED_G6_NUM_CLKS 73 #define ASPEED_G6_SILICON_REV 0x014 #define CHIP_REVISION_ID GENMASK(23, 16) @@ -157,7 +157,7 @@ static const struct aspeed_gate_data aspeed_g6_gates[] = { [ASPEED_CLK_GATE_UART11CLK] = { 59, -1, "uart11clk-gate", "uartx", 0 }, /* UART11 */ [ASPEED_CLK_GATE_UART12CLK] = { 60, -1, "uart12clk-gate", "uartx", 0 }, /* UART12 */ [ASPEED_CLK_GATE_UART13CLK] = { 61, -1, "uart13clk-gate", "uartx", 0 }, /* UART13 */ - [ASPEED_CLK_GATE_FSICLK] = { 62, 59, "fsiclk-gate", NULL, 0 }, /* FSI */ + [ASPEED_CLK_GATE_FSICLK] = { 62, 59, "fsiclk-gate", "fsiclk", 0 }, /* FSI */ }; static const struct clk_div_table ast2600_eclk_div_table[] = { @@ -821,6 +821,9 @@ static void __init aspeed_g6_cc(struct regmap *map) hw = clk_hw_register_fixed_factor(NULL, "i3cclk", "apll", 0, 1, 8); aspeed_g6_clk_data->hws[ASPEED_CLK_I3C] = hw; + + hw = clk_hw_register_fixed_factor(NULL, "fsiclk", "apll", 0, 1, 4); + aspeed_g6_clk_data->hws[ASPEED_CLK_FSI] = hw; }; static void __init aspeed_g6_cc_init(struct device_node *np) From patchwork Thu Feb 15 22:07:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773147 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAB1B1420D1; Thu, 15 Feb 2024 22:08:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.158.5 ARC-Seal: i=1; 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Thu, 15 Feb 2024 22:08:02 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 03/33] fsi: Move slave definitions to fsi-slave.h Date: Thu, 15 Feb 2024 16:07:29 -0600 Message-Id: <20240215220759.976998-4-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: YUZ5q9RnUGEB2EzKJCuk8rfcczQT5q2P X-Proofpoint-ORIG-GUID: YUZ5q9RnUGEB2EzKJCuk8rfcczQT5q2P X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 clxscore=1015 suspectscore=0 phishscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 bulkscore=0 impostorscore=0 priorityscore=1501 mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 Master drivers may need access to the slave definitions. Signed-off-by: Eddie James --- drivers/fsi/fsi-core.c | 35 ----------------- drivers/fsi/fsi-slave.h | 84 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 84 insertions(+), 35 deletions(-) diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c index 097d5a780264..7bf0c96fc017 100644 --- a/drivers/fsi/fsi-core.c +++ b/drivers/fsi/fsi-core.c @@ -45,41 +45,6 @@ static const int engine_page_size = 0x400; -#define FSI_SLAVE_BASE 0x800 - -/* - * FSI slave engine control register offsets - */ -#define FSI_SMODE 0x0 /* R/W: Mode register */ -#define FSI_SISC 0x8 /* R/W: Interrupt condition */ -#define FSI_SSTAT 0x14 /* R : Slave status */ -#define FSI_SLBUS 0x30 /* W : LBUS Ownership */ -#define FSI_LLMODE 0x100 /* R/W: Link layer mode register */ - -/* - * SMODE fields - */ -#define FSI_SMODE_WSC 0x80000000 /* Warm start done */ -#define FSI_SMODE_ECRC 0x20000000 /* Hw CRC check */ -#define FSI_SMODE_SID_SHIFT 24 /* ID shift */ -#define FSI_SMODE_SID_MASK 3 /* ID Mask */ -#define FSI_SMODE_ED_SHIFT 20 /* Echo delay shift */ -#define FSI_SMODE_ED_MASK 0xf /* Echo delay mask */ -#define FSI_SMODE_SD_SHIFT 16 /* Send delay shift */ -#define FSI_SMODE_SD_MASK 0xf /* Send delay mask */ -#define FSI_SMODE_LBCRR_SHIFT 8 /* Clk ratio shift */ -#define FSI_SMODE_LBCRR_MASK 0xf /* Clk ratio mask */ - -/* - * SLBUS fields - */ -#define FSI_SLBUS_FORCE 0x80000000 /* Force LBUS ownership */ - -/* - * LLMODE fields - */ -#define FSI_LLMODE_ASYNC 0x1 - #define FSI_SLAVE_SIZE_23b 0x800000 static DEFINE_IDA(master_ida); diff --git a/drivers/fsi/fsi-slave.h b/drivers/fsi/fsi-slave.h index 1d63a585829d..dba65bd4e083 100644 --- a/drivers/fsi/fsi-slave.h +++ b/drivers/fsi/fsi-slave.h @@ -7,6 +7,90 @@ #include #include +#define FSI_SLAVE_BASE 0x800 + +/* + * FSI slave engine control register offsets + */ +#define FSI_SMODE 0x0 /* R/W: Mode register */ +#define FSI_SISC 0x8 /* R : Interrupt condition */ +#define FSI_SCISC 0x8 /* C : Clear interrupt condition */ +#define FSI_SISM 0xc /* R/W: Interrupt mask */ +#define FSI_SISS 0x10 /* R : Interrupt status */ +#define FSI_SSISM 0x10 /* S : Set interrupt mask */ +#define FSI_SCISM 0x14 /* C : Clear interrupt mask */ +#define FSI_SSTAT 0x14 /* R : Slave status */ +#define FSI_SI1S 0x1c /* R : Slave interrupt 1 status */ +#define FSI_SSI1M 0x1c /* S : Set slave interrupt 1 mask */ +#define FSI_SCI1M 0x20 /* C : Clear slave interrupt 1 mask */ +#define FSI_SLBUS 0x30 /* W : LBUS Ownership */ +#define FSI_SRSIC0 0x68 /* C : Clear remote interrupt condition */ +#define FSI_SRSIC4 0x6c /* C : Clear remote interrupt condition */ +#define FSI_SRSIM0 0x70 /* R/W: Remote interrupt mask */ +#define FSI_SRSIM4 0x74 /* R/W: Remote interrupt mask */ +#define FSI_SRSIS0 0x78 /* R : Remote interrupt status */ +#define FSI_SRSIS4 0x7c /* R : Remote interrupt status */ +#define FSI_LLMODE 0x100 /* R/W: Link layer mode register */ + +/* + * SMODE fields + */ +#define FSI_SMODE_WSC 0x80000000 /* Warm start done */ +#define FSI_SMODE_ECRC 0x20000000 /* Hw CRC check */ +#define FSI_SMODE_SID_SHIFT 24 /* ID shift */ +#define FSI_SMODE_SID_MASK 3 /* ID Mask */ +#define FSI_SMODE_ED_SHIFT 20 /* Echo delay shift */ +#define FSI_SMODE_ED_MASK 0xf /* Echo delay mask */ +#define FSI_SMODE_SD_SHIFT 16 /* Send delay shift */ +#define FSI_SMODE_SD_MASK 0xf /* Send delay mask */ +#define FSI_SMODE_LBCRR_SHIFT 8 /* Clk ratio shift */ +#define FSI_SMODE_LBCRR_MASK 0xf /* Clk ratio mask */ + +/* + * SISS fields + */ +#define FSI_SISS_CRC_ERROR BIT(31) +#define FSI_SISS_PROTO_ERROR BIT(30) +#define FSI_SISS_LBUS_PARITY_ERROR BIT(29) +#define FSI_SISS_LBUS_PROTO_ERROR BIT(28) +#define FSI_SISS_ACCESS_ERROR BIT(27) +#define FSI_SISS_LBUS_OWNERSHIP_ERROR BIT(26) +#define FSI_SISS_LBUS_OWNERSHIP_CHANGE BIT(25) +#define FSI_SISS_ASYNC_MODE_ERROR BIT(14) +#define FSI_SISS_OPB_ACCESS_ERROR BIT(13) +#define FSI_SISS_OPB_FENCED BIT(12) +#define FSI_SISS_OPB_PARITY_ERROR BIT(11) +#define FSI_SISS_OPB_PROTO_ERROR BIT(10) +#define FSI_SISS_OPB_TIMEOUT BIT(9) +#define FSI_SISS_OPB_ERROR_ACK BIT(8) +#define FSI_SISS_MFSI_MASTER_ERROR BIT(3) +#define FSI_SISS_MFSI_PORT_ERROR BIT(2) +#define FSI_SISS_MFSI_HP BIT(1) +#define FSI_SISS_MFSI_CR_PARITY_ERROR BIT(0) +#define FSI_SISS_ALL 0xfe007f00 + +/* + * SI1S fields + */ +#define FSI_SI1S_SLAVE_BIT 31 +#define FSI_SI1S_SHIFT_BIT 30 +#define FSI_SI1S_SCOM_BIT 29 +#define FSI_SI1S_SCRATCH_BIT 28 +#define FSI_SI1S_I2C_BIT 27 +#define FSI_SI1S_SPI_BIT 26 +#define FSI_SI1S_SBEFIFO_BIT 25 +#define FSI_SI1S_MBOX_BIT 24 + +/* + * SLBUS fields + */ +#define FSI_SLBUS_FORCE 0x80000000 /* Force LBUS ownership */ + +/* + * LLMODE fields + */ +#define FSI_LLMODE_ASYNC 0x1 + struct fsi_master; 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Thu, 15 Feb 2024 22:08:09 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay07.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 41FM86Vs28246772 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 15 Feb 2024 22:08:08 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6C4B658068; Thu, 15 Feb 2024 22:08:04 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 221995807C; Thu, 15 Feb 2024 22:08:04 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.14.18]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Thu, 15 Feb 2024 22:08:04 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 07/33] ARM: dts: aspeed: p10 and tacoma: Set FSI clock frequency Date: Thu, 15 Feb 2024 16:07:33 -0600 Message-Id: <20240215220759.976998-8-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Ik0cGHrb8l2VvYEzn685OGUWkJ05c1C8 X-Proofpoint-ORIG-GUID: Ik0cGHrb8l2VvYEzn685OGUWkJ05c1C8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=783 impostorscore=0 adultscore=0 suspectscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 Now that the driver doesn't hardcode the clock divider, set it in the device tree. Signed-off-by: Eddie James --- arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts | 1 + arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts index 213023bc5aec..96a8f727bc38 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts @@ -193,6 +193,7 @@ &fsim0 { #address-cells = <2>; #size-cells = <0>; + clock-frequency = <100000000>; fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi b/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi index cc466910bb52..a93a241d005a 100644 --- a/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi +++ b/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi @@ -8,6 +8,7 @@ &fsim0 { #size-cells = <0>; cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; 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Thu, 15 Feb 2024 22:08:09 GMT Received: from smtprelay02.dal12v.mail.ibm.com ([172.16.1.4]) by ppma12.dal12v.mail.ibm.com (PPS) with ESMTPS id 3w6kftyudu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 15 Feb 2024 22:08:09 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay02.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 41FM87F349414650 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 15 Feb 2024 22:08:09 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7D31F58080; Thu, 15 Feb 2024 22:08:05 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 315E758082; Thu, 15 Feb 2024 22:08:05 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.14.18]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Thu, 15 Feb 2024 22:08:05 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 10/33] fsi: aspeed: Add AST2700 support Date: Thu, 15 Feb 2024 16:07:36 -0600 Message-Id: <20240215220759.976998-11-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: lUQIpHZRxAjufZhvUTa8aRO5RhMkXiqI X-Proofpoint-GUID: lUQIpHZRxAjufZhvUTa8aRO5RhMkXiqI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 phishscore=0 mlxlogscore=999 clxscore=1015 impostorscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 AST2700 requires a few bits set differently in the OPB retry counter register, so add some match data and set the register accordingly. Signed-off-by: Eddie James --- drivers/fsi/fsi-master-aspeed.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index f0a19cd451a0..d6e923b8f501 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -18,6 +18,10 @@ #include "fsi-master.h" +struct fsi_master_aspeed_data { + u32 opb_retry_counter; +}; + struct fsi_master_aspeed { struct fsi_master master; struct mutex lock; /* protect HW access */ @@ -60,6 +64,8 @@ static const u32 fsi_base = 0xa0000000; #define OPB1_READ_ORDER2 0x60 #define OPB_RETRY_COUNTER 0x64 +#define OPB_RETRY_COUNTER_AST2600 0x00000010 +#define OPB_RETRY_COUNTER_AST2700 0x000c0010 /* OPBn_STATUS */ #define STATUS_HALFWORD_ACK BIT(0) @@ -536,6 +542,8 @@ static int tacoma_cabled_fsi_fixup(struct device *dev) static int fsi_master_aspeed_probe(struct platform_device *pdev) { + const struct fsi_master_aspeed_data *md = of_device_get_match_data(&pdev->dev); + u32 opb_retry_counter = md ? md->opb_retry_counter : OPB_RETRY_COUNTER_AST2600; struct fsi_master_aspeed *aspeed; int rc, links, reg; __be32 raw; @@ -579,8 +587,7 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) writel(OPB1_XFER_ACK_EN | OPB0_XFER_ACK_EN, aspeed->base + OPB_IRQ_MASK); - /* TODO: determine an appropriate value */ - writel(0x10, aspeed->base + OPB_RETRY_COUNTER); + writel(opb_retry_counter, aspeed->base + OPB_RETRY_COUNTER); writel(ctrl_base, aspeed->base + OPB_CTRL_BASE); writel(fsi_base, aspeed->base + OPB_FSI_BASE); @@ -656,8 +663,23 @@ static int fsi_master_aspeed_remove(struct platform_device *pdev) return 0; } +static const struct fsi_master_aspeed_data fsi_master_ast2600_data = { + .opb_retry_counter = OPB_RETRY_COUNTER_AST2600, +}; + +static const struct fsi_master_aspeed_data fsi_master_ast2700_data = { + .opb_retry_counter = OPB_RETRY_COUNTER_AST2700, +}; + static const struct of_device_id fsi_master_aspeed_match[] = { - { .compatible = "aspeed,ast2600-fsi-master" }, + { + .compatible = "aspeed,ast2600-fsi-master", + .data = &fsi_master_ast2600_data, + }, + { + .compatible = "aspeed,ast2700-fsi-master", + .data = &fsi_master_ast2700_data, + }, { }, }; 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Thu, 15 Feb 2024 22:08:10 GMT Received: from smtprelay02.dal12v.mail.ibm.com ([172.16.1.4]) by ppma22.wdc07v.mail.ibm.com (PPS) with ESMTPS id 3w6kv0qtmh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 15 Feb 2024 22:08:10 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay02.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 41FM87kN9306826 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 15 Feb 2024 22:08:09 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D031958072; Thu, 15 Feb 2024 22:08:05 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8570558086; Thu, 15 Feb 2024 22:08:05 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.14.18]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Thu, 15 Feb 2024 22:08:05 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 11/33] fsi: core: Add slave spinlock Date: Thu, 15 Feb 2024 16:07:37 -0600 Message-Id: <20240215220759.976998-12-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 1NXmfBBLW8NuuHvZgD0892lFSsN0VJSh X-Proofpoint-ORIG-GUID: 1NXmfBBLW8NuuHvZgD0892lFSsN0VJSh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 bulkscore=0 phishscore=0 adultscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 FSI slave operations were not locked, meaning that during slave error recovery operations, other slave accesses may take place, resulting in incorrect recovery and additional errors. Make the slave access and error recovery atomic with a spinlock. Don't use a mutex for future interrupt handling support. Signed-off-by: Eddie James --- drivers/fsi/fsi-core.c | 7 +++++++ drivers/fsi/fsi-slave.h | 2 ++ 2 files changed, 9 insertions(+) diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c index e6ed2d0773b6..eb15e5f5a2ee 100644 --- a/drivers/fsi/fsi-core.c +++ b/drivers/fsi/fsi-core.c @@ -304,6 +304,7 @@ static int fsi_slave_handle_error(struct fsi_slave *slave, bool write, int fsi_slave_read(struct fsi_slave *slave, uint32_t addr, void *val, size_t size) { + unsigned long flags; uint8_t id = slave->id; int rc, err_rc, i; @@ -311,6 +312,7 @@ int fsi_slave_read(struct fsi_slave *slave, uint32_t addr, if (rc) return rc; + spin_lock_irqsave(&slave->lock, flags); for (i = 0; i < slave_retries; i++) { rc = fsi_master_read(slave->master, slave->link, id, addr, val, size); @@ -321,6 +323,7 @@ int fsi_slave_read(struct fsi_slave *slave, uint32_t addr, if (err_rc) break; } + spin_unlock_irqrestore(&slave->lock, flags); return rc; } @@ -329,6 +332,7 @@ EXPORT_SYMBOL_GPL(fsi_slave_read); int fsi_slave_write(struct fsi_slave *slave, uint32_t addr, const void *val, size_t size) { + unsigned long flags; uint8_t id = slave->id; int rc, err_rc, i; @@ -336,6 +340,7 @@ int fsi_slave_write(struct fsi_slave *slave, uint32_t addr, if (rc) return rc; + spin_lock_irqsave(&slave->lock, flags); for (i = 0; i < slave_retries; i++) { rc = fsi_master_write(slave->master, slave->link, id, addr, val, size); @@ -346,6 +351,7 @@ int fsi_slave_write(struct fsi_slave *slave, uint32_t addr, if (err_rc) break; } + spin_unlock_irqrestore(&slave->lock, flags); return rc; } @@ -1005,6 +1011,7 @@ static int fsi_slave_init(struct fsi_master *master, int link, uint8_t id) if (!slave) return -ENOMEM; + spin_lock_init(&slave->lock); dev_set_name(&slave->dev, "slave@%02x:%02x", link, id); slave->dev.type = &cfam_type; slave->dev.parent = &master->dev; diff --git a/drivers/fsi/fsi-slave.h b/drivers/fsi/fsi-slave.h index 42af2fae0329..6f8fb97023fb 100644 --- a/drivers/fsi/fsi-slave.h +++ b/drivers/fsi/fsi-slave.h @@ -6,6 +6,7 @@ #include #include +#include #define FSI_SLAVE_BASE 0x800 @@ -100,6 +101,7 @@ struct fsi_slave { struct device dev; struct fsi_master *master; struct cdev cdev; + spinlock_t lock; /* atomic access and error recovery */ int cdev_idx; int id; /* FSI address */ int link; /* FSI link# */ From patchwork Thu Feb 15 22:07:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773133 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D58414A4C1; Thu, 15 Feb 2024 22:08:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.158.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708034916; cv=none; b=QW/cdZYrD+PjAU9MrDu8B0Ykk7bnt9RCUWWuEywE0iPHXWbV94dihxPPude2S/gbaXtcwtPw1EEEL24ajqVksJ+um5xHMbLVc7umgRXVawab+qc/JNCBIHiWhcTCcCGl7KGKcl+LSmcVzgWRsARBuZbbYdLQYc1iduJ8Hy68WhU= ARC-Message-Signature: i=1; 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Thu, 15 Feb 2024 22:08:09 GMT Received: from smtprelay03.dal12v.mail.ibm.com ([172.16.1.5]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 3w6mymyhc8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 15 Feb 2024 22:08:09 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay03.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 41FM86nM35782988 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 15 Feb 2024 22:08:08 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8F00758077; Thu, 15 Feb 2024 22:08:06 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3948E5807B; Thu, 15 Feb 2024 22:08:06 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.14.18]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Thu, 15 Feb 2024 22:08:06 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 13/33] fsi: core: Add common regmap master functions Date: Thu, 15 Feb 2024 16:07:39 -0600 Message-Id: <20240215220759.976998-14-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: T7DeW3ZIPTcxULpAgB0Xn3S3Tcr74UPr X-Proofpoint-ORIG-GUID: T7DeW3ZIPTcxULpAgB0Xn3S3Tcr74UPr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=999 impostorscore=0 adultscore=0 suspectscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 For hardware FSI masters (Aspeed and hub at the moment), the initialization, link enable, and error recovery procedures are common. Add a regmap pointer to the master structure so that master drivers can let the common code handle these procedures. Signed-off-by: Eddie James --- drivers/fsi/Kconfig | 2 + drivers/fsi/fsi-core.c | 161 ++++++++++++++++++++++++++++++++++++- drivers/fsi/fsi-master.h | 16 ++++ include/trace/events/fsi.h | 17 ++++ 4 files changed, 194 insertions(+), 2 deletions(-) diff --git a/drivers/fsi/Kconfig b/drivers/fsi/Kconfig index 79a31593618a..a6760870538d 100644 --- a/drivers/fsi/Kconfig +++ b/drivers/fsi/Kconfig @@ -7,6 +7,7 @@ menuconfig FSI tristate "FSI support" depends on OF select CRC4 + select REGMAP help FSI - the FRU Support Interface - is a simple bus for low-level access to POWER-based hardware. @@ -37,6 +38,7 @@ config FSI_MASTER_GPIO config FSI_MASTER_HUB tristate "FSI hub master" + select REGMAP_FSI help This option enables a FSI hub master driver. Hub is a type of FSI master that is connected to the upstream master via a slave. Hubs diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c index 95f6ce81f8f4..693e7c51b4af 100644 --- a/drivers/fsi/fsi-core.c +++ b/drivers/fsi/fsi-core.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -1148,18 +1149,50 @@ static int fsi_master_write(struct fsi_master *master, int link, return rc; } +int fsi_master_link_enable(struct fsi_master *master, int link, bool enable) +{ + u32 msiep = 0x80000000 >> (4 * (link % 8)); + u32 menp = 0x80000000 >> (link % 32); + int enable_idx = 4 * (link / 32); + int irq_idx = 4 * (link / 8); + int rc; + + if (enable) { + rc = regmap_write(master->map, FSI_MSENP0 + enable_idx, menp); + if (rc) + return rc; + + mdelay(FSI_LINK_ENABLE_SETUP_TIME); + + rc = regmap_write(master->map, FSI_MSSIEP0 + irq_idx, msiep); + } else { + rc = regmap_write(master->map, FSI_MCSIEP0 + irq_idx, msiep); + if (rc) + return rc; + + rc = regmap_write(master->map, FSI_MCENP0 + enable_idx, menp); + } + + return rc; +} +EXPORT_SYMBOL_GPL(fsi_master_link_enable); + static int fsi_master_link_disable(struct fsi_master *master, int link) { if (master->link_enable) return master->link_enable(master, link, false); + else if (master->map) + return fsi_master_link_enable(master, link, false); return 0; } -static int fsi_master_link_enable(struct fsi_master *master, int link) +static int _fsi_master_link_enable(struct fsi_master *master, int link) { if (master->link_enable) return master->link_enable(master, link, true); + else if (master->map) + return fsi_master_link_enable(master, link, true); return 0; } @@ -1187,7 +1220,7 @@ static int fsi_master_scan(struct fsi_master *master) trace_fsi_master_scan(master, true); for (link = 0; link < master->n_links; link++) { - rc = fsi_master_link_enable(master, link); + rc = _fsi_master_link_enable(master, link); if (rc) { dev_dbg(&master->dev, "enable link %d failed: %d\n", link, rc); @@ -1284,6 +1317,130 @@ static struct class fsi_master_class = { .dev_groups = master_groups, }; +void fsi_master_error(struct fsi_master *master, int link) +{ + u32 bits = FSI_MMODE_EIP | FSI_MMODE_RELA; + bool mmode = master->mmode & bits; + + if (trace_fsi_master_error_regs_enabled()) { + unsigned int mesrb = 0xffffffff; + unsigned int mstap = 0xffffffff; + + regmap_read(master->map, FSI_MESRB0, &mesrb); + regmap_read(master->map, FSI_MSTAP0 + (link * 4), &mstap); + + trace_fsi_master_error_regs(master->idx, mesrb, mstap); + } + + if (mmode) + regmap_write(master->map, FSI_MMODE, master->mmode & ~bits); + + regmap_write(master->map, FSI_MRESP0, FSI_MRESP_RST_ALL_MASTER); + + if (mmode) + regmap_write(master->map, FSI_MMODE, master->mmode); +} +EXPORT_SYMBOL_GPL(fsi_master_error); + +static inline u32 fsi_mmode_crs0(u32 x) +{ + return (x & FSI_MMODE_CRS0MASK) << FSI_MMODE_CRS0SHFT; +} + +static inline u32 fsi_mmode_crs1(u32 x) +{ + return (x & FSI_MMODE_CRS1MASK) << FSI_MMODE_CRS1SHFT; +} + +int fsi_master_init(struct fsi_master *master, unsigned long parent_clock_frequency) +{ + unsigned int mlevp; + unsigned int maeb; + int div = 1; + int rc; + + if (parent_clock_frequency) { + u32 clock_frequency = parent_clock_frequency; + + if (!device_property_read_u32(&master->dev, "clock-frequency", &clock_frequency)) { + if (!clock_frequency) + clock_frequency = parent_clock_frequency; + } + + div = (parent_clock_frequency + (clock_frequency - 1)) / clock_frequency; + master->clock_frequency = parent_clock_frequency / div; + } + + rc = regmap_write(master->map, FSI_MRESP0, FSI_MRESP_RST_ALL_MASTER | + FSI_MRESP_RST_ALL_LINK | FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE); + if (rc) + return rc; + + rc = regmap_write(master->map, FSI_MECTRL, FSI_MECTRL_EOAE | FSI_MECTRL_P8_AUTO_TERM); + if (rc) + return rc; + + master->mmode = FSI_MMODE_ECRC | FSI_MMODE_EPC | fsi_mmode_crs0(div) | + fsi_mmode_crs1(div) | FSI_MMODE_P8_TO_LSB; + rc = regmap_write(master->map, FSI_MMODE, master->mmode); + if (rc) + return rc; + + rc = regmap_write(master->map, FSI_MDLYR, 0xffff0000); + if (rc) + return rc; + + rc = regmap_write(master->map, FSI_MSENP0, 0xffffffff); + if (rc) + return rc; + + mdelay(FSI_LINK_ENABLE_SETUP_TIME); + + rc = regmap_write(master->map, FSI_MCENP0, 0xffffffff); + if (rc) + return rc; + + rc = regmap_read(master->map, FSI_MAEB, &maeb); + if (rc) + return rc; + + rc = regmap_write(master->map, FSI_MRESP0, FSI_MRESP_RST_ALL_MASTER | + FSI_MRESP_RST_ALL_LINK); + if (rc) + return rc; + + rc = regmap_read(master->map, FSI_MLEVP0, &mlevp); + if (rc) + return rc; + + rc = regmap_write(master->map, FSI_MRESB0, FSI_MRESB_RST_GEN); + if (rc) + return rc; + + rc = regmap_write(master->map, FSI_MRESB0, FSI_MRESB_RST_ERR); + if (rc) + return rc; + + if (master->flags & FSI_MASTER_FLAG_INTERRUPT) + master->mmode |= FSI_MMODE_EIP; + if (master->flags & FSI_MASTER_FLAG_RELA) + master->mmode |= FSI_MMODE_RELA; + return regmap_write(master->map, FSI_MMODE, master->mmode); +} +EXPORT_SYMBOL_GPL(fsi_master_init); + +void fsi_master_regmap_config(struct regmap_config *config) +{ + config->reg_bits = 32; + config->val_bits = 32; + config->disable_locking = true; // master driver will lock + config->fast_io = true; + config->cache_type = REGCACHE_NONE; + config->val_format_endian = REGMAP_ENDIAN_NATIVE; + config->can_sleep = false; +} +EXPORT_SYMBOL_GPL(fsi_master_regmap_config); + int fsi_master_register(struct fsi_master *master) { int rc; diff --git a/drivers/fsi/fsi-master.h b/drivers/fsi/fsi-master.h index 26e636ad9ef6..f4cecdff3834 100644 --- a/drivers/fsi/fsi-master.h +++ b/drivers/fsi/fsi-master.h @@ -27,6 +27,9 @@ #define FSI_MLEVP0 0x18 /* R: plug detect */ #define FSI_MSENP0 0x18 /* S: Set enable */ #define FSI_MCENP0 0x20 /* C: Clear enable */ +#define FSI_MSIEP0 0x30 /* R/W: interrupt enable */ +#define FSI_MSSIEP0 0x50 /* S: Set interrupt enable */ +#define FSI_MCSIEP0 0x70 /* C: Clear interrupt enable */ #define FSI_MAEB 0x70 /* R: Error address */ #define FSI_MVER 0x74 /* R: master version/type */ #define FSI_MSTAP0 0xd0 /* R: Port status */ @@ -108,9 +111,15 @@ /* Misc */ #define FSI_CRC_SIZE 4 +#define FSI_LINK_ENABLE_SETUP_TIME 10 /* in mS */ /* fsi-master definition and flags */ #define FSI_MASTER_FLAG_SWCLOCK 0x1 +#define FSI_MASTER_FLAG_INTERRUPT 0x2 +#define FSI_MASTER_FLAG_RELA 0x4 + +struct regmap; +struct regmap_config; /* * Structures and function prototypes @@ -120,6 +129,8 @@ struct fsi_master { struct device dev; + struct regmap *map; + u32 mmode; unsigned long clock_frequency; int lbus_divider; int idx; @@ -140,6 +151,11 @@ struct fsi_master { #define to_fsi_master(d) container_of(d, struct fsi_master, dev) +void fsi_master_error(struct fsi_master *master, int link); +int fsi_master_init(struct fsi_master *master, unsigned long parent_clock_frequency); +int fsi_master_link_enable(struct fsi_master *master, int link, bool enable); +void fsi_master_regmap_config(struct regmap_config *config); + /** * fsi_master registration & lifetime: the fsi_master_register() and * fsi_master_unregister() functions will take ownership of the master, and diff --git a/include/trace/events/fsi.h b/include/trace/events/fsi.h index 5509afc98ee8..da977d59e163 100644 --- a/include/trace/events/fsi.h +++ b/include/trace/events/fsi.h @@ -67,6 +67,23 @@ TRACE_EVENT(fsi_master_error, &__entry->data, __entry->ret) ); +TRACE_EVENT(fsi_master_error_regs, + TP_PROTO(int master_idx, uint32_t mesrb, uint32_t mstap), + TP_ARGS(master_idx, mesrb, mstap), + TP_STRUCT__entry( + __field(int, master_idx) + __field(uint32_t, mesrb) + __field(uint32_t, mstap) + ), + TP_fast_assign( + __entry->master_idx = master_idx; + __entry->mesrb = mesrb; + __entry->mstap = mstap; + ), + TP_printk("fsi%d mesrb:%08x mstap:%08x", __entry->master_idx, __entry->mesrb, + __entry->mstap) +); + TRACE_EVENT(fsi_master_break, TP_PROTO(const struct fsi_master *master, int link), TP_ARGS(master, link), From patchwork Thu Feb 15 22:07:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773141 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B8111468E1; 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Thu, 15 Feb 2024 22:08:07 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 17/33] fsi: aspeed: Refactor trace functions Date: Thu, 15 Feb 2024 16:07:43 -0600 Message-Id: <20240215220759.976998-18-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: NNFDo-IrKkgOZ1em8O8Z2QNTGEKbtblX X-Proofpoint-ORIG-GUID: NNFDo-IrKkgOZ1em8O8Z2QNTGEKbtblX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 malwarescore=0 spamscore=0 mlxlogscore=914 bulkscore=0 phishscore=0 adultscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 Remove the opb error trace, add a timeout trace, and combine the read/write traces. Signed-off-by: Eddie James --- drivers/fsi/fsi-master-aspeed.c | 29 +++------ include/trace/events/fsi_master_aspeed.h | 80 ++++++++---------------- 2 files changed, 34 insertions(+), 75 deletions(-) diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index c36e7e49e965..1a91f3acdfcc 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -116,16 +116,17 @@ static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr, status = readl(base + OPB0_STATUS); - trace_fsi_master_aspeed_opb_write(addr, val, transfer_size, status, reg); - /* Return error when poll timed out */ - if (ret) + if (ret) { + trace_fsi_master_aspeed_timeout(reg, status, false); return ret; + } /* Command failed, master will reset */ if (status & STATUS_ERR_ACK) return -EIO; + trace_fsi_master_aspeed_opb_xfer(addr, transfer_size + 1, val, false); return 0; } @@ -169,13 +170,11 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr, result = readl(base + OPB0_FSI_DATA_R); - trace_fsi_master_aspeed_opb_read(addr, transfer_size, result, - readl(base + OPB0_STATUS), - reg); - /* Return error when poll timed out */ - if (ret) + if (ret) { + trace_fsi_master_aspeed_timeout(reg, status, true); return ret; + } /* Command failed, master will reset */ if (status & STATUS_ERR_ACK) @@ -198,6 +197,7 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr, } + trace_fsi_master_aspeed_opb_xfer(addr, transfer_size + 1, result, true); return 0; } @@ -220,19 +220,6 @@ static int check_errors(struct fsi_master_aspeed *aspeed, int err) { int ret; - if (trace_fsi_master_aspeed_opb_error_enabled()) { - __be32 mresp0, mstap0, mesrb0; - - opb_readl(aspeed, ctrl_base + FSI_MRESP0, &mresp0); - opb_readl(aspeed, ctrl_base + FSI_MSTAP0, &mstap0); - opb_readl(aspeed, ctrl_base + FSI_MESRB0, &mesrb0); - - trace_fsi_master_aspeed_opb_error( - be32_to_cpu(mresp0), - be32_to_cpu(mstap0), - be32_to_cpu(mesrb0)); - } - if (err == -EIO) { /* Check MAEB (0x70) ? */ diff --git a/include/trace/events/fsi_master_aspeed.h b/include/trace/events/fsi_master_aspeed.h index 0fff873775f1..7eeecbfec7f0 100644 --- a/include/trace/events/fsi_master_aspeed.h +++ b/include/trace/events/fsi_master_aspeed.h @@ -8,69 +8,41 @@ #include -TRACE_EVENT(fsi_master_aspeed_opb_read, - TP_PROTO(uint32_t addr, size_t size, uint32_t result, uint32_t status, uint32_t irq_status), - TP_ARGS(addr, size, result, status, irq_status), +TRACE_EVENT(fsi_master_aspeed_opb_xfer, + TP_PROTO(uint32_t addr, uint32_t size, uint32_t data, bool read), + TP_ARGS(addr, size, data, read), TP_STRUCT__entry( - __field(uint32_t, addr) - __field(size_t, size) - __field(uint32_t, result) - __field(uint32_t, status) - __field(uint32_t, irq_status) - ), + __field(uint32_t, addr) + __field(uint32_t, size) + __field(uint32_t, data) + __field(bool, read) + ), TP_fast_assign( __entry->addr = addr; __entry->size = size; - __entry->result = result; - __entry->status = status; - __entry->irq_status = irq_status; - ), - TP_printk("addr %08x size %zu: result %08x sts: %08x irq_sts: %08x", - __entry->addr, __entry->size, __entry->result, - __entry->status, __entry->irq_status - ) + __entry->data = data; + __entry->read = read; + ), + TP_printk("%s addr %08x size %u data %08x", __entry->read ? "read" : "write", + __entry->addr, __entry->size, __entry->data) ); -TRACE_EVENT(fsi_master_aspeed_opb_write, - TP_PROTO(uint32_t addr, uint32_t val, size_t size, uint32_t status, uint32_t irq_status), - TP_ARGS(addr, val, size, status, irq_status), +TRACE_EVENT(fsi_master_aspeed_timeout, + TP_PROTO(uint32_t irq, uint32_t status, bool read), + TP_ARGS(irq, status, read), TP_STRUCT__entry( - __field(uint32_t, addr) - __field(uint32_t, val) - __field(size_t, size) - __field(uint32_t, status) - __field(uint32_t, irq_status) - ), + __field(uint32_t, irq) + __field(uint32_t, status) + __field(bool, read) + ), TP_fast_assign( - __entry->addr = addr; - __entry->val = val; - __entry->size = size; + __entry->irq = irq; __entry->status = status; - __entry->irq_status = irq_status; - ), - TP_printk("addr %08x val %08x size %zu status: %08x irq_sts: %08x", - __entry->addr, __entry->val, __entry->size, - __entry->status, __entry->irq_status - ) - ); - -TRACE_EVENT(fsi_master_aspeed_opb_error, - TP_PROTO(uint32_t mresp0, uint32_t mstap0, uint32_t mesrb0), - TP_ARGS(mresp0, mstap0, mesrb0), - TP_STRUCT__entry( - __field(uint32_t, mresp0) - __field(uint32_t, mstap0) - __field(uint32_t, mesrb0) - ), - TP_fast_assign( - __entry->mresp0 = mresp0; - __entry->mstap0 = mstap0; - __entry->mesrb0 = mesrb0; - ), - TP_printk("mresp0 %08x mstap0 %08x mesrb0 %08x", - __entry->mresp0, __entry->mstap0, __entry->mesrb0 - ) - ); + __entry->read = read; + ), + TP_printk("%s irq %08x status %08x", __entry->read ? "read" : "write", __entry->irq, + __entry->status) +); TRACE_EVENT(fsi_master_aspeed_cfam_reset, TP_PROTO(bool start), From patchwork Thu Feb 15 22:07:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773144 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80902145FE3; Thu, 15 Feb 2024 22:08:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.158.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708034907; cv=none; b=qdSoRRQtt6p8votZylQJHf9ItnoIRlZMopAfdXwnHY7xfRcQ338wVCTk4LSfUeh0sJTpJIIwMSqjKjhCE9zwOH9h3XHeT6vFHKtaJZEyf3DVUV7jFtpeEpDqArTIdezig9GpttuDqXzddj+RuuQBpBJ9q2WkHGgyLtWdieAoxXY= ARC-Message-Signature: i=1; a=rsa-sha256; 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Thu, 15 Feb 2024 22:08:10 GMT Received: from smtprelay07.dal12v.mail.ibm.com ([172.16.1.9]) by ppma11.dal12v.mail.ibm.com (PPS) with ESMTPS id 3w6p6374qp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 15 Feb 2024 22:08:10 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay07.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 41FM88NU51905198 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 15 Feb 2024 22:08:10 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 546B85803F; Thu, 15 Feb 2024 22:08:08 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1432D58079; Thu, 15 Feb 2024 22:08:08 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.14.18]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Thu, 15 Feb 2024 22:08:08 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 18/33] fsi: aspeed: Don't clear all IRQs during OPB transfers Date: Thu, 15 Feb 2024 16:07:44 -0600 Message-Id: <20240215220759.976998-19-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 5UIetqF6FNCMnR2m7GAX3Uay-smOZhuE X-Proofpoint-GUID: 5UIetqF6FNCMnR2m7GAX3Uay-smOZhuE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 phishscore=0 mlxlogscore=999 clxscore=1015 impostorscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 In order to support FSI interrupts, the OPB transfer functions should not clear all the IRQs pending. Instead, just write the OPB ACK bit to the IRQ status register. As commented, this register invisibly masks the interrupt once the interrupt condition is cleared. Fix this by writing 0 before each OPB transfer. Signed-off-by: Eddie James --- drivers/fsi/fsi-master-aspeed.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index 1a91f3acdfcc..64a5407a15ec 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -46,6 +46,11 @@ static const u32 fsi_base = 0xa0000000; #define OPB_CLK_SYNC 0x3c #define OPB_IRQ_CLEAR 0x40 #define OPB_IRQ_MASK 0x44 +/* + * This register does NOT behave in the expected manner. It is expected that writing 1b would clear + * the corresponding interrupt condition. However it also invisibly masks the interrupt! Writing 0b + * unmasks again. + */ #define OPB_IRQ_STATUS 0x48 #define OPB0_SELECT 0x10 @@ -64,8 +69,8 @@ static const u32 fsi_base = 0xa0000000; #define OPB1_READ_ORDER2 0x60 #define OPB_RETRY_COUNTER 0x64 -#define OPB_RETRY_COUNTER_AST2600 0x00000010 -#define OPB_RETRY_COUNTER_AST2700 0x000c0010 +#define OPB_RETRY_COUNTER_AST2600 0x00010010 +#define OPB_RETRY_COUNTER_AST2700 0x000d0010 /* OPBn_STATUS */ #define STATUS_HALFWORD_ACK BIT(0) @@ -107,13 +112,14 @@ static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr, writel_relaxed(transfer_size, base + OPB0_XFER_SIZE); writel_relaxed(addr, base + OPB0_FSI_ADDR); writel_relaxed(val, base + OPB0_FSI_DATA_W); - writel_relaxed(0x1, base + OPB_IRQ_CLEAR); + writel_relaxed(0, base + OPB_IRQ_STATUS); writel(0x1, base + OPB_TRIGGER); ret = readl_poll_timeout(base + OPB_IRQ_STATUS, reg, (reg & OPB0_XFER_ACK_EN) != 0, 0, OPB_POLL_TIMEOUT); + writel(OPB0_XFER_ACK_EN, base + OPB_IRQ_STATUS); status = readl(base + OPB0_STATUS); /* Return error when poll timed out */ @@ -159,13 +165,14 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr, writel_relaxed(CMD_READ, base + OPB0_RW); writel_relaxed(transfer_size, base + OPB0_XFER_SIZE); writel_relaxed(addr, base + OPB0_FSI_ADDR); - writel_relaxed(0x1, base + OPB_IRQ_CLEAR); + writel_relaxed(0, aspeed->base + OPB_IRQ_STATUS); writel(0x1, base + OPB_TRIGGER); ret = readl_poll_timeout(base + OPB_IRQ_STATUS, reg, (reg & OPB0_XFER_ACK_EN) != 0, 0, OPB_POLL_TIMEOUT); + writel(OPB0_XFER_ACK_EN, base + OPB_IRQ_STATUS); status = readl(base + OPB0_STATUS); result = readl(base + OPB0_FSI_DATA_R); @@ -489,8 +496,6 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) } writel(0x1, aspeed->base + OPB_CLK_SYNC); - writel(OPB1_XFER_ACK_EN | OPB0_XFER_ACK_EN, - aspeed->base + OPB_IRQ_MASK); writel(opb_retry_counter, aspeed->base + OPB_RETRY_COUNTER); From patchwork Thu Feb 15 22:07:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773142 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85B8F1468E5; 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Thu, 15 Feb 2024 22:08:08 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 19/33] fsi: aspeed: Only read result register for successful read Date: Thu, 15 Feb 2024 16:07:45 -0600 Message-Id: <20240215220759.976998-20-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: r6Q28LyMcXJ1VHOef_sDs1gUTO3TLGow X-Proofpoint-ORIG-GUID: r6Q28LyMcXJ1VHOef_sDs1gUTO3TLGow X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 bulkscore=0 phishscore=0 adultscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 No reason to read the result in the error path, and remove the null pointer check on the output, as it should never be null. Signed-off-by: Eddie James --- drivers/fsi/fsi-master-aspeed.c | 29 +++++++++++++---------------- 1 file changed, 13 insertions(+), 16 deletions(-) diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index 64a5407a15ec..83f84ee6d6f4 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -175,8 +175,6 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr, writel(OPB0_XFER_ACK_EN, base + OPB_IRQ_STATUS); status = readl(base + OPB0_STATUS); - result = readl(base + OPB0_FSI_DATA_R); - /* Return error when poll timed out */ if (ret) { trace_fsi_master_aspeed_timeout(reg, status, true); @@ -187,21 +185,20 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr, if (status & STATUS_ERR_ACK) return -EIO; - if (out) { - switch (transfer_size) { - case XFER_BYTE: - *(u8 *)out = result; - break; - case XFER_HALFWORD: - *(u16 *)out = result; - break; - case XFER_FULLWORD: - *(u32 *)out = result; - break; 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Thu, 15 Feb 2024 22:08:08 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 20/33] fsi: aspeed: Switch to spinlock Date: Thu, 15 Feb 2024 16:07:46 -0600 Message-Id: <20240215220759.976998-21-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: kCcQoYcjx-H77gRE48q4mt9faj7S84xb X-Proofpoint-GUID: kCcQoYcjx-H77gRE48q4mt9faj7S84xb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 phishscore=0 mlxlogscore=999 clxscore=1015 impostorscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 In preparation for interrupt support, switch to a spinlock rather than a mutex. Signed-off-by: Eddie James --- drivers/fsi/fsi-master-aspeed.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index 83f84ee6d6f4..1cb5bf6c05d2 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -8,11 +8,11 @@ #include #include #include -#include #include #include #include #include +#include #include #include @@ -24,7 +24,7 @@ struct fsi_master_aspeed_data { struct fsi_master_aspeed { struct fsi_master master; - struct mutex lock; /* protect HW access */ + spinlock_t lock; /* protect HW access */ struct device *dev; void __iomem *base; struct clk *clk; @@ -245,6 +245,7 @@ static int aspeed_master_read(struct fsi_master *master, int link, uint8_t id, uint32_t addr, void *val, size_t size) { struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master); + unsigned long flags; int ret; if (id > 0x3) @@ -253,7 +254,7 @@ static int aspeed_master_read(struct fsi_master *master, int link, addr |= id << 21; addr += link * FSI_HUB_LINK_SIZE; - mutex_lock(&aspeed->lock); + spin_lock_irqsave(&aspeed->lock, flags); switch (size) { case 1: @@ -272,7 +273,7 @@ static int aspeed_master_read(struct fsi_master *master, int link, ret = check_errors(aspeed, ret); done: - mutex_unlock(&aspeed->lock); + spin_unlock_irqrestore(&aspeed->lock, flags); return ret; } @@ -280,6 +281,7 @@ static int aspeed_master_write(struct fsi_master *master, int link, uint8_t id, uint32_t addr, const void *val, size_t size) { struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master); + unsigned long flags; int ret; if (id > 0x3) @@ -288,7 +290,7 @@ static int aspeed_master_write(struct fsi_master *master, int link, addr |= id << 21; addr += link * FSI_HUB_LINK_SIZE; - mutex_lock(&aspeed->lock); + spin_lock_irqsave(&aspeed->lock, flags); switch (size) { case 1: @@ -307,7 +309,7 @@ static int aspeed_master_write(struct fsi_master *master, int link, ret = check_errors(aspeed, ret); done: - mutex_unlock(&aspeed->lock); + spin_unlock_irqrestore(&aspeed->lock, flags); return ret; } @@ -369,15 +371,16 @@ static ssize_t cfam_reset_store(struct device *dev, struct device_attribute *att const char *buf, size_t count) { struct fsi_master_aspeed *aspeed = dev_get_drvdata(dev); + unsigned long flags; trace_fsi_master_aspeed_cfam_reset(true); - mutex_lock(&aspeed->lock); + spin_lock_irqsave(&aspeed->lock, flags); gpiod_set_value(aspeed->cfam_reset_gpio, 1); - usleep_range(900, 1000); + udelay(900); gpiod_set_value(aspeed->cfam_reset_gpio, 0); - usleep_range(900, 1000); + udelay(900); opb_writel(aspeed, ctrl_base + FSI_MRESP0, cpu_to_be32(FSI_MRESP_RST_ALL_MASTER)); - mutex_unlock(&aspeed->lock); + spin_unlock_irqrestore(&aspeed->lock, flags); trace_fsi_master_aspeed_cfam_reset(false); return count; @@ -468,6 +471,7 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) return -ENOMEM; aspeed->dev = &pdev->dev; + spin_lock_init(&aspeed->lock); aspeed->base = devm_platform_ioremap_resource(pdev, 0); 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Signed-off-by: Eddie James --- drivers/fsi/fsi-master-aspeed.c | 27 ++++----------------------- 1 file changed, 4 insertions(+), 23 deletions(-) diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index 92b47bc9917a..ac8835e4d1f8 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -220,27 +220,6 @@ static int opb_readb(struct fsi_master_aspeed *aspeed, uint32_t addr, u8 *out) return __opb_read(aspeed, addr, XFER_BYTE, (void *)out); } -static int check_errors(struct fsi_master_aspeed *aspeed, int err) -{ - int ret; - - if (err == -EIO) { - /* Check MAEB (0x70) ? */ - - /* Then clear errors in master */ - ret = opb_writel(aspeed, ctrl_base + FSI_MRESP0, - cpu_to_be32(FSI_MRESP_RST_ALL_MASTER)); - if (ret) { - /* TODO: log? return different code? */ - return ret; - } - /* TODO: confirm that 0x70 was okay */ - } - - /* This will pass through timeout errors */ - return err; -} - static int aspeed_master_read(struct fsi_master *master, int link, uint8_t id, uint32_t addr, void *val, size_t size) { @@ -271,7 +250,8 @@ static int aspeed_master_read(struct fsi_master *master, int link, goto done; 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Thu, 15 Feb 2024 22:08:10 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 24/33] fsi: aspeed: Add interrupt support Date: Thu, 15 Feb 2024 16:07:50 -0600 Message-Id: <20240215220759.976998-25-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: bM638bld7yVVOlAalSevQXK-XCCphuBS X-Proofpoint-GUID: bM638bld7yVVOlAalSevQXK-XCCphuBS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 mlxlogscore=841 bulkscore=0 malwarescore=0 adultscore=0 phishscore=0 suspectscore=0 impostorscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 Handle slave interrupts and pass them to the FSI core. Signed-off-by: Eddie James --- drivers/fsi/fsi-master-aspeed.c | 104 ++++++++++++++++++++++- include/trace/events/fsi_master_aspeed.h | 12 +++ 2 files changed, 114 insertions(+), 2 deletions(-) diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index ac8835e4d1f8..ce16ea65f65d 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -6,6 +6,8 @@ #include #include #include +#include +#include #include #include #include @@ -25,10 +27,12 @@ struct fsi_master_aspeed_data { struct fsi_master_aspeed { struct fsi_master master; spinlock_t lock; /* protect HW access */ + struct irq_domain *irq_domain; struct device *dev; void __iomem *base; struct clk *clk; struct gpio_desc *cfam_reset_gpio; + u32 irq_mask; }; #define to_fsi_master_aspeed(m) \ @@ -80,6 +84,11 @@ static const u32 fsi_base = 0xa0000000; #define STATUS_TIMEOUT BIT(4) /* OPB_IRQ_MASK */ +#define FSI_MASTER_ERROR_IRQ BIT(28) +#define FSI_PORT_ERROR_IRQ BIT(27) +#define FSI_HOTPLUG_IRQ BIT(26) +#define FSI_REMOTE_SLV_IRQ(l) (BIT(FSI_REMOTE_SLV_IRQ_BIT) << (l)) +#define FSI_REMOTE_SLV_IRQ_BIT 18 #define OPB1_XFER_ACK_EN BIT(17) #define OPB0_XFER_ACK_EN BIT(16) @@ -316,11 +325,76 @@ static int aspeed_master_break(struct fsi_master *master, int link) return aspeed_master_write(master, link, 0, addr, &cmd, 4); } +static int aspeed_master_link_enable(struct fsi_master *master, int link, bool enable) +{ + struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master); + unsigned long flags; + int rc; + + spin_lock_irqsave(&aspeed->lock, flags); + if (enable) { + rc = fsi_master_link_enable(master, link, enable); + if (rc) + goto done; + + aspeed->irq_mask |= FSI_REMOTE_SLV_IRQ(link); + writel(aspeed->irq_mask, aspeed->base + OPB_IRQ_MASK); + } else { + aspeed->irq_mask &= ~FSI_REMOTE_SLV_IRQ(link); + writel(aspeed->irq_mask, aspeed->base + OPB_IRQ_MASK); + + rc = fsi_master_link_enable(master, link, enable); + } + +done: + spin_unlock_irqrestore(&aspeed->lock, flags); + return rc; +} + +static irqreturn_t aspeed_master_irq(int irq, void *data) +{ + struct fsi_master_aspeed *aspeed = data; + unsigned long size = FSI_REMOTE_SLV_IRQ_BIT + aspeed->master.n_links; + unsigned long bit = FSI_REMOTE_SLV_IRQ_BIT; + unsigned long status; + + status = readl(aspeed->base + OPB_IRQ_STATUS); + writel(0, aspeed->base + OPB_IRQ_MASK); + + for_each_set_bit_from(bit, &status, size) + fsi_master_irq(&aspeed->master, aspeed->irq_domain, bit - FSI_REMOTE_SLV_IRQ_BIT); + + writel(status, aspeed->base + OPB_IRQ_STATUS); + writel(0, aspeed->base + OPB_IRQ_STATUS); + writel(aspeed->irq_mask, aspeed->base + OPB_IRQ_MASK); + + trace_fsi_master_aspeed_irq(status); + return IRQ_HANDLED; +} + +static int aspeed_master_irqd_map(struct irq_domain *domain, unsigned int irq, + irq_hw_number_t hwirq) +{ + struct fsi_master_aspeed *aspeed = domain->host_data; + + irq_set_chip_and_handler(irq, &aspeed->master.irq_chip, handle_simple_irq); + irq_set_chip_data(irq, &aspeed->master); + + return 0; +} + +static const struct irq_domain_ops aspeed_master_irq_domain_ops = { + .map = aspeed_master_irqd_map, +}; + static void aspeed_master_release(struct device *dev) { struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(to_fsi_master(dev)); + if (aspeed->irq_domain) + irq_domain_remove(aspeed->irq_domain); + regmap_exit(aspeed->master.map); kfree(aspeed); } @@ -447,6 +521,7 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) struct fsi_master_aspeed *aspeed; unsigned int reg; int rc, links; + int irq; rc = tacoma_cabled_fsi_fixup(&pdev->dev); if (rc) { @@ -527,11 +602,12 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) aspeed->master.dev.of_node = of_node_get(dev_of_node(&pdev->dev)); aspeed->master.n_links = links; - aspeed->master.flags = FSI_MASTER_FLAG_RELA; + aspeed->master.flags = FSI_MASTER_FLAG_INTERRUPT | FSI_MASTER_FLAG_RELA; aspeed->master.read = aspeed_master_read; aspeed->master.write = aspeed_master_write; aspeed->master.send_break = aspeed_master_break; aspeed->master.term = aspeed_master_term; + aspeed->master.link_enable = aspeed_master_link_enable; dev_set_drvdata(&pdev->dev, aspeed); @@ -539,9 +615,30 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) if (rc) goto err_regmap; + irq = platform_get_irq(pdev, 0); + if (irq > 0) { + unsigned int size = links * FSI_IRQ_COUNT; + + aspeed->irq_domain = irq_domain_add_linear(aspeed->dev->of_node, size, + &aspeed_master_irq_domain_ops, aspeed); + if (aspeed->irq_domain) { + rc = devm_request_irq(aspeed->dev, irq, aspeed_master_irq, 0, + dev_name(aspeed->dev), aspeed); + if (rc) { + dev_warn(aspeed->dev, "failed to request irq:%d\n", irq); + irq_domain_remove(aspeed->irq_domain); + aspeed->irq_domain = NULL; + } else { + dev_info(aspeed->dev, "enabling interrupts irq:%d\n", irq); + } + } else { + dev_warn(aspeed->dev, "failed to create irq domain\n"); + } + } + rc = fsi_master_register(&aspeed->master); if (rc) - goto err_regmap; + goto err_irq; /* At this point, fsi_master_register performs the device_initialize(), * and holds the sole reference on master.dev. This means the device @@ -553,6 +650,9 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) get_device(&aspeed->master.dev); return 0; +err_irq: + if (aspeed->irq_domain) + irq_domain_remove(aspeed->irq_domain); err_regmap: regmap_exit(aspeed->master.map); err_release: diff --git a/include/trace/events/fsi_master_aspeed.h b/include/trace/events/fsi_master_aspeed.h index 7eeecbfec7f0..dba1776334a0 100644 --- a/include/trace/events/fsi_master_aspeed.h +++ b/include/trace/events/fsi_master_aspeed.h @@ -8,6 +8,18 @@ #include +TRACE_EVENT(fsi_master_aspeed_irq, + TP_PROTO(uint32_t status), + TP_ARGS(status), + TP_STRUCT__entry( + __field(uint32_t, status) + ), + TP_fast_assign( + __entry->status = status; + ), + TP_printk("status %08x", __entry->status) +); + TRACE_EVENT(fsi_master_aspeed_opb_xfer, TP_PROTO(uint32_t addr, uint32_t size, uint32_t data, bool read), TP_ARGS(addr, size, data, read), From patchwork Thu Feb 15 22:07:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773136 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C70FB14A090; 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Thu, 15 Feb 2024 22:08:10 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 25/33] fsi: hub: Add interrupt support Date: Thu, 15 Feb 2024 16:07:51 -0600 Message-Id: <20240215220759.976998-26-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 3dTy5CLHc1ofbCEj1Lz_O4McShRkMRj0 X-Proofpoint-ORIG-GUID: 3dTy5CLHc1ofbCEj1Lz_O4McShRkMRj0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 malwarescore=0 spamscore=0 mlxlogscore=752 bulkscore=0 phishscore=0 adultscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 The hub master receives it's interrupts from the local slave register space, which is handled in the FSI core. Therefore, just route the remote slave interrupts to the hub link device interrupts. Signed-off-by: Eddie James --- drivers/fsi/fsi-master-hub.c | 119 ++++++++++++++++++++++++++++++++++- 1 file changed, 116 insertions(+), 3 deletions(-) diff --git a/drivers/fsi/fsi-master-hub.c b/drivers/fsi/fsi-master-hub.c index 92aa07055c56..4c3f77ae1faf 100644 --- a/drivers/fsi/fsi-master-hub.c +++ b/drivers/fsi/fsi-master-hub.c @@ -7,8 +7,10 @@ #include #include +#include #include #include +#include #include #include @@ -35,9 +37,10 @@ */ struct fsi_master_hub { struct fsi_master master; + struct irq_domain *irq_domain; struct fsi_device *upstream; - uint32_t addr, size; /* slave-relative addr of */ - /* master address space */ + uint32_t addr; + uint32_t size; }; #define to_fsi_master_hub(m) container_of(m, struct fsi_master_hub, master) @@ -77,10 +80,81 @@ static int hub_master_break(struct fsi_master *master, int link) return hub_master_write(master, link, 0, addr, &cmd, sizeof(cmd)); } +static int hub_master_link_enable(struct fsi_master *master, int link, + bool enable) +{ + struct fsi_master_hub *hub = to_fsi_master_hub(master); + u32 srsim = 0xff000000 >> (8 * (link % 4)); + int slave_idx = 4 * (link / 4); + __be32 srsim_be; + int ret; + + ret = fsi_slave_read(hub->upstream->slave, FSI_SLAVE_BASE + FSI_SRSIM0 + slave_idx, + &srsim_be, sizeof(srsim_be)); + if (ret) + return ret; + + if (enable) { + ret = fsi_master_link_enable(master, link, enable); + if (ret) + return ret; + + srsim |= be32_to_cpu(srsim_be); + srsim_be = cpu_to_be32(srsim); + ret = fsi_slave_write(hub->upstream->slave, + FSI_SLAVE_BASE + FSI_SRSIM0 + slave_idx, &srsim_be, + sizeof(srsim_be)); + } else { + srsim = be32_to_cpu(srsim_be) & ~srsim; + srsim_be = cpu_to_be32(srsim); + ret = fsi_slave_write(hub->upstream->slave, + FSI_SLAVE_BASE + FSI_SRSIM0 + slave_idx, &srsim_be, + sizeof(srsim_be)); + if (ret) + return ret; + + ret = fsi_master_link_enable(master, link, enable); + } + + return ret; +} + +static irqreturn_t hub_master_irq(int irq, void *data) +{ + struct fsi_master_hub *hub = data; + struct fsi_master *parent = hub->upstream->slave->master; + unsigned int link = 0; + + for (; link < FSI_HUB_MASTER_MAX_LINKS; ++link) { + if (parent->remote_interrupt_status & (1 << link)) + fsi_master_irq(&hub->master, hub->irq_domain, link); + } + + return IRQ_HANDLED; +} + +static int hub_master_irqd_map(struct irq_domain *domain, unsigned int irq, + irq_hw_number_t hwirq) +{ + struct fsi_master_hub *hub = domain->host_data; + + irq_set_chip_and_handler(irq, &hub->master.irq_chip, handle_simple_irq); + irq_set_chip_data(irq, &hub->master); + + return 0; +} + +static const struct irq_domain_ops hub_master_irq_domain_ops = { + .map = hub_master_irqd_map, +}; + static void hub_master_release(struct device *dev) { struct fsi_master_hub *hub = to_fsi_master_hub(to_fsi_master(dev)); + if (hub->irq_domain) + irq_domain_remove(hub->irq_domain); + regmap_exit(hub->master.map); kfree(hub); } @@ -136,6 +210,7 @@ static int hub_master_probe(struct device *dev) hub->master.read = hub_master_read; hub->master.write = hub_master_write; hub->master.send_break = hub_master_break; + hub->master.link_enable = hub_master_link_enable; dev_set_drvdata(dev, hub); @@ -143,9 +218,44 @@ static int hub_master_probe(struct device *dev) if (rc) goto err_free; + if (of_property_read_bool(dev->of_node, "interrupt-controller")) { + struct device_node *parent = of_irq_find_parent(dev->of_node); + + if (parent) { + struct irq_fwspec fwspec; + unsigned int irq; + + fwspec.fwnode = of_node_to_fwnode(parent); + fwspec.param_count = 1; + fwspec.param[0] = (fsi_dev->slave->link * FSI_IRQ_COUNT) + 8; + irq = irq_create_fwspec_mapping(&fwspec); + if (irq) { + unsigned int size = links * FSI_IRQ_COUNT; + + hub->irq_domain = irq_domain_add_linear(dev->of_node, size, + &hub_master_irq_domain_ops, + hub); + + if (hub->irq_domain) { + rc = devm_request_irq(dev, irq, hub_master_irq, 0, + dev_name(dev), hub); + if (rc) { + dev_warn(dev, "failed to request irq:%u\n", irq); + irq_domain_remove(hub->irq_domain); + hub->irq_domain = NULL; + } else { + dev_info(dev, "enabling interrupts irq:%u\n", irq); + } + } else { + dev_warn(dev, "failed to create irq domain\n"); + } + } + } + } + rc = fsi_master_register(&hub->master); if (rc) - goto err_free; + goto err_irq; /* At this point, fsi_master_register performs the device_initialize(), * and holds the sole reference on master.dev. This means the device @@ -157,6 +267,9 @@ static int hub_master_probe(struct device *dev) get_device(&hub->master.dev); return 0; +err_irq: + if (hub->irq_domain) + irq_domain_remove(hub->irq_domain); err_free: kfree(hub); err_release: From patchwork Thu Feb 15 22:07:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773135 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D40171487FB; Thu, 15 Feb 2024 22:08:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.158.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708034914; cv=none; b=Uqm30ak2h3n9kjrYOWJ4BYi0+kar7OlYohkgkkFzVbIGaGq0vIQYjiwvdNKhEwfYVxuTbRv5j64nlKBak0cTOAjlqlbsNcIp97hED2ui/GilJ72rEZWugsX8R2hS+u/9kF3OJ51je613BJftZwOaC39PW95kdWPjTPZJf0Lzgsc= ARC-Message-Signature: i=1; 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Thu, 15 Feb 2024 22:08:15 GMT Received: from smtprelay04.dal12v.mail.ibm.com ([172.16.1.6]) by ppma12.dal12v.mail.ibm.com (PPS) with ESMTPS id 3w6kftyueu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 15 Feb 2024 22:08:15 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay04.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 41FM8DK419399238 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 15 Feb 2024 22:08:15 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DA7B458068; Thu, 15 Feb 2024 22:08:11 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8841458073; Thu, 15 Feb 2024 22:08:11 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.14.18]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Thu, 15 Feb 2024 22:08:11 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 28/33] i2c: fsi: Improve formatting Date: Thu, 15 Feb 2024 16:07:54 -0600 Message-Id: <20240215220759.976998-29-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: XXPKvt99dsSEBLevTKf238__FqRSX-8N X-Proofpoint-ORIG-GUID: XXPKvt99dsSEBLevTKf238__FqRSX-8N X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=934 clxscore=1015 suspectscore=0 phishscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 bulkscore=0 impostorscore=0 priorityscore=1501 mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 No functional change. Signed-off-by: Eddie James --- drivers/i2c/busses/i2c-fsi.c | 125 +++++++++++++++++------------------ 1 file changed, 60 insertions(+), 65 deletions(-) diff --git a/drivers/i2c/busses/i2c-fsi.c b/drivers/i2c/busses/i2c-fsi.c index eaecf156ac31..bc44cad49ef2 100644 --- a/drivers/i2c/busses/i2c-fsi.c +++ b/drivers/i2c/busses/i2c-fsi.c @@ -148,10 +148,10 @@ struct fsi_i2c_master { struct fsi_device *fsi; - u8 fifo_size; struct list_head ports; struct mutex lock; u32 clock_div; + u8 fifo_size; }; struct fsi_i2c_port { @@ -165,15 +165,14 @@ struct fsi_i2c_port { static int fsi_i2c_read_reg(struct fsi_device *fsi, unsigned int reg, u32 *data) { - int rc; __be32 data_be; + int rc; rc = fsi_device_read(fsi, reg, &data_be, sizeof(data_be)); if (rc) return rc; *data = be32_to_cpu(data_be); - return 0; } @@ -187,9 +186,11 @@ static int fsi_i2c_write_reg(struct fsi_device *fsi, unsigned int reg, static int fsi_i2c_dev_init(struct fsi_i2c_master *i2c) { - int rc; - u32 mode = I2C_MODE_ENHANCED, extended_status, watermark; + u32 mode = I2C_MODE_ENHANCED; + u32 extended_status; u32 interrupt = 0; + u32 watermark; + int rc; /* since we use polling, disable interrupts */ rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, &interrupt); @@ -215,9 +216,10 @@ static int fsi_i2c_dev_init(struct fsi_i2c_master *i2c) static int fsi_i2c_set_port(struct fsi_i2c_port *port) { - int rc; struct fsi_device *fsi = port->master->fsi; - u32 mode, dummy = 0; + u32 dummy = 0; + u32 mode; + int rc; rc = fsi_i2c_read_reg(fsi, I2C_FSI_MODE, &mode); if (rc) @@ -238,7 +240,6 @@ static int fsi_i2c_set_port(struct fsi_i2c_port *port) static int fsi_i2c_start(struct fsi_i2c_port *port, struct i2c_msg *msg, bool stop) { - struct fsi_i2c_master *i2c = port->master; u32 cmd = I2C_CMD_WITH_START | I2C_CMD_WITH_ADDR; port->xfrd = 0; @@ -252,7 +253,7 @@ static int fsi_i2c_start(struct fsi_i2c_port *port, struct i2c_msg *msg, cmd |= FIELD_PREP(I2C_CMD_ADDR, msg->addr); cmd |= FIELD_PREP(I2C_CMD_LEN, msg->len); - return fsi_i2c_write_reg(i2c->fsi, I2C_FSI_CMD, &cmd); + return fsi_i2c_write_reg(port->master->fsi, I2C_FSI_CMD, &cmd); } static int fsi_i2c_get_op_bytes(int op_bytes) @@ -268,18 +269,17 @@ static int fsi_i2c_get_op_bytes(int op_bytes) static int fsi_i2c_write_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg, u8 fifo_count) { + int bytes_to_write = port->master->fifo_size - fifo_count; + int bytes_remaining = msg->len - port->xfrd; int write; int rc; - struct fsi_i2c_master *i2c = port->master; - int bytes_to_write = i2c->fifo_size - fifo_count; - int bytes_remaining = msg->len - port->xfrd; bytes_to_write = min(bytes_to_write, bytes_remaining); while (bytes_to_write) { write = fsi_i2c_get_op_bytes(bytes_to_write); - rc = fsi_device_write(i2c->fsi, I2C_FSI_FIFO, + rc = fsi_device_write(port->master->fsi, I2C_FSI_FIFO, &msg->buf[port->xfrd], write); if (rc) return rc; @@ -294,12 +294,11 @@ static int fsi_i2c_write_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg, static int fsi_i2c_read_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg, u8 fifo_count) { - int read; - int rc; - struct fsi_i2c_master *i2c = port->master; - int bytes_to_read; int xfr_remaining = msg->len - port->xfrd; + int bytes_to_read; u32 dummy; + int read; + int rc; bytes_to_read = min_t(int, fifo_count, xfr_remaining); @@ -307,7 +306,7 @@ static int fsi_i2c_read_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg, read = fsi_i2c_get_op_bytes(bytes_to_read); if (xfr_remaining) { - rc = fsi_device_read(i2c->fsi, I2C_FSI_FIFO, + rc = fsi_device_read(port->master->fsi, I2C_FSI_FIFO, &msg->buf[port->xfrd], read); if (rc) return rc; @@ -316,8 +315,8 @@ static int fsi_i2c_read_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg, xfr_remaining -= read; } else { /* no more buffer but data in fifo, need to clear it */ - rc = fsi_device_read(i2c->fsi, I2C_FSI_FIFO, &dummy, - read); + rc = fsi_device_read(port->master->fsi, I2C_FSI_FIFO, + &dummy, read); if (rc) return rc; } @@ -330,85 +329,80 @@ static int fsi_i2c_read_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg, static int fsi_i2c_get_scl(struct i2c_adapter *adap) { - u32 stat = 0; struct fsi_i2c_port *port = adap->algo_data; - struct fsi_i2c_master *i2c = port->master; + u32 stat; - fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &stat); + fsi_i2c_read_reg(port->master->fsi, I2C_FSI_STAT, &stat); return !!(stat & I2C_STAT_SCL_IN); } static void fsi_i2c_set_scl(struct i2c_adapter *adap, int val) { - u32 dummy = 0; struct fsi_i2c_port *port = adap->algo_data; - struct fsi_i2c_master *i2c = port->master; + u32 dummy = 0; if (val) - fsi_i2c_write_reg(i2c->fsi, I2C_FSI_SET_SCL, &dummy); + fsi_i2c_write_reg(port->master->fsi, I2C_FSI_SET_SCL, &dummy); else - fsi_i2c_write_reg(i2c->fsi, I2C_FSI_RESET_SCL, &dummy); + fsi_i2c_write_reg(port->master->fsi, I2C_FSI_RESET_SCL, &dummy); } static int fsi_i2c_get_sda(struct i2c_adapter *adap) { - u32 stat = 0; struct fsi_i2c_port *port = adap->algo_data; - struct fsi_i2c_master *i2c = port->master; + u32 stat; - fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &stat); + fsi_i2c_read_reg(port->master->fsi, I2C_FSI_STAT, &stat); return !!(stat & I2C_STAT_SDA_IN); } static void fsi_i2c_set_sda(struct i2c_adapter *adap, int val) { - u32 dummy = 0; struct fsi_i2c_port *port = adap->algo_data; - struct fsi_i2c_master *i2c = port->master; + u32 dummy = 0; if (val) - fsi_i2c_write_reg(i2c->fsi, I2C_FSI_SET_SDA, &dummy); + fsi_i2c_write_reg(port->master->fsi, I2C_FSI_SET_SDA, &dummy); else - fsi_i2c_write_reg(i2c->fsi, I2C_FSI_RESET_SDA, &dummy); + fsi_i2c_write_reg(port->master->fsi, I2C_FSI_RESET_SDA, &dummy); } static void fsi_i2c_prepare_recovery(struct i2c_adapter *adap) { - int rc; - u32 mode; struct fsi_i2c_port *port = adap->algo_data; - struct fsi_i2c_master *i2c = port->master; + u32 mode; + int rc; - rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_MODE, &mode); + rc = fsi_i2c_read_reg(port->master->fsi, I2C_FSI_MODE, &mode); if (rc) return; mode |= I2C_MODE_DIAG; - fsi_i2c_write_reg(i2c->fsi, I2C_FSI_MODE, &mode); + fsi_i2c_write_reg(port->master->fsi, I2C_FSI_MODE, &mode); } static void fsi_i2c_unprepare_recovery(struct i2c_adapter *adap) { - int rc; - u32 mode; struct fsi_i2c_port *port = adap->algo_data; - struct fsi_i2c_master *i2c = port->master; + u32 mode; + int rc; - rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_MODE, &mode); + rc = fsi_i2c_read_reg(port->master->fsi, I2C_FSI_MODE, &mode); if (rc) return; mode &= ~I2C_MODE_DIAG; - fsi_i2c_write_reg(i2c->fsi, I2C_FSI_MODE, &mode); + fsi_i2c_write_reg(port->master->fsi, I2C_FSI_MODE, &mode); } static int fsi_i2c_reset_bus(struct fsi_i2c_master *i2c, struct fsi_i2c_port *port) { + u32 dummy = 0; + u32 stat; int rc; - u32 stat, dummy = 0; /* force bus reset, ignore errors */ i2c_recover_bus(&port->adapter); @@ -439,8 +433,9 @@ static int fsi_i2c_reset_bus(struct fsi_i2c_master *i2c, static int fsi_i2c_reset_engine(struct fsi_i2c_master *i2c, u16 port) { + u32 dummy = 0; + u32 mode; int rc; - u32 mode, dummy = 0; /* reset engine */ rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_RESET_I2C, &dummy); @@ -476,18 +471,17 @@ static int fsi_i2c_reset_engine(struct fsi_i2c_master *i2c, u16 port) static int fsi_i2c_abort(struct fsi_i2c_port *port, u32 status) { - int rc; - unsigned long start; + struct fsi_i2c_master *i2c = port->master; u32 cmd = I2C_CMD_WITH_STOP; + unsigned long start; u32 stat; - struct fsi_i2c_master *i2c = port->master; - struct fsi_device *fsi = i2c->fsi; + int rc; rc = fsi_i2c_reset_engine(i2c, port->port); if (rc) return rc; - rc = fsi_i2c_read_reg(fsi, I2C_FSI_STAT, &stat); + rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &stat); if (rc) return rc; @@ -503,15 +497,14 @@ static int fsi_i2c_abort(struct fsi_i2c_port *port, u32 status) return 0; /* write stop command */ - rc = fsi_i2c_write_reg(fsi, I2C_FSI_CMD, &cmd); + rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_CMD, &cmd); if (rc) return rc; /* wait until we see command complete in the master */ start = jiffies; - do { - rc = fsi_i2c_read_reg(fsi, I2C_FSI_STAT, &status); + rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &status); if (rc) return rc; @@ -527,8 +520,8 @@ static int fsi_i2c_abort(struct fsi_i2c_port *port, u32 status) static int fsi_i2c_handle_status(struct fsi_i2c_port *port, struct i2c_msg *msg, u32 status) { - int rc; u8 fifo_count; + int rc; if (status & I2C_STAT_ERR) { rc = fsi_i2c_abort(port, status); @@ -576,9 +569,9 @@ static int fsi_i2c_handle_status(struct fsi_i2c_port *port, static int fsi_i2c_wait(struct fsi_i2c_port *port, struct i2c_msg *msg, unsigned long timeout) { - u32 status = 0; - int rc; unsigned long start = jiffies; + u32 status; + int rc; do { rc = fsi_i2c_read_reg(port->master->fsi, I2C_FSI_STAT, @@ -608,13 +601,13 @@ static int fsi_i2c_wait(struct fsi_i2c_port *port, struct i2c_msg *msg, static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { - int i, rc; - unsigned long start_time; struct fsi_i2c_port *port = adap->algo_data; - struct fsi_i2c_master *master = port->master; + unsigned long start_time; struct i2c_msg *msg; + int rc; + int i; - mutex_lock(&master->lock); + mutex_lock(&port->master->lock); rc = fsi_i2c_set_port(port); if (rc) @@ -635,7 +628,7 @@ static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, } unlock: - mutex_unlock(&master->lock); + mutex_unlock(&port->master->lock); return rc ? : num; } @@ -681,8 +674,10 @@ static int fsi_i2c_probe(struct device *dev) struct fsi_i2c_master *i2c; struct fsi_i2c_port *port; struct device_node *np; - u32 port_no, ports, stat; + u32 port_no; + u32 ports; u32 lbus; + u32 stat; int rc; i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL); @@ -753,14 +748,14 @@ static int fsi_i2c_probe(struct device *dev) } dev_set_drvdata(dev, i2c); - return 0; } static int fsi_i2c_remove(struct device *dev) { struct fsi_i2c_master *i2c = dev_get_drvdata(dev); - struct fsi_i2c_port *port, *tmp; + struct fsi_i2c_port *port; + struct fsi_i2c_port *tmp; list_for_each_entry_safe(port, tmp, &i2c->ports, list) { list_del(&port->list); From patchwork Thu Feb 15 22:07:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773138 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7BD601487D8; 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Thu, 15 Feb 2024 22:08:12 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 32/33] i2c: fsi: Add boolean for skip stop command on abort Date: Thu, 15 Feb 2024 16:07:58 -0600 Message-Id: <20240215220759.976998-33-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: p7PIRIlbszKwDr-GX9bH6oc5Dg4E_sKy X-Proofpoint-ORIG-GUID: p7PIRIlbszKwDr-GX9bH6oc5Dg4E_sKy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 bulkscore=0 phishscore=0 adultscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 In preparation for interrupt support, store whether to skip the final stop command during the abort procedure instead of checking the previously read status register in the abort function. Signed-off-by: Eddie James --- drivers/i2c/busses/i2c-fsi.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-fsi.c b/drivers/i2c/busses/i2c-fsi.c index 5f524fb6f0f8..33f4e64cb60b 100644 --- a/drivers/i2c/busses/i2c-fsi.c +++ b/drivers/i2c/busses/i2c-fsi.c @@ -116,6 +116,9 @@ #define I2C_STAT_ANY_RESP (I2C_STAT_ERR | \ I2C_STAT_DAT_REQ | \ I2C_STAT_CMD_COMP) +#define I2C_STAT_SKIP_STOP (I2C_STAT_PARITY | \ + I2C_STAT_LOST_ARB | \ + I2C_STAT_STOP_ERR) /* extended status register */ #define I2C_ESTAT_FIFO_SZ GENMASK(31, 24) @@ -150,6 +153,7 @@ struct fsi_i2c_master { struct mutex lock; u32 clock_div; u8 fifo_size; + bool skip_stop; }; struct fsi_i2c_port { @@ -459,31 +463,30 @@ static int fsi_i2c_reset_engine(struct fsi_i2c_master *i2c, u16 port) return 0; } -static int fsi_i2c_abort(struct fsi_i2c_port *port, u32 status) +static int fsi_i2c_abort(struct fsi_i2c_port *port) { struct fsi_i2c_master *i2c = port->master; u32 cmd = I2C_CMD_WITH_STOP; unsigned long start; - u32 stat; + u32 status; int rc; rc = fsi_i2c_reset_engine(i2c, port->port); if (rc) return rc; - rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &stat); + rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &status); if (rc) return rc; /* if sda is low, peform full bus reset */ - if (!(stat & I2C_STAT_SDA_IN)) { + if (!(status & I2C_STAT_SDA_IN)) { rc = fsi_i2c_reset_bus(i2c, port); if (rc) return rc; } - /* skip final stop command for these errors */ - if (status & (I2C_STAT_PARITY | I2C_STAT_LOST_ARB | I2C_STAT_STOP_ERR)) + if (i2c->skip_stop) return 0; /* write stop command */ @@ -534,7 +537,8 @@ static int fsi_i2c_handle_status(struct fsi_i2c_port *port, int rc; if (status & I2C_STAT_ERR) { - rc = fsi_i2c_abort(port, status); + port->master->skip_stop = status & I2C_STAT_SKIP_STOP; + rc = fsi_i2c_abort(port); if (rc) return rc; From patchwork Thu Feb 15 22:07:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 773134 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8FD9714A4C4; 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Thu, 15 Feb 2024 22:08:13 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, andi.shyti@kernel.org, eajames@linux.ibm.com, alistair@popple.id.au, joel@jms.id.au, jk@ozlabs.org, sboyd@kernel.org, mturquette@baylibre.com, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: [PATCH 33/33] i2c: fsi: Add interrupt support Date: Thu, 15 Feb 2024 16:07:59 -0600 Message-Id: <20240215220759.976998-34-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240215220759.976998-1-eajames@linux.ibm.com> References: <20240215220759.976998-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: LODkJAAOMushShHGwjpoPCDld1qWtOWv X-Proofpoint-GUID: LODkJAAOMushShHGwjpoPCDld1qWtOWv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-15_20,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 phishscore=0 mlxlogscore=999 clxscore=1015 impostorscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402150171 Optionally support interrupts from the I2C controller so that the driver can wait rather than poll the status register. Signed-off-by: Eddie James --- drivers/i2c/busses/i2c-fsi.c | 215 ++++++++++++++++++++++++++++++--- include/trace/events/i2c_fsi.h | 45 +++++++ 2 files changed, 245 insertions(+), 15 deletions(-) create mode 100644 include/trace/events/i2c_fsi.h diff --git a/drivers/i2c/busses/i2c-fsi.c b/drivers/i2c/busses/i2c-fsi.c index 33f4e64cb60b..096edeaa3312 100644 --- a/drivers/i2c/busses/i2c-fsi.c +++ b/drivers/i2c/busses/i2c-fsi.c @@ -23,6 +23,7 @@ #include #include #include +#include #define FSI_ENGID_I2C 0x7 @@ -87,6 +88,7 @@ #define I2C_INT_STOP_ERR BIT(7) #define I2C_INT_BUSY BIT(6) #define I2C_INT_IDLE BIT(5) +#define I2C_INT_ANY GENMASK(15, 7) /* status register */ #define I2C_STAT_INV_CMD BIT(31) @@ -148,21 +150,35 @@ /* choose timeout length from legacy driver; it's well tested */ #define I2C_ABORT_TIMEOUT msecs_to_jiffies(100) +struct fsi_i2c_port; + struct fsi_i2c_master { struct fsi_device *fsi; + struct fsi_i2c_port *port; struct mutex lock; + wait_queue_head_t wait; u32 clock_div; u8 fifo_size; + bool interrupts; bool skip_stop; + bool abort; }; struct fsi_i2c_port { struct i2c_adapter adapter; struct fsi_i2c_master *master; + struct i2c_msg *msgs; + int nmsgs; + int rc; + int i; u16 port; u16 xfrd; + bool wake; }; +#define CREATE_TRACE_POINTS +#include + static int fsi_i2c_read_reg(struct fsi_device *fsi, unsigned int reg, u32 *data) { @@ -192,7 +208,7 @@ static int fsi_i2c_dev_init(struct fsi_i2c_master *i2c) u32 watermark; int rc; - /* since we use polling, disable interrupts */ + /* start with interrupts disabled */ rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, 0); if (rc) return rc; @@ -236,22 +252,24 @@ static int fsi_i2c_set_port(struct fsi_i2c_port *port) return fsi_i2c_write_reg(fsi, I2C_FSI_RESET_ERR, 0); } -static int fsi_i2c_start(struct fsi_i2c_port *port, struct i2c_msg *msg, - bool stop) +static int fsi_i2c_start(struct fsi_i2c_port *port) { u32 cmd = I2C_CMD_WITH_START | I2C_CMD_WITH_ADDR; + struct i2c_msg *msg = &port->msgs[port->i]; port->xfrd = 0; if (msg->flags & I2C_M_RD) cmd |= I2C_CMD_READ; - if (stop || msg->flags & I2C_M_STOP) + if ((port->i == (port->nmsgs - 1)) || (msg->flags & I2C_M_STOP)) cmd |= I2C_CMD_WITH_STOP; cmd |= FIELD_PREP(I2C_CMD_ADDR, msg->addr); cmd |= FIELD_PREP(I2C_CMD_LEN, msg->len); + trace_i2c_fsi_start(port, cmd); + return fsi_i2c_write_reg(port->master->fsi, I2C_FSI_CMD, cmd); } @@ -489,11 +507,38 @@ static int fsi_i2c_abort(struct fsi_i2c_port *port) if (i2c->skip_stop) return 0; + if (i2c->interrupts) { + i2c->abort = true; + port->wake = false; + + rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, I2C_INT_ANY); + if (rc) + return rc; + } + /* write stop command */ rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_CMD, cmd); if (rc) return rc; + if (i2c->interrupts) { + rc = wait_event_interruptible_timeout(i2c->wait, port->wake, I2C_ABORT_TIMEOUT); + if (rc > 0) + return port->rc; + + fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, 0); + + if (!rc) { + rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &status); + if (!rc && (status & I2C_STAT_CMD_COMP)) + rc = 0; + else + rc = -ETIMEDOUT; + } + + return rc; + } + /* wait until we see command complete in the master */ start = jiffies; do { @@ -564,8 +609,59 @@ static int fsi_i2c_handle_status(struct fsi_i2c_port *port, return 0; } -static int fsi_i2c_wait(struct fsi_i2c_port *port, struct i2c_msg *msg, - unsigned long timeout) +static int fsi_i2c_wait_irq(struct fsi_i2c_port *port, unsigned long timeout) +{ + int rc; + + port->wake = false; + + rc = fsi_i2c_write_reg(port->master->fsi, I2C_FSI_INT_MASK, I2C_INT_ANY); + if (rc) + return rc; + + rc = wait_event_interruptible_timeout(port->master->wait, port->wake, timeout); + if (rc > 0) { + rc = port->rc; + + if (port->master->abort) { + int rc2 = fsi_i2c_abort(port); + + if (rc2) + return rc2; + } + + return rc; + } + + /* + * The interrupt handler should turn off interrupts once it's done, but in this + * case we timed out or were interrupted, so mask them off here. + */ + fsi_i2c_write_reg(port->master->fsi, I2C_FSI_INT_MASK, 0); + + if (!rc) { + u32 status; + + rc = fsi_i2c_read_reg(port->master->fsi, I2C_FSI_STAT, &status); + if (!rc && (status & I2C_STAT_ANY_RESP)) { + rc = fsi_i2c_handle_status(port, &port->msgs[port->i], status); + if (rc < 0) + return rc; + + /* cmd complete and all data xfrd */ + if (rc == port->msgs[port->i].len) + return 0; + + rc = -ETIMEDOUT; + } else { + rc = -ETIMEDOUT; + } + } + + return rc; +} + +static int fsi_i2c_wait_poll(struct fsi_i2c_port *port, unsigned long timeout) { unsigned long start = jiffies; u32 status; @@ -578,12 +674,12 @@ static int fsi_i2c_wait(struct fsi_i2c_port *port, struct i2c_msg *msg, return rc; if (status & I2C_STAT_ANY_RESP) { - rc = fsi_i2c_handle_status(port, msg, status); + rc = fsi_i2c_handle_status(port, &port->msgs[port->i], status); if (rc < 0) return rc; /* cmd complete and all data xfrd */ - if (rc == msg->len) + if (rc == port->msgs[port->i].len) return 0; /* need to xfr more data, but maybe don't need wait */ @@ -601,9 +697,7 @@ static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, { struct fsi_i2c_port *port = i2c_get_adapdata(adap); unsigned long start_time; - struct i2c_msg *msg; int rc; - int i; mutex_lock(&port->master->lock); @@ -611,21 +705,28 @@ static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, if (rc) goto unlock; - for (i = 0; i < num; i++) { - msg = msgs + i; + port->master->port = port; + port->master->abort = false; + port->msgs = msgs; + port->nmsgs = num; + for (port->i = 0; port->i < num; ++port->i) { start_time = jiffies; - rc = fsi_i2c_start(port, msg, i == num - 1); + rc = fsi_i2c_start(port); if (rc) goto unlock; - rc = fsi_i2c_wait(port, msg, - adap->timeout - (jiffies - start_time)); + if (port->master->interrupts) + rc = fsi_i2c_wait_irq(port, adap->timeout - (jiffies - start_time)); + else + rc = fsi_i2c_wait_poll(port, adap->timeout - (jiffies - start_time)); if (rc) goto unlock; } unlock: + port->msgs = NULL; + port->master->port = NULL; mutex_unlock(&port->master->lock); return rc ? : num; } @@ -636,6 +737,85 @@ static u32 fsi_i2c_functionality(struct i2c_adapter *adap) I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_BLOCK_DATA; } +static irqreturn_t fsi_i2c_irq(int irq, void *data) +{ + struct fsi_i2c_master *i2c = data; + struct fsi_i2c_port *port; + struct i2c_msg *msg; + u32 status; + int rc; + + rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, 0); + if (rc) + return IRQ_NONE; + + if (!i2c->port) + return IRQ_HANDLED; + + port = i2c->port; + rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &status); + if (rc) + goto wake; + + trace_i2c_fsi_irq(port, status); + + if (i2c->abort) { + if (status & I2C_STAT_CMD_COMP) { + port->wake = true; + goto done; + } else { + rc = fsi_i2c_error_status_to_rc(status); + goto wake; + } + } + + if (status & I2C_STAT_ERR) { + i2c->abort = true; + i2c->skip_stop = status & I2C_STAT_SKIP_STOP; + rc = fsi_i2c_error_status_to_rc(status); + goto wake; + } + + if (!port->msgs || port->i >= port->nmsgs) { + rc = -ENODEV; + goto wake; + } + + msg = &port->msgs[port->i]; + if (status & I2C_STAT_DAT_REQ) { + u8 fifo_count = FIELD_GET(I2C_STAT_FIFO_COUNT, status); + + if (msg->flags & I2C_M_RD) + rc = fsi_i2c_read_fifo(port, msg, fifo_count); + else + rc = fsi_i2c_write_fifo(port, msg, fifo_count); + } else if (status & I2C_STAT_CMD_COMP) { + if (port->xfrd < msg->len) { + rc = -ENODATA; + } else { + ++port->i; + if (port->i < port->nmsgs) { + rc = fsi_i2c_start(port); + } else { + port->wake = true; + goto done; + } + } + } + + if (!rc) + rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, I2C_INT_ANY); + +wake: + if (rc) + port->wake = true; +done: + port->rc = rc; + if (port->wake) + wake_up_interruptible_all(&i2c->wait); + return IRQ_HANDLED; +} + static struct i2c_bus_recovery_info fsi_i2c_bus_recovery_info = { .recover_bus = i2c_generic_scl_recovery, .get_scl = fsi_i2c_get_scl, @@ -683,6 +863,7 @@ static int fsi_i2c_probe(struct device *dev) return -ENOMEM; mutex_init(&i2c->lock); + init_waitqueue_head(&i2c->wait); i2c->fsi = to_fsi_dev(dev); i2c->clock_div = I2C_DEFAULT_CLK_DIV; @@ -707,6 +888,10 @@ static int fsi_i2c_probe(struct device *dev) if (rc) return rc; + rc = fsi_device_request_irq(i2c->fsi, fsi_i2c_irq, i2c); + if (!rc) + i2c->interrupts = true; + ports = FIELD_GET(I2C_STAT_MAX_PORT, stat) + 1; dev_dbg(dev, "I2C master has %d ports\n", ports); diff --git a/include/trace/events/i2c_fsi.h b/include/trace/events/i2c_fsi.h new file mode 100644 index 000000000000..691fb2adf454 --- /dev/null +++ b/include/trace/events/i2c_fsi.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM i2c_fsi + +#if !defined(_TRACE_I2C_FSI_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_I2C_FSI_H + +#include + +TRACE_EVENT(i2c_fsi_irq, + TP_PROTO(const struct fsi_i2c_port *port, uint32_t status), + TP_ARGS(port, status), + TP_STRUCT__entry( + __field(int, bus) + __field(int, msg_idx) + __field(uint32_t, status) + ), + TP_fast_assign( + __entry->bus = port->adapter.nr; + __entry->msg_idx = port->i; + __entry->status = status; + ), + TP_printk("i2c-%d status: %08x", __entry->bus, __entry->status) +); + +TRACE_EVENT(i2c_fsi_start, + TP_PROTO(const struct fsi_i2c_port *port, uint32_t command), + TP_ARGS(port, command), + TP_STRUCT__entry( + __field(int, bus) + __field(int, msg_idx) + __field(uint32_t, command) + ), + TP_fast_assign( + __entry->bus = port->adapter.nr; + __entry->msg_idx = port->i; + __entry->command = command; + ), + TP_printk("i2c-%d command: %08x", __entry->bus, __entry->command) +); + +#endif + +#include