From patchwork Mon Sep 16 16:14:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 173866 Delivered-To: patch@linaro.org Received: by 2002:ac9:19ad:0:0:0:0:0 with SMTP id d45csp4090611oce; Mon, 16 Sep 2019 09:15:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqziscmmD6iWTQD0ZY1vCx0/UOorKv3rI6dP1/KJDo9O/PRvYVP3QacaQD9R8fNtfNPM4ImP X-Received: by 2002:a50:e886:: with SMTP id f6mr52990edn.199.1568650513662; Mon, 16 Sep 2019 09:15:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568650513; cv=none; d=google.com; s=arc-20160816; b=Ew0GXYuQKWq5GnV20XWMh/psYOuI89TBEHi0IKt00tKuV/TZGOfyIRlo9HD2DAEYSq eZGbKqxWwTvQcKL+4F+2lAQl+2f1kttM8t1vCN1CdrD0gvFYwQtuMqgiuebCgnMcs4Dd T335vKpUAkCWbKE5dg60ZrTxb8IkczePz8NltTcEIxVhySxcDt7aP+G8VBsfk+K3byFf qVWFdwA2rNCLq77rRsv7EughE4HliSksiGA9EvK+/c7h8mTefRZozkD6ge/MwKWKLvq2 LRsrOR8bCrjByrpQwydh8r+60dFLtMmNSuiQ6hblyb6UJXFYgOe8zoPyHPzGY4bdW7GD WC6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=a/DBFL5pnFxmW7r8pfJ654oUFkPKTYmOJJb8EXbuSt0=; b=sFGQa3N8Gw/yLhsRzKeIVfaIt2OKAe4TmjyGXcl14jnSHUCc8zK3cjUf5zEc79GsVR 6XTw+Xv3RVe0ulw0E+Qw3Q1fgVpytRB+2/MNO9DAfE/uD4KLhHZuxzK6FJJpb9NoTUNE 01wU6BsPV1xLa0Nca428l/m4xnaj5y55apXjBFFhK83Qep+ocj+f1CJ+jTXy142JhHjF uL52knsvFIma51hZHdR7oPwo0iD0I2LrJy33G5PRb3amNzyB6DVMc5KS5lQ/z2DRpmqE 4istY4NATLuOuwOuwWGwhXrvgrVQ9UQEw/Zshf7HG8HdNwv4+qTtigH+k4YBS0LytjAY fDtA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sYJTtMza; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k14si20117734ejg.91.2019.09.16.09.15.13; Mon, 16 Sep 2019 09:15:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sYJTtMza; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389780AbfIPQPM (ORCPT + 8 others); Mon, 16 Sep 2019 12:15:12 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:37207 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389705AbfIPQPL (ORCPT ); Mon, 16 Sep 2019 12:15:11 -0400 Received: by mail-pl1-f196.google.com with SMTP id b10so107484plr.4 for ; Mon, 16 Sep 2019 09:15:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=a/DBFL5pnFxmW7r8pfJ654oUFkPKTYmOJJb8EXbuSt0=; b=sYJTtMzaFQwnHrfE0d9bJhN5rJL+SO2sue5FpfF9LXaYmhdpitHfR1Mc6XMxU1Oth+ JQAA2gJlVkMivG0TmPvinQOqimNim8N/21fhacTw0RdNDLtxPidi7L9R2U43pM6SLVaQ ua24bR6jkaW/OpEH84OUVaTt5s3KO3zFAZPV1earH/37b07DVZ/iKbah7H78F9ruW6dn BckDQs5uhXLjdbUq/WfcMG7QausOcDfiKMi/tFmNhYQCx/ddbG/CDzBXCEc2cH0dGrc5 KFx+mQF1bn5iJK9R3+e439dl8iIWf/BRAUXaj7JeJ9DvsUXa1qV0jRfO6F4Q3IyBRncZ dtLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=a/DBFL5pnFxmW7r8pfJ654oUFkPKTYmOJJb8EXbuSt0=; b=rIJVoyurbocwt5faFMzHk4nfziRJnNdw/B15KYHt0XdPiAm7dzZe8Ant8AOG6PXcez flo1iq/LXYyscRoIUOYJAZeLYEB7RgK1eyNOlGzD2vTMqHuxAyT6DyrAMiXyqyuL2Jak nORGQx/Flc9TDfhiUa8JsiXE7V4Qeyo3XShl2yRdtsKvseD2/KiixMGZlXF3v14heezi tIRbxg2aUMfFNXRLi4zzmLdRrHlJLDFCiKJKgXedNIHvBwZJDwbBXYH2rb8VOVcakWhQ kKJE/bh3cGVEamtJJs45ZXBWgdEqTGyxRdKL8MVaRffha2WG1c0IFstDKHRsJMQU7g21 O/EQ== X-Gm-Message-State: APjAAAVxsBRw+8kk21IqkVMMYa7XmQc+KYVAe9DPP6N0iA6wZG5Z85eO EWGivSZAbyLYIRfExSe1OhHF X-Received: by 2002:a17:902:7296:: with SMTP id d22mr607247pll.41.1568650510819; Mon, 16 Sep 2019 09:15:10 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:90b:91ce:94c2:ef93:5bd:cfe8]) by smtp.gmail.com with ESMTPSA id h66sm614134pjb.0.2019.09.16.09.15.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Sep 2019 09:15:10 -0700 (PDT) From: Manivannan Sadhasivam To: sboyd@kernel.org, mturquette@baylibre.com, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, haitao.suo@bitmain.com, darren.tsao@bitmain.com, fisher.cheng@bitmain.com, alec.lin@bitmain.com, Manivannan Sadhasivam Subject: [PATCH v5 2/8] clk: Warn if clk_init_data is not zero initialized Date: Mon, 16 Sep 2019 21:44:41 +0530 Message-Id: <20190916161447.32715-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190916161447.32715-1-manivannan.sadhasivam@linaro.org> References: <20190916161447.32715-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The new implementation for determining parent map uses multiple ways to pass parent info. The order in which it gets processed depends on the first available member. Hence, it is necessary to zero init the clk_init_data struct so that the expected member gets processed correctly. So, add a warning if multiple clk_init_data members are available during clk registration. Signed-off-by: Manivannan Sadhasivam --- drivers/clk/clk.c | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.17.1 diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index c0990703ce54..7d6d6984c979 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -3497,6 +3497,14 @@ static int clk_core_populate_parent_map(struct clk_core *core) if (!num_parents) return 0; + /* + * Check for non-zero initialized clk_init_data struct. This is + * required because, we only require one of the (parent_names/ + * parent_data/parent_hws) to be set at a time. Otherwise, the + * current code would use first available member. + */ + WARN_ON((parent_names && parent_data) || (parent_names && parent_hws)); + /* * Avoid unnecessary string look-ups of clk_core's possible parents by * having a cache of names/clk_hw pointers to clk_core pointers. From patchwork Mon Sep 16 16:14:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 173867 Delivered-To: patch@linaro.org Received: by 2002:ac9:19ad:0:0:0:0:0 with SMTP id d45csp4090719oce; Mon, 16 Sep 2019 09:15:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqyNn1JCuHtdWVB4nmUSxHJ9GZsbu4oCBwI1WzbR3DCc+aY9Vw8ZsPUNrnSljyKv0Vg5m4So X-Received: by 2002:a17:906:6d52:: with SMTP id a18mr853937ejt.56.1568650519065; Mon, 16 Sep 2019 09:15:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568650519; cv=none; d=google.com; s=arc-20160816; b=insnZz8fWLSV3YDpIxtS4dPC2XQjr9NLVKeQycaNCI6BeZwuPATtnPEFNxCH7/tO/7 AEciLBrOVN5cmQUNhAQ3tYMcpmN4VF4CxbdgANYQIrJ7qhpT7oEqrzcNGPyOINTxnPjY JSukDol3p+KpCoBehn0wggydo50QRR12jfE2I174zIWL4PLbB8DiZYaJHZmrOibRC7a3 wvuzYfgM9uqmVlN+dIYqj3jdO7Fxu1t5LVH/fJfGd9iA3u9w1FUz/GfQ0a2xuh6Bspn6 8gyvGML6lkqrpRwnAfbKz6QZ0gdF2vfKrEKGJEYJQof+7qmQ0DOYr6dUu5cULbUXHc79 ohBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=RtuYujDQbGoE383NaOTW8yNTTYMDfvcRIoYrv77xBo0=; b=ky6bfL2DdZsuzQJEgA8CzuXoAg7guQzLJunUMDblzdnG+WXnP2teDMUBZb7rdD7wVV DekwpNbYXfacYaKQH4jM/otgnjb6oGphxNn9q33Cl/PN4MTu0d0AhZX82N6937vGIOD9 04r/w3JTlbGd6SETOuac6HzBkOqjkgHbRdhTEx11cUtMRjHnLkCoPQVOHGKsXe7ZV+3V 92ITIDQuZ3YqQyot+yeA978MMvCJPUgGbKndgZkiRAauLAqwzsp87t5CQpJGrf29el9F /l3qa1sqBjMl83Tqvc6K0zUf3xv00zUMZTVyRA5pu8dS6BIv6585E2fimiB6RiXFiRYd 7Vxg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Hj6QoIN6; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Hence, this commit adds definition for it. Signed-off-by: Manivannan Sadhasivam --- drivers/clk/clk-composite.c | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 2.17.1 diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c index 4d579f9d20f6..ccca58a6d271 100644 --- a/drivers/clk/clk-composite.c +++ b/drivers/clk/clk-composite.c @@ -344,3 +344,14 @@ void clk_unregister_composite(struct clk *clk) clk_unregister(clk); kfree(composite); } + +void clk_hw_unregister_composite(struct clk_hw *hw) +{ + struct clk_composite *composite; + + composite = to_clk_composite(hw); + + clk_hw_unregister(hw); + kfree(composite); +} +EXPORT_SYMBOL_GPL(clk_hw_unregister_composite); From patchwork Mon Sep 16 16:14:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 173868 Delivered-To: patch@linaro.org Received: by 2002:ac9:19ad:0:0:0:0:0 with SMTP id d45csp4090798oce; Mon, 16 Sep 2019 09:15:22 -0700 (PDT) X-Google-Smtp-Source: APXvYqyS38vwpCI8QSLGNjLgJhT7bXidXTo/Hfar8n5g+I90QhcnnDRfBEl+zgrZmUVk5wT2WpkJ X-Received: by 2002:a17:906:f0d5:: with SMTP id dk21mr795005ejb.118.1568650522393; Mon, 16 Sep 2019 09:15:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568650522; cv=none; d=google.com; s=arc-20160816; b=apAY5F1YuIJG26WDafJ8xD+Q2vUdyQH685DZPNGBrgb3DXIBDUqjfEET+Oh2v9MBby 8PgJ+KOHX6Ah3erRR4v5ohOBAOPOWuODr5K+PvRZlOnXe5ha2neL6zgExIoXc2ts/QpL 2Oqq4YH34FeH7gFhMPu9d5HZ8xq6eq8VkSWr5PF0VPDLvx/DU8gZgm5uaMJeZ83zau61 9A4Y0EKPeWfPAitO/ym5/g7l9BAPswJftk4l6253zzWrXcq5NILT5NUhztv/dYNvTylm QyBZpcps6EjQhVYZu/wpetfe6XMPA007As4Qxd0u+pD8VDUS9+6o5iVLmhOm5/alIPYh wjug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=klfCMSt7jESV3x0ypDMgiUBLr/uboYQpHdjbWUnIcx4=; b=zJU6iBnczg1Epv+bso9zWPMZidDhs/G8AHaTr1cMa9gDQwrDv0eVGqErthRFyIiLyi QA/dMEKIl/C+kXImLM78GTN/phspLAJHnHxcqK2Rg6aWo4nRUK2edjXiAMyaRcwNe9Ue r812qbePQNW8tOSyWy/PPR2glL0Hcr9YLe8xWhA0DkU6Nj46Ohvn7uC7aYXNSpZ5vJYl 3v+lLw9CagIGgBaCdL/+8lLpbvELSqha/hGl9giOPxJ7F/aqiwkCTuoU5O54KKxzfezX KLIux9rs7259qFURG46MPYEHWz2hLmtRCKZ4w92kCWy8fyudDEK3qrpaG1qUNLfmjewK cYIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kqKUhGFn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Manivannan Sadhasivam --- .../bindings/clock/bitmain,bm1880-clk.yaml | 76 +++++++++++++++++ include/dt-bindings/clock/bm1880-clock.h | 82 +++++++++++++++++++ 2 files changed, 158 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml create mode 100644 include/dt-bindings/clock/bm1880-clock.h -- 2.17.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml b/Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml new file mode 100644 index 000000000000..e63827399c1a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/bitmain,bm1880-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bitmain BM1880 Clock Controller + +maintainers: + - Manivannan Sadhasivam + +description: | + The Bitmain BM1880 clock controller generates and supplies clock to + various peripherals within the SoC. + + This binding uses common clock bindings + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +properties: + compatible: + const: bitmain,bm1880-clk + + reg: + items: + - description: pll registers + - description: system registers + + reg-names: + items: + - const: pll + - const: sys + + clocks: + maxItems: 1 + + clock-names: + const: osc + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock controller node: + - | + clk: clock-controller@e8 { + compatible = "bitmain,bm1880-clk"; + reg = <0xe8 0x0c>, <0x800 0xb0>; + reg-names = "pll", "sys"; + clocks = <&osc>; + clock-names = "osc"; + #clock-cells = <1>; + }; + + # Example UART controller node that consumes clock generated by the clock controller: + - | + uart0: serial@58018000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x58018000 0x0 0x2000>; + clocks = <&clk 45>, <&clk 46>; + clock-names = "baudclk", "apb_pclk"; + interrupts = <0 9 4>; + reg-shift = <2>; + reg-io-width = <4>; + }; + +... diff --git a/include/dt-bindings/clock/bm1880-clock.h b/include/dt-bindings/clock/bm1880-clock.h new file mode 100644 index 000000000000..b46732361b25 --- /dev/null +++ b/include/dt-bindings/clock/bm1880-clock.h @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Device Tree binding constants for Bitmain BM1880 SoC + * + * Copyright (c) 2019 Linaro Ltd. + */ + +#ifndef __DT_BINDINGS_CLOCK_BM1880_H +#define __DT_BINDINGS_CLOCK_BM1880_H + +#define BM1880_CLK_OSC 0 +#define BM1880_CLK_MPLL 1 +#define BM1880_CLK_SPLL 2 +#define BM1880_CLK_FPLL 3 +#define BM1880_CLK_DDRPLL 4 +#define BM1880_CLK_A53 5 +#define BM1880_CLK_50M_A53 6 +#define BM1880_CLK_AHB_ROM 7 +#define BM1880_CLK_AXI_SRAM 8 +#define BM1880_CLK_DDR_AXI 9 +#define BM1880_CLK_EFUSE 10 +#define BM1880_CLK_APB_EFUSE 11 +#define BM1880_CLK_AXI5_EMMC 12 +#define BM1880_CLK_EMMC 13 +#define BM1880_CLK_100K_EMMC 14 +#define BM1880_CLK_AXI5_SD 15 +#define BM1880_CLK_SD 16 +#define BM1880_CLK_100K_SD 17 +#define BM1880_CLK_500M_ETH0 18 +#define BM1880_CLK_AXI4_ETH0 19 +#define BM1880_CLK_500M_ETH1 20 +#define BM1880_CLK_AXI4_ETH1 21 +#define BM1880_CLK_AXI1_GDMA 22 +#define BM1880_CLK_APB_GPIO 23 +#define BM1880_CLK_APB_GPIO_INTR 24 +#define BM1880_CLK_GPIO_DB 25 +#define BM1880_CLK_AXI1_MINER 26 +#define BM1880_CLK_AHB_SF 27 +#define BM1880_CLK_SDMA_AXI 28 +#define BM1880_CLK_SDMA_AUD 29 +#define BM1880_CLK_APB_I2C 30 +#define BM1880_CLK_APB_WDT 31 +#define BM1880_CLK_APB_JPEG 32 +#define BM1880_CLK_JPEG_AXI 33 +#define BM1880_CLK_AXI5_NF 34 +#define BM1880_CLK_APB_NF 35 +#define BM1880_CLK_NF 36 +#define BM1880_CLK_APB_PWM 37 +#define BM1880_CLK_DIV_0_RV 38 +#define BM1880_CLK_DIV_1_RV 39 +#define BM1880_CLK_MUX_RV 40 +#define BM1880_CLK_RV 41 +#define BM1880_CLK_APB_SPI 42 +#define BM1880_CLK_TPU_AXI 43 +#define BM1880_CLK_DIV_UART_500M 44 +#define BM1880_CLK_UART_500M 45 +#define BM1880_CLK_APB_UART 46 +#define BM1880_CLK_APB_I2S 47 +#define BM1880_CLK_AXI4_USB 48 +#define BM1880_CLK_APB_USB 49 +#define BM1880_CLK_125M_USB 50 +#define BM1880_CLK_33K_USB 51 +#define BM1880_CLK_DIV_12M_USB 52 +#define BM1880_CLK_12M_USB 53 +#define BM1880_CLK_APB_VIDEO 54 +#define BM1880_CLK_VIDEO_AXI 55 +#define BM1880_CLK_VPP_AXI 56 +#define BM1880_CLK_APB_VPP 57 +#define BM1880_CLK_DIV_0_AXI1 58 +#define BM1880_CLK_DIV_1_AXI1 59 +#define BM1880_CLK_AXI1 60 +#define BM1880_CLK_AXI2 61 +#define BM1880_CLK_AXI3 62 +#define BM1880_CLK_AXI4 63 +#define BM1880_CLK_AXI5 64 +#define BM1880_CLK_DIV_0_AXI6 65 +#define BM1880_CLK_DIV_1_AXI6 66 +#define BM1880_CLK_MUX_AXI6 67 +#define BM1880_CLK_AXI6 68 +#define BM1880_NR_CLKS 69 + +#endif /* __DT_BINDINGS_CLOCK_BM1880_H */ From patchwork Mon Sep 16 16:14:44 2019 Content-Type: text/plain; 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Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/bitmain/bm1880.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi index d65453f99a99..8471662413da 100644 --- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi +++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi @@ -4,6 +4,7 @@ * Author: Manivannan Sadhasivam */ +#include #include #include @@ -66,6 +67,12 @@ ; }; + osc: osc { + compatible = "fixed-clock"; + clock-frequency = <25000000>; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -94,6 +101,15 @@ reg = <0x400 0x120>; }; + clk: clock-controller@e8 { + compatible = "bitmain,bm1880-clk"; + reg = <0xe8 0x0c>, <0x800 0xb0>; + reg-names = "pll", "sys"; + clocks = <&osc>; + clock-names = "osc"; + #clock-cells = <1>; + }; + rst: reset-controller@c00 { compatible = "bitmain,bm1880-reset"; reg = <0xc00 0x8>; From patchwork Mon Sep 16 16:14:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 173872 Delivered-To: patch@linaro.org Received: by 2002:ac9:19ad:0:0:0:0:0 with SMTP id d45csp4091295oce; Mon, 16 Sep 2019 09:15:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqw6yOpiee0Af8JHPlT2Rooil9CZZoHTFofCKw7JHdGjxGvJjp3Pvmoo9TXW2AOR5gK1efk5 X-Received: by 2002:a50:fa99:: with SMTP id w25mr42609edr.259.1568650545021; Mon, 16 Sep 2019 09:15:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568650545; cv=none; d=google.com; s=arc-20160816; b=t0QAbbfshRxcF90CStJ4Ig9VdGWcZ4dWkV1OkYJEN6CDurueUVJ36WhEOrAz103677 x3PulM7TQtV+HxQj4q2XQzrSW5UbdCzKnHdCpOhi4h6zJyBqdUR9Y+cpYbU5+MFnfjSy fpq2Aj3UnGcy3TJ5g287a7h1GB0f8iJTmfKjPYI0PrnP2No3RQyC36knihOnvNIXKAL7 u004SjXfRFKCA8hMIbumWvp2xAHebB8Ezl3cXUJaYdJXCigga0n5hPvP90ONqPrkRejs 57W8wSUKw2/7bTfCDjo8hqPc0CXcOtaiO890WO9b37kIYFxRUIL/BzuOfOfd8je+Xo1/ QJcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=K+pJPk2iXl0LixGuiysFHZxmO1vjBGFGOdrJivWtPCQ=; b=wxyKIWpuE9jzUaXtu8YgMP84+2Z/lOVVCQsnUjRl8/OjnuSDEKQsFHLug/LNVMjN6J 3YfLjzWPa0SVbNLjxR8gcfTvvvtcRA94zEwiJNgwU5rEiRa94YVTRQDpr/yb2BkFdfAk Eyk/sqLhptK3NkIPzABYnfGAi3BA9XjQfSByO5zFYRXbW7oKZkiE6E8eRpPLRmdB7jW1 W57wATBbxFDI75zdTYOKuvK4BmOkKx/kXqqqd992jHWdeM3Indy2VGfv89gXDWTS7oE4 AvQj6xIR2W1b9sFy0KJHuUgDoM1FCk0Q+l8JiRSUY+feV+3WmT0DpGIw6IzJe14K9Qcj wT0Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GKCX6scH; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/MAINTAINERS b/MAINTAINERS index 997a4f8fe88e..280defec35b2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1503,8 +1503,10 @@ M: Manivannan Sadhasivam L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm64/boot/dts/bitmain/ +F: drivers/clk/clk-bm1880.c F: drivers/pinctrl/pinctrl-bm1880.c F: Documentation/devicetree/bindings/arm/bitmain.yaml +F: Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml F: Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt ARM/CALXEDA HIGHBANK ARCHITECTURE