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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000FCBF.mail.protection.outlook.com (10.167.242.101) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7181.14 via Frontend Transport; Wed, 31 Jan 2024 08:51:00 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Wed, 31 Jan 2024 02:50:36 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH 1/6] ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors Date: Wed, 31 Jan 2024 16:50:16 +0800 Message-ID: <3a2a5bb22f9ec853cc8762fa1795a75fa1106f22.1706690577.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCBF:EE_|DM6PR12MB4073:EE_ X-MS-Office365-Filtering-Correlation-Id: ec2f035b-2ae8-4058-245b-08dc2239bff9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CAT:NONE; SFS:(13230031)(4636009)(39860400002)(136003)(346002)(376002)(396003)(230273577357003)(230173577357003)(230922051799003)(64100799003)(186009)(451199024)(1800799012)(82310400011)(36840700001)(40470700004)(46966006)(2906002)(36756003)(41300700001)(70206006)(70586007)(86362001)(316002)(110136005)(6636002)(54906003)(47076005)(6666004)(336012)(426003)(2616005)(16526019)(7696005)(26005)(478600001)(966005)(40480700001)(40460700003)(83380400001)(82740400003)(5660300002)(44832011)(356005)(81166007)(36860700001)(8936002)(8676002)(4326008)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 08:51:00.8086 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ec2f035b-2ae8-4058-245b-08dc2239bff9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4073 As there are some AMD processors which only support CPPC V2 firmware and BIOS implementation, the amd_pstate driver will be failed to load when system booting with below kernel warning message: [ 0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled To make the amd_pstate driver can be loaded on those TR40 processors, it needs to match x86_model from 0x30 to 0x7F for family 17H. With the change, the system can load amd_pstate driver as expected. Reported-by: Gino Badouri Issue: https://bugzilla.kernel.org/show_bug.cgi?id=218171 Fixes: fbd74d1689 ("ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory") Signed-off-by: Perry Yuan --- arch/x86/kernel/acpi/cppc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index 8d8752b44f11..ff8f25faca3d 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -20,7 +20,7 @@ bool cpc_supported_by_cpu(void) (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f))) return true; else if (boot_cpu_data.x86 == 0x17 && - boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f) + boot_cpu_data.x86_model >= 0x30 && boot_cpu_data.x86_model <= 0x7f) return true; return boot_cpu_has(X86_FEATURE_CPPC); } From patchwork Wed Jan 31 08:50:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yuan, Perry" X-Patchwork-Id: 768765 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2043.outbound.protection.outlook.com [40.107.244.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB8BD64CE1; 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Wed, 31 Jan 2024 02:51:03 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH 3/6] cpufreq:amd-pstate: initialize nominal_freq of each cpudata Date: Wed, 31 Jan 2024 16:50:18 +0800 Message-ID: <5d5822a829045c02a37d6dac81756be1312a1ac5.1706690577.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCBF:EE_|CH2PR12MB4101:EE_ X-MS-Office365-Filtering-Correlation-Id: 154cad0d-7b85-452e-a42b-08dc2239c465 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: M2nILeE9lfp7zS5necQVp5B5TjPMO8h0AxFTRSUmd7G4T0KM4FtjAev2jovhMTwFwud2sHjU0dcTnt3J26wEBsx6iahvOKGGcEUeJ3rGoDtZcnygHDvhoZf3xNhkk7rSZjMPgYABo3XOV1UEPI+Y/l6q0ZC6iY2j63L9xd2mt8+WkNmv9XKkNJ/FhdVtaxIu8SZGqC/0ieTHD6xf2cwASei8/tZmm4vyocBmvcxD8/ynOpr9lsALEFaARkhAQuyhQM8XMmBeNmNNVoDI9cnj0QtjQ2BZxHgL3d6g19ANArYPp1xNlPLeNqin8SEov9bUFvXIWC4EqheOfy1YGrbAg4tjSLfBf28Pp6qJea1vz0ezQODVzdK1Ppe2p5EswbSLacHiAcQEgFXhkuM+c+WR9TSBROUXTDcrnSjo+WClA5KoT5l3AgHw1FY/r9fzOe6lIvqyVYFQUsXDjnOy2ate5zgM+s1q6IzabGWxWnZbpckbYe9dvzhmtlemYIzoOrS/vDG3pDGa9sKLcx6NJTmbJ1SLNSKSEk4moTDBcNgeuMdo9q31152UtDD1cKcle4KZKOlv2caHcEidrKqkG8oGGe90uRNYTPIakxPcIWdLrCzKosRNja8B3uOMMMvOlnbr8+enZXiJKhO3C41CYoLGpzWTqizZu3rLuygpNdr89tnmHgx/ZkokMi0CoYlMfQhcKwlubipEoW/GwD4Us6Iz0p9FUiFrMguCs8coK7TcTf15H6LwP/Qe4ObNttG0RgdE+JtCr/SR1hleXt6lkK8P2A== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4101 Optimizes the process of retrieving the nominal frequency by utilizing 'cpudata->nominal_freq' instead of repeatedly accessing the cppc_acpi interface. To enhance efficiency and reduce the CPU load, shifted to using 'cpudata->nominal_freq'. It allows for the nominal frequency to be accessed directly from the cached data in 'cpudata' of each CPU. It will also slightly reduce the frequency change latency while using pstate driver passive mode. Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 9291a22bd3cc..db7b36afdce2 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -600,7 +600,7 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata) if (ret) return ret; - nominal_freq = cppc_perf.nominal_freq; + nominal_freq = READ_ONCE(cpudata->nominal_freq); nominal_perf = READ_ONCE(cpudata->nominal_perf); max_perf = READ_ONCE(cpudata->highest_perf); @@ -639,7 +639,7 @@ static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) if (ret) return ret; - nominal_freq = cppc_perf.nominal_freq; + nominal_freq = READ_ONCE(cpudata->nominal_freq); nominal_perf = READ_ONCE(cpudata->nominal_perf); lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf; @@ -712,13 +712,15 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) amd_pstate_boost_init(cpudata); min_freq = amd_get_min_freq(cpudata); - max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); + cpudata->nominal_freq = nominal_freq; + max_freq = amd_get_max_freq(cpudata); lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata); - if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { - dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", - min_freq, max_freq); + if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) { + dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d) \ + value is incorrect\n", \ + min_freq, max_freq, nominal_freq); ret = -EINVAL; goto free_cpudata1; } @@ -755,7 +757,6 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) /* Initial processor data capability frequencies */ cpudata->max_freq = max_freq; cpudata->min_freq = min_freq; - cpudata->nominal_freq = nominal_freq; cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; policy->driver_data = cpudata; @@ -1266,12 +1267,14 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) amd_pstate_boost_init(cpudata); min_freq = amd_get_min_freq(cpudata); - max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); + cpudata->nominal_freq = nominal_freq; + max_freq = amd_get_max_freq(cpudata); lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata); - if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { - dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", - min_freq, max_freq); + if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) { + dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d) \ + value is incorrect\n", \ + min_freq, max_freq, nominal_freq); ret = -EINVAL; goto free_cpudata1; } @@ -1284,7 +1287,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) /* Initial processor data capability frequencies */ cpudata->max_freq = max_freq; cpudata->min_freq = min_freq; - cpudata->nominal_freq = nominal_freq; cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; policy->driver_data = cpudata; From patchwork Wed Jan 31 08:50:20 2024 Content-Type: text/plain; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000FCC2.mail.protection.outlook.com (10.167.242.104) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7181.13 via Frontend Transport; Wed, 31 Jan 2024 08:51:13 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Wed, 31 Jan 2024 02:51:10 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH 5/6] cppc_acpi: print error message if CPPC is unsupported Date: Wed, 31 Jan 2024 16:50:20 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC2:EE_|LV8PR12MB9449:EE_ X-MS-Office365-Filtering-Correlation-Id: 40ea7d61-070e-4319-4318-08dc2239c779 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 08:51:13.3767 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 40ea7d61-070e-4319-4318-08dc2239c779 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9449 to be more clear what is wrong with CPPC when pstate driver failed to load which has dependency on the CPPC capabilities. Add one more debug message to notify user if CPPC is not supported by the CPU, then it will be easy to find out what need to fix for pstate driver loading issue. [ 0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled Above message is not clear enough to verify whether CPPC is not supported. Signed-off-by: Perry Yuan --- drivers/acpi/cppc_acpi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 7ff269a78c20..217c11c12b57 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -676,8 +676,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr) if (!osc_sb_cppc2_support_acked) { pr_debug("CPPC v2 _OSC not acked\n"); - if (!cpc_supported_by_cpu()) - return -ENODEV; + if (!cpc_supported_by_cpu()) { + pr_debug("CPPC is not supported\n"); + return -ENODEV; + } } /* Parse the ACPI _CPC table for this CPU. */