From patchwork Fri Sep 13 11:35:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 173750 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp37913ilq; Fri, 13 Sep 2019 04:35:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqy0g4h7VIKC0q12w/fr9adcspvFrw/jI51BozF4tvV5SV0nN/9uSvEaPhHfigb4J/EwoYBj X-Received: by 2002:aa7:d488:: with SMTP id b8mr42222098edr.90.1568374540227; Fri, 13 Sep 2019 04:35:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568374540; cv=none; d=google.com; s=arc-20160816; b=mlcr9ZdgXDejxR6DQQSISQZbrh8szJ1NtJ6cda1XBMp4HAxQMvYQvnUyiyIPifzUUE HtbqT0i754S1KvRXlA/zJGxVhHlt5TPqdFicyUeoAkPCWVXxrLy8Ple8HYp8Ko5XJCIP MBRu865tK3e9DL19cJYYb6lhtF2LDngLYPU5H2HckUhZNjHTMcuo6a/qhCXcr/qdBbXQ 75Y7Rj7wzGB8ERZ9GcIzH42AXAa4jL3VEc4evSdScaQmeh8mzaFgX5etddX5UJ+gCt/n NkvoTZm6BnCG+tZyi+udSHAQo8ufzjMujHtx5YbK0m3KciP/pSeCcDLQQDWHPgrH8zQ3 16ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=Yb/+G3TZ7Tb6RdpFJuCWvlbyLNP0pf8HNVvp3LwN82w=; b=Uv97wI66ECOO7edyPHIegx7K132zdHDQHig/uXvdtoiLaDI8ogECXAdo0cUBd+dZ5W +hcl9FBM2e4rP8qjCYAIannD4hdojgemllIuNz+UG4/fWcY6nYyIwdrkoHByVMkh0TUD ycTG0q4k3iOmEwOfwfxr4NR9DRLUSu0ku89QIW7OOly61oZODuYdh6fto9z9I19xB47G JkUJYe/y1bfLyMHpfFc8V8C13I4+ZcyPDZIBMG6qnLaD7Bed8bDnKL5P7NJ6288oWc5b DZKd5eBPdr+5OLYc/qwNzBBkONBPQnnx2V+UbB7qldEL8VmWYe1+XKf62JhWrEo2d09e uSQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=G82JUXib; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si17870968edm.313.2019.09.13.04.35.39; Fri, 13 Sep 2019 04:35:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=G82JUXib; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728237AbfIMLfi (ORCPT + 5 others); Fri, 13 Sep 2019 07:35:38 -0400 Received: from mail-lf1-f67.google.com ([209.85.167.67]:37328 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfIMLfi (ORCPT ); Fri, 13 Sep 2019 07:35:38 -0400 Received: by mail-lf1-f67.google.com with SMTP id w67so21855057lff.4 for ; Fri, 13 Sep 2019 04:35:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Yb/+G3TZ7Tb6RdpFJuCWvlbyLNP0pf8HNVvp3LwN82w=; b=G82JUXib1QdSx81R9RIU5xwm+dKFe0Dh8mmyRlBLc2Ey1E2cr58vkCt8hTbOPJCI0I cgSrqcesnJHKkU9IBnNWYN+NxCS8EkeCZLbDNaAeLEWoSW4ChduP/E6daZowIg42ecYX h/Am61amDhAAitn1s8BYwxks7nWaJGEVBPeRb2YA2YaDUDKSRM2/Wt91GxU+Q8OugX/E LZVH6IPpIkf9OfZ4536HLGDAU3fin0ul8L7aZow3mplyhNCTdAqEGFogyTmVmhRrf6Tv vPwBxKKd0kf7eVxb2AuQRKh0R/6Aa2M5tESqIbZbveSheLX1yFtaNfs3FCRqPklBXzQ7 jQQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Yb/+G3TZ7Tb6RdpFJuCWvlbyLNP0pf8HNVvp3LwN82w=; b=O9rPUPtqVtp7wwpxICmjhQ1cjbTyyrKeut7elPaEWX8dIpz8Z8QPrseJeaWxpT3skc 9OcbB3TjsCKs6tR/H/66oYJTC/OiWo7/98/XlGIRCHs+nljaQWs2aeMHJ2oLkQzv3b7+ 7eo1mxKq4/cFQK54uVLolkqEzjnpdrMSkLVH3JzpWD4qhggajUKlDbX2G/FBuIWOc9Lr WyoGfs6cSsOfucA6LXICZReJfbF8H3tZm28kXBfFqiPCQz8C5LLYB5uO9iW8axTofZGb jlLu/+uCTriR8X1bJgNeNGjcsBmzOAQOppoy3bH3FKA4RbHdvXFbUvHtLyEn/qBT+UFN Ja2A== X-Gm-Message-State: APjAAAUesiaQcrdT27YEG7HrPcOM9YnTHKnJpGJqLWpmoYEzj68+qLaq CsfwiOHzehydxPH+yj3XRoh6R85KrwFnvMxO X-Received: by 2002:ac2:53a3:: with SMTP id j3mr31394766lfh.155.1568374536705; Fri, 13 Sep 2019 04:35:36 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v17sm6177440ljh.8.2019.09.13.04.35.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 04:35:35 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Thierry Reding Subject: [PATCH 1/6] pinctrl: coh901: Pass irqchip when adding gpiochip Date: Fri, 13 Sep 2019 13:35:25 +0200 Message-Id: <20190913113530.5536-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-coh901.c | 50 +++++++++++++++----------------- 1 file changed, 23 insertions(+), 27 deletions(-) -- 2.21.0 diff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c index 08b9e909e917..063a629be9b2 100644 --- a/drivers/pinctrl/pinctrl-coh901.c +++ b/drivers/pinctrl/pinctrl-coh901.c @@ -616,6 +616,7 @@ static int __init u300_gpio_probe(struct platform_device *pdev) { struct u300_gpio *gpio; struct resource *memres; + struct gpio_irq_chip *girq; int err = 0; int portno; u32 val; @@ -672,26 +673,17 @@ static int __init u300_gpio_probe(struct platform_device *pdev) gpio->base + U300_GPIO_CR); u300_gpio_init_coh901571(gpio); -#ifdef CONFIG_OF_GPIO - gpio->chip.of_node = pdev->dev.of_node; -#endif - err = gpiochip_add_data(&gpio->chip, gpio); - if (err) { - dev_err(gpio->dev, "unable to add gpiochip: %d\n", err); - goto err_no_chip; - } - - err = gpiochip_irqchip_add(&gpio->chip, - &u300_gpio_irqchip, - 0, - handle_simple_irq, - IRQ_TYPE_EDGE_FALLING); - if (err) { - dev_err(gpio->dev, "no GPIO irqchip\n"); - goto err_no_irqchip; + girq = &gpio->chip.irq; + girq->chip = &u300_gpio_irqchip; + girq->parent_handler = u300_gpio_irq_handler; + girq->num_parents = U300_GPIO_NUM_PORTS; + girq->parents = devm_kcalloc(gpio->dev, U300_GPIO_NUM_PORTS, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) { + err = -ENOMEM; + goto err_dis_clk; } - - /* Add each port with its IRQ separately */ for (portno = 0 ; portno < U300_GPIO_NUM_PORTS; portno++) { struct u300_gpio_port *port = &gpio->ports[portno]; @@ -700,16 +692,21 @@ static int __init u300_gpio_probe(struct platform_device *pdev) port->gpio = gpio; port->irq = platform_get_irq(pdev, portno); - - gpiochip_set_chained_irqchip(&gpio->chip, - &u300_gpio_irqchip, - port->irq, - u300_gpio_irq_handler); + girq->parents[portno] = port->irq; /* Turns off irq force (test register) for this port */ writel(0x0, gpio->base + portno * gpio->stride + ifr); } - dev_dbg(gpio->dev, "initialized %d GPIO ports\n", portno); + girq->default_type = IRQ_TYPE_EDGE_FALLING; + girq->handler = handle_simple_irq; +#ifdef CONFIG_OF_GPIO + gpio->chip.of_node = pdev->dev.of_node; +#endif + err = gpiochip_add_data(&gpio->chip, gpio); + if (err) { + dev_err(gpio->dev, "unable to add gpiochip: %d\n", err); + goto err_dis_clk; + } /* * Add pinctrl pin ranges, the pin controller must be registered @@ -729,9 +726,8 @@ static int __init u300_gpio_probe(struct platform_device *pdev) return 0; err_no_range: -err_no_irqchip: gpiochip_remove(&gpio->chip); -err_no_chip: +err_dis_clk: clk_disable_unprepare(gpio->clk); dev_err(&pdev->dev, "module ERROR:%d\n", err); return err; From patchwork Fri Sep 13 11:35:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 173751 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp37936ilq; Fri, 13 Sep 2019 04:35:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqy6AomLcG26k0WKil9ayeR4Ha829EiAZnSpUSh3KRMJi9obmoIGEpKdDNcPRx3CtelM7n1B X-Received: by 2002:a05:6402:1845:: with SMTP id v5mr41705076edy.130.1568374541828; Fri, 13 Sep 2019 04:35:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568374541; cv=none; d=google.com; s=arc-20160816; b=tYtQ8/YuAHJoOAxQu00hkaNzXcFviUYvDezMq0Ivh1rIvB/NZslBtxBsruQVIK64Da LJ6jqmigisEBHlPn/xFZL6gc0cm1pqoNn35rV/3QeDPaApBqzM3QSr0WwL90juVi+Gwr kfdSvFxJ4GBjChF1C6wKcGwnMDdwZXFRfO+T9cgpvmwWKnTICKcHj0WUq0ctcM/8iAU5 IYQx9kP97Ag/IP7uuq1PAzFbFQo+MM3g27pq4w1hwlv1oSb3gkOA48EWTNGNT2mdjGOf siDBhfDXR6OSxuS4tfmFjpIsJc50ePqeTaa1rbK8mZy7uFlrWsOsVW+ehx3PyLxdWQr9 MFaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=XxmY4f1RQi74zXyerk/mcobxBi1tw34QoigTbNp/Les=; b=HJbyJrVTUewkrWQOdJmk/w0QgcNThJBpfxmMKDD4OB9SRvbCk0A0+R+MoSJLv7I7bd W86oQjUKqKxH3tg4H+KOvKdGpSG2DK3vqJI3GtwVT1kdmNBnqq/ZAAV92x0zzI5Qxj5F q28dRmUmln74afA7wPrz9n1rXKayS4EvYu4vDvnLP9wyb5kricJFNEhAQFfRo4lXkFSt gXGIoAy1zcr+HN8L7ml8S0OZNho53CoYf81daRoU69KX2xwAJjNtLG3PYdAVXI3iqgWK VkNwkmsyEjHoEP6aSNVnZDtEGkc6txpc9fUtEwwFQNa4NrqY9fty73URFo7h8Vs4Uqpm iZlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gUggQK5Z; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si17870968edm.313.2019.09.13.04.35.41; Fri, 13 Sep 2019 04:35:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gUggQK5Z; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727848AbfIMLfl (ORCPT + 5 others); Fri, 13 Sep 2019 07:35:41 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:33166 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfIMLfl (ORCPT ); Fri, 13 Sep 2019 07:35:41 -0400 Received: by mail-lf1-f66.google.com with SMTP id d10so21863378lfi.0 for ; Fri, 13 Sep 2019 04:35:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XxmY4f1RQi74zXyerk/mcobxBi1tw34QoigTbNp/Les=; b=gUggQK5Z9FaO57HcFWvFxo21GsklUZRbC4F+d3IkQeVwRUppCxRSkWuAdnqc/ADknw 1aMT5MhJ0OREevh1CqRsvkAd4CkNWqwdfWdAeEK1wxFrSf4IWK+IrpK+aZmuw/R6tT89 XcA3pKq2xRa9ZerAH4cSNQBU77k+OGhJ6HM7u8brhi5Ut/39b1dddQq43npHB94fXyKN fjrpWrEXYu93sj7vouZHdYY9imA9aYfF+vEv9bewiP5jupqAiyqTx1sMTRSnYphy02KF OK5Yg8sJMtqQPeNJI52VdqfWJztts+DyR9a8Hkf+ybJe7W2n5TGeVugYLOFBvJJASQHM gKlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XxmY4f1RQi74zXyerk/mcobxBi1tw34QoigTbNp/Les=; b=NWV4vJrK+5fw7zsMHl7tqitkhrIzeAkL1l1mCw12GJY5Ilf3I9hMAnUVJIcxNuo6E8 JllFkJzRUyJRi2ZT8VcuB1kuHELkyoNE/ZuIabNhFcWz5JC3yVECGMiAGEhLuyzUwVks YQUsazC0CdQS+7kGsItyPtBcbboLhIhhz/mAke23U4zIRk2CezyFa/FpiRlxAcn5wV7X 7PfISrMUATBK5OlBa/RMMWH0kVVrogAPWUluGj/ZRtAyry7SqqcP7hRi60MxER93RctT m+4sdB8Qj5t9O3YPNK/W25tRLVXwirIX2PifwMLl6CHe4pVKoX+YHP4QI+cHlrkOA6j6 uEbQ== X-Gm-Message-State: APjAAAU6u1Gv7JhpWb+nfHWQBDhdNRx1kYDAPmm4Dazh3EQP6Bki+xc7 Z0RldjiBjdwy5xkEfTndkCjeNEF79vH95MFT X-Received: by 2002:ac2:47e3:: with SMTP id b3mr29486787lfp.80.1568374538928; Fri, 13 Sep 2019 04:35:38 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v17sm6177440ljh.8.2019.09.13.04.35.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 04:35:37 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Joshua Henderson , Thierry Reding Subject: [PATCH 2/6] pinctrl: pic32: Pass irqchip when adding gpiochip Date: Fri, 13 Sep 2019 13:35:26 +0200 Message-Id: <20190913113530.5536-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190913113530.5536-1-linus.walleij@linaro.org> References: <20190913113530.5536-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Joshua Henderson Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-pic32.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) -- 2.21.0 diff --git a/drivers/pinctrl/pinctrl-pic32.c b/drivers/pinctrl/pinctrl-pic32.c index e7f6dd5ab578..7e4c5a08a932 100644 --- a/drivers/pinctrl/pinctrl-pic32.c +++ b/drivers/pinctrl/pinctrl-pic32.c @@ -2203,6 +2203,7 @@ static int pic32_gpio_probe(struct platform_device *pdev) u32 id; int irq, ret; struct resource *res; + struct gpio_irq_chip *girq; if (of_property_read_u32(np, "microchip,gpio-bank", &id)) { dev_err(&pdev->dev, "microchip,gpio-bank property not found\n"); @@ -2240,25 +2241,23 @@ static int pic32_gpio_probe(struct platform_device *pdev) bank->gpio_chip.parent = &pdev->dev; bank->gpio_chip.of_node = np; + girq = &bank->gpio_chip.irq; + girq->chip = &bank->irq_chip; + girq->parent_handler = pic32_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; + girq->parents[0] = irq; ret = gpiochip_add_data(&bank->gpio_chip, bank); if (ret < 0) { dev_err(&pdev->dev, "Failed to add GPIO chip %u: %d\n", id, ret); return ret; } - - ret = gpiochip_irqchip_add(&bank->gpio_chip, &bank->irq_chip, - 0, handle_level_irq, IRQ_TYPE_NONE); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to add IRQ chip %u: %d\n", - id, ret); - gpiochip_remove(&bank->gpio_chip); - return ret; - } - - gpiochip_set_chained_irqchip(&bank->gpio_chip, &bank->irq_chip, - irq, pic32_gpio_irq_handler); - return 0; } From patchwork Fri Sep 13 11:35:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 173752 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp37998ilq; Fri, 13 Sep 2019 04:35:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqwH4WggF9Cx/ofa68P25aaYJWyBFQTwmVzj5synkTGXIIK4GNV17wp6FuAtCEyLvcLwP4QC X-Received: by 2002:a17:906:d149:: with SMTP id br9mr29857590ejb.185.1568374544822; Fri, 13 Sep 2019 04:35:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568374544; cv=none; d=google.com; s=arc-20160816; b=faddWXwjxEjjpi7tL/uvXDEzkr7wBfMFJRYgMfm8g+0kr63nUMULJc+gmgW9EaG2rA mu8xxJyA+t9p45bNhXyK1wJ4KKTFku0ImJVUMNN0/Yx0nwkhjEP/B0svrNkBDtBAsL4M +TMfctZnmTRFQ50bp7Dsd9cXxGBrAuL9QBCh+H7v2+CluEh5I4McmyZAXZFn8MCu3uVp IImIupGJnJGWvL7U4uGoBQuajkxQUwz7LStZqnT7BWhx4YV1tejXhGok6JjqC7GoTcvC CXA/uSTKi8C8UJJWqm5684c/TqsWw44+MNvXrtbBC2lh8QIXB7q9ZioRB05m6a+BQ3Ub D07g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=w9fEQCsJxJRtCSmdQt5g3lXraTG5twe5gH5I2a/g70s=; b=dUaVq1mMsKALwe8LwPrQ3llz/z9Z4zqdAuNgB+fZ9vpqXR2PWcwUyQPggp+u9pmNOK 3VZOKQU1PqxVbESb95QuO9yeO/aX07NQfpop0gWor8qy+xZqXB3pm5ehUpEpKwLuJrTy /9C0M/xI6OD2yH2V5Tsyne26AujgM8wEC5/PJgXJ8+9MGwfIqQNDvXbkTKvahIY5VTc3 3T6LGcP/V4xDQd3VLS4ynpmDRRqCKrKBVKf/AkkcHv7YRV7Fj6PJJwLz6QdYnhuvjjRO HVvmt+CgTE3AkGxzFbifxkLlKM5DFIrXwOCcpnysuB8b2Umm2rnPUC3dOWGGYpFOSzVe QL3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Bx9auY4Q; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si17870968edm.313.2019.09.13.04.35.44; Fri, 13 Sep 2019 04:35:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Bx9auY4Q; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728312AbfIMLfo (ORCPT + 5 others); Fri, 13 Sep 2019 07:35:44 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:40446 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfIMLfo (ORCPT ); Fri, 13 Sep 2019 07:35:44 -0400 Received: by mail-lj1-f195.google.com with SMTP id 7so26722278ljw.7 for ; Fri, 13 Sep 2019 04:35:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=w9fEQCsJxJRtCSmdQt5g3lXraTG5twe5gH5I2a/g70s=; b=Bx9auY4Q3guRMod2775tCeixOoq5q/yKUCLLJwup/z4ikpAfXHNNdPs/GjtUBUwPaM 3llzndW7ISKVxqa3svRZzV+tQ3FccGDs9WBwKExSd6OsBz3eRZmi39Oi9u012cwvQ5gJ DPNVSQiujOL4XJOsOhywiTB6HKRm0+D0KSyk370Hiyy/JEawPi2Zu7mg2pBNMARtbvoE 7NvtTKu8JNJKikInL/WibchMWDJZU3PK84QfxX0HODN6jSLD0MSontiJmftKMxiurdH5 rdaRizfX6D8vxbOfJyJrA13X9W7+OpXHzepVEM9WyGwOVU0LzRrWL3NECtKF6Qo9v69K 74lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=w9fEQCsJxJRtCSmdQt5g3lXraTG5twe5gH5I2a/g70s=; b=lva8fLvuTA3oGGlyIk+EzKuMW2j6HA76xmpQP9/hrK6E9SCXiPbMZBr+1fiVlAJ53Q xy+cOFr/I+P0BzcQynnZocKj8/IftRUEwpi4YOgqoMn9J28Erm5XA/d0D+JKkXU+9I59 0/1CCFPfUSa2YEJP7KcLPhs/C3dJZhRoWZDkwvs00yQYxWKqgT9YGAjVjoBNLnu2sTE/ IIF51M3iaqvY5IggUabe+ZwU5k5KrUm1ZL5LYfeKlOIG7kRm2ldjRsq4LIa7VycxF9LA d5IHXLaJF1avbmjwtnkFkK89iNILsYe1/a2ag3QvFejr4fubxCD+OdtzPWaYnpHTjJj9 hEBQ== X-Gm-Message-State: APjAAAUmq+lKrUpNF7vwoZJnNtZLmA6yK4UiwFMhYUHkaILHei8t9oQE JPZNdizNXvLp3CqWjcIcOWsTIiIZJben0xOf X-Received: by 2002:a2e:9250:: with SMTP id v16mr18855229ljg.199.1568374541183; Fri, 13 Sep 2019 04:35:41 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v17sm6177440ljh.8.2019.09.13.04.35.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 04:35:40 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Viresh Kumar , Shiraz Hashim , Thierry Reding Subject: [PATCH 3/6] pinctrl: spear/plgpio: Pass irqchip when adding gpiochip Date: Fri, 13 Sep 2019 13:35:27 +0200 Message-Id: <20190913113530.5536-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190913113530.5536-1-linus.walleij@linaro.org> References: <20190913113530.5536-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Viresh Kumar Cc: Shiraz Hashim Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/spear/pinctrl-plgpio.c | 47 ++++++++++++-------------- 1 file changed, 21 insertions(+), 26 deletions(-) -- 2.21.0 Acked-by: Viresh Kumar diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c index 9d906474f3e4..c4c9a2971445 100644 --- a/drivers/pinctrl/spear/pinctrl-plgpio.c +++ b/drivers/pinctrl/spear/pinctrl-plgpio.c @@ -569,40 +569,35 @@ static int plgpio_probe(struct platform_device *pdev) } } - ret = gpiochip_add_data(&plgpio->chip, plgpio); - if (ret) { - dev_err(&pdev->dev, "unable to add gpio chip\n"); - goto unprepare_clk; - } - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - dev_info(&pdev->dev, "PLGPIO registered without IRQs\n"); - return 0; + if (irq > 0) { + struct gpio_irq_chip *girq; + + girq = &plgpio->chip.irq; + girq->chip = &plgpio_irqchip; + girq->parent_handler = plgpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(&pdev->dev, 1, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->parents[0] = irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_simple_irq; + dev_info(&pdev->dev, "PLGPIO registering with IRQs\n"); + } else { + dev_info(&pdev->dev, "PLGPIO registering without IRQs\n"); } - ret = gpiochip_irqchip_add(&plgpio->chip, - &plgpio_irqchip, - 0, - handle_simple_irq, - IRQ_TYPE_NONE); + ret = gpiochip_add_data(&plgpio->chip, plgpio); if (ret) { - dev_err(&pdev->dev, "failed to add irqchip to gpiochip\n"); - goto remove_gpiochip; + dev_err(&pdev->dev, "unable to add gpio chip\n"); + goto unprepare_clk; } - gpiochip_set_chained_irqchip(&plgpio->chip, - &plgpio_irqchip, - irq, - plgpio_irq_handler); - - dev_info(&pdev->dev, "PLGPIO registered with IRQs\n"); - return 0; -remove_gpiochip: - dev_info(&pdev->dev, "Remove gpiochip\n"); - gpiochip_remove(&plgpio->chip); unprepare_clk: if (!IS_ERR(plgpio->clk)) clk_unprepare(plgpio->clk); From patchwork Fri Sep 13 11:35:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 173753 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp38030ilq; Fri, 13 Sep 2019 04:35:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqyY3G6shly0iu8ZKxAw+pzd6vEr5M4/AtDrzbEQwMcFLCtIVthzDfyfeSlPiZ5ar2aHjElo X-Received: by 2002:a50:9250:: with SMTP id j16mr47286068eda.160.1568374546457; Fri, 13 Sep 2019 04:35:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568374546; cv=none; d=google.com; s=arc-20160816; b=q5OG6+R9OQ5I6jW8u8Ir2NCeJpfsECdncSzsR4eXp9nnvmyilY1keU5D/Q3GwbgyIY FRcRjJAYfnoeptW1fn2BHW+8E8JV09mNC3OVwTWld55txephXLFuQQmEeXVNd569F/8J 2zcBNCs7LcKPpYDRlQb2u3g5XLkEkK7JAo3NXGbpbQDt29thiZE0Ece7Y6pqMHg0sHTi xI4WbAqFfCy5CywuvUqGm7lX8ElyS+fzd2M79WPEjoop5Nm0kRRhs5xel+JWUu4SkZP6 nSNWm1LH3NIH3huGtExku1bofX64UfgimBXPwNhs/is/w0eS61MfWwMK0QraapNj2pyd 5O5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/iNsOMpID3q2zsOyYQIhDoGSptuJapIiBbVcWgviOv8=; b=sfHSr6lv/jMj/FkvSeQK8rCANqxzVkJ7B3BH6iEDzCwxuEFfI8OreeVSUtOXN+/qt4 RlePSae9CP9NutUSShHOvoJ2kf8UWZmCWeeCK8kLMvMAoAzWfMdvbtui6csIDhgVSSUl t1b0d3Uy7xtg1lzYIveuggJ2Vvr9zU11gavEb4kSZL6NRfgwuN9/tTvrIh+Bmi8RJ9nU L7te5g3RIWy8VgTcmEC2N68qmG8k9oM/nVyxk/I1Th0qRU/5WdreImlwpTFDarW97hQv G/ZuqQwgRIwUsuACRKwq6exXOn4u8DPVcwKr4r2QACbi5NVAqoTyIowHQzoXq6m5SZ2i /vDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="twkc2kJ/"; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si17870968edm.313.2019.09.13.04.35.46; Fri, 13 Sep 2019 04:35:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="twkc2kJ/"; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728631AbfIMLfp (ORCPT + 5 others); Fri, 13 Sep 2019 07:35:45 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:40451 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfIMLfp (ORCPT ); Fri, 13 Sep 2019 07:35:45 -0400 Received: by mail-lj1-f196.google.com with SMTP id 7so26722389ljw.7 for ; Fri, 13 Sep 2019 04:35:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/iNsOMpID3q2zsOyYQIhDoGSptuJapIiBbVcWgviOv8=; b=twkc2kJ/SbFcCIamyZTxQMh+agBJF6dSjUFfU+V4dpPM0GzPmiWhqST8lqXOPUbQ3s Lc1OGUUsi+51wLR55dgH9Eae6RsV5wZMl48zU2ynMtwLst9dkV1OytbsVetrzqNCIx0l ngSl2/h9FFj0nPxgyRkDqeNvqaXIhEzVsJQRti9077gm1srKybn/9EFePjqzMdo2kEJs As9DH3YUtB59lv34oIsA/xQBlgYTjsc7y/yG/JOc3B0CgwYVuVGOqFWfpdxjCEeQlFMR qHatEjIw6IIkaSgMt5XOhIvzDj8g3itvwxxRuc69bxGvZXOj2hCrDQWIRV7l8hmn+thm 7DtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/iNsOMpID3q2zsOyYQIhDoGSptuJapIiBbVcWgviOv8=; b=bMZUrG4VNpAVxFJcTn12d0/9MRSWye/zKZce/Pi7sFuy7Uh3qoRTyzH30VBvgqv8vL W3LY+T854liORafBm3AwAmnmy5PMj8Pb393D4EvaQkqnbwPatQPWOOi7P6djYw5E3I1I B0wxwbZitfk2x77pBFwOn+zfY2eU/DPNdgENrS7YOZYZvyoG15DmBW6kQEZ/YHl36Qr4 mj3i2ycEMwriqyr1DG3QUpjCAOpwh/jqefNFDcfpNokD9sLgFJ/yHqI9KgoBzYkREx/B 2gnAR9sRLgKyguZxxcxCJy51bogMeLS0iWyI2cfGxTRWKfnn1A/TmM8xnek4oGrE2tby 9U0w== X-Gm-Message-State: APjAAAUqjdiCVc8r+qEG/H91uui9v/rQeCEdnD8DeiUUfUQMKO5NaxPH nqLaMJ1Rs1lcvtixXMz0hEM0ruomsJjL/XS0 X-Received: by 2002:a2e:9c87:: with SMTP id x7mr17704483lji.207.1568374543456; Fri, 13 Sep 2019 04:35:43 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v17sm6177440ljh.8.2019.09.13.04.35.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 04:35:42 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Tomer Maimon , Kun Yi , Thierry Reding Subject: [PATCH 4/6] pinctrl: nuvoton: npcm7xx: Pass irqchip when adding gpiochip Date: Fri, 13 Sep 2019 13:35:28 +0200 Message-Id: <20190913113530.5536-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190913113530.5536-1-linus.walleij@linaro.org> References: <20190913113530.5536-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Tomer Maimon Cc: Kun Yi Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 32 +++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) -- 2.21.0 diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 17f909d8b63a..22077cbe6880 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -1954,6 +1954,22 @@ static int npcm7xx_gpio_register(struct npcm7xx_pinctrl *pctrl) int ret, id; for (id = 0 ; id < pctrl->bank_num ; id++) { + struct gpio_irq_chip *girq; + + girq = &pctrl->gpio_bank[id].gc.irq; + girq->chip = &pctrl->gpio_bank[id].irq_chip; + girq->parent_handler = npcmgpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(pctrl->dev, 1, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) { + ret = -ENOMEM; + goto err_register; + } + girq->parents[0] = pctrl->gpio_bank[id].irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->gpio_bank[id].gc, &pctrl->gpio_bank[id]); @@ -1972,22 +1988,6 @@ static int npcm7xx_gpio_register(struct npcm7xx_pinctrl *pctrl) gpiochip_remove(&pctrl->gpio_bank[id].gc); goto err_register; } - - ret = gpiochip_irqchip_add(&pctrl->gpio_bank[id].gc, - &pctrl->gpio_bank[id].irq_chip, - 0, handle_level_irq, - IRQ_TYPE_NONE); - if (ret < 0) { - dev_err(pctrl->dev, - "Failed to add IRQ chip %u\n", id); - gpiochip_remove(&pctrl->gpio_bank[id].gc); - goto err_register; - } - - gpiochip_set_chained_irqchip(&pctrl->gpio_bank[id].gc, - &pctrl->gpio_bank[id].irq_chip, - pctrl->gpio_bank[id].irq, - npcmgpio_irq_handler); } return 0; From patchwork Fri Sep 13 11:35:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 173754 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp38076ilq; Fri, 13 Sep 2019 04:35:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqznVBWXVnUo4TOuRyIQbVQBmGIMHrfFyK3+o0DzFlZr6dwg65CDUMc2t6GDOdT1VQTuGJqu X-Received: by 2002:a17:906:8158:: with SMTP id z24mr38539886ejw.54.1568374549112; Fri, 13 Sep 2019 04:35:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568374549; cv=none; d=google.com; s=arc-20160816; b=k2rnJK5DZzoAD1Qx/d1e6pIgepTXVwWI9tJrAdZMX0Tdkb7RixWoTJSuzEVsGo+6Me KAFJIOspbwVahisBAfWAyL22duvb/nRMtd/J1/nlZVOSgDlLJaP3JX71Ysm4ZSbG9aqr wiGUat0K0S2HhJqASEzhrpVIw7b+oBGJCBH4lOVDI+VBUZDRS5HEd3HmfwXOEvQNihAu +IvnwI37KNRnA//gRBeFoVSl5qi2UMzTQqrE0PTZ+56DksN1qye72l8sykJ89yCksuro E59jU84loQF7whFymCtUpuOk2MPqIqyvnJ5UZHUzCJidaKRzOrsv/gliHKKWDh8QaSLZ 3XUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mM74njTvgowkp4HOwb8Z+3NrXc9FZ3ZrZS3AnnZSph8=; b=cmlmr2RdSaCYl6TCRtd//FnEAp/84asN13HAFIUgGU6KiNVstlA6y5ZNIh34Mqx+A9 vpcv4gIzTv2nRMj2+C832cPvHHcTDlrjE7hfQ3ji41vhGqsGoJhT+QlRgQBBe9Mazk60 sj9A2ZqCJ5GlwKDttHq0dkmbkbxMtow5UULJcReqTGAgNra8wjwe6M8hnjWydbQLZGac AfSrXuZFvwqMx82kI+SfQKIz6tgOaR0npSakSZDlIamH/BJElFo14uUl5wTqc+3QMe8K CQnApq+tIKYFBFjHDqSrpFULv4/yTKK4Bx2Pp3YZMra6Twe6Sny+ePyehei3ejvlOdl6 4oXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ycCLcroR; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si17870968edm.313.2019.09.13.04.35.48; Fri, 13 Sep 2019 04:35:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ycCLcroR; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728558AbfIMLfs (ORCPT + 5 others); Fri, 13 Sep 2019 07:35:48 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:43869 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfIMLfs (ORCPT ); Fri, 13 Sep 2019 07:35:48 -0400 Received: by mail-lj1-f196.google.com with SMTP id d5so26757953lja.10 for ; Fri, 13 Sep 2019 04:35:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mM74njTvgowkp4HOwb8Z+3NrXc9FZ3ZrZS3AnnZSph8=; b=ycCLcroRcdHD6/2N6QnZpqp4zfmPr/EmZ8PAOG+M6urdXlqy5/20Woijqky/BDhZE9 Tu2aDDvtNxg4fBgFNubTRHzQbyVq6P7hRbdqLWDzwJpX6A/HpUif/mXPdMGc+oOLFxdI VdJkfg/f2/RIYZt/GiGJO3WrD/ZXPlyzdlpexLMewNZTJ5kzUMZrFfIPEhnJcsnL0SVX kaEYGico8UF5Kql+VRnm0aHaGGgP6eGbNd41k/BUxOSwHMaaqWLm9pqlHhzhGDT0SEip Lbq4zI4sruNkaOPpftnJb3d8v+Bhu+bFzxupfuYzPIJ/I4ywgwwue6pCMjrzAbygWHDf SxbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mM74njTvgowkp4HOwb8Z+3NrXc9FZ3ZrZS3AnnZSph8=; b=fsTNh9lOfMW7ZebaKzxj6per0ydOuzlgETRysGACaoMpv/srvuWNKk+QT7af9t7FRQ TbkgH5U0Nh/nsp4UKhj9HFkHX1GE6VzfWBk/jKiSf6HC654bvFeTZlbam2+B9PmqcGk8 ixMDAAeTr1XWVkH/yHCWmytyMADUSnIfv6agJbEINcMvMZ5u8OyxwPi92hGMtVUGvKOR qH4BhSCmdLEqY2dxDyiH8mtZdOafGewdb8EDvaXIAGs6LB8RO16cKQnydw6dZTgk3dNB iWCLo8Q1RE/e2ApNC4nAMFsjPKmUA7WKpiYq4Um1IH1dYHQmVCrfS7sCTZmBBca8roHE 8ETg== X-Gm-Message-State: APjAAAV6YsTdDKgus7LifY+WYx0J9GZHjPhpieUrWIp/HgRLxRMvHnHv +eWKquojT114BJltgSStkxm0/S4EUEEMS2g2 X-Received: by 2002:a2e:a17a:: with SMTP id u26mr29865455ljl.137.1568374545552; Fri, 13 Sep 2019 04:35:45 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v17sm6177440ljh.8.2019.09.13.04.35.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 04:35:44 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Barry Song , Yuping Luo , Rongjun Ying , Thierry Reding Subject: [PATCH 5/6] pinctrl: sirf: Pass irqchip when adding gpiochip Date: Fri, 13 Sep 2019 13:35:29 +0200 Message-Id: <20190913113530.5536-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190913113530.5536-1-linus.walleij@linaro.org> References: <20190913113530.5536-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Barry Song Cc: Yuping Luo Cc: Rongjun Ying Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/sirf/pinctrl-sirf.c | 43 ++++++++++++++--------------- 1 file changed, 20 insertions(+), 23 deletions(-) -- 2.21.0 diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c index 780c31bb4009..1ebcb957c654 100644 --- a/drivers/pinctrl/sirf/pinctrl-sirf.c +++ b/drivers/pinctrl/sirf/pinctrl-sirf.c @@ -785,6 +785,7 @@ static int sirfsoc_gpio_probe(struct device_node *np) struct sirfsoc_gpio_bank *bank; void __iomem *regs; struct platform_device *pdev; + struct gpio_irq_chip *girq; u32 pullups[SIRFSOC_GPIO_NO_OF_BANKS], pulldowns[SIRFSOC_GPIO_NO_OF_BANKS]; @@ -816,36 +817,33 @@ static int sirfsoc_gpio_probe(struct device_node *np) sgpio->chip.gc.parent = &pdev->dev; sgpio->chip.regs = regs; - err = gpiochip_add_data(&sgpio->chip.gc, sgpio); - if (err) { - dev_err(&pdev->dev, "%pOF: error in probe function with status %d\n", - np, err); - goto out; - } - - err = gpiochip_irqchip_add(&sgpio->chip.gc, - &sirfsoc_irq_chip, - 0, handle_level_irq, - IRQ_TYPE_NONE); - if (err) { - dev_err(&pdev->dev, - "could not connect irqchip to gpiochip\n"); - goto out_banks; - } - + girq = &sgpio->chip.gc.irq; + girq->chip = &sirfsoc_irq_chip; + girq->parent_handler = sirfsoc_gpio_handle_irq; + girq->num_parents = SIRFSOC_GPIO_NO_OF_BANKS; + girq->parents = devm_kcalloc(&pdev->dev, SIRFSOC_GPIO_NO_OF_BANKS, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) { bank = &sgpio->sgpio_bank[i]; spin_lock_init(&bank->lock); bank->parent_irq = platform_get_irq(pdev, i); if (bank->parent_irq < 0) { err = bank->parent_irq; - goto out_banks; + goto out; } + girq->parents[i] = bank->parent_irq; + } + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; - gpiochip_set_chained_irqchip(&sgpio->chip.gc, - &sirfsoc_irq_chip, - bank->parent_irq, - sirfsoc_gpio_handle_irq); + err = gpiochip_add_data(&sgpio->chip.gc, sgpio); + if (err) { + dev_err(&pdev->dev, "%pOF: error in probe function with status %d\n", + np, err); + goto out; } err = gpiochip_add_pin_range(&sgpio->chip.gc, dev_name(&pdev->dev), @@ -867,7 +865,6 @@ static int sirfsoc_gpio_probe(struct device_node *np) return 0; out_no_range: -out_banks: gpiochip_remove(&sgpio->chip.gc); out: iounmap(regs); From patchwork Fri Sep 13 11:35:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 173755 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp38101ilq; Fri, 13 Sep 2019 04:35:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqyapiqSLTIoUAk0zzq/j3PQQXqH2ftrRsOBoKNPpnurNm1lGr3im6cDWc85MIkThrwjpwwn X-Received: by 2002:a17:906:3b8a:: with SMTP id u10mr39809359ejf.167.1568374550494; Fri, 13 Sep 2019 04:35:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568374550; cv=none; d=google.com; s=arc-20160816; b=Puxli6fCadxPmLIBu0p5bGBnnEAldC3ZGvYXyDajCeo0ofKv8q67qoA10Y2E/PlAkU w8Seu47Fj2BVGXZkbwZVT9HDYbzmZGVJqYyw0kVDNu6IYgQZF/joqoPauHL09OPIsV40 a/iv6kzSzbteRP4iaH+B0NoLce5nz/4zvbk4eRpwQaROuoN1MWK4sSwvT16g5YZJV57h VX5MeT6ufvEfjoSFEfX+g69jyfVSaQqcYKXYrYEMJ7fKDvnYgnoO9TrOLu1yJP+6X7PS CfCm2tiEVxXI8xvCX+qI8jRm9MLHfZtOSoWF50mZV1RdsPUuXWKB5d4wKJoA5B99XgW7 93eA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7fzuXx96XHp0b7ACig7FtB2F9taxVpkAUyhMy/tq29E=; b=yDxXghwEg3zHXoE4oDPQEZsHrYzjFi1/sUii9H3+f37bj682hPqU2ONSokphS4kXhZ nMAg39TkFbJ9loaqUerew7bWPDuLmv/Aw5evaCV85Njpsjy7Zs43XuGMaptuEnl1jrC+ Kwg4iA3RPqm+o3++vs8vaM4A8FqPlXuGRLrf3aon09HAL7wlkLZLcm+R2BAnhp0oPP79 VOlRjUvwA4CynBbg4iRb/pumtoathkA6Rg1WpleZp2WRdi4+h8O2n3nwd4sG7pJIiIbP Qib1R1ckMt6zVzAPsoqrJ9ublTDblL0ua4Kiou53g2d/bthO4XJOaNFMhJo+8bqRopq5 +ifQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lM0jt6TP; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si17870968edm.313.2019.09.13.04.35.50; Fri, 13 Sep 2019 04:35:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lM0jt6TP; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728746AbfIMLfu (ORCPT + 5 others); Fri, 13 Sep 2019 07:35:50 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:46273 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfIMLft (ORCPT ); Fri, 13 Sep 2019 07:35:49 -0400 Received: by mail-lf1-f65.google.com with SMTP id t8so21817559lfc.13 for ; Fri, 13 Sep 2019 04:35:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7fzuXx96XHp0b7ACig7FtB2F9taxVpkAUyhMy/tq29E=; b=lM0jt6TPY/etsbXeH4R4Xy26TsPvqhxo1drL6tOyXyJydYTyC2gPQyOQVMzH99TAAz 8ypmn0z4vySqRJdc8B6KNPlrRoy8eCODduGnAcHs6q2VXQGCjALulNjb3crbNMl66Gxw QiX0lwnqviD5ke0xKV+zpjxb7gmRbXL2iAZYNi4KnSg/7ocbtDYo6rsi5ZI1T7NM4RAO tdwLExLPcEDbr1IazKalqhPtCkm5f+Mq9a0pKMhrWS80YAM++FJubKOutEajf2DYX7iw DqlCq7BbKV8KPhn5DREIvqdpC+9UWtaTHtDksHLWVo23mCBrwYVY4RXfMGD0t4Kq/biv nG+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7fzuXx96XHp0b7ACig7FtB2F9taxVpkAUyhMy/tq29E=; b=nnumPaRmDL1hjCHDmo5t5eHllV9yjwfYTsZuIG8D0hZiJDiYnT4/D3KAwIh1/SjrS5 MkdZJeqy+kGhdPEH1GNrv+XdgWvrQ6ZtA6ZICzTyw4z+i2gTMdlQMLCaCWX9iAF7l+lg tSYbqwLH3ZOtnDdDewXNA0a4GheVoWHCoUG1e10Bk7WkHJ4kQqDl1PrLCbrMBZnn+75T Eqqs4/tqEaJyu/xCO6iDoy+f6cgyroWD6W/VViBLoP4YFfFCpyz38WvesBA12c8GxAQW iqn+kf9mE7EUFei+IOjIvDDOeDkKRUyZ32RD8NUKa/KrGCsDENRvPFp/xj40sqdCc2rj JUIQ== X-Gm-Message-State: APjAAAVs+rZP3hl7LRbMjW71izs5PqSD1rpYS64p81PX5k5IWTe85UCb pH45mCCecbIuzrMtbzhuv6Hx2R4ITSjoCgEw X-Received: by 2002:ac2:52a9:: with SMTP id r9mr9444964lfm.172.1568374547606; Fri, 13 Sep 2019 04:35:47 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v17sm6177440ljh.8.2019.09.13.04.35.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 04:35:46 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Barry Song , Yuping Luo , Rongjun Ying , Thierry Reding Subject: [PATCH 6/6] pinctrl: sirf/atlas7: Pass irqchip when adding gpiochip Date: Fri, 13 Sep 2019 13:35:30 +0200 Message-Id: <20190913113530.5536-6-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190913113530.5536-1-linus.walleij@linaro.org> References: <20190913113530.5536-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Barry Song Cc: Yuping Luo Cc: Rongjun Ying Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/sirf/pinctrl-atlas7.c | 41 ++++++++++++++------------- 1 file changed, 21 insertions(+), 20 deletions(-) -- 2.21.0 diff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c index 924080362bf7..b1a9611f46b3 100644 --- a/drivers/pinctrl/sirf/pinctrl-atlas7.c +++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c @@ -5996,6 +5996,7 @@ static int atlas7_gpio_probe(struct platform_device *pdev) struct gpio_chip *chip; u32 nbank; int ret, idx; + struct gpio_irq_chip *girq; ret = of_property_read_u32(np, "gpio-banks", &nbank); if (ret) { @@ -6048,24 +6049,15 @@ static int atlas7_gpio_probe(struct platform_device *pdev) chip->of_gpio_n_cells = 2; chip->parent = &pdev->dev; - /* Add gpio chip to system */ - ret = gpiochip_add_data(chip, a7gc); - if (ret) { - dev_err(&pdev->dev, - "%pOF: error in probe function with status %d\n", - np, ret); - goto failed; - } - - /* Add gpio chip to irq subsystem */ - ret = gpiochip_irqchip_add(chip, &atlas7_gpio_irq_chip, - 0, handle_level_irq, IRQ_TYPE_NONE); - if (ret) { - dev_err(&pdev->dev, - "could not connect irqchip to gpiochip\n"); - goto failed; - } - + girq = &chip->irq; + girq->chip = &atlas7_gpio_irq_chip; + girq->parent_handler = atlas7_gpio_handle_irq; + girq->num_parents = nbank; + girq->parents = devm_kcalloc(&pdev->dev, nbank, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; for (idx = 0; idx < nbank; idx++) { struct atlas7_gpio_bank *bank; @@ -6084,9 +6076,18 @@ static int atlas7_gpio_probe(struct platform_device *pdev) goto failed; } bank->irq = ret; + girq->parents[idx] = ret; + } + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; - gpiochip_set_chained_irqchip(chip, &atlas7_gpio_irq_chip, - bank->irq, atlas7_gpio_handle_irq); + /* Add gpio chip to system */ + ret = gpiochip_add_data(chip, a7gc); + if (ret) { + dev_err(&pdev->dev, + "%pOF: error in probe function with status %d\n", + np, ret); + goto failed; } platform_set_drvdata(pdev, a7gc);