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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:28 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PULL 01/31] cpu-exec: simplify jump cache management Date: Tue, 30 Jan 2024 09:00:51 +1000 Message-Id: <20240129230121.8091-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Paolo Bonzini Unless I'm missing something egregious, the jmp cache is only every populated with a valid entry by the same thread that reads the cache. Therefore, the contents of any valid entry are always consistent and there is no need for any acquire/release magic. Indeed ->tb has to be accessed with atomics, because concurrent invalidations would otherwise cause data races. But ->pc is only ever accessed by one thread, and accesses to ->tb and ->pc within tb_lookup can never race with another tb_lookup. While the TranslationBlock (especially the flags) could be modified by a concurrent invalidation, store-release and load-acquire operations on the cache entry would not add any additional ordering beyond what you get from performing the accesses within a single thread. Because of this, there is really nothing to win in splitting the CF_PCREL and !CF_PCREL paths. It is easier to just always use the ->pc field in the jump cache. I noticed this while working on splitting commit 8ed558ec0cb ("accel/tcg: Introduce TARGET_TB_PCREL", 2022-10-04) into multiple pieces, for the sake of finding a more fine-grained bisection result for https://gitlab.com/qemu-project/qemu/-/issues/2092. It does not (and does not intend to) fix that issue; therefore it may make sense to not commit it until the root cause of issue #2092 is found. Signed-off-by: Paolo Bonzini Tested-by: Alex Bennée Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20240122153409.351959-1-pbonzini@redhat.com> Signed-off-by: Richard Henderson --- accel/tcg/tb-jmp-cache.h | 8 +++-- accel/tcg/cpu-exec.c | 66 ++++++++++++++-------------------------- 2 files changed, 28 insertions(+), 46 deletions(-) diff --git a/accel/tcg/tb-jmp-cache.h b/accel/tcg/tb-jmp-cache.h index bb424c8a05..4ab8553afc 100644 --- a/accel/tcg/tb-jmp-cache.h +++ b/accel/tcg/tb-jmp-cache.h @@ -13,9 +13,11 @@ #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS) /* - * Accessed in parallel; all accesses to 'tb' must be atomic. - * For CF_PCREL, accesses to 'pc' must be protected by a - * load_acquire/store_release to 'tb'. + * Invalidated in parallel; all accesses to 'tb' must be atomic. + * A valid entry is read/written by a single CPU, therefore there is + * no need for qatomic_rcu_read() and pc is always consistent with a + * non-NULL value of 'tb'. Strictly speaking pc is only needed for + * CF_PCREL, but it's used always for simplicity. */ struct CPUJumpCache { struct rcu_head rcu; diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 67eda9865e..40c268bfa1 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -253,43 +253,29 @@ static inline TranslationBlock *tb_lookup(CPUState *cpu, vaddr pc, hash = tb_jmp_cache_hash_func(pc); jc = cpu->tb_jmp_cache; - if (cflags & CF_PCREL) { - /* Use acquire to ensure current load of pc from jc. */ - tb = qatomic_load_acquire(&jc->array[hash].tb); - - if (likely(tb && - jc->array[hash].pc == pc && - tb->cs_base == cs_base && - tb->flags == flags && - tb_cflags(tb) == cflags)) { - return tb; - } - tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags); - if (tb == NULL) { - return NULL; - } - jc->array[hash].pc = pc; - /* Ensure pc is written first. */ - qatomic_store_release(&jc->array[hash].tb, tb); - } else { - /* Use rcu_read to ensure current load of pc from *tb. */ - tb = qatomic_rcu_read(&jc->array[hash].tb); - - if (likely(tb && - tb->pc == pc && - tb->cs_base == cs_base && - tb->flags == flags && - tb_cflags(tb) == cflags)) { - return tb; - } - tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags); - if (tb == NULL) { - return NULL; - } - /* Use the pc value already stored in tb->pc. */ - qatomic_set(&jc->array[hash].tb, tb); + tb = qatomic_read(&jc->array[hash].tb); + if (likely(tb && + jc->array[hash].pc == pc && + tb->cs_base == cs_base && + tb->flags == flags && + tb_cflags(tb) == cflags)) { + goto hit; } + tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags); + if (tb == NULL) { + return NULL; + } + + jc->array[hash].pc = pc; + qatomic_set(&jc->array[hash].tb, tb); + +hit: + /* + * As long as tb is not NULL, the contents are consistent. Therefore, + * the virtual PC has to match for non-CF_PCREL translations. + */ + assert((tb_cflags(tb) & CF_PCREL) || tb->pc == pc); return tb; } @@ -1012,14 +998,8 @@ cpu_exec_loop(CPUState *cpu, SyncClocks *sc) */ h = tb_jmp_cache_hash_func(pc); jc = cpu->tb_jmp_cache; - if (cflags & CF_PCREL) { - jc->array[h].pc = pc; - /* Ensure pc is written first. */ - qatomic_store_release(&jc->array[h].tb, tb); - } else { - /* Use the pc value already stored in tb->pc. */ - qatomic_set(&jc->array[h].tb, tb); - } + jc->array[h].pc = pc; + qatomic_set(&jc->array[h].tb, tb); } #ifndef CONFIG_USER_ONLY From patchwork Mon Jan 29 23:00:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767427 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1116024wro; Mon, 29 Jan 2024 15:02:00 -0800 (PST) X-Google-Smtp-Source: AGHT+IGjyL//aJPMdkP8dkkOLUZdRc7uRJHVPFJNpQ0wKKDkD/zMsqJnrAmm/dqQ1lRv7aNvkDq2 X-Received: by 2002:a67:fc90:0:b0:46b:18d2:a01d with SMTP id x16-20020a67fc90000000b0046b18d2a01dmr3064548vsp.19.1706569320593; Mon, 29 Jan 2024 15:02:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569320; cv=none; d=google.com; s=arc-20160816; b=OV0ffdSVV4gcenpYq1B5aHqZr8EcO5/84kR0t5FRuVH4apAzhP1Wau5IHnz1kRYWeb QocY/LK+OJ78qEVEbMG09pDHEF3jDgBfJTqRINfE45ZQt+7jdDMhy0gcrR440yJd0XXo SbGxXiscfPYv7TZ8yMxPzrk1PazwVJ1xLAlC9NTqmpxXUQVCy+L3/MFapF3H6H7kaDWx /5gsRlFKaGKVrKmcHJiobNUvAtISsxnulN//gZb0uAnYEFyTCoI/ZRV2C7sot4PcC6uQ r5Nfke0K4yb4JKFqroydVutvCmmM18Ibi7Pb8gmk1vPXZhep4M42EN0m0+fCoNVSVvhP tz8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=M8UjEMO1j2vm3/2aeEMHpkVHZcyY+4Tl4SZGy9Fx+X8=; fh=l3rThTWYtfg9kQ3pwkdseR7wGfUMT6wsJF5cqMswxYY=; b=z8BwysB/UyZQG5kMaT5/txRtrAZUvgmuChUhFSc1OJLuKI/U2IC0VjqOwWe4uM2Ldu myCT7BHNP2m2HV939iat9zVk669YH97NHUK1nQKXeYGBB8TBZZzTyviK0H0tNn+/hUne wk8bKZJw0stqaPqxrqQUQmhaoYKUqeYluQi10KXZKGsu7ZdsBsMfV4mM8ujmG3pZTVvW /NU/xEazhTy+mI27KitBRn4A6LjIu/Vp3MMQSBeIx6rAEHzeXbyHURTKPYyiYVP/bXAq Tce1LDiMjI5OOf9Gl+XelfeSRyv590r/JNPkcIy3TCQxzvALKmMRkgoA1Kjcm5NykE5M cABA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="A5lTa/SJ"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:30 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 02/31] include/exec: Move vaddr defines to separate file Date: Tue, 30 Jan 2024 09:00:52 +1000 Message-Id: <20240129230121.8091-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson Needed to work around circular includes. vaddr is currently defined in cpu-common.h and needed by hw/core/cpu.h, but cpu-common.h also need cpu.h to know the size of the CPUState. [Maybe we can instead move parts of cpu-common.h w. hw/core/cpu.h to sort out the circular inclusion.] Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-7-anjo@rev.ng> Reviewed-by: Richard Henderson [rth: Add include of vaddr.h into cpu-common.h] Signed-off-by: Richard Henderson --- include/exec/cpu-common.h | 13 +------------ include/exec/vaddr.h | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 12 deletions(-) create mode 100644 include/exec/vaddr.h diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index fef3138d29..3109c6b67d 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -3,6 +3,7 @@ /* CPU interfaces that are target independent. */ +#include "exec/vaddr.h" #ifndef CONFIG_USER_ONLY #include "exec/hwaddr.h" #endif @@ -14,18 +15,6 @@ #define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */ #define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */ -/** - * vaddr: - * Type wide enough to contain any #target_ulong virtual address. - */ -typedef uint64_t vaddr; -#define VADDR_PRId PRId64 -#define VADDR_PRIu PRIu64 -#define VADDR_PRIo PRIo64 -#define VADDR_PRIx PRIx64 -#define VADDR_PRIX PRIX64 -#define VADDR_MAX UINT64_MAX - void cpu_exec_init_all(void); void cpu_exec_step_atomic(CPUState *cpu); diff --git a/include/exec/vaddr.h b/include/exec/vaddr.h new file mode 100644 index 0000000000..b9844afc77 --- /dev/null +++ b/include/exec/vaddr.h @@ -0,0 +1,18 @@ +/* Define vaddr. */ + +#ifndef VADDR_H +#define VADDR_H + +/** + * vaddr: + * Type wide enough to contain any #target_ulong virtual address. + */ +typedef uint64_t vaddr; +#define VADDR_PRId PRId64 +#define VADDR_PRIu PRIu64 +#define VADDR_PRIo PRIo64 +#define VADDR_PRIx PRIx64 +#define VADDR_PRIX PRIX64 +#define VADDR_MAX UINT64_MAX + +#endif From patchwork Mon Jan 29 23:00:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767440 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1118261wro; Mon, 29 Jan 2024 15:07:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IF/Z2akgHLGULMvBPFiFNokOFSU7H/REykWLt/sxOFGEarET4iBM8yF6oISZqS+ecjSVJZj X-Received: by 2002:a05:6214:20ea:b0:686:9de6:9ee3 with SMTP id 10-20020a05621420ea00b006869de69ee3mr6460757qvk.42.1706569639001; Mon, 29 Jan 2024 15:07:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569638; cv=none; d=google.com; s=arc-20160816; b=zCvxoTWO8T2H/FQNuIrt5u/g86tgkvvxeZH1EIwdojspeBBbe+9c6eDa5KUUYaXAiX N0gRdtMC+W8NcSQxaNvHqkYxaIZI1Q/QMdj4o92ApK9uihq/vV1BdLlbkaIc9eqybOJE CZ7hAOc6uw7FT4I0JGN1kRNu8i8Nvv4f3BGNckYNCLiZ+PjAC6o39NlAz9vI6Wmkagni JT4WkJoABYFKGfMX7nG5+3jT81hmEyS0bVPkxX2oSmycRLcLd/hQlRZl+pP/TCSunb1B 5A5DJg/yBWGzssVgvJEYp7lE0xZh7DZVn1STdwtdjY4/shdkJJE3aPofTX1dx9BjsXBX fiTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ADBUc3fCETku7gSMiSslG1Ep+CbDq8k+uqgwv8Xr0vk=; fh=l3rThTWYtfg9kQ3pwkdseR7wGfUMT6wsJF5cqMswxYY=; b=SSbCXgTFMH21Wo1Hc4msUJHiCntbDLk3CEeTvLtUgW89GxeMszgeFy01iPZyn8QHY/ 7/Jm/pET5BmvPRb0S01eqXdLuFQLUFX0DoDZRA1dxFZYLxHZVScdG9UUqMxnPp94dW6p npR1CADu89xEjCEcH1ELxz9vjUEkXaQpwrGC9jGkGgpbNIG0a+RuTIdagWhFlNNOrVEE PQhEtxOVHzbjHpRLNGMUfL99pyVUmaort3vxNIWs0NpwQtgwlybekN7c9r2a0aMwA8+C rJbRDtupOnqt/0txkYdJQnSl/U0LjT1rzLJg4ZLDS6IwDTR/FVCxa0FQllaakK3hdeBM 9h+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RMgObZ+d; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:32 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 03/31] hw/core: Include vaddr.h from cpu.h Date: Tue, 30 Jan 2024 09:00:53 +1000 Message-Id: <20240129230121.8091-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson cpu-common.h is only needed for vaddr Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-8-anjo@rev.ng> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 238c02c05e..db58f12233 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -22,8 +22,8 @@ #include "hw/qdev-core.h" #include "disas/dis-asm.h" -#include "exec/cpu-common.h" #include "exec/hwaddr.h" +#include "exec/vaddr.h" #include "exec/memattrs.h" #include "exec/tlb-common.h" #include "qapi/qapi-types-run-state.h" From patchwork Mon Jan 29 23:00:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767454 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119888wro; Mon, 29 Jan 2024 15:12:43 -0800 (PST) X-Google-Smtp-Source: AGHT+IHU4eBOqpHVI4wPq6v2U9jVcpUbdSik5In7A/sM7k5pkHfnc/spBoIP5wTGUD446p38Irmj X-Received: by 2002:a25:9b44:0:b0:dc6:9c4f:9e7f with SMTP id u4-20020a259b44000000b00dc69c4f9e7fmr418913ybo.18.1706569962925; Mon, 29 Jan 2024 15:12:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569962; cv=none; d=google.com; s=arc-20160816; b=FitXTqIX8J38PuLkVGFZODkpGZIf1SaHnn5q0045Uy3k4Dg1TE5vz9GWuFnLGo0NSz ODXx1yaoWv9ZWUjkn7/zEcksi5LjUaXcNrm2bNIlhEbzauVtWRCG9sFibRH+DriOx0vc oWGuULs6KlqOfc/PrCvCTI7xWsjMYOL9eNzYeCVaYIqvdnsXvrpiHyeSE8ulZiwc9WRP ckC1e2r6qoZ5g2ikx8OLDxor+5I1fSrixjKNVTq2Klj7nVPrzLZeGk0ZTU8J9Os8Fd/5 jIRMkwUh2YDDQUwiniDXOOoXg3Yz40QkcCivMkHQ63coDhvSfm2KkhAKusrKW9VJcKIH kgsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9+/x34hZ0Savjf5fK/vjCGUP8dkpzXoOGlANXKjp7EA=; fh=l3rThTWYtfg9kQ3pwkdseR7wGfUMT6wsJF5cqMswxYY=; b=mOkIMWeb/aGUFePbciFO9hA4XVc4AXTHqwPYJDfs5sX3VTqVBqBZBunYLagO8XR31W WcWiuvL2grNY0phiEbNFjgy8Txo0cfuWtt4eTOJmbKFSZSLlZo4jB6UEE6Jye8SGVQMO BCj6e/TC/dxliURxQyyfzrLCVI3PbWdGfQY8UUwY36CKtoY1iEIAiD4Jf9m64aizo/Iv bsubwM66yZCNFPlofQaYxnFfNYG5OuLFR+/Z3ddHfVzZCIeIy1/KUv6Pgqk3apuskxtd GNoMfX+cNjAgEsPi+aZZKIOdSEjMYTLa2mSJPhsSREMd7l+D/wcHO9PqMu+GHa/LRJ1a aHuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WGZwP0Kh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:34 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 04/31] target: Use vaddr in gen_intermediate_code Date: Tue, 30 Jan 2024 09:00:54 +1000 Message-Id: <20240129230121.8091-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::335; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson Makes gen_intermediate_code() signature target agnostic so the function can be called from accel/tcg/translate-all.c without target specifics. Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-9-anjo@rev.ng> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/exec/translator.h | 2 +- target/alpha/translate.c | 2 +- target/arm/tcg/translate.c | 2 +- target/avr/translate.c | 2 +- target/cris/translate.c | 2 +- target/hexagon/translate.c | 2 +- target/hppa/translate.c | 2 +- target/i386/tcg/translate.c | 2 +- target/loongarch/tcg/translate.c | 2 +- target/m68k/translate.c | 2 +- target/microblaze/translate.c | 2 +- target/mips/tcg/translate.c | 2 +- target/nios2/translate.c | 2 +- target/openrisc/translate.c | 2 +- target/ppc/translate.c | 2 +- target/riscv/translate.c | 2 +- target/rx/translate.c | 2 +- target/s390x/tcg/translate.c | 2 +- target/sh4/translate.c | 2 +- target/sparc/translate.c | 2 +- target/tricore/translate.c | 2 +- target/xtensa/translate.c | 2 +- 22 files changed, 22 insertions(+), 22 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index 6d3f59d095..b0412ea6b6 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -33,7 +33,7 @@ * the target-specific DisasContext, and then invoke translator_loop. */ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc); + vaddr pc, void *host_pc); /** * DisasJumpType: diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 32333081d8..134eb7225b 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -2971,7 +2971,7 @@ static const TranslatorOps alpha_tr_ops = { }; void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc; translator_loop(cpu, tb, max_insns, pc, host_pc, &alpha_tr_ops, &dc.base); diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index b3660173d1..5fa8249723 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -9691,7 +9691,7 @@ static const TranslatorOps thumb_translator_ops = { /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc = { }; const TranslatorOps *ops = &arm_translator_ops; diff --git a/target/avr/translate.c b/target/avr/translate.c index cdffa04519..e5dd057799 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -2805,7 +2805,7 @@ static const TranslatorOps avr_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc = { }; translator_loop(cs, tb, max_insns, pc, host_pc, &avr_tr_ops, &dc.base); diff --git a/target/cris/translate.c b/target/cris/translate.c index b3974ba0bb..ee1402a9a3 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -3172,7 +3172,7 @@ static const TranslatorOps cris_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc; translator_loop(cs, tb, max_insns, pc, host_pc, &cris_tr_ops, &dc.base); diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 95579ae243..a14211cf68 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -1154,7 +1154,7 @@ static const TranslatorOps hexagon_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 3ef39b1bd7..08d09d50d7 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -4631,7 +4631,7 @@ static const TranslatorOps hppa_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; translator_loop(cs, tb, max_insns, pc, host_pc, &hppa_tr_ops, &ctx.base); diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index e193c74472..2808903661 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -7088,7 +7088,7 @@ static const TranslatorOps i386_tr_ops = { /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc; diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/translate.c index 21f4db6fbd..235515c629 100644 --- a/target/loongarch/tcg/translate.c +++ b/target/loongarch/tcg/translate.c @@ -343,7 +343,7 @@ static const TranslatorOps loongarch_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 4a0b0b2703..5ec88c5f0d 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -6088,7 +6088,7 @@ static const TranslatorOps m68k_tr_ops = { }; void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc; translator_loop(cpu, tb, max_insns, pc, host_pc, &m68k_tr_ops, &dc.base); diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 49bfb4a0ea..2e628647d1 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1792,7 +1792,7 @@ static const TranslatorOps mb_tr_ops = { }; void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc; translator_loop(cpu, tb, max_insns, pc, host_pc, &mb_tr_ops, &dc.base); diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 13e43fa3b6..e10232738c 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -15554,7 +15554,7 @@ static const TranslatorOps mips_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; diff --git a/target/nios2/translate.c b/target/nios2/translate.c index e806623594..3078372b36 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -1036,7 +1036,7 @@ static const TranslatorOps nios2_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc; translator_loop(cs, tb, max_insns, pc, host_pc, &nios2_tr_ops, &dc.base); diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index ecff4412b7..d4cbc5eaea 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -1658,7 +1658,7 @@ static const TranslatorOps openrisc_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 329da4d518..049f636927 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7518,7 +7518,7 @@ static const TranslatorOps ppc_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 071fbad7ef..ab18899122 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1287,7 +1287,7 @@ static const TranslatorOps riscv_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; diff --git a/target/rx/translate.c b/target/rx/translate.c index c6ce717a95..2265bd14ac 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -2266,7 +2266,7 @@ static const TranslatorOps rx_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc; diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 8df00b7df9..a5fd9cccaa 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -6547,7 +6547,7 @@ static const TranslatorOps s390x_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc; diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 81f825f125..6a6d862b10 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -2317,7 +2317,7 @@ static const TranslatorOps sh4_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 9387299559..97184fa403 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -5327,7 +5327,7 @@ static const TranslatorOps sparc_tr_ops = { }; void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext dc = {}; diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 66553d1be0..f1156c39e7 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -8472,7 +8472,7 @@ static const TranslatorOps tricore_tr_ops = { void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - target_ulong pc, void *host_pc) + vaddr pc, void *host_pc) { DisasContext ctx; translator_loop(cs, tb, max_insns, pc, host_pc, diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 87947236ca..e4772462b5 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -1239,7 +1239,7 @@ static const TranslatorOps xtensa_translator_ops = { }; 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:37 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 05/31] include/exec: Use vaddr in DisasContextBase for virtual addresses Date: Tue, 30 Jan 2024 09:00:55 +1000 Message-Id: <20240129230121.8091-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson Updates target/ QEMU_LOG macros to use VADDR_PRIx for printing updated DisasContextBase fields. Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-10-anjo@rev.ng> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/exec/translator.h | 6 +++--- target/mips/tcg/translate.h | 3 ++- target/hexagon/translate.c | 3 ++- target/m68k/translate.c | 2 +- target/mips/tcg/translate.c | 12 ++++++------ 5 files changed, 14 insertions(+), 12 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index b0412ea6b6..51624feb10 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -79,8 +79,8 @@ typedef enum DisasJumpType { */ typedef struct DisasContextBase { TranslationBlock *tb; - target_ulong pc_first; - target_ulong pc_next; + vaddr pc_first; + vaddr pc_next; DisasJumpType is_jmp; int num_insns; int max_insns; @@ -235,7 +235,7 @@ void translator_fake_ldb(uint8_t insn8, abi_ptr pc); * Translators can use this to enforce the rule that only single-insn * translation blocks are allowed to cross page boundaries. */ -static inline bool is_same_page(const DisasContextBase *db, target_ulong addr) +static inline bool is_same_page(const DisasContextBase *db, vaddr addr) { return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0; } diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index cffcfeab8c..93a78b8121 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -202,7 +202,8 @@ extern TCGv bcond; do { \ if (MIPS_DEBUG_DISAS) { \ qemu_log_mask(CPU_LOG_TB_IN_ASM, \ - TARGET_FMT_lx ": %08x Invalid %s %03x %03x %03x\n", \ + "%016" VADDR_PRIx \ + ": %08x Invalid %s %03x %03x %03x\n", \ ctx->base.pc_next, ctx->opcode, op, \ ctx->opcode >> 26, ctx->opcode & 0x3F, \ ((ctx->opcode >> 16) & 0x1F)); \ diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index a14211cf68..f163eefe97 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -234,7 +234,8 @@ static int read_packet_words(CPUHexagonState *env, DisasContext *ctx, g_assert(ctx->base.num_insns == 1); } - HEX_DEBUG_LOG("decode_packet: pc = 0x%x\n", ctx->base.pc_next); + HEX_DEBUG_LOG("decode_packet: pc = 0x%" VADDR_PRIx "\n", + ctx->base.pc_next); HEX_DEBUG_LOG(" words = { "); for (int i = 0; i < nwords; i++) { HEX_DEBUG_LOG("0x%x, ", words[i]); diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 5ec88c5f0d..f886190f88 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -1457,7 +1457,7 @@ DISAS_INSN(undef) * for the 680x0 series, as well as those that are implemented * but actually illegal for CPU32 or pre-68020. */ - qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x\n", + qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %" VADDR_PRIx "\n", insn, s->base.pc_next); gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); } diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index e10232738c..12094cc1e7 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -4585,8 +4585,8 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" - TARGET_FMT_lx "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); goto out; @@ -9061,8 +9061,8 @@ static void gen_compute_branch1_r6(DisasContext *ctx, uint32_t op, if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" TARGET_FMT_lx - "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); return; @@ -11274,8 +11274,8 @@ static void gen_compute_compact_branch(DisasContext *ctx, uint32_t opc, if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" TARGET_FMT_lx - "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); return; From patchwork Mon Jan 29 23:00:56 2024 Content-Type: text/plain; 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:39 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 06/31] include/exec: typedef abi_ptr to vaddr Date: Tue, 30 Jan 2024 09:00:56 +1000 Message-Id: <20240129230121.8091-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-11-anjo@rev.ng> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 6061e33ac9..eb8f3f0595 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -121,8 +121,8 @@ static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len) h2g_nocheck(x); \ }) #else -typedef target_ulong abi_ptr; -#define TARGET_ABI_FMT_ptr TARGET_FMT_lx +typedef vaddr abi_ptr; +#define TARGET_ABI_FMT_ptr VADDR_PRIx #endif uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); From patchwork Mon Jan 29 23:00:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767452 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119749wro; Mon, 29 Jan 2024 15:12:17 -0800 (PST) X-Google-Smtp-Source: AGHT+IG24QWb+ZLLeyPPw5Ox6/YXGl1n7w6R3j0d398uKh2onUpROmv2Z8Gb4fo5FUURE+1j5mu3 X-Received: by 2002:a25:9948:0:b0:dc1:f71f:a1e8 with SMTP id n8-20020a259948000000b00dc1f71fa1e8mr5094137ybo.128.1706569937218; Mon, 29 Jan 2024 15:12:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569937; cv=none; d=google.com; s=arc-20160816; b=Pr5ld88xvJxnYwVDdNKTXJ0mgl0G4Czp4q9/m8EwyB0C1oBDnF/NYu9shyY+h1la2b L9HgX9SSYsUjpRU/amz01+bdCwHNKsxMdmMsZCdsCecBGa2wESDagY59RyZooQTx3mLv KRBT98yJouEXBuQCcClli0jF2IXhnDX4dUpGPXZNayU4fupeGzgaK71OFt6BtJMxtPmD o6/m8+wOtyDy3sVTCtZgbrMsiQm01c33Fv+/xlme5FXm09wQedbNQrj115D7ILvvrzxy LIYGDkyycQxxUCeFXmbZybLvvB23INkUIBheQ4HFdiUgfzPc/fhZBDvELhD6wThmcrs/ 1L6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=rGwTnZnscqahFsCYdn6DyT5/GdGMGcaavMpKxhe75qA=; fh=l3rThTWYtfg9kQ3pwkdseR7wGfUMT6wsJF5cqMswxYY=; b=ZnT1Y31iK+9TYSFLN7vEi8OsLIAaAbvOJubnkxOVljHo8ZVLMLod8XHXftG8tRPrAe AsMgmvidpbLWUFwyvNn5Eomde+O4e2LNLz8Uki1QELWXogXhcmvrha7/oTgIYJfLG0fx CHBrUokg2kIkhGMCBIPRkpXPC+QGmZJvy+TQd3JGIQMjx4MyBWIGYTHjz8HcSzjULyLP Q6ukiLelV61k9J0cAUy/zcOh+lye37B7TD0qGlbM+leOVBGcUcXVqqddQ3s1wnMc5R65 LkSLrxFjRBO72lMDXzegoKmc1fxnjsRJviRRt7H7DwlOsUZ4Mc00BqUpekuhsAnp0LC8 tfNQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QZABSXPq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 07/31] include/exec: Move PAGE_* macros to common header Date: Tue, 30 Jan 2024 09:00:57 +1000 Message-Id: <20240129230121.8091-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::233; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x233.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson These don't vary across targets and are used in soon-to-be common code (cputlb.c). Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-15-anjo@rev.ng> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 24 ------------------------ include/exec/cpu-common.h | 30 ++++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 24 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 5340907cfd..edee87d3f4 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -171,34 +171,10 @@ extern const TargetPageBits target_page; #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) -/* same as PROT_xxx */ -#define PAGE_READ 0x0001 -#define PAGE_WRITE 0x0002 -#define PAGE_EXEC 0x0004 -#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC) -#define PAGE_VALID 0x0008 -/* - * Original state of the write flag (used when tracking self-modifying code) - */ -#define PAGE_WRITE_ORG 0x0010 -/* - * Invalidate the TLB entry immediately, helpful for s390x - * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() - */ -#define PAGE_WRITE_INV 0x0020 -/* For use with page_set_flags: page is being replaced; target_data cleared. */ -#define PAGE_RESET 0x0040 -/* For linux-user, indicates that the page is MAP_ANON. */ -#define PAGE_ANON 0x0080 - #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY) /* FIXME: Code that sets/uses this is broken and needs to go away. */ #define PAGE_RESERVED 0x0100 #endif -/* Target-specific bits that will be used via page_get_flags(). */ -#define PAGE_TARGET_1 0x0200 -#define PAGE_TARGET_2 0x0400 - /* * For linux-user, indicates that the page is mapped with the same semantics * in both guest and host. diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 3109c6b67d..608708ea48 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -206,4 +206,34 @@ G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); G_NORETURN void cpu_loop_exit(CPUState *cpu); G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); +/* same as PROT_xxx */ +#define PAGE_READ 0x0001 +#define PAGE_WRITE 0x0002 +#define PAGE_EXEC 0x0004 +#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC) +#define PAGE_VALID 0x0008 +/* + * Original state of the write flag (used when tracking self-modifying code) + */ +#define PAGE_WRITE_ORG 0x0010 +/* + * Invalidate the TLB entry immediately, helpful for s390x + * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() + */ +#define PAGE_WRITE_INV 0x0020 +/* For use with page_set_flags: page is being replaced; target_data cleared. */ +#define PAGE_RESET 0x0040 +/* For linux-user, indicates that the page is MAP_ANON. */ +#define PAGE_ANON 0x0080 + +/* Target-specific bits that will be used via page_get_flags(). */ +#define PAGE_TARGET_1 0x0200 +#define PAGE_TARGET_2 0x0400 + +/* + * For linux-user, indicates that the page is mapped with the same semantics + * in both guest and host. + */ +#define PAGE_PASSTHROUGH 0x0800 + #endif /* CPU_COMMON_H */ From patchwork Mon Jan 29 23:00:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767437 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1117795wro; Mon, 29 Jan 2024 15:05:55 -0800 (PST) X-Google-Smtp-Source: AGHT+IHgHIjIJKQiFuCd1R4YTLz3+CsprGndAvU+wL3lDKRKKTNPrAbsWWhIUI4/px5yhfuC9fQl X-Received: by 2002:a05:6122:17a0:b0:4bd:3ba9:86f2 with SMTP id o32-20020a05612217a000b004bd3ba986f2mr3212878vkf.24.1706569555694; Mon, 29 Jan 2024 15:05:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569555; cv=none; d=google.com; s=arc-20160816; b=GEnQLZv0Mumx5zihsRpljZJLQEJKMaPH6fL7yaRquKPm3ZirwMJdJnPTTvYrywlYHn 1WpykGkvdqOXfumyCQyXd4UPiETwtrWmD9IdU6q4D8L0SSNkpSbheEf/jv1ss2vRlnKC lYRoy7Qz+UQXPSggKTLMN3cCZenF38iKEy3q9jyfXe8ApkfPhSz9om5AvgeFGJ5QgBqp ZTNQyWEv1Iy8drM6gX79c3iKEkyezIvHmj1PSlRDz+pKz2PDJF8BAhUsZCq2IykLrMmg KZY3IDBEici4EI0nsq6H1b/nEcxr8CFKSbJkR4ela8kId8dGLXnZ0OQLEScFtfpoYJHX wypg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=blFzc6YcDRkiR8B9Edly+GRoesCmaBH2nX316LvuRkc=; fh=kghyEbKPEBo674H39ODsQAlkSpC57kSEGDu7SZmElLs=; b=UFaUt8iOrIs0QQvrzF3pUbVKXZhXG2xyifdFhRkgwBVhnacUzed5XGJydxKiTHN4Hd mEV5aPOad97yAlscr7i2WR8clISMlvyyI/eR5u5Nadftpm6JlSjnjP0aIX11GsIksDeg iZnmbzsPDucQj3PhxxdNj1MUN6qmh/ebW55ZbB1Kre+568S8fd5riM0XY+ddSm6cC/uK GmdjqnnGxhQvyBwnREY2oOE1uCTcrCfW8okUs5bxu7dkPlUtFv3PomtdO+7w4eFIf4B7 +w7b/7NMXAQTWcx9uwMcwqNe5sKENOF9VmW0/dzmQsD5NC5uCf4aEo6aZsApT2UPAihl HTkg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KCjk9Luj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 08/31] include/exec: Move cpu_*()/cpu_env() to common header Date: Tue, 30 Jan 2024 09:00:58 +1000 Message-Id: <20240129230121.8091-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson Functions are target independent. Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-17-anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 25 ------------------------- include/exec/cpu-common.h | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 25 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index edee87d3f4..8501a33dbf 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -384,33 +384,8 @@ static inline bool tlb_hit(uint64_t tlb_addr, vaddr addr) #endif /* !CONFIG_USER_ONLY */ -/* accel/tcg/cpu-exec.c */ -int cpu_exec(CPUState *cpu); - /* Validate correct placement of CPUArchState. */ QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0); QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); -/** - * env_archcpu(env) - * @env: The architecture environment - * - * Return the ArchCPU associated with the environment. - */ -static inline ArchCPU *env_archcpu(CPUArchState *env) -{ - return (void *)env - sizeof(CPUState); -} - -/** - * env_cpu(env) - * @env: The architecture environment - * - * Return the CPUState associated with the environment. - */ -static inline CPUState *env_cpu(CPUArchState *env) -{ - return (void *)env - sizeof(CPUState); -} - #endif /* CPU_ALL_H */ diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 608708ea48..dcbd5f5783 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -7,6 +7,7 @@ #ifndef CONFIG_USER_ONLY #include "exec/hwaddr.h" #endif +#include "hw/core/cpu.h" #define EXCP_INTERRUPT 0x10000 /* async interruption */ #define EXCP_HLT 0x10001 /* hlt instruction reached */ @@ -236,4 +237,29 @@ G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); */ #define PAGE_PASSTHROUGH 0x0800 +/* accel/tcg/cpu-exec.c */ +int cpu_exec(CPUState *cpu); + +/** + * env_archcpu(env) + * @env: The architecture environment + * + * Return the ArchCPU associated with the environment. + */ +static inline ArchCPU *env_archcpu(CPUArchState *env) +{ + return (void *)env - sizeof(CPUState); +} + +/** + * env_cpu(env) + * @env: The architecture environment + * + * Return the CPUState associated with the environment. + */ +static inline CPUState *env_cpu(CPUArchState *env) +{ + return (void *)env - sizeof(CPUState); +} + #endif /* CPU_COMMON_H */ From patchwork Mon Jan 29 23:00:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767451 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119244wro; Mon, 29 Jan 2024 15:10:32 -0800 (PST) X-Google-Smtp-Source: AGHT+IFOBr1ZxtXLMe66uwUixmWFSUQmPSSd8A+pQ0T2tPguh9J1X5zLFkQKOXjRwMMK7EDe6zH8 X-Received: by 2002:a05:622a:c1:b0:42a:67d2:a5a2 with SMTP id p1-20020a05622a00c100b0042a67d2a5a2mr7359609qtw.122.1706569832589; Mon, 29 Jan 2024 15:10:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569832; cv=none; d=google.com; s=arc-20160816; b=zE1u+qDIDz1qyPFouYaiv4GIaHDcGOJKJ1jaxCgAsYheIfJHTpLiOioNqQvA326rH9 OjAGv8Q9uZSr7UAgIZWJSYVVzhaRCZtGU38HpKn8LiSTWPKoE7O+Rr2WNBeS0F4sS2Kq EacosSoUdbT/ZA4IhTJuhTt8HYZRxhALS2mFDVjwTQar5i3CpcYgPea0jmU/g7Yqtf6V atKKORms1glAvLahqe3lx573LlJyrqOreQJTX1SL/FSwiLjX49l6r8cvMvMgljEENglN MGACAz1vsa8fvwwxN8n0ZFYwR6LQwaQ0GTHlZkrcFs1C8mEyNxihun560yMaYs7Ibb9C pX5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=0IsJCYKuWrursPA6kPyaSh6Iig/if/7dsXp1H2oDJMs=; fh=l3rThTWYtfg9kQ3pwkdseR7wGfUMT6wsJF5cqMswxYY=; b=Ctvfzh2wYydHz2IFzEg5RHJGuPip9gmxsH97XhcN5BX9N5tb3jNnT2y/w+J/rtXxzU Pie4gB5ta3w8RW9O9uuyJjJAfnOEvtB+cfALntwwIm9rnw7BnnU2gc9h5EzQBnWlsw0Z GVzBfxZXbISyucS4NybQL5k/24LZBQcrnfc0e2Uq8rrV7JxNh80P6izsMN9EMkIdZ8sb Sxqc1H52PvfkDi1+SiNBj5wBgFBywLbocByzHzxKHcnPyZYYuG3FTNbN8N3Qc3a8rAiu Ih+Hmg3ltNwg+VPbemwnsyWWaEX87hMGRvoPWfwcmStbLrqLxLz3VvnW9VwsTx307r1Y urXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DKQq7lvv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 09/31] include/hw/core: Move do_interrupt in TCGCPUOps Date: Tue, 30 Jan 2024 09:00:59 +1000 Message-Id: <20240129230121.8091-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c34; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc34.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson The ifdef out of which it is moved is not quite right: do_interrupt is only needed for system mode. Move it to the top of a different ifdef block, which preserves its position within the structure for that case. Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-18-anjo@rev.ng> [rth: Split from a larger patch and simplified.] Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 479713a36e..d6fe55d471 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -58,11 +58,6 @@ struct TCGCPUOps { * cpu execution loop (hack for x86 user mode). */ void (*fake_user_interrupt)(CPUState *cpu); -#else - /** - * @do_interrupt: Callback for interrupt handling. - */ - void (*do_interrupt)(CPUState *cpu); #endif /* !CONFIG_USER_ONLY || !TARGET_I386 */ #ifdef CONFIG_USER_ONLY /** @@ -114,6 +109,8 @@ struct TCGCPUOps { void (*record_sigbus)(CPUState *cpu, vaddr addr, MMUAccessType access_type, uintptr_t ra); #else + /** @do_interrupt: Callback for interrupt handling. */ + void (*do_interrupt)(CPUState *cpu); /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */ bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); /** From patchwork Mon Jan 29 23:01:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767435 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1117737wro; Mon, 29 Jan 2024 15:05:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IGiN9AP7LahcvGj4yucE0w6piuCjOyEUFscMTUBqxXl/4dAU+qiSteGCQ5SOGOVUqKETMtd X-Received: by 2002:a05:6102:32d1:b0:46b:22ca:3e38 with SMTP id o17-20020a05610232d100b0046b22ca3e38mr25487vss.14.1706569547749; Mon, 29 Jan 2024 15:05:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569547; cv=none; d=google.com; s=arc-20160816; b=WHRUtMkpKgC/Bo/BQ1wbHLUjCsVRokSJkOMoXXWbV5pYAPZqPpnKnTAG5FVuEa+4Mt VsyE3pg4Abb7gzvDaut2q+8aY77CjjsjB2pRGL3rKxtnM9cEkI/QEerp4XK+oeJELT6O hJKMnmeQgs56NUCZEMjrjKMrgDGxyCMSwFSCpBor3+kf9cqQ88GPKapfcsQt5dabolEX ebcEtq+nkydBIOwO1JrjzN+cF/LDrWuyhnQIhAmBR9D9Vp0iKnt7MmNHhFyzeyoeneRA m9qdx9fw4WY6PdmPfAEDP3s/ILtOqaUwPW6exlKf/wlUAH7QWmFWG62CXzW5fbJDTsKL SIkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=o1cRBtAgGqadhUih0VNs9If35/tfCXiaB3lrOMREblM=; fh=l3rThTWYtfg9kQ3pwkdseR7wGfUMT6wsJF5cqMswxYY=; b=pmfg+/GRaURPCwb2zgp+LcRpCDMFmlNmNVIpmJoOOoCUI36CiIVJohWzS5pJ00Alte OuHwGkLpJj0lnP+KdhiIU2QYeVcXvDQB3D/VDzgj12CMJ2AsZMzpEiLWW7hgDCl4leoa cTcsQPGpGPYFrdkQfpfDRyKkOAgAz7Wuul2ZkOeLVNOe1/FAaMTUF37gkTKoBtWfa/nU I9aOorX2gb+VX/Q2RBHYYMFASMXX4xgTw5GywCbk+/WeM3ddaKvV8X1yNNs1LpsoAuMf 74hLfmizErihPlN1G5bE1tbCEHpOadT3oHjXJZVMvGRO5uw42x4M2OhD0ZqZv+YJS4o9 CuaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i5a9rgVD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 10/31] include/hw/core: Remove i386 conditional on fake_user_interrupt Date: Tue, 30 Jan 2024 09:01:00 +1000 Message-Id: <20240129230121.8091-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Anton Johansson Always include fake_user_interrupt in user-only build, despite only being used for i386. This will enable cpu-exec.c to be compiled only once. Signed-off-by: Anton Johansson Message-ID: <20240119144024.14289-18-anjo@rev.ng> [rth: Split out of a larger patch; remove TARGET_I386 conditional.] Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index d6fe55d471..3ed279836f 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -50,7 +50,7 @@ struct TCGCPUOps { void (*debug_excp_handler)(CPUState *cpu); #ifdef NEED_CPU_H -#if defined(CONFIG_USER_ONLY) && defined(TARGET_I386) +#ifdef CONFIG_USER_ONLY /** * @fake_user_interrupt: Callback for 'fake exception' handling. * @@ -58,8 +58,7 @@ struct TCGCPUOps { * cpu execution loop (hack for x86 user mode). */ void (*fake_user_interrupt)(CPUState *cpu); -#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */ -#ifdef CONFIG_USER_ONLY + /** * record_sigsegv: * @cpu: cpu context From patchwork Mon Jan 29 23:01:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767429 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1116584wro; Mon, 29 Jan 2024 15:03:11 -0800 (PST) X-Google-Smtp-Source: AGHT+IFdjAVexxD6uDoslL1V+5B6PLsTLsYQIWOhVn0rxwY/MhSX9IbH+5NGba1rap5z90UMKHrk X-Received: by 2002:a05:6808:1151:b0:3be:1b04:ee83 with SMTP id u17-20020a056808115100b003be1b04ee83mr6196812oiu.0.1706569391727; Mon, 29 Jan 2024 15:03:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569391; cv=none; d=google.com; s=arc-20160816; b=cop1gGcVcFVes7kF/MgdsrQjurPxswtRhCuhd1sACP0QRklo9p649obwpgfQzQCiUY tKQtuRtoNAX8OPMAhStPTe1Q7TWlYhaN45Wi+vFnsp6QlMeOBF76hYlPBpzVA1eUGDFV Zir96Y1NIHa54gH1nCIsv/Hxgm0IyLmYdrmq+EeXEZf6NMS6s9195hXFV4rSr/YPU3n7 DvBWrxFgM/EMkQW4BD9zqEeYZI47maPiWkztBboKXDOxwzHhzDwkMxrrCy6o6ob+wmqT sXqbWmmzJtSXpPuafQNEsU4C2V4VAwD1VQQCrXlUAmYPIqeTwnMc3PUJbnunW7x+E+N3 bldQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5lOMiA1d/7RQJUfbMVKZZ3ZFzC3WxOo3rdXkjjDSQz4=; fh=o2XzhdKG+B45MJCghEfnYoypmHvLX2hd4SL6yXeiyXI=; b=HR6Z6OPX3jFjiZfsvquS9mJx/MxV+SEFRnLgW3js1Dvm7ex0p8zOph1ECRvh7vyCL3 V+zzznBhNeWyJ3n0I6p7g2zF0312CAsJniQTFKpXg2EJbNQ1t+b6v8igQaL5SbFB7ZW8 /X6DzKoX5ysdrmA6LFZKSkMg5ijO6HfW6YEmfBU8+aj3WDHo2vW25cNmfLKW95/ApvUE FOr1MWf17ge5uTfoWHCnt0fhB+FtoRzdBzOipMPQBcusiZDcgYiM6DXCkn+vh4T/sMLL qgBCD0r5li8bizCOwrzvLvt6uZK/Z7S6oE9V21jo6lB0FVxRsnpKwxbtu6cNiy/0D/cu itdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XT0LggRz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich Subject: [PULL 11/31] linux-user: Allow gdbstub to ignore page protection Date: Tue, 30 Jan 2024 09:01:01 +1000 Message-Id: <20240129230121.8091-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich gdbserver ignores page protection by virtue of using /proc/$pid/mem. Teach qemu gdbstub to do this too. This will not work if /proc is not mounted; accept this limitation. One alternative is to temporarily grant the missing PROT_* bit, but this is inherently racy. Another alternative is self-debugging with ptrace(POKE), which will break if QEMU itself is being debugged - a much more severe limitation. Reviewed-by: Richard Henderson Signed-off-by: Ilya Leoshkevich Message-Id: <20240129093410.3151-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson --- cpu-target.c | 78 ++++++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 63 insertions(+), 15 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index f6e07c3deb..958d63e882 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -382,6 +382,9 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, vaddr l, page; void * p; uint8_t *buf = ptr; + ssize_t written; + int ret = -1; + int fd = -1; while (len > 0) { page = addr & TARGET_PAGE_MASK; @@ -389,30 +392,75 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, if (l > len) l = len; flags = page_get_flags(page); - if (!(flags & PAGE_VALID)) - return -1; + if (!(flags & PAGE_VALID)) { + goto out_close; + } if (is_write) { - if (!(flags & PAGE_WRITE)) - return -1; + if (flags & PAGE_WRITE) { + /* XXX: this code should not depend on lock_user */ + p = lock_user(VERIFY_WRITE, addr, l, 0); + if (!p) { + goto out_close; + } + memcpy(p, buf, l); + unlock_user(p, addr, l); + } else { + /* Bypass the host page protection using ptrace. */ + if (fd == -1) { + fd = open("/proc/self/mem", O_WRONLY); + if (fd == -1) { + goto out; + } + } + /* + * If there is a TranslationBlock and we weren't bypassing the + * host page protection, the memcpy() above would SEGV, + * ultimately leading to page_unprotect(). So invalidate the + * translations manually. Both invalidation and pwrite() must + * be under mmap_lock() in order to prevent the creation of + * another TranslationBlock in between. + */ + mmap_lock(); + tb_invalidate_phys_range(addr, addr + l - 1); + written = pwrite(fd, buf, l, + (off_t)(uintptr_t)g2h_untagged(addr)); + mmap_unlock(); + if (written != l) { + goto out_close; + } + } + } else if (flags & PAGE_READ) { /* XXX: this code should not depend on lock_user */ - if (!(p = lock_user(VERIFY_WRITE, addr, l, 0))) - return -1; - memcpy(p, buf, l); - unlock_user(p, addr, l); - } else { - if (!(flags & PAGE_READ)) - return -1; - /* XXX: this code should not depend on lock_user */ - if (!(p = lock_user(VERIFY_READ, addr, l, 1))) - return -1; + p = lock_user(VERIFY_READ, addr, l, 1); + if (!p) { + goto out_close; + } memcpy(buf, p, l); unlock_user(p, addr, 0); + } else { + /* Bypass the host page protection using ptrace. */ + if (fd == -1) { + fd = open("/proc/self/mem", O_RDONLY); + if (fd == -1) { + goto out; + } + } + if (pread(fd, buf, l, + (off_t)(uintptr_t)g2h_untagged(addr)) != l) { + goto out_close; + } } len -= l; buf += l; addr += l; } - return 0; + ret = 0; +out_close: + if (fd != -1) { + close(fd); + } +out: + return ret; } #endif From patchwork Mon Jan 29 23:01:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767430 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1116772wro; Mon, 29 Jan 2024 15:03:40 -0800 (PST) X-Google-Smtp-Source: AGHT+IEZRRGcSEAjH/BSIWrJhIgGJkB3xWe7sZvjO3oYfexGgqoZ85vlGWSDlTG7uAwr9t9V/py+ X-Received: by 2002:a05:622a:449:b0:42a:6d3e:8460 with SMTP id o9-20020a05622a044900b0042a6d3e8460mr7883444qtx.112.1706569419872; Mon, 29 Jan 2024 15:03:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569419; cv=none; d=google.com; s=arc-20160816; b=elyJVVhVMgcjK4WfbgdhmwUE6iQRC15pmCyezq/uOGVwPJ9VUrsTErOUVua28tQP/E 6jeYKTC6e3BK3fsFrzwla5I38C51asrPFr/bCnblWWTJfyMzOA6+jrJH75SBOhVMKJ3G Mu6qBxD/gw5StnUWvssBAK2eBE8l34eUiR8R6Tgdo7PEIUdZbRtGymc+/eAxJIFVanUQ ddVIA9rToICk1QxIOkuEBKvOmA1aDZ68XBI3MbZADspIts8VIhxJZJMHRwB5HxYsIJC9 71L5k9m7e2ovI2J1h4K4RzGIPdlWhswsZNrec9XKCs2Xs8Qc7BTJ4K/UpHLXzXlBS3v1 r5zg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=dVpO3eVaybrYtGXvIjJnOv6+J8+14JOgiWCfY0AXuD8=; fh=o2XzhdKG+B45MJCghEfnYoypmHvLX2hd4SL6yXeiyXI=; b=eNvR52y/+B+jCdb4xlzcRaXZj5X9gyaQVbEPiL0WKKQZWMBuaMMMCxC+6ZYstPqmN1 zCNHZRTZqF8KVyCELy0zRGla8OtBsbdRXYOJWXfKmcFFLeMuQwpiJEfYV1vYZQXS5Zcd QNRqESDccC9eRvWzAEsqck5D22egBK7x7eMD8Y/sRzRUSdYLv5lGqwytaaiT0yq64H3L aCnlYwMTZL+/lb11aepP42tgrKo4EYMKdMf1mwFSbJdEpNsjia4xQZ5asTHEzsD35T3A BWifDdOR2d2vlMVhIV9dN+0hk12vjvrVbGVT2+keOsw/BaXCnmrk+u2CJTk826SaX2Nb We/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="fBrr8/dU"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich Subject: [PULL 12/31] tests/tcg: Factor out gdbstub test functions Date: Tue, 30 Jan 2024 09:01:02 +1000 Message-Id: <20240129230121.8091-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22f; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich Both the report() function as well as the initial gdbstub test sequence are copy-pasted into ~10 files with slight modifications. This indicates that they are indeed generic, so factor them out. While at it, add a few newlines to make the formatting closer to PEP-8. Signed-off-by: Ilya Leoshkevich Message-Id: <20240129093410.3151-3-iii@linux.ibm.com> Signed-off-by: Richard Henderson --- tests/guest-debug/run-test.py | 7 ++- tests/guest-debug/test_gdbstub.py | 60 +++++++++++++++++++ tests/tcg/aarch64/gdbstub/test-sve-ioctl.py | 34 +---------- tests/tcg/aarch64/gdbstub/test-sve.py | 33 +--------- tests/tcg/multiarch/gdbstub/interrupt.py | 47 ++------------- tests/tcg/multiarch/gdbstub/memory.py | 39 +----------- tests/tcg/multiarch/gdbstub/registers.py | 41 ++----------- tests/tcg/multiarch/gdbstub/sha1.py | 38 ++---------- .../multiarch/gdbstub/test-proc-mappings.py | 39 +----------- .../multiarch/gdbstub/test-qxfer-auxv-read.py | 37 +----------- .../gdbstub/test-thread-breakpoint.py | 37 +----------- tests/tcg/s390x/gdbstub/test-signals-s390x.py | 42 +------------ tests/tcg/s390x/gdbstub/test-svc.py | 39 +----------- 13 files changed, 98 insertions(+), 395 deletions(-) create mode 100644 tests/guest-debug/test_gdbstub.py diff --git a/tests/guest-debug/run-test.py b/tests/guest-debug/run-test.py index b13b27d4b1..368ff8a890 100755 --- a/tests/guest-debug/run-test.py +++ b/tests/guest-debug/run-test.py @@ -97,7 +97,12 @@ def log(output, msg): sleep(1) log(output, "GDB CMD: %s" % (gdb_cmd)) - result = subprocess.call(gdb_cmd, shell=True, stdout=output, stderr=stderr) + gdb_env = dict(os.environ) + gdb_pythonpath = gdb_env.get("PYTHONPATH", "").split(os.pathsep) + gdb_pythonpath.append(os.path.dirname(os.path.realpath(__file__))) + gdb_env["PYTHONPATH"] = os.pathsep.join(gdb_pythonpath) + result = subprocess.call(gdb_cmd, shell=True, stdout=output, stderr=stderr, + env=gdb_env) # A result of greater than 128 indicates a fatal signal (likely a # crash due to gdb internal failure). That's a problem for GDB and diff --git a/tests/guest-debug/test_gdbstub.py b/tests/guest-debug/test_gdbstub.py new file mode 100644 index 0000000000..7f71d34da1 --- /dev/null +++ b/tests/guest-debug/test_gdbstub.py @@ -0,0 +1,60 @@ +"""Helper functions for gdbstub testing + +""" +from __future__ import print_function +import gdb +import os +import sys +import traceback + +fail_count = 0 + + +def report(cond, msg): + """Report success/fail of a test""" + if cond: + print("PASS: {}".format(msg)) + else: + print("FAIL: {}".format(msg)) + global fail_count + fail_count += 1 + + +def main(test, expected_arch=None): + """Run a test function + + This runs as the script it sourced (via -x, via run-test.py).""" + try: + inferior = gdb.selected_inferior() + arch = inferior.architecture() + print("ATTACHED: {}".format(arch.name())) + if expected_arch is not None: + report(arch.name() == expected_arch, + "connected to {}".format(expected_arch)) + except (gdb.error, AttributeError): + print("SKIP: not connected") + exit(0) + + if gdb.parse_and_eval("$pc") == 0: + print("SKIP: PC not set") + exit(0) + + try: + test() + except: + print("GDB Exception:") + traceback.print_exc(file=sys.stdout) + global fail_count + fail_count += 1 + if "QEMU_TEST_INTERACTIVE" in os.environ: + import code + code.InteractiveConsole(locals=globals()).interact() + raise + + try: + gdb.execute("kill") + except gdb.error: + pass + + print("All tests complete: {} failures".format(fail_count)) + exit(fail_count) diff --git a/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py b/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py index ee8d467e59..a78a3a2514 100644 --- a/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py +++ b/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py @@ -8,19 +8,10 @@ # import gdb -import sys +from test_gdbstub import main, report initial_vlen = 0 -failcount = 0 -def report(cond, msg): - "Report success/fail of test" - if cond: - print ("PASS: %s" % (msg)) - else: - print ("FAIL: %s" % (msg)) - global failcount - failcount += 1 class TestBreakpoint(gdb.Breakpoint): def __init__(self, sym_name="__sve_ld_done"): @@ -64,26 +55,5 @@ def run_test(): gdb.execute("c") -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - report(arch.name() == "aarch64", "connected to aarch64") -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) -try: - # Run the actual tests - run_test() -except: - print ("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - import code - code.InteractiveConsole(locals=globals()).interact() - raise - -print("All tests complete: %d failures" % failcount) -exit(failcount) +main(run_test, expected_arch="aarch64") diff --git a/tests/tcg/aarch64/gdbstub/test-sve.py b/tests/tcg/aarch64/gdbstub/test-sve.py index afd8ece98d..84cdcd4a32 100644 --- a/tests/tcg/aarch64/gdbstub/test-sve.py +++ b/tests/tcg/aarch64/gdbstub/test-sve.py @@ -6,20 +6,10 @@ # import gdb -import sys +from test_gdbstub import main, report MAGIC = 0xDEADBEEF -failcount = 0 - -def report(cond, msg): - "Report success/fail of test" - if cond: - print ("PASS: %s" % (msg)) - else: - print ("FAIL: %s" % (msg)) - global failcount - failcount += 1 def run_test(): "Run through the tests one by one" @@ -54,24 +44,5 @@ def run_test(): report(str(v.type) == "uint64_t", "size of %s" % (reg)) report(int(v) == MAGIC, "%s is 0x%x" % (reg, MAGIC)) -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - report(arch.name() == "aarch64", "connected to aarch64") -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) -try: - # Run the actual tests - run_test() -except: - print ("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - -print("All tests complete: %d failures" % failcount) - -exit(failcount) +main(run_test, expected_arch="aarch64") diff --git a/tests/tcg/multiarch/gdbstub/interrupt.py b/tests/tcg/multiarch/gdbstub/interrupt.py index c016e7afbb..90a45b5140 100644 --- a/tests/tcg/multiarch/gdbstub/interrupt.py +++ b/tests/tcg/multiarch/gdbstub/interrupt.py @@ -8,19 +8,7 @@ # import gdb -import sys - -failcount = 0 - - -def report(cond, msg): - "Report success/fail of test" - if cond: - print("PASS: %s" % (msg)) - else: - print("FAIL: %s" % (msg)) - global failcount - failcount += 1 +from test_gdbstub import main, report def check_interrupt(thread): @@ -59,6 +47,9 @@ def run_test(): Test if interrupting the code always lands us on the same thread when running with scheduler-lock enabled. """ + if len(gdb.selected_inferior().threads()) == 1: + print("SKIP: set to run on a single thread") + exit(0) gdb.execute("set scheduler-locking on") for thread in gdb.selected_inferior().threads(): @@ -66,32 +57,4 @@ def run_test(): "thread %d resumes correctly on interrupt" % thread.num) -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - print("ATTACHED: %s" % arch.name()) -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) - -if gdb.parse_and_eval('$pc') == 0: - print("SKIP: PC not set") - exit(0) -if len(gdb.selected_inferior().threads()) == 1: - print("SKIP: set to run on a single thread") - exit(0) - -try: - # Run the actual tests - run_test() -except (gdb.error): - print("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - pass - -# Finally kill the inferior and exit gdb with a count of failures -gdb.execute("kill") -exit(failcount) +main(run_test) diff --git a/tests/tcg/multiarch/gdbstub/memory.py b/tests/tcg/multiarch/gdbstub/memory.py index fb1d06b7bb..532b92e7fb 100644 --- a/tests/tcg/multiarch/gdbstub/memory.py +++ b/tests/tcg/multiarch/gdbstub/memory.py @@ -9,18 +9,7 @@ import gdb import sys - -failcount = 0 - - -def report(cond, msg): - "Report success/fail of test" - if cond: - print("PASS: %s" % (msg)) - else: - print("FAIL: %s" % (msg)) - global failcount - failcount += 1 +from test_gdbstub import main, report def check_step(): @@ -99,29 +88,5 @@ def run_test(): report(cbp.hit_count == 0, "didn't reach backstop") -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - print("ATTACHED: %s" % arch.name()) -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) -if gdb.parse_and_eval('$pc') == 0: - print("SKIP: PC not set") - exit(0) - -try: - # Run the actual tests - run_test() -except (gdb.error): - print("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - pass - -# Finally kill the inferior and exit gdb with a count of failures -gdb.execute("kill") -exit(failcount) +main(run_test) diff --git a/tests/tcg/multiarch/gdbstub/registers.py b/tests/tcg/multiarch/gdbstub/registers.py index 688c061107..b3d13cb077 100644 --- a/tests/tcg/multiarch/gdbstub/registers.py +++ b/tests/tcg/multiarch/gdbstub/registers.py @@ -7,20 +7,11 @@ # SPDX-License-Identifier: GPL-2.0-or-later import gdb -import sys import xml.etree.ElementTree as ET +from test_gdbstub import main, report + initial_vlen = 0 -failcount = 0 - -def report(cond, msg): - "Report success/fail of test." - if cond: - print("PASS: %s" % (msg)) - else: - print("FAIL: %s" % (msg)) - global failcount - failcount += 1 def fetch_xml_regmap(): @@ -75,6 +66,7 @@ def fetch_xml_regmap(): return reg_map + def get_register_by_regnum(reg_map, regnum): """ Helper to find a register from the map via its XML regnum @@ -84,6 +76,7 @@ def get_register_by_regnum(reg_map, regnum): return entry return None + def crosscheck_remote_xml(reg_map): """ Cross-check the list of remote-registers with the XML info. @@ -144,6 +137,7 @@ def crosscheck_remote_xml(reg_map): elif "seen" not in x_reg: print(f"{x_reg} wasn't seen in remote-registers") + def initial_register_read(reg_map): """ Do an initial read of all registers that we know gdb cares about @@ -214,27 +208,4 @@ def run_test(): complete_and_diff(reg_map) -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - print("ATTACHED: %s" % arch.name()) -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) - -if gdb.parse_and_eval('$pc') == 0: - print("SKIP: PC not set") - exit(0) - -try: - run_test() -except (gdb.error): - print ("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - pass - -print("All tests complete: %d failures" % failcount) -exit(failcount) +main(run_test) diff --git a/tests/tcg/multiarch/gdbstub/sha1.py b/tests/tcg/multiarch/gdbstub/sha1.py index 416728415f..1ce711a402 100644 --- a/tests/tcg/multiarch/gdbstub/sha1.py +++ b/tests/tcg/multiarch/gdbstub/sha1.py @@ -7,19 +7,11 @@ # import gdb -import sys +from test_gdbstub import main, report + initial_vlen = 0 -failcount = 0 -def report(cond, msg): - "Report success/fail of test" - if cond: - print("PASS: %s" % (msg)) - else: - print("FAIL: %s" % (msg)) - global failcount - failcount += 1 def check_break(sym_name): "Setup breakpoint, continue and check we stopped." @@ -35,6 +27,7 @@ def check_break(sym_name): bp.delete() + def run_test(): "Run through the tests one by one" @@ -57,28 +50,5 @@ def run_test(): # finally check we don't barf inspecting registers gdb.execute("info registers") -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - print("ATTACHED: %s" % arch.name()) -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) -if gdb.parse_and_eval('$pc') == 0: - print("SKIP: PC not set") - exit(0) - -try: - # Run the actual tests - run_test() -except (gdb.error): - print ("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - pass - -print("All tests complete: %d failures" % failcount) -exit(failcount) +main(run_test) diff --git a/tests/tcg/multiarch/gdbstub/test-proc-mappings.py b/tests/tcg/multiarch/gdbstub/test-proc-mappings.py index 04ec61d219..564613fabf 100644 --- a/tests/tcg/multiarch/gdbstub/test-proc-mappings.py +++ b/tests/tcg/multiarch/gdbstub/test-proc-mappings.py @@ -3,20 +3,7 @@ This runs as a sourced script (via -x, via run-test.py).""" from __future__ import print_function import gdb -import sys - - -n_failures = 0 - - -def report(cond, msg): - """Report success/fail of a test""" - if cond: - print("PASS: {}".format(msg)) - else: - print("FAIL: {}".format(msg)) - global n_failures - n_failures += 1 +from test_gdbstub import main, report def run_test(): @@ -37,26 +24,4 @@ def run_test(): # report("/sha1" in mappings, "Found the test binary name in the mappings") -def main(): - """Prepare the environment and run through the tests""" - try: - inferior = gdb.selected_inferior() - print("ATTACHED: {}".format(inferior.architecture().name())) - except (gdb.error, AttributeError): - print("SKIPPING (not connected)") - exit(0) - - if gdb.parse_and_eval('$pc') == 0: - print("SKIP: PC not set") - exit(0) - - try: - # Run the actual tests - run_test() - except gdb.error: - report(False, "GDB Exception: {}".format(sys.exc_info()[0])) - print("All tests complete: %d failures" % n_failures) - exit(n_failures) - - -main() +main(run_test) diff --git a/tests/tcg/multiarch/gdbstub/test-qxfer-auxv-read.py b/tests/tcg/multiarch/gdbstub/test-qxfer-auxv-read.py index 926fa962b7..00c26ab4a9 100644 --- a/tests/tcg/multiarch/gdbstub/test-qxfer-auxv-read.py +++ b/tests/tcg/multiarch/gdbstub/test-qxfer-auxv-read.py @@ -6,18 +6,8 @@ # import gdb -import sys +from test_gdbstub import main, report -failcount = 0 - -def report(cond, msg): - "Report success/fail of test" - if cond: - print ("PASS: %s" % (msg)) - else: - print ("FAIL: %s" % (msg)) - global failcount - failcount += 1 def run_test(): "Run through the tests one by one" @@ -26,28 +16,5 @@ def run_test(): report(isinstance(auxv, str), "Fetched auxv from inferior") report(auxv.find("sha1"), "Found test binary name in auxv") -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - print("ATTACHED: %s" % arch.name()) -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) -if gdb.parse_and_eval('$pc') == 0: - print("SKIP: PC not set") - exit(0) - -try: - # Run the actual tests - run_test() -except (gdb.error): - print ("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - pass - -print("All tests complete: %d failures" % failcount) -exit(failcount) +main(run_test) diff --git a/tests/tcg/multiarch/gdbstub/test-thread-breakpoint.py b/tests/tcg/multiarch/gdbstub/test-thread-breakpoint.py index e57d2a8db8..4d6b6b9fbe 100644 --- a/tests/tcg/multiarch/gdbstub/test-thread-breakpoint.py +++ b/tests/tcg/multiarch/gdbstub/test-thread-breakpoint.py @@ -6,18 +6,8 @@ # import gdb -import sys +from test_gdbstub import main, report -failcount = 0 - -def report(cond, msg): - "Report success/fail of test" - if cond: - print ("PASS: %s" % (msg)) - else: - print ("FAIL: %s" % (msg)) - global failcount - failcount += 1 def run_test(): "Run through the tests one by one" @@ -29,28 +19,5 @@ def run_test(): frame = gdb.selected_frame() report(str(frame.function()) == "thread1_func", "break @ %s"%frame) -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - print("ATTACHED: %s" % arch.name()) -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) -if gdb.parse_and_eval('$pc') == 0: - print("SKIP: PC not set") - exit(0) - -try: - # Run the actual tests - run_test() -except (gdb.error): - print ("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - pass - -print("All tests complete: %d failures" % failcount) -exit(failcount) +main(run_test) diff --git a/tests/tcg/s390x/gdbstub/test-signals-s390x.py b/tests/tcg/s390x/gdbstub/test-signals-s390x.py index ca2bbc0b03..b6b7b39fc4 100644 --- a/tests/tcg/s390x/gdbstub/test-signals-s390x.py +++ b/tests/tcg/s390x/gdbstub/test-signals-s390x.py @@ -7,19 +7,7 @@ # import gdb -import sys - -failcount = 0 - - -def report(cond, msg): - """Report success/fail of test""" - if cond: - print("PASS: %s" % (msg)) - else: - print("FAIL: %s" % (msg)) - global failcount - failcount += 1 +from test_gdbstub import main, report def run_test(): @@ -42,31 +30,7 @@ def run_test(): gdb.Breakpoint("_exit") gdb.execute("c") status = int(gdb.parse_and_eval("$r2")) - report(status == 0, "status == 0"); + report(status == 0, "status == 0") -# -# This runs as the script it sourced (via -x, via run-test.py) -# -try: - inferior = gdb.selected_inferior() - arch = inferior.architecture() - print("ATTACHED: %s" % arch.name()) -except (gdb.error, AttributeError): - print("SKIPPING (not connected)", file=sys.stderr) - exit(0) - -if gdb.parse_and_eval("$pc") == 0: - print("SKIP: PC not set") - exit(0) - -try: - # Run the actual tests - run_test() -except (gdb.error): - print("GDB Exception: %s" % (sys.exc_info()[0])) - failcount += 1 - pass - -print("All tests complete: %d failures" % failcount) -exit(failcount) +main(run_test) diff --git a/tests/tcg/s390x/gdbstub/test-svc.py b/tests/tcg/s390x/gdbstub/test-svc.py index 804705fede..17210b4e02 100644 --- a/tests/tcg/s390x/gdbstub/test-svc.py +++ b/tests/tcg/s390x/gdbstub/test-svc.py @@ -3,20 +3,7 @@ This runs as a sourced script (via -x, via run-test.py).""" from __future__ import print_function import gdb -import sys - - -n_failures = 0 - - -def report(cond, msg): - """Report success/fail of a test""" - if cond: - print("PASS: {}".format(msg)) - else: - print("FAIL: {}".format(msg)) - global n_failures - n_failures += 1 +from test_gdbstub import main, report def run_test(): @@ -35,26 +22,4 @@ def run_test(): gdb.execute("si") -def main(): - """Prepare the environment and run through the tests""" - try: - inferior = gdb.selected_inferior() - print("ATTACHED: {}".format(inferior.architecture().name())) - except (gdb.error, AttributeError): - print("SKIPPING (not connected)") - exit(0) - - if gdb.parse_and_eval('$pc') == 0: - print("SKIP: PC not set") - exit(0) - - try: - # Run the actual tests - run_test() - except gdb.error: - report(False, "GDB Exception: {}".format(sys.exc_info()[0])) - print("All tests complete: %d failures" % n_failures) - exit(n_failures) - - -main() +main(run_test) From patchwork Mon Jan 29 23:01:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767457 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1120259wro; Mon, 29 Jan 2024 15:13:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IED7piqJtHlN4M8Zi1Y/zUpEbi41lzMJd22ISsKqwk8G5vUws23wK/eRQi3grXSaGW6bykh X-Received: by 2002:a05:620a:51d9:b0:783:d0f8:c5ba with SMTP id cx25-20020a05620a51d900b00783d0f8c5bamr6377895qkb.8.1706570039229; Mon, 29 Jan 2024 15:13:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706570039; cv=none; d=google.com; s=arc-20160816; b=z34u5x5nsLg66xOdU4C8kMvZewvgVnBxT3jKBFJexUWjOcUdOhCXrGyzU9A9lB71+f tNUaL9G0WFo9Run4/esYEymiCCfrOLmYzYuCwr7nXC/z7N06HTjoFEGLc9E2qd3Yw0Ac EL0V0ZhOSqBOfmrK9SD6Aq0IC3/mKPIqxTxWZVh8VMK89yjbKGZHIlCf/mXldz7s1FmO 4yK9T046dw2AV9y66jJtUmOD5wLe1HYGVboA1Buk3VDwtS3/JZHOl3LHNLanB8VPfdQf 3QNRI1wDE/1MuTiSWhlCOY2oHD7Bw+TlCh/0Sr2rHx4BPz6L5GpVTHK0hy2mgkiiDfcZ Z3XA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8orTCABPFUUDzwNSDUEvK5qkKcVY4K7vUOekf3tCG7U=; fh=o2XzhdKG+B45MJCghEfnYoypmHvLX2hd4SL6yXeiyXI=; b=zm65C5UcZmWspXeFTid0JGqiy6uwOgrOpsUJUjKEEXehScLYV70YV49P1UDHSnMC1Y fuS3A07gntmXi/OBNQE4ee+Pcg9qdgU3CvHS8IRiTlCD4q+2dQvQ756u1mxIVc+xebBn rk6mTdZXj08iQzZ5MwIQQOBAqTan6mojyRf69L1BiAXHkoNpWLsfUW5YTdnwCNcOP5sT wPkcFmRmU24wR1aTHSWO+vBp1n1ZjthNvz22cQeBlNg/GDjyjgCvzM717iUDJLOVI9qZ ILw2L+sOQqU+dZaUMhvqU+dI27sLC4nbq1aqssgYG9VHqZgX4kVukkPau8EC4gtqeEGw tcDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=s0Ix1+XU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich Subject: [PULL 13/31] tests/tcg: Add the PROT_NONE gdbstub test Date: Tue, 30 Jan 2024 09:01:03 +1000 Message-Id: <20240129230121.8091-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::229; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x229.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich Make sure that qemu gdbstub, like gdbserver, allows reading from and writing to PROT_NONE pages. Signed-off-by: Ilya Leoshkevich Message-Id: <20240129093410.3151-4-iii@linux.ibm.com> Signed-off-by: Richard Henderson --- tests/tcg/multiarch/prot-none.c | 40 ++++++++++++++++++++++++ tests/tcg/multiarch/Makefile.target | 9 +++++- tests/tcg/multiarch/gdbstub/prot-none.py | 36 +++++++++++++++++++++ 3 files changed, 84 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/multiarch/prot-none.c create mode 100644 tests/tcg/multiarch/gdbstub/prot-none.py diff --git a/tests/tcg/multiarch/prot-none.c b/tests/tcg/multiarch/prot-none.c new file mode 100644 index 0000000000..dc56aadb3c --- /dev/null +++ b/tests/tcg/multiarch/prot-none.c @@ -0,0 +1,40 @@ +/* + * Test that GDB can access PROT_NONE pages. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include +#include +#include +#include +#include + +void break_here(void *q) +{ +} + +int main(void) +{ + long pagesize = sysconf(_SC_PAGESIZE); + void *p, *q; + int err; + + p = mmap(NULL, pagesize * 2, PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + assert(p != MAP_FAILED); + q = p + pagesize - 1; + strcpy(q, "42"); + + err = mprotect(p, pagesize * 2, PROT_NONE); + assert(err == 0); + + break_here(q); + + err = mprotect(p, pagesize * 2, PROT_READ); + assert(err == 0); + if (getenv("PROT_NONE_PY")) { + assert(strcmp(q, "24") == 0); + } + + return EXIT_SUCCESS; +} diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target index d31ba8d6ae..315a2e1358 100644 --- a/tests/tcg/multiarch/Makefile.target +++ b/tests/tcg/multiarch/Makefile.target @@ -101,13 +101,20 @@ run-gdbstub-registers: sha512 --bin $< --test $(MULTIARCH_SRC)/gdbstub/registers.py, \ checking register enumeration) +run-gdbstub-prot-none: prot-none + $(call run-test, $@, env PROT_NONE_PY=1 $(GDB_SCRIPT) \ + --gdb $(GDB) \ + --qemu $(QEMU) --qargs "$(QEMU_OPTS)" \ + --bin $< --test $(MULTIARCH_SRC)/gdbstub/prot-none.py, \ + accessing PROT_NONE memory) + else run-gdbstub-%: $(call skip-test, "gdbstub test $*", "need working gdb with $(patsubst -%,,$(TARGET_NAME)) support") endif EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read \ run-gdbstub-proc-mappings run-gdbstub-thread-breakpoint \ - run-gdbstub-registers + run-gdbstub-registers run-gdbstub-prot-none # ARM Compatible Semi Hosting Tests # diff --git a/tests/tcg/multiarch/gdbstub/prot-none.py b/tests/tcg/multiarch/gdbstub/prot-none.py new file mode 100644 index 0000000000..e829d3ebc5 --- /dev/null +++ b/tests/tcg/multiarch/gdbstub/prot-none.py @@ -0,0 +1,36 @@ +"""Test that GDB can access PROT_NONE pages. + +This runs as a sourced script (via -x, via run-test.py). + +SPDX-License-Identifier: GPL-2.0-or-later +""" +import ctypes +from test_gdbstub import main, report + + +def probe_proc_self_mem(): + buf = ctypes.create_string_buffer(b'aaa') + try: + with open("/proc/self/mem", "rb") as fp: + fp.seek(ctypes.addressof(buf)) + return fp.read(3) == b'aaa' + except OSError: + return False + + +def run_test(): + """Run through the tests one by one""" + if not probe_proc_self_mem: + print("SKIP: /proc/self/mem is not usable") + exit(0) + gdb.Breakpoint("break_here") + gdb.execute("continue") + val = gdb.parse_and_eval("*(char[2] *)q").string() + report(val == "42", "{} == 42".format(val)) + gdb.execute("set *(char[3] *)q = \"24\"") + gdb.execute("continue") + exitcode = int(gdb.parse_and_eval("$_exitcode")) + report(exitcode == 0, "{} == 0".format(exitcode)) + + +main(run_test) From patchwork Mon Jan 29 23:01:04 2024 Content-Type: text/plain; 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:01:58 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 14/31] accel/tcg/cpu-exec: Use RCU_READ_LOCK_GUARD Date: Tue, 30 Jan 2024 09:01:04 +1000 Message-Id: <20240129230121.8091-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Replace the manual rcu_read_(un)lock calls in cpu_exec(). Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240124074201.8239-2-philmd@linaro.org> [rth: Use RCU_READ_LOCK_GUARD not WITH_RCU_READ_LOCK_GUARD] Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 40c268bfa1..950dad63cb 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -1050,7 +1050,7 @@ int cpu_exec(CPUState *cpu) return EXCP_HALTED; } - rcu_read_lock(); + RCU_READ_LOCK_GUARD(); cpu_exec_enter(cpu); /* @@ -1064,8 +1064,6 @@ int cpu_exec(CPUState *cpu) ret = cpu_exec_setjmp(cpu, &sc); cpu_exec_exit(cpu); - rcu_read_unlock(); - return ret; } From patchwork Mon Jan 29 23:01:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767431 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1116896wro; Mon, 29 Jan 2024 15:03:53 -0800 (PST) X-Google-Smtp-Source: AGHT+IFlTqjJdO5eXF0QL2ZLchOuhPdtqkQs1b2to95wNKCOhLo5R4JQ0HNeUQ9IsQ52vdPMNnOQ X-Received: by 2002:a05:6871:2b1d:b0:210:e01a:4d26 with SMTP id dr29-20020a0568712b1d00b00210e01a4d26mr5851748oac.10.1706569433443; Mon, 29 Jan 2024 15:03:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569433; cv=none; d=google.com; s=arc-20160816; b=sYDz160YWyzolGZ6TirDBAVZhZc9c26bW5nBRXz13Em6XLKFnIzq5Bl39PkYTVaX0Z e20BzoCQs8do1J31rQB4tdKYW9AEimvI5NMPDrIWjxM47A931mvzyYVGt/COkVqirBlq 4ZXW0r17NcVZdZJ8uzSpXoCTDeU6uj6MpXAJvOb+GwkheuwiDr2VLI0bxKYRyqHUVa1H 70E8zpNAVcLs6CtzCHq8FDEfpWIbJCidg1CfDPVekMWGgC2ruKphjCbbRmqR1Mkstqht zGzPoDmCUUpwSgxDkgID7BGU66KIw74RX68Cbkj3FT0gm0uRyHtyPIh4Xyl2NR97bYlg AUUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5Gt1CNQckx8yO7WR3bedyoAfBxjm8E850nOtIhoFZIA=; fh=ZlbSsaokz6j5XPQU+IhUbFpcK1AM7Y5orhlncwoVMh8=; b=Wa56WxHW9q/ySWboLW8SY3QoiA2njPxpQkduI0T/NkA+xzmiEAgLwOoL4eGS0rCEml QwXawk5VQlBkyzXdXkIfV3R0TEsWB62fWhENBeRioTj9THTC2e8peyvCYOqVxLjYp2Ru J7uK4B4BogYB5auOOJObx/QyFqUlTNYwBRCm7q0IzoYnuF8UX/VZVyxhNV7yb2W9hYct ftXNEnUIV6WVLmbOPubUmrTFlfRhURhsnemhwjZqffK3eYyTc2PnzoYEoTw8L5X877BQ 0LDjkcdzPdmLz2Yz8MRSOaXJntZc8Lc9QTWYHpidu/jQQdp4iNDp7qwNDqxLVZyBZpHV bYBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=liAm0qEG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.01.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 15/31] target: Make qemu_target_page_mask() available for *-user Date: Tue, 30 Jan 2024 09:01:05 +1000 Message-Id: <20240129230121.8091-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22a; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich Currently qemu_target_page_mask() is usable only from the softmmu code. Make it possible to use it from the *-user code as well. Signed-off-by: Ilya Leoshkevich Message-ID: <20231208003754.3688038-2-iii@linux.ibm.com> Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240124075609.14756-2-philmd@linaro.org> Reviewed-by: Richard Henderson [rth: Split out change to accel/tcg/perf.c] Signed-off-by: Richard Henderson --- system/physmem.c | 5 ----- target/target-common.c | 10 ++++++++++ target/meson.build | 2 ++ 3 files changed, 12 insertions(+), 5 deletions(-) create mode 100644 target/target-common.c diff --git a/system/physmem.c b/system/physmem.c index cc68a79763..5e66d9ae36 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3431,11 +3431,6 @@ size_t qemu_target_page_size(void) return TARGET_PAGE_SIZE; } -int qemu_target_page_mask(void) -{ - return TARGET_PAGE_MASK; -} - int qemu_target_page_bits(void) { return TARGET_PAGE_BITS; diff --git a/target/target-common.c b/target/target-common.c new file mode 100644 index 0000000000..903b10cfe4 --- /dev/null +++ b/target/target-common.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include "qemu/osdep.h" + +#include "cpu.h" +#include "exec/target_page.h" + +int qemu_target_page_mask(void) +{ + return TARGET_PAGE_MASK; +} diff --git a/target/meson.build b/target/meson.build index a53a60486f..dee2ac47e0 100644 --- a/target/meson.build +++ b/target/meson.build @@ -19,3 +19,5 @@ subdir('sh4') subdir('sparc') subdir('tricore') subdir('xtensa') + +specific_ss.add(files('target-common.c')) From patchwork Mon Jan 29 23:01:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767445 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119045wro; Mon, 29 Jan 2024 15:10:00 -0800 (PST) X-Google-Smtp-Source: AGHT+IHnMtzDXF6doKF4Qx3cbu7d7bVVDC1EHodhuPeheJmuEC2LdeQcavnD3Ln1vnSietFe1I7/ X-Received: by 2002:ad4:5b89:0:b0:68c:4f4d:ccea with SMTP id 9-20020ad45b89000000b0068c4f4dcceamr2665346qvp.23.1706569799916; Mon, 29 Jan 2024 15:09:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569799; cv=none; d=google.com; s=arc-20160816; b=C9+oy2UoyAZe/gMSQVB5EsGoE35cJuzFbbDl+YpAoBZnuVT2/lDX/q30PpUmy0gWUo vRmNdL+eXpyuKUmudaJ8gE+9n38MgQ0+i3dzzflSIaJ/cibGS94oQzz5/YsyLDG358My U3MFEowrzI1mdedEhw5e/UaWMFUm/6Qxs9qdQZn4jcjiSnqetwyexymWoabzkiswNqFS n+5D9ormkaghtHn3mQl1UYzZG9OvQFTds/1LMsmX5wZft3pOBiOsyPaslT0+IMz2tIyM yC9dxTW+vHnyav7R0+kmwU2EttR3F7S54emuHHASO5pL45dRVbT8YgK6Mxe3gGDVeuSb eYJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qYcGKO9y7L+9nQKGBMKS98rrLGXyxY/fBFTDvtgcJC4=; fh=U8v/Dtss/m4oPeJtZ17DHKEvZGyePY/+mu3CqtBX2ks=; b=zUebCCXZXjrwfF0TtYzf8LPyi+VpwxI3U6P9gg5cS5/I06GBCWpU17OtB9FX301QDp dwEoFka8rUjk3yCNga86f6cgEWO3fEXHZtw9fO5sFLVtlraWweRZBErrPo0vk+j3HpaB PnyaFNDcuZTYkqATHVOTgW8AWlWPzzNKFG3JMugH3BpuWmVeWRoL9Ca1PYUcB9LIpk95 i7MCFRawchdKgtLCYrQRXb6AiOjldfEZglefuCNBNMU9N1I9qcLPvhXVp+6p2ztlqKh6 4X85NqNBR5V7cST/KgHjgCSspeLCozBNv3aCy2myFgkPeL1f+DRyjq3Bs89khG2tNqCX id7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Rxl/VITV"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Subject: [PULL 16/31] accel/tcg: Make use of qemu_target_page_mask() in perf.c Date: Tue, 30 Jan 2024 09:01:06 +1000 Message-Id: <20240129230121.8091-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::230; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich Stop using TARGET_PAGE_MASK in order to make perf.c more target-agnostic. Signed-off-by: Ilya Leoshkevich Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20231212003837.64090-2-iii@linux.ibm.com> Reviewed-by: Richard Henderson Message-Id: <20240125054631.78867-2-philmd@linaro.org> Signed-off-by: Richard Henderson --- accel/tcg/perf.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/accel/tcg/perf.c b/accel/tcg/perf.c index cd1aa99a7e..ba75c1bbe4 100644 --- a/accel/tcg/perf.c +++ b/accel/tcg/perf.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "elf.h" +#include "exec/target_page.h" #include "exec/exec-all.h" #include "qemu/timer.h" #include "tcg/tcg.h" @@ -335,7 +336,7 @@ void perf_report_code(uint64_t guest_pc, TranslationBlock *tb, /* FIXME: This replicates the restore_state_to_opc() logic. */ q[insn].address = gen_insn_data[insn * start_words + 0]; if (tb_cflags(tb) & CF_PCREL) { - q[insn].address |= (guest_pc & TARGET_PAGE_MASK); + q[insn].address |= (guest_pc & qemu_target_page_mask()); } else { #if defined(TARGET_I386) q[insn].address -= tb->cs_base; From patchwork Mon Jan 29 23:01:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767434 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1117615wro; Mon, 29 Jan 2024 15:05:28 -0800 (PST) X-Google-Smtp-Source: AGHT+IE7rOyyTK1MLpQeEM+JgmjSFbxiKLf9MD17bcUN8vqJUAzbn0NYbMrYwvi+MsJ9fFEoTbvs X-Received: by 2002:a05:6102:151f:b0:46b:2e99:eddd with SMTP id f31-20020a056102151f00b0046b2e99edddmr4184804vsv.28.1706569527808; Mon, 29 Jan 2024 15:05:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569527; cv=none; d=google.com; s=arc-20160816; b=m8DM0/jJU17KWWVLjRHZViPYCYQF7lDFOf2adNoFqy14mu7TcKiLPKPp/nYV5j2NXa 3sTpiw79Izce4Swhtkxv4A5T+2qYGXMO2ZCHEygZjMwHvfL82+5Uk2Dj9SMwvUXo+sHN t7APF/5dQ80m55LcVjE0LQcW2Lv44ZkCI0nDaDJM1KB7OSam9OZBQlFZiLFbGCSEZGbD EM9blY1bTGIHuHe0Nb2o7RphVFfz9W6YFne56f1BDHpaVaFcBU6JA8XA1gRppHdg7ZN0 TAHtK6Cpmwye4U8z0bFWoVKMOAR/beafuUjchpGFtO8h+PbDeAMbd/EFIw2CzcH0k4D4 7f7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4bfmq9Mg4HxfU53OW0oPle9hQIH8zXg09YsWAHRVD1c=; fh=ZlbSsaokz6j5XPQU+IhUbFpcK1AM7Y5orhlncwoVMh8=; b=smbfDKBa+zB/wbeWYOw3cASYuaOkmcDj8pT7YrftqorE/y9LC5W3fHHG+H44l19cLi 3TS+ZYLH5WhjdocDgKWYP25qzd5vangLgGrVaFR6bNaJisby+mqAtt+8YoLUxdwg+KOr 20KFZHryAnzcerZvTRVLlpWdpP6BprRRcVL9A0EFJXvn5VBGNIP8zViXCI4zJ9/48ed/ RsvoMQuXQSg+nSbjFQaqRPmc7W3LiUtjjqXYe4+ISqMy2g/3owGr3PbhEHuZrzoIBL/u C3gSP5oS0MW2BIvxJzXNU3Llin7VR5uV9h0zBoSaHIH2Z2XGxrC22mDC9gdveZBFN41r 4oFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vxmA47zg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:12 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 17/31] tcg: Make tb_cflags() usable from target-agnostic code Date: Tue, 30 Jan 2024 09:01:07 +1000 Message-Id: <20240129230121.8091-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c2f; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich Currently tb_cflags() is defined in exec-all.h, which is not usable from target-agnostic code. Move it to translation-block.h, which is. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson Message-ID: <20231212003837.64090-3-iii@linux.ibm.com> Message-Id: <20240125054631.78867-3-philmd@linaro.org> Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 6 ------ include/exec/translation-block.h | 6 ++++++ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index df3d93a2e2..ce36bb10d4 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -459,12 +459,6 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size, #endif -/* Hide the qatomic_read to make code a little easier on the eyes */ -static inline uint32_t tb_cflags(const TranslationBlock *tb) -{ - return qatomic_read(&tb->cflags); -} - static inline tb_page_addr_t tb_page_addr0(const TranslationBlock *tb) { #ifdef CONFIG_USER_ONLY diff --git a/include/exec/translation-block.h b/include/exec/translation-block.h index e2b26e16da..48211c890a 100644 --- a/include/exec/translation-block.h +++ b/include/exec/translation-block.h @@ -145,4 +145,10 @@ struct TranslationBlock { /* The alignment given to TranslationBlock during allocation. */ #define CODE_GEN_ALIGN 16 +/* Hide the qatomic_read to make code a little easier on the eyes */ +static inline uint32_t tb_cflags(const TranslationBlock *tb) +{ + return qatomic_read(&tb->cflags); +} + #endif /* EXEC_TRANSLATION_BLOCK_H */ From patchwork Mon Jan 29 23:01:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767443 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1118901wro; Mon, 29 Jan 2024 15:09:32 -0800 (PST) X-Google-Smtp-Source: AGHT+IFK6egl0uUGnkcz3pJskdgkhbOGhpStQlg6wwH2oEFxdHX6m0LXqwyhgbenadQKsZ76EeC7 X-Received: by 2002:a67:ebd4:0:b0:46b:1408:bbad with SMTP id y20-20020a67ebd4000000b0046b1408bbadmr3145069vso.14.1706569771916; Mon, 29 Jan 2024 15:09:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569771; cv=none; d=google.com; s=arc-20160816; b=nGstxcjT/TwNg0FdtmCxzp3XtAEWL423NbrN6Cfu+MXb/sY1RHJfiS1uI4AIugt3S/ 4SJrkqqxZZ4AA4pEZ14eUgZeJTQyJzS/NQV0r1ay/LiRKiXzTfaujmWQz+xfZIAoDYZB egZYPZOya6seM6Ni7IUrNdNtXg4cTqzhM6d4y70pj1RKBbtJXgon/vQAtv+2KEKh76CV JSi5/fKXqosLmDl3PKZKSobrB33jzHGBQ+tMfzwUGURXxrk1spmO6etEgkcUO9UIFvEp NpFcPNxZnNklnwXuxPNL1TdxIXmwLsC5Gk+Cb9pQVWXd+Np2LQqfF2/d5lfgEF14ADFe 7H7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TByYFDCUWCaxnnHjASz8MJMk4paFqdDSnL+kqN7t/Zk=; fh=m3bIYSMZqCABEJVkIKLKf3tNf8TH8EKhZ9yqNwsZqDo=; b=CtXBO5wX5puAuoytBlyrwVfElelXgpvobZtWtjPkSoaxudhvz4n7FqHBMDdqNqYHhe ICrYX8lM/KbeqXyBzGVtiGr63Ib0QU9ZYT0y/MY7IrUcc7W6k6yctvUyhnnLD3L3r0uO IRqLc5Y7yXZZsibN/d2TgKotg6b5OyY6u3n5EcDUgae3cvqt9oPTTxiOVmBl7DpoDtOL 50HEBgYpaixhEgsA+LcJONgPhpluN1R9b/LKtQ5CvjeSljgnUBxfT55UTDOc/DC4ip8F UQj0ji2tO3c+NWNPB73nnHE6dQuKHqfyovClapZrR19IQh5kMhj1+scLvurQbqLv8W8P TsBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hSCT53HD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:14 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PULL 18/31] accel/tcg: Remove #ifdef TARGET_I386 from perf.c Date: Tue, 30 Jan 2024 09:01:08 +1000 Message-Id: <20240129230121.8091-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich Preparation for moving perf.c to tcg/. This affects only profiling guest code, which has code in a non-0 based segment, e.g., 16-bit code, which is not particularly important. Suggested-by: Richard Henderson Signed-off-by: Ilya Leoshkevich Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Message-ID: <20231212003837.64090-4-iii@linux.ibm.com> Message-Id: <20240125054631.78867-4-philmd@linaro.org> Signed-off-by: Richard Henderson --- accel/tcg/perf.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/accel/tcg/perf.c b/accel/tcg/perf.c index ba75c1bbe4..68a46b1b52 100644 --- a/accel/tcg/perf.c +++ b/accel/tcg/perf.c @@ -337,10 +337,6 @@ void perf_report_code(uint64_t guest_pc, TranslationBlock *tb, q[insn].address = gen_insn_data[insn * start_words + 0]; if (tb_cflags(tb) & CF_PCREL) { q[insn].address |= (guest_pc & qemu_target_page_mask()); - } else { -#if defined(TARGET_I386) - q[insn].address -= tb->cs_base; -#endif } q[insn].flags = DEBUGINFO_SYMBOL | (jitdump ? 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:17 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 19/31] accel/tcg: Move perf and debuginfo support to tcg/ Date: Tue, 30 Jan 2024 09:01:09 +1000 Message-Id: <20240129230121.8091-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich tcg/ should not depend on accel/tcg/, but perf and debuginfo support provided by the latter are being used by tcg/tcg.c. Since that's the only user, move both to tcg/. Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson Message-ID: <20231212003837.64090-5-iii@linux.ibm.com> Message-Id: <20240125054631.78867-5-philmd@linaro.org> Signed-off-by: Richard Henderson --- {accel => include}/tcg/debuginfo.h | 4 ++-- {accel => include}/tcg/perf.h | 4 ++-- accel/tcg/translate-all.c | 2 +- hw/core/loader.c | 2 +- linux-user/elfload.c | 2 +- linux-user/exit.c | 2 +- linux-user/main.c | 2 +- system/vl.c | 2 +- {accel/tcg => tcg}/debuginfo.c | 3 +-- {accel/tcg => tcg}/perf.c | 7 +++---- tcg/tcg.c | 2 +- accel/tcg/meson.build | 4 ---- tcg/meson.build | 5 +++++ 13 files changed, 20 insertions(+), 21 deletions(-) rename {accel => include}/tcg/debuginfo.h (96%) rename {accel => include}/tcg/perf.h (95%) rename {accel/tcg => tcg}/debuginfo.c (98%) rename {accel/tcg => tcg}/perf.c (99%) diff --git a/accel/tcg/debuginfo.h b/include/tcg/debuginfo.h similarity index 96% rename from accel/tcg/debuginfo.h rename to include/tcg/debuginfo.h index f064e1c144..858535b5da 100644 --- a/accel/tcg/debuginfo.h +++ b/include/tcg/debuginfo.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: GPL-2.0-or-later */ -#ifndef ACCEL_TCG_DEBUGINFO_H -#define ACCEL_TCG_DEBUGINFO_H +#ifndef TCG_DEBUGINFO_H +#define TCG_DEBUGINFO_H #include "qemu/bitops.h" diff --git a/accel/tcg/perf.h b/include/tcg/perf.h similarity index 95% rename from accel/tcg/perf.h rename to include/tcg/perf.h index f92dd52c69..c96b5920a3 100644 --- a/accel/tcg/perf.h +++ b/include/tcg/perf.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: GPL-2.0-or-later */ -#ifndef ACCEL_TCG_PERF_H -#define ACCEL_TCG_PERF_H +#ifndef TCG_PERF_H +#define TCG_PERF_H #if defined(CONFIG_TCG) && defined(CONFIG_LINUX) /* Start writing perf-.map. */ diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 1737bb3da5..1c695efe02 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -63,7 +63,7 @@ #include "tb-context.h" #include "internal-common.h" #include "internal-target.h" -#include "perf.h" +#include "tcg/perf.h" #include "tcg/insn-start-words.h" TBContext tb_ctx; diff --git a/hw/core/loader.c b/hw/core/loader.c index e7a9b3775b..b8e52f3fb0 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -62,7 +62,7 @@ #include "hw/boards.h" #include "qemu/cutils.h" #include "sysemu/runstate.h" -#include "accel/tcg/debuginfo.h" +#include "tcg/debuginfo.h" #include diff --git a/linux-user/elfload.c b/linux-user/elfload.c index daf7ef8435..b8eef893d0 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -22,7 +22,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "target_signal.h" -#include "accel/tcg/debuginfo.h" +#include "tcg/debuginfo.h" #ifdef TARGET_ARM #include "target/arm/cpu-features.h" diff --git a/linux-user/exit.c b/linux-user/exit.c index 50266314e0..1ff8fe4f07 100644 --- a/linux-user/exit.c +++ b/linux-user/exit.c @@ -17,7 +17,7 @@ * along with this program; if not, see . */ #include "qemu/osdep.h" -#include "accel/tcg/perf.h" +#include "tcg/perf.h" #include "gdbstub/syscalls.h" #include "qemu.h" #include "user-internals.h" diff --git a/linux-user/main.c b/linux-user/main.c index c9470eeccf..74b2fbb393 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -54,7 +54,7 @@ #include "signal-common.h" #include "loader.h" #include "user-mmap.h" -#include "accel/tcg/perf.h" +#include "tcg/perf.h" #ifdef CONFIG_SEMIHOSTING #include "semihosting/semihost.h" diff --git a/system/vl.c b/system/vl.c index 788d88ea03..60fd1e56b6 100644 --- a/system/vl.c +++ b/system/vl.c @@ -96,7 +96,7 @@ #endif #include "sysemu/qtest.h" #ifdef CONFIG_TCG -#include "accel/tcg/perf.h" +#include "tcg/perf.h" #endif #include "disas/disas.h" diff --git a/accel/tcg/debuginfo.c b/tcg/debuginfo.c similarity index 98% rename from accel/tcg/debuginfo.c rename to tcg/debuginfo.c index 71c66d04d1..3753f7ef67 100644 --- a/accel/tcg/debuginfo.c +++ b/tcg/debuginfo.c @@ -6,11 +6,10 @@ #include "qemu/osdep.h" #include "qemu/lockable.h" +#include "tcg/debuginfo.h" #include -#include "debuginfo.h" - static QemuMutex lock; static Dwfl *dwfl; static const Dwfl_Callbacks dwfl_callbacks = { diff --git a/accel/tcg/perf.c b/tcg/perf.c similarity index 99% rename from accel/tcg/perf.c rename to tcg/perf.c index 68a46b1b52..412a987d95 100644 --- a/accel/tcg/perf.c +++ b/tcg/perf.c @@ -11,13 +11,12 @@ #include "qemu/osdep.h" #include "elf.h" #include "exec/target_page.h" -#include "exec/exec-all.h" +#include "exec/translation-block.h" #include "qemu/timer.h" +#include "tcg/debuginfo.h" +#include "tcg/perf.h" #include "tcg/tcg.h" -#include "debuginfo.h" -#include "perf.h" - static FILE *safe_fopen_w(const char *path) { int saved_errno; diff --git a/tcg/tcg.c b/tcg/tcg.c index e2c38f6d11..eeff4c1d51 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -55,7 +55,7 @@ #include "tcg/tcg-ldst.h" #include "tcg/tcg-temp-internal.h" #include "tcg-internal.h" -#include "accel/tcg/perf.h" +#include "tcg/perf.h" #ifdef CONFIG_USER_ONLY #include "exec/user/guest-base.h" #endif diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build index c15ac9ac8f..46f7d53eeb 100644 --- a/accel/tcg/meson.build +++ b/accel/tcg/meson.build @@ -16,10 +16,6 @@ tcg_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_false: files('user-exec-stub.c')) if get_option('plugins') tcg_ss.add(files('plugin-gen.c')) endif -tcg_ss.add(when: libdw, if_true: files('debuginfo.c')) -if host_os == 'linux' - tcg_ss.add(files('perf.c')) -endif specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss) specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files( diff --git a/tcg/meson.build b/tcg/meson.build index 5afdec1e1a..8251589fd4 100644 --- a/tcg/meson.build +++ b/tcg/meson.build @@ -22,6 +22,11 @@ if get_option('tcg_interpreter') tcg_ss.add(files('tci.c')) endif +tcg_ss.add(when: libdw, if_true: files('debuginfo.c')) +if host_os == 'linux' + tcg_ss.add(files('perf.c')) +endif + tcg_ss = tcg_ss.apply({}) libtcg_user = static_library('tcg_user', From patchwork Mon Jan 29 23:01:10 2024 Content-Type: text/plain; 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:19 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson Subject: [PULL 20/31] accel/tcg: Rename tcg_ss[] -> tcg_specific_ss[] in meson Date: Tue, 30 Jan 2024 09:01:10 +1000 Message-Id: <20240129230121.8091-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé tcg_ss[] source set contains target-specific units. Rename it as 'tcg_specific_ss[]' for clarity. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Anton Johansson Message-Id: <20240124101639.30056-2-philmd@linaro.org> Signed-off-by: Richard Henderson --- accel/tcg/meson.build | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build index 46f7d53eeb..aef80de967 100644 --- a/accel/tcg/meson.build +++ b/accel/tcg/meson.build @@ -1,8 +1,8 @@ -tcg_ss = ss.source_set() common_ss.add(when: 'CONFIG_TCG', if_true: files( 'cpu-exec-common.c', )) -tcg_ss.add(files( +tcg_specific_ss = ss.source_set() +tcg_specific_ss.add(files( 'tcg-all.c', 'cpu-exec.c', 'tb-maint.c', @@ -11,12 +11,12 @@ tcg_ss.add(files( 'translate-all.c', 'translator.c', )) -tcg_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c')) -tcg_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_false: files('user-exec-stub.c')) +tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c')) +tcg_specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_false: files('user-exec-stub.c')) if get_option('plugins') - tcg_ss.add(files('plugin-gen.c')) + tcg_specific_ss.add(files('plugin-gen.c')) endif -specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss) +specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss) specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files( 'cputlb.c', From patchwork Mon Jan 29 23:01:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767433 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1116994wro; Mon, 29 Jan 2024 15:04:08 -0800 (PST) X-Google-Smtp-Source: AGHT+IHLf2mg4XscOqBHH4Ta9UDMQ6CExpO79tg+JRtvl/I8MIozmBVL1SIB8/xM92cYtZuqdD3x X-Received: by 2002:ad4:5247:0:b0:68c:42ce:2cdb with SMTP id s7-20020ad45247000000b0068c42ce2cdbmr4628431qvq.99.1706569448076; Mon, 29 Jan 2024 15:04:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569448; cv=none; d=google.com; s=arc-20160816; b=AI8U18k2eD43ClmehtJDyZCtHZ2SBfKggtr42ArUPiAjRbjG9UtmshsZ9z1Hk5QtAP DrUKsA1K7hAjsikLRuUXkY6eMjNliJh9OgFtlNHHFjNwDVjSkwBjsQ9JsW5fi60WBJwO hgfFC+BTF8L+nRJWgYJZKfO+h0e9DoahVQ7F2LqtyaVnxinN2xCkWaNsLOZ+0HFHjW+W KIeZYdGYZnAYAXmLblZxOSQVR9vbICTO2mNVYpj8XDtUT918q9BK0pDVTO6OorN6Tpp+ DBLKTtn2eEm2BIVZqLVtGs1f+LSOAxTEnzj0osyNtAhGe/6ZUMk2EVuLzL4wdYnF7rYY JuJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IeBfHlDAifxu4F1/UNQzzGCEUArq4HbYf2mScaRZKZ4=; fh=HGG5jZNhe8Q+zQJ9+mddel2c/xsqW3vEoqbd78QYiOw=; b=i/FvK4INPohP5tROf8A4AfVrbtALz40/hlabBthu/9Erse2OpJAdgPolmz2pmNsq0Q hXic5Y6S7QMtaLQZe+6W3sBByfeK6Mjo67fZMHihdZc2HabfdJvkrN+BbWJsDw1CYzf9 UebOC9Nk1PUkMENZllJsXJJEz9G77woAm5MeUwE8msWXEMzHqEv1sRKZIhr19GQ5758D AMnrvx4CXhxTUrHHnHGvlmDp5X8T11b7z6ftpssrvfNWawNUssyVehfTt5b5hXWkawIg a0Setgjr/Xyam3PWPmGshqGfK5YqgBK/7vxMtZzTiRDhgpYvUlElxzmZvf23wqEt5TdB sVIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="R+i/ymPy"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:21 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson Subject: [PULL 21/31] accel/tcg: Rename tcg_cpus_destroy() -> tcg_cpu_destroy() Date: Tue, 30 Jan 2024 09:01:11 +1000 Message-Id: <20240129230121.8091-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé tcg_cpus_destroy() operates on a single vCPU, rename it as 'tcg_cpu_destroy'. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Message-Id: <20240124101639.30056-3-philmd@linaro.org> Signed-off-by: Richard Henderson --- accel/tcg/tcg-accel-ops.h | 2 +- accel/tcg/tcg-accel-ops-mttcg.c | 2 +- accel/tcg/tcg-accel-ops-rr.c | 2 +- accel/tcg/tcg-accel-ops.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/accel/tcg/tcg-accel-ops.h b/accel/tcg/tcg-accel-ops.h index f9bc6330e2..17c7ed00eb 100644 --- a/accel/tcg/tcg-accel-ops.h +++ b/accel/tcg/tcg-accel-ops.h @@ -14,7 +14,7 @@ #include "sysemu/cpus.h" -void tcg_cpus_destroy(CPUState *cpu); +void tcg_cpu_destroy(CPUState *cpu); int tcg_cpus_exec(CPUState *cpu); void tcg_handle_interrupt(CPUState *cpu, int mask); void tcg_cpu_init_cflags(CPUState *cpu, bool parallel); diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttcg.c index af7307013a..bcba314a65 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.c +++ b/accel/tcg/tcg-accel-ops-mttcg.c @@ -118,7 +118,7 @@ static void *mttcg_cpu_thread_fn(void *arg) qemu_wait_io_event(cpu); } while (!cpu->unplug || cpu_can_run(cpu)); - tcg_cpus_destroy(cpu); + tcg_cpu_destroy(cpu); bql_unlock(); rcu_remove_force_rcu_notifier(&force_rcu.notifier); rcu_unregister_thread(); diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index 3208035d85..0617f66b5b 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -131,7 +131,7 @@ static void rr_deal_with_unplugged_cpus(void) CPU_FOREACH(cpu) { if (cpu->unplug && !cpu_can_run(cpu)) { - tcg_cpus_destroy(cpu); + tcg_cpu_destroy(cpu); break; } } diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 813065c0ec..9b84b84218 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -63,7 +63,7 @@ void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) cpu->tcg_cflags |= cflags; } -void tcg_cpus_destroy(CPUState *cpu) +void tcg_cpu_destroy(CPUState *cpu) { cpu_thread_signal_destroyed(cpu); } From patchwork Mon Jan 29 23:01:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767436 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1117755wro; Mon, 29 Jan 2024 15:05:50 -0800 (PST) X-Google-Smtp-Source: AGHT+IE8IEjDYVjHqSpVWI2vriUucXb9PykbDErPA/ktMrLWQGqNwsAQicQAU6juvrvxh/AjkOl3 X-Received: by 2002:a05:6214:765:b0:68c:4f54:5bd8 with SMTP id f5-20020a056214076500b0068c4f545bd8mr3954154qvz.32.1706569550136; Mon, 29 Jan 2024 15:05:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569550; cv=none; d=google.com; s=arc-20160816; b=TNNRKaRpKWylFa/TLNjYvp91MsestRhrS5bQ8E5upba3CkbT39xG9+WGe0laPXeJzw pitemnuqbCjnR/RJfU9f7K+ZglBLogX+lBHOKuytMZdP5k1u/iZyOC+TF2lYJo6bis8e LdZjoGaBqkFRAe5DcoPK3OhG3dtjI5bNFtH90gVJSdJu3PytEmzqiA/6XMPFloGNgYgu JA3Qi81Z/z2fi9mKlWvd0bzFWQ5syPR3LJdk6Ipl0YNs1QsUhiOhLeEx3U8oenUghLuJ +gSOvys4xZvPYBJUxOmlnghxThvl4OaQektcdsK69dZCTiVL/cK4942Dl9hJBoFwH1UE WicQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=h0D5wvbqCBKDS3PIRJ2u8mID+Ysdp5Zl/usWtkQWmMI=; fh=HGG5jZNhe8Q+zQJ9+mddel2c/xsqW3vEoqbd78QYiOw=; b=LatCYdLkqNZBTDHVZ/26Y4/uOcTxXqkC5SmJt/puaURKQw29/y0wpXq4pMSnWf0jlq ZYvzK786nT0ziGEjCrIdQlCZRG1X5XDSsDLtxlPlw3+smsxArzcqOo204QFvNKtL76Gf 53tnsAYAGAWDIo3Rcuda2PAl+Em6vQk/tSWtqeATZq8fyW6yNBN8w3NsjxsTLM11Qi3Z cb1Zd3Tuy1aSx9VEXmqnBkkzqbp7pSzmeUA/xkh73EtkU7FJN4gNpOArDlIe+NubmUI0 xrT/BnLRfmBa0TdXrz17ipVb1rsGaFcFn7P0rpL5AeKK7DhajvarBtd3NWHv8FYMNEwP 4TpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=v20khRcT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:24 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson Subject: [PULL 22/31] accel/tcg: Rename tcg_cpus_exec() -> tcg_cpu_exec() Date: Tue, 30 Jan 2024 09:01:12 +1000 Message-Id: <20240129230121.8091-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22e; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé tcg_cpus_exec() operates on a single vCPU, rename it as 'tcg_cpu_exec'. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Anton Johansson Message-Id: <20240124101639.30056-4-philmd@linaro.org> Signed-off-by: Richard Henderson --- accel/tcg/tcg-accel-ops.h | 2 +- accel/tcg/tcg-accel-ops-mttcg.c | 2 +- accel/tcg/tcg-accel-ops-rr.c | 2 +- accel/tcg/tcg-accel-ops.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/accel/tcg/tcg-accel-ops.h b/accel/tcg/tcg-accel-ops.h index 17c7ed00eb..44c4079972 100644 --- a/accel/tcg/tcg-accel-ops.h +++ b/accel/tcg/tcg-accel-ops.h @@ -15,7 +15,7 @@ #include "sysemu/cpus.h" void tcg_cpu_destroy(CPUState *cpu); -int tcg_cpus_exec(CPUState *cpu); +int tcg_cpu_exec(CPUState *cpu); void tcg_handle_interrupt(CPUState *cpu, int mask); void tcg_cpu_init_cflags(CPUState *cpu, bool parallel); diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttcg.c index bcba314a65..c552b45b8e 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.c +++ b/accel/tcg/tcg-accel-ops-mttcg.c @@ -92,7 +92,7 @@ static void *mttcg_cpu_thread_fn(void *arg) if (cpu_can_run(cpu)) { int r; bql_unlock(); - r = tcg_cpus_exec(cpu); + r = tcg_cpu_exec(cpu); bql_lock(); switch (r) { case EXCP_DEBUG: diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index 0617f66b5b..894e73e52c 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -258,7 +258,7 @@ static void *rr_cpu_thread_fn(void *arg) if (icount_enabled()) { icount_prepare_for_run(cpu, cpu_budget); } - r = tcg_cpus_exec(cpu); + r = tcg_cpu_exec(cpu); if (icount_enabled()) { icount_process_data(cpu); } diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 9b84b84218..9c957f421c 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -68,7 +68,7 @@ void tcg_cpu_destroy(CPUState *cpu) cpu_thread_signal_destroyed(cpu); } -int tcg_cpus_exec(CPUState *cpu) +int tcg_cpu_exec(CPUState *cpu) { int ret; assert(tcg_enabled()); From patchwork Mon Jan 29 23:01:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767448 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119191wro; Mon, 29 Jan 2024 15:10:23 -0800 (PST) X-Google-Smtp-Source: AGHT+IF/uuf+sQ1m9NQHWMC/RO8zZDQp+i0lsZC0az0w1/saiHEJ1f3basbRzTswdtulYgfX/28s X-Received: by 2002:a05:620a:4d2:b0:783:e9ba:7d33 with SMTP id 18-20020a05620a04d200b00783e9ba7d33mr5164627qks.60.1706569823137; Mon, 29 Jan 2024 15:10:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569823; cv=none; d=google.com; s=arc-20160816; b=CZ2GCKk9yhDT7wuapFrvhDsktoshz5anUqjaoLFHJjdN7GY9UdLbEdHSswN30K82Ty zSQRSzpYJBkcASyOu51AndjjGbYVrdxeb9RedLxtTeZt22PEn+JmL8iAfcL6G4y+l1ZV dDl6NnbLUtLXiqM9s2vZyOPZ/WY82PePs3Q8u0ys68YVlDBAAxu/OzXtX5NbBR42iT/U OBbOtl7WYbRqHWxvljsnCDvvf/qFCA5rHa4f9GPCk1HBmM3jhU7NvaW0CADQ1YWpiSyU DQZ0v3aN6lUrv5V0/ijT4cufFBHTUisRL0xS1G1ieFpfnZ5jP54lKU+L2evb8hBgxPpX JFxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zfMhTQxwxgwjYRWhH0P+ZcfoxncjyISGzQ2K+4rTjEw=; fh=HGG5jZNhe8Q+zQJ9+mddel2c/xsqW3vEoqbd78QYiOw=; b=scewZiOgvfKg/slbE9bRLQT77F3QIFVOPF/zOpTIx2H2yKrtKIcG+zZ77NbqeVF6hY 6fdNMGwWJP6a0peCRKGwcCIOjFf2q/kSZRHwVN2ixIC4wbHstVCq2oRU2EZDCmT2vbFl C+eTKtqcUkp1NwC3jxN2pVZscancyxsOB1lVB81CtAvl5qWuM/ntq734p6K6ggizrEUd RXpWacmNhzbvnHCftpGKTQ4pD+t3CI+VNtET5YV9ZEKy4bfXQ5qWJxJn1CycHn7d37hx VMgw1gWSMNqG3I1ZiYfH3gQqKef9AR+6nGx2LhLK8BbOCsJHfHY+YVVMQw5+Fy2Z+Iew cbcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kfRdOoz+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson Subject: [PULL 23/31] accel/tcg: Un-inline icount_exit_request() for clarity Date: Tue, 30 Jan 2024 09:01:13 +1000 Message-Id: <20240129230121.8091-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::231; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Convert packed logic to dumb icount_exit_request() helper. No functional change intended. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Anton Johansson Message-Id: <20240124101639.30056-5-philmd@linaro.org> Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 950dad63cb..f2535a2991 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -777,6 +777,17 @@ static inline bool need_replay_interrupt(int interrupt_request) } #endif /* !CONFIG_USER_ONLY */ +static inline bool icount_exit_request(CPUState *cpu) +{ + if (!icount_enabled()) { + return false; + } + if (cpu->cflags_next_tb != -1 && !(cpu->cflags_next_tb & CF_USE_ICOUNT)) { + return false; + } + return cpu->neg.icount_decr.u16.low + cpu->icount_extra == 0; +} + static inline bool cpu_handle_interrupt(CPUState *cpu, TranslationBlock **last_tb) { @@ -882,10 +893,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, } /* Finally, check if we need to exit to the main loop. */ - if (unlikely(qatomic_read(&cpu->exit_request)) - || (icount_enabled() - && (cpu->cflags_next_tb == -1 || cpu->cflags_next_tb & CF_USE_ICOUNT) - && cpu->neg.icount_decr.u16.low + cpu->icount_extra == 0)) { + if (unlikely(qatomic_read(&cpu->exit_request)) || icount_exit_request(cpu)) { qatomic_set(&cpu->exit_request, 0); if (cpu->exception_index == -1) { cpu->exception_index = EXCP_INTERRUPT; From patchwork Mon Jan 29 23:01:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767456 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1120078wro; Mon, 29 Jan 2024 15:13:21 -0800 (PST) X-Google-Smtp-Source: AGHT+IGlnx+S9PgAkCUqJyXPFAxGZAX52qGAFQGV4kigpQ1dV0jn3nzTOG7aIZiOmedqAQR3cD6a X-Received: by 2002:ad4:4f50:0:b0:68c:43d6:82a0 with SMTP id eu16-20020ad44f50000000b0068c43d682a0mr4300660qvb.31.1706570001003; Mon, 29 Jan 2024 15:13:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706570000; cv=none; d=google.com; s=arc-20160816; b=AWNT/8A8ef+08LXOC8bz6lEYfasDSSAAkLeLQAEV7+BhRnC+saaaLf4zJIfLzAXmSs brThScBY2olXg0RZOs4LZlui5pR1wAvfs/fuxLJdYFvtW2VWysoDPWO9lqga+0qduDrF tj7ELen0Fcukso64VyuFYF9b1WDBjMarY8kNjG4eG7SbqCmiX/YrDJs6h6mcJDxvz8xv 3xsZG+QMYzMd1GtZvlnznFAPlG9UT5CBY9IiRVpG5G0yBROMA8TuFEuvpRqegsZ+GQgi VaOZCQWEzprBOtfAVqAKpDz4+xcPTKNTY+umNRj+e79CoqWYwHIqQ7qZjTUC0K7DeOaH skyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=nX2hnguDgyihezTVjMva+754f8p35uMs4yuEeO0w5ns=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=yecqySSyBlA+qBfP6iH1g6b504Uc11YGfekvtv1289/jxJPQTgV1/sDDM7BPGKTLu3 emkZWnh0lep4btRrLVLj+fCYE5IBLjMtyCMIU9Ws/SpJT1PqvIXEEq7S6rabWFmG+eLp l1imNbN7xivHXKTT8+/uZGmilGoOrZol1dhBZO7aVw7KvTUNU8biLW46UKynDkmc839H Xuq77/oiHbBuWSXrz77WEKrDZ98tbZ4KFK+Atya6kCZucWysvYhewH8zu64CHIHR6MUH 4tJC0Sal0hpU5porHEzAFa1yTcy1OdNZB95XkJAQHRa42kV1SEyxtWr7ZrECfkMaPdV+ JwZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UdEGj7ZS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:29 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 24/31] include/qemu: Add TCGCPUOps typedef to typedefs.h Date: Tue, 30 Jan 2024 09:01:14 +1000 Message-Id: <20240129230121.8091-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QEMU coding style recommends using structure typedefs. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 5 +---- include/qemu/typedefs.h | 1 + bsd-user/signal.c | 4 ++-- linux-user/signal.c | 4 ++-- target/alpha/cpu.c | 2 +- target/arm/cpu.c | 2 +- target/arm/tcg/cpu32.c | 2 +- target/avr/cpu.c | 2 +- target/cris/cpu.c | 4 ++-- target/hexagon/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/i386/tcg/tcg-cpu.c | 2 +- target/loongarch/cpu.c | 2 +- target/m68k/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/mips/cpu.c | 2 +- target/nios2/cpu.c | 2 +- target/openrisc/cpu.c | 2 +- target/ppc/cpu_init.c | 2 +- target/riscv/tcg/tcg-cpu.c | 2 +- target/rx/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/sh4/cpu.c | 2 +- target/sparc/cpu.c | 2 +- target/tricore/cpu.c | 2 +- target/xtensa/cpu.c | 2 +- 26 files changed, 29 insertions(+), 31 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index db58f12233..2c284d6397 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -90,9 +90,6 @@ typedef enum MMUAccessType { typedef struct CPUWatchpoint CPUWatchpoint; -/* see tcg-cpu-ops.h */ -struct TCGCPUOps; - /* see accel-cpu.h */ struct AccelCPUClass; @@ -177,7 +174,7 @@ struct CPUClass { const struct SysemuCPUOps *sysemu_ops; /* when TCG is not available, this pointer is NULL */ - const struct TCGCPUOps *tcg_ops; + const TCGCPUOps *tcg_ops; /* * if not NULL, this is called in order for the CPUClass to initialize diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index 5abdbc3874..d7c703b4ae 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -131,6 +131,7 @@ typedef struct Range Range; typedef struct ReservedRegion ReservedRegion; typedef struct SHPCDevice SHPCDevice; typedef struct SSIBus SSIBus; +typedef struct TCGCPUOps TCGCPUOps; typedef struct TCGHelperInfo TCGHelperInfo; typedef struct TranslationBlock TranslationBlock; typedef struct VirtIODevice VirtIODevice; diff --git a/bsd-user/signal.c b/bsd-user/signal.c index ca31470772..f4352e4530 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -1022,7 +1022,7 @@ void process_pending_signals(CPUArchState *env) void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, MMUAccessType access_type, bool maperr, uintptr_t ra) { - const struct TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + const TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; if (tcg_ops->record_sigsegv) { tcg_ops->record_sigsegv(cpu, addr, access_type, maperr, ra); @@ -1038,7 +1038,7 @@ void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr, MMUAccessType access_type, uintptr_t ra) { - const struct TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + const TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; if (tcg_ops->record_sigbus) { tcg_ops->record_sigbus(cpu, addr, access_type, ra); diff --git a/linux-user/signal.c b/linux-user/signal.c index c9527adfa3..d3e62ab030 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -671,7 +671,7 @@ void force_sigsegv(int oldsig) void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, MMUAccessType access_type, bool maperr, uintptr_t ra) { - const struct TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + const TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; if (tcg_ops->record_sigsegv) { tcg_ops->record_sigsegv(cpu, addr, access_type, maperr, ra); @@ -687,7 +687,7 @@ void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr, MMUAccessType access_type, uintptr_t ra) { - const struct TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + const TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; if (tcg_ops->record_sigbus) { tcg_ops->record_sigbus(cpu, addr, access_type, ra); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index b8ed29e343..de705c3703 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -203,7 +203,7 @@ static const struct SysemuCPUOps alpha_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps alpha_tcg_ops = { +static const TCGCPUOps alpha_tcg_ops = { .initialize = alpha_translate_init, .restore_state_to_opc = alpha_restore_state_to_opc, diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b60e103046..6a96b245f2 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2458,7 +2458,7 @@ static const struct SysemuCPUOps arm_sysemu_ops = { #endif #ifdef CONFIG_TCG -static const struct TCGCPUOps arm_tcg_ops = { +static const TCGCPUOps arm_tcg_ops = { .initialize = arm_translate_init, .synchronize_from_tb = arm_cpu_synchronize_from_tb, .debug_excp_handler = arm_debug_excp_handler, diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c index d9e0e2a4dd..1125305115 100644 --- a/target/arm/tcg/cpu32.c +++ b/target/arm/tcg/cpu32.c @@ -1018,7 +1018,7 @@ static void pxa270c5_initfn(Object *obj) cpu->reset_sctlr = 0x00000078; } -static const struct TCGCPUOps arm_v7m_tcg_ops = { +static const TCGCPUOps arm_v7m_tcg_ops = { .initialize = arm_translate_init, .synchronize_from_tb = arm_cpu_synchronize_from_tb, .debug_excp_handler = arm_debug_excp_handler, diff --git a/target/avr/cpu.c b/target/avr/cpu.c index f5cbdc4a8c..1c68748b24 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -210,7 +210,7 @@ static const struct SysemuCPUOps avr_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps avr_tcg_ops = { +static const TCGCPUOps avr_tcg_ops = { .initialize = avr_cpu_tcg_init, .synchronize_from_tb = avr_cpu_synchronize_from_tb, .restore_state_to_opc = avr_restore_state_to_opc, diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 9ba08e8b0c..6349148b65 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -178,7 +178,7 @@ static const struct SysemuCPUOps cris_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps crisv10_tcg_ops = { +static const TCGCPUOps crisv10_tcg_ops = { .initialize = cris_initialize_crisv10_tcg, .restore_state_to_opc = cris_restore_state_to_opc, @@ -189,7 +189,7 @@ static const struct TCGCPUOps crisv10_tcg_ops = { #endif /* !CONFIG_USER_ONLY */ }; -static const struct TCGCPUOps crisv32_tcg_ops = { +static const TCGCPUOps crisv32_tcg_ops = { .initialize = cris_initialize_tcg, .restore_state_to_opc = cris_restore_state_to_opc, diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index c0cd739e15..759ea62814 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -337,7 +337,7 @@ static void hexagon_cpu_init(Object *obj) #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps hexagon_tcg_ops = { +static const TCGCPUOps hexagon_tcg_ops = { .initialize = hexagon_translate_init, .synchronize_from_tb = hexagon_cpu_synchronize_from_tb, .restore_state_to_opc = hexagon_restore_state_to_opc, diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 14e17fa9aa..3c019855b4 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -170,7 +170,7 @@ static const struct SysemuCPUOps hppa_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps hppa_tcg_ops = { +static const TCGCPUOps hppa_tcg_ops = { .initialize = hppa_translate_init, .synchronize_from_tb = hppa_cpu_synchronize_from_tb, .restore_state_to_opc = hppa_restore_state_to_opc, diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index e1405b7be9..8e148e9bc4 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -106,7 +106,7 @@ static bool x86_debug_check_breakpoint(CPUState *cs) #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps x86_tcg_ops = { +static const TCGCPUOps x86_tcg_ops = { .initialize = tcg_x86_init, .synchronize_from_tb = x86_cpu_synchronize_from_tb, .restore_state_to_opc = x86_restore_state_to_opc, diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 064540397d..dd3e46a726 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -734,7 +734,7 @@ void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) #ifdef CONFIG_TCG #include "hw/core/tcg-cpu-ops.h" -static struct TCGCPUOps loongarch_tcg_ops = { +static TCGCPUOps loongarch_tcg_ops = { .initialize = loongarch_translate_init, .synchronize_from_tb = loongarch_cpu_synchronize_from_tb, .restore_state_to_opc = loongarch_restore_state_to_opc, diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 1421e77c2c..44000f5869 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -525,7 +525,7 @@ static const struct SysemuCPUOps m68k_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps m68k_tcg_ops = { +static const TCGCPUOps m68k_tcg_ops = { .initialize = m68k_tcg_init, .restore_state_to_opc = m68k_restore_state_to_opc, diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index bbb3335cad..2318ad7013 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -387,7 +387,7 @@ static const struct SysemuCPUOps mb_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps mb_tcg_ops = { +static const TCGCPUOps mb_tcg_ops = { .initialize = mb_tcg_init, .synchronize_from_tb = mb_cpu_synchronize_from_tb, .restore_state_to_opc = mb_restore_state_to_opc, diff --git a/target/mips/cpu.c b/target/mips/cpu.c index a0023edd43..df544ab39b 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -549,7 +549,7 @@ static const struct SysemuCPUOps mips_sysemu_ops = { * NB: cannot be const, as some elements are changed for specific * mips hardware (see hw/mips/jazz.c). */ -static const struct TCGCPUOps mips_tcg_ops = { +static const TCGCPUOps mips_tcg_ops = { .initialize = mips_tcg_init, .synchronize_from_tb = mips_cpu_synchronize_from_tb, .restore_state_to_opc = mips_restore_state_to_opc, diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index a27732bf2b..596c0c5617 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -354,7 +354,7 @@ static const struct SysemuCPUOps nios2_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps nios2_tcg_ops = { +static const TCGCPUOps nios2_tcg_ops = { .initialize = nios2_tcg_init, .restore_state_to_opc = nios2_restore_state_to_opc, diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 381ebe00d3..477d49d4bc 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -213,7 +213,7 @@ static const struct SysemuCPUOps openrisc_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps openrisc_tcg_ops = { +static const TCGCPUOps openrisc_tcg_ops = { .initialize = openrisc_translate_init, .synchronize_from_tb = openrisc_cpu_synchronize_from_tb, .restore_state_to_opc = openrisc_restore_state_to_opc, diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 344196a8ce..23eb5522b6 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7332,7 +7332,7 @@ static const struct SysemuCPUOps ppc_sysemu_ops = { #ifdef CONFIG_TCG #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps ppc_tcg_ops = { +static const TCGCPUOps ppc_tcg_ops = { .initialize = ppc_translate_init, .restore_state_to_opc = ppc_restore_state_to_opc, diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 994ca1cdf9..b7da92783b 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -129,7 +129,7 @@ static void riscv_restore_state_to_opc(CPUState *cs, env->bins = data[1]; } -static const struct TCGCPUOps riscv_tcg_ops = { +static const TCGCPUOps riscv_tcg_ops = { .initialize = riscv_translate_init, .synchronize_from_tb = riscv_cpu_synchronize_from_tb, .restore_state_to_opc = riscv_restore_state_to_opc, diff --git a/target/rx/cpu.c b/target/rx/cpu.c index c5ffeffe32..353132dac2 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -178,7 +178,7 @@ static const struct SysemuCPUOps rx_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps rx_tcg_ops = { +static const TCGCPUOps rx_tcg_ops = { .initialize = rx_translate_init, .synchronize_from_tb = rx_cpu_synchronize_from_tb, .restore_state_to_opc = rx_restore_state_to_opc, diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 6acfa1c91b..7f123863dc 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -319,7 +319,7 @@ static void s390_cpu_reset_full(DeviceState *dev) #ifdef CONFIG_TCG #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps s390_tcg_ops = { +static const TCGCPUOps s390_tcg_ops = { .initialize = s390x_translate_init, .restore_state_to_opc = s390x_restore_state_to_opc, diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 806a0ef875..39772955b5 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -237,7 +237,7 @@ static const struct SysemuCPUOps sh4_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps superh_tcg_ops = { +static const TCGCPUOps superh_tcg_ops = { .initialize = sh4_translate_init, .synchronize_from_tb = superh_cpu_synchronize_from_tb, .restore_state_to_opc = superh_restore_state_to_opc, diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index befa7fc4eb..7d0d629a3d 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -874,7 +874,7 @@ static const struct SysemuCPUOps sparc_sysemu_ops = { #ifdef CONFIG_TCG #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps sparc_tcg_ops = { +static const TCGCPUOps sparc_tcg_ops = { .initialize = sparc_tcg_init, .synchronize_from_tb = sparc_cpu_synchronize_from_tb, .restore_state_to_opc = sparc_restore_state_to_opc, diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 8acacdf0c0..e6d91c74b5 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -173,7 +173,7 @@ static const struct SysemuCPUOps tricore_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps tricore_tcg_ops = { +static const TCGCPUOps tricore_tcg_ops = { .initialize = tricore_tcg_init, .synchronize_from_tb = tricore_cpu_synchronize_from_tb, .restore_state_to_opc = tricore_restore_state_to_opc, diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 99c0ca130f..62020b1f33 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -222,7 +222,7 @@ static const struct SysemuCPUOps xtensa_sysemu_ops = { #include "hw/core/tcg-cpu-ops.h" -static const struct TCGCPUOps xtensa_tcg_ops = { +static const TCGCPUOps xtensa_tcg_ops = { .initialize = xtensa_translate_init, .debug_excp_handler = xtensa_breakpoint_handler, .restore_state_to_opc = xtensa_restore_state_to_opc, From patchwork Mon Jan 29 23:01:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767439 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1117996wro; Mon, 29 Jan 2024 15:06:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IGxDrS2bYzNp8V138j98Ddm2iO4Z+d4AbF5lqmXoTmglxCikp7opK2zAoWdPqzpJp0aCgvC X-Received: by 2002:a05:6214:501e:b0:68c:4725:cbc3 with SMTP id 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 25/31] target/loongarch: Constify loongarch_tcg_ops Date: Tue, 30 Jan 2024 09:01:15 +1000 Message-Id: <20240129230121.8091-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson --- target/loongarch/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index dd3e46a726..fb8dde7def 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -734,7 +734,7 @@ void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) #ifdef CONFIG_TCG #include "hw/core/tcg-cpu-ops.h" -static TCGCPUOps loongarch_tcg_ops = { +static const TCGCPUOps loongarch_tcg_ops = { .initialize = loongarch_translate_init, .synchronize_from_tb = loongarch_cpu_synchronize_from_tb, .restore_state_to_opc = loongarch_restore_state_to_opc, From patchwork Mon Jan 29 23:01:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767453 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119841wro; Mon, 29 Jan 2024 15:12:32 -0800 (PST) X-Google-Smtp-Source: AGHT+IHqtLZECJowQcCe/c4Fl5FWydZkA2Y685yoDolTUco952uNlZCebpXtpJI1w0Ydk1FY2eEY X-Received: by 2002:ac8:5dcc:0:b0:42a:7105:f332 with SMTP id e12-20020ac85dcc000000b0042a7105f332mr9791278qtx.102.1706569952542; Mon, 29 Jan 2024 15:12:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569952; cv=none; d=google.com; s=arc-20160816; b=T1pPVMBeeZ0TXt8X7OKVNUkq+GdgIwN238p70uIXnGi3E1KzFnR4SCdZ7oxARYPa7Y jl0HvVU7T9QzI3430P1GmF4TzPlIffqG8LTkXyd+a0jOOBtd2oOZAQ7vCfAjEXCSxpyT QEf2ARv8ajQ8Qm82NbWsdYO6gsmQ9Nq+SzCF/G1hC2AuT7Qok1HS7r1kC6sk9nXkUxbT 8mNPUSs8EuYPe2RPNMepDCBR8axUT19LzEp3LyMQ52IR61vakiJqVWCLhZCROl0Rjke6 rHmeUfnk3iTFTXQz/wtoGtSJqXmsbjwgZKEjZojzFf8z5UTWgOYctdBiNzDNTOITJkxZ oW7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=7BY3FC/8lb12NjJs4/taRcBSMiYCFRNyNU57iKW6Ebg=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=0942MbIWsSXzwUPg1wVye4YS/4Dq0qG9/tFRZZZXOAVNGnhY6usUCrDEbIbl2XT52U 0NkXZoozpRkSa1QQchQlVFSjE3wK2SpLckL/JaaxlXQlh5tXEB93CvH13ZZ65vA4J8CU Xk4d6eV6114Yd1D5rXeVgdTk7eVI3EEK4EvJVHQZ/wqtnYJHhXRPRTXrS31L2mVzn5Ds 65x5XKorlNfsshlCWQs1qg+dJZ0lbhPUWikoh7Qrnttuo3niVpbpa4nvcdTzxjK24noi +JtDEKTEGje6bxZWQ/2dsoRObMZV3qBnRpA7TQwpNH99X7U4LX4l9T5jjNF4Ee21B9N3 /NhA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="ZSPB/XlR"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 26/31] accel/tcg: Use CPUState.cc instead of CPU_GET_CLASS in cpu-exec.c Date: Tue, 30 Jan 2024 09:01:16 +1000 Message-Id: <20240129230121.8091-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c2f; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CPU_GET_CLASS does runtime type checking; use the cached copy of the class instead. Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 109 ++++++++++++++++++++++--------------------- 1 file changed, 56 insertions(+), 53 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index f2535a2991..3aebf46849 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -343,9 +343,9 @@ static bool check_for_breakpoints_slow(CPUState *cpu, vaddr pc, #ifdef CONFIG_USER_ONLY g_assert_not_reached(); #else - CPUClass *cc = CPU_GET_CLASS(cpu); - assert(cc->tcg_ops->debug_check_breakpoint); - match_bp = cc->tcg_ops->debug_check_breakpoint(cpu); + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; + assert(tcg_ops->debug_check_breakpoint); + match_bp = tcg_ops->debug_check_breakpoint(cpu); #endif } @@ -462,10 +462,11 @@ cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit) * counter hit zero); we must restore the guest PC to the address * of the start of the TB. */ - CPUClass *cc = CPU_GET_CLASS(cpu); + CPUClass *cc = cpu->cc; + const TCGCPUOps *tcg_ops = cc->tcg_ops; - if (cc->tcg_ops->synchronize_from_tb) { - cc->tcg_ops->synchronize_from_tb(cpu, last_tb); + if (tcg_ops->synchronize_from_tb) { + tcg_ops->synchronize_from_tb(cpu, last_tb); } else { tcg_debug_assert(!(tb_cflags(last_tb) & CF_PCREL)); assert(cc->set_pc); @@ -497,19 +498,19 @@ cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit) static void cpu_exec_enter(CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; - if (cc->tcg_ops->cpu_exec_enter) { - cc->tcg_ops->cpu_exec_enter(cpu); + if (tcg_ops->cpu_exec_enter) { + tcg_ops->cpu_exec_enter(cpu); } } static void cpu_exec_exit(CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; - if (cc->tcg_ops->cpu_exec_exit) { - cc->tcg_ops->cpu_exec_exit(cpu); + if (tcg_ops->cpu_exec_exit) { + tcg_ops->cpu_exec_exit(cpu); } } @@ -685,7 +686,7 @@ static inline bool cpu_handle_halt(CPUState *cpu) static inline void cpu_handle_debug_exception(CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; CPUWatchpoint *wp; if (!cpu->watchpoint_hit) { @@ -694,8 +695,8 @@ static inline void cpu_handle_debug_exception(CPUState *cpu) } } - if (cc->tcg_ops->debug_excp_handler) { - cc->tcg_ops->debug_excp_handler(cpu); + if (tcg_ops->debug_excp_handler) { + tcg_ops->debug_excp_handler(cpu); } } @@ -712,6 +713,7 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) #endif return false; } + if (cpu->exception_index >= EXCP_INTERRUPT) { /* exit request from the cpu execution loop */ *ret = cpu->exception_index; @@ -720,43 +722,45 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) } cpu->exception_index = -1; return true; - } else { -#if defined(CONFIG_USER_ONLY) - /* if user mode only, we simulate a fake exception - which will be handled outside the cpu execution - loop */ -#if defined(TARGET_I386) - CPUClass *cc = CPU_GET_CLASS(cpu); - cc->tcg_ops->fake_user_interrupt(cpu); -#endif /* TARGET_I386 */ - *ret = cpu->exception_index; - cpu->exception_index = -1; - return true; -#else - if (replay_exception()) { - CPUClass *cc = CPU_GET_CLASS(cpu); - bql_lock(); - cc->tcg_ops->do_interrupt(cpu); - bql_unlock(); - cpu->exception_index = -1; + } - if (unlikely(cpu->singlestep_enabled)) { - /* - * After processing the exception, ensure an EXCP_DEBUG is - * raised when single-stepping so that GDB doesn't miss the - * next instruction. - */ - *ret = EXCP_DEBUG; - cpu_handle_debug_exception(cpu); - return true; - } - } else if (!replay_has_interrupt()) { - /* give a chance to iothread in replay mode */ - *ret = EXCP_INTERRUPT; +#if defined(CONFIG_USER_ONLY) + /* + * If user mode only, we simulate a fake exception which will be + * handled outside the cpu execution loop. + */ +#if defined(TARGET_I386) + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; + tcg_ops->fake_user_interrupt(cpu); +#endif /* TARGET_I386 */ + *ret = cpu->exception_index; + cpu->exception_index = -1; + return true; +#else + if (replay_exception()) { + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; + + bql_lock(); + tcg_ops->do_interrupt(cpu); + bql_unlock(); + cpu->exception_index = -1; + + if (unlikely(cpu->singlestep_enabled)) { + /* + * After processing the exception, ensure an EXCP_DEBUG is + * raised when single-stepping so that GDB doesn't miss the + * next instruction. + */ + *ret = EXCP_DEBUG; + cpu_handle_debug_exception(cpu); return true; } -#endif + } else if (!replay_has_interrupt()) { + /* give a chance to iothread in replay mode */ + *ret = EXCP_INTERRUPT; + return true; } +#endif return false; } @@ -856,10 +860,10 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, True when it is, and we should restart on a new TB, and via longjmp via cpu_loop_exit. */ else { - CPUClass *cc = CPU_GET_CLASS(cpu); + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; - if (cc->tcg_ops->cpu_exec_interrupt && - cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { + if (tcg_ops->cpu_exec_interrupt && + tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { if (need_replay_interrupt(interrupt_request)) { replay_interrupt(); } @@ -1078,10 +1082,9 @@ int cpu_exec(CPUState *cpu) bool tcg_exec_realizefn(CPUState *cpu, Error **errp) { static bool tcg_target_initialized; - CPUClass *cc = CPU_GET_CLASS(cpu); if (!tcg_target_initialized) { - cc->tcg_ops->initialize(); + cpu->cc->tcg_ops->initialize(); tcg_target_initialized = true; } From patchwork Mon Jan 29 23:01:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767447 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119060wro; Mon, 29 Jan 2024 15:10:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IGVpu2yFu87iSluHc26aV8jeD/JpRj3K69KkCyn7qJqaHHfiDNo7gGM9u1jrUjRIi3l5f5+ X-Received: by 2002:a05:622a:5c8:b0:42a:84cb:bd22 with SMTP id d8-20020a05622a05c800b0042a84cbbd22mr6950171qtb.116.1706569801861; Mon, 29 Jan 2024 15:10:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569801; cv=none; d=google.com; s=arc-20160816; b=omtZZvrjmvlR5LAn2M0leks/VCRxQt+DTILrtj21sNYIgj/tpaaZqoGmmRGARk+Jvt NA4RwD96pXqFMIqbf6kTr+0GwhbNdenRfivCBhwu8osVnWaL0EpyrgDxhyy8irvHA9R4 4q7eccAxw4usV4ovyvDe9ePHXVEWQ90ZDaJRPJ1sB2iCkRAsEcRL1Rl2siTVfTlZdR0V U/BPwOGWOG++YI/zuVAx/Zwh5eclnN0G+EmsIFwg8fmihxOt6PjZZLnTSvBDqqZN654r fABNIaNjayisSUUEvx7nSYzl4vbbhWMiali5EsPrEnIWJTDm+wT6vUct/aO0+1T+q4Ld bYKw== ARC-Message-Signature: i=1; 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:36 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Pavel Dovgalyuk Subject: [PULL 27/31] accel/tcg: Introduce TCGCPUOps::need_replay_interrupt() handler Date: Tue, 30 Jan 2024 09:01:17 +1000 Message-Id: <20240129230121.8091-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé In order to make accel/tcg/ target agnostic, introduce the need_replay_interrupt() handler. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Anton Johansson Reviewed-by: Pavel Dovgalyuk Message-Id: <20240124101639.30056-7-philmd@linaro.org> Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 5 +++++ accel/tcg/cpu-exec.c | 8 +++++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 3ed279836f..013867b890 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -166,6 +166,11 @@ struct TCGCPUOps { */ bool (*io_recompile_replay_branch)(CPUState *cpu, const TranslationBlock *tb); + /** + * @need_replay_interrupt: Return %true if @interrupt_request + * needs to be recorded for replay purposes. + */ + bool (*need_replay_interrupt)(int interrupt_request); #endif /* !CONFIG_USER_ONLY */ #endif /* NEED_CPU_H */ diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 3aebf46849..34d10eb173 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -771,12 +771,14 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) * "real" interrupt event later. It does not need to be recorded for * replay purposes. */ -static inline bool need_replay_interrupt(int interrupt_request) +static inline bool need_replay_interrupt(CPUState *cpu, int interrupt_request) { #if defined(TARGET_I386) return !(interrupt_request & CPU_INTERRUPT_POLL); #else - return true; + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; + return !tcg_ops->need_replay_interrupt + || tcg_ops->need_replay_interrupt(interrupt_request); #endif } #endif /* !CONFIG_USER_ONLY */ @@ -864,7 +866,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, if (tcg_ops->cpu_exec_interrupt && tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { - if (need_replay_interrupt(interrupt_request)) { + if (need_replay_interrupt(cpu, interrupt_request)) { replay_interrupt(); } /* From patchwork Mon Jan 29 23:01:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767450 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119239wro; Mon, 29 Jan 2024 15:10:31 -0800 (PST) X-Google-Smtp-Source: AGHT+IG4Q4wtkHPye43ucEnRLFTcZ8NQg4ipLFy7zt5gDD0LP3x4cBfNlLDze772fVQfnhfSCs6Q X-Received: by 2002:ac8:7d41:0:b0:42a:5a8e:6b68 with SMTP id h1-20020ac87d41000000b0042a5a8e6b68mr8015473qtb.84.1706569831414; Mon, 29 Jan 2024 15:10:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569831; cv=none; d=google.com; s=arc-20160816; b=EjSuihfRtEV3fWDB3EvhbL2Dt05yFpoBFFO09HhvlsnkMNs7T5QabfwQrfU6b1HCOJ UnbfEH+vroB4RKo0+3Ux28WIjMWHcleNkxffFSWbjL6VN0hXSwWmPzQgjSv0rvMopQWt jhCC7+lw468+c0TxDISjtgmzQovyhCvXApmjekS3uCTeYHByWT3oiZLE/9cm2hxOiHrK cI65FqHOl1ytVluXAvLsKeWV62oqWn+R23YzA3TeAA3hwb2Go4R7YYq/H6R7H8vUq44E NdTimBkXdosU/aJsLt9blvCTAnoD7cEu+Sb8irGsNz5uHL104+BVsC7TCmRD6TA6ZVBC Hc/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4tMFQE97q4aUbL8LMPU5R9Llk18uVwdymUNm4iTykmc=; fh=HPaGXKsmKghdmujZ6SN7T9DPluDP/5SUmo+zFc4N+Vk=; b=bnJt+yQif/asBdFT8eo9MGfJN6BeGvm+gf1aKp3++V+WA5Aro4inAmDjKuhZ0Y2+GV /cqTRwqzSdfPKPhRw9DYYAIWT27QPuQHZ9LFecgdyG3yxy6wbnmy1WsXGBrh8cA3eH3z qsCgUJ8e/a9HbsDSkQ4qGIIe09JGRESMkvVQ2DVcDoHVLVUO+WWkQNojidxoh2cMZTqg gtKrde2+bhgQcuVgugsa0AsZOOMBu/8IWGO7tkPnek6lxFJgjTbDo1qVuMCO9cVZpmGz rslJvorHw7lnX2lfDxfPadSUGjVf2T3+SKSYpdT0EH3dbgpRWGrQ0AGQhaKbVRMxR1Qs Usrg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="sooDS/uM"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Pavel Dovgalyuk Subject: [PULL 28/31] target/i386: Extract x86_need_replay_interrupt() from accel/tcg/ Date: Tue, 30 Jan 2024 09:01:18 +1000 Message-Id: <20240129230121.8091-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Move this x86-specific code out of the generic accel/tcg/. Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Reviewed-by: Pavel Dovgalyuk Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240124101639.30056-8-philmd@linaro.org> Signed-off-by: Richard Henderson --- target/i386/tcg/helper-tcg.h | 1 + accel/tcg/cpu-exec.c | 4 ---- target/i386/tcg/sysemu/seg_helper.c | 10 ++++++++++ target/i386/tcg/tcg-cpu.c | 1 + 4 files changed, 12 insertions(+), 4 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index ce34b737bb..253b1f561e 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -39,6 +39,7 @@ QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS); */ void x86_cpu_do_interrupt(CPUState *cpu); #ifndef CONFIG_USER_ONLY +bool x86_need_replay_interrupt(int interrupt_request); bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); #endif diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 34d10eb173..2eacd694ea 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -773,13 +773,9 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) */ static inline bool need_replay_interrupt(CPUState *cpu, int interrupt_request) { -#if defined(TARGET_I386) - return !(interrupt_request & CPU_INTERRUPT_POLL); -#else const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; return !tcg_ops->need_replay_interrupt || tcg_ops->need_replay_interrupt(interrupt_request); -#endif } #endif /* !CONFIG_USER_ONLY */ diff --git a/target/i386/tcg/sysemu/seg_helper.c b/target/i386/tcg/sysemu/seg_helper.c index 1cb5a0db45..e6f42282bb 100644 --- a/target/i386/tcg/sysemu/seg_helper.c +++ b/target/i386/tcg/sysemu/seg_helper.c @@ -127,6 +127,16 @@ void x86_cpu_do_interrupt(CPUState *cs) } } +bool x86_need_replay_interrupt(int interrupt_request) +{ + /* + * CPU_INTERRUPT_POLL is a virtual event which gets converted into a + * "real" interrupt event later. It does not need to be recorded for + * replay purposes. + */ + return !(interrupt_request & CPU_INTERRUPT_POLL); +} + bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { X86CPU *cpu = X86_CPU(cs); diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 8e148e9bc4..5bdcf45199 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -123,6 +123,7 @@ static const TCGCPUOps x86_tcg_ops = { .do_unaligned_access = x86_cpu_do_unaligned_access, .debug_excp_handler = breakpoint_handler, .debug_check_breakpoint = x86_debug_check_breakpoint, + .need_replay_interrupt = x86_need_replay_interrupt, #endif /* !CONFIG_USER_ONLY */ }; From patchwork Mon Jan 29 23:01:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767441 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1118345wro; Mon, 29 Jan 2024 15:07:37 -0800 (PST) X-Google-Smtp-Source: AGHT+IE9tArA6l3gnPiHwoORdJBE6Z37Yy9Y3b1Td0Tf2S5LL5l7u39n0vzcEsUGmtPFCcHRJoTG X-Received: by 2002:a05:620a:673:b0:783:f759:a9f7 with SMTP id a19-20020a05620a067300b00783f759a9f7mr3258143qkh.19.1706569656743; Mon, 29 Jan 2024 15:07:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569656; cv=none; d=google.com; s=arc-20160816; b=WOZx/Y0rs1jstp4CXRWBnudOmt3THoEVBSgdQzso9u0/TfqozYhz/NQ31kpwY4gcb/ IdlwvkRh1ScIx6bSV/qvF6Tlh+AaNkdzB1vyaEQpq1rFe2gE6V/JiLeA/ThKxSI3ellv NH/b4hIkha7DmxDev8QPh/dA041Eai6o8jrcvU4cHKppSoqq6T7RHKrpH/1bWOKXwCcP /Yk8JAF3jCwcL51ZosWCU+HcJuY+8Tg3259jFcPeYmULMy3ZonqkasC0MPEFcNYNa7u/ R71VyWtavbqjoTHPjiFw13N7wtcTtNSMlZw3mOz/wDSZRqfeplTnrN35b22bb1cBIb7x fbIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=2hwCZNX7r6WcP/DB6F59Yv2bYfXzcZik2wXoCrV2EBg=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=kuaB+EoKYedZ0OMZn6iSsr+sRg6RF3uy2Oa9JIBUDlOFRvOeyFhNrAGIwCvDAxEuPA oInvlxccwV4kcx+pDYvpnVhigE2sH/yVJtYb4f8m43zOOjXJVkHwx6I7cP329r9bexV1 whRd052It/zuAlSXnQJuX1AbKH85dY/NMJooZ+1gz6SOvheYeIUItkWm557lfBtgaZNn 0LdJk8t5DZU5ozPNhXejFf/87xroyMa3waBOo00qvLKtjpC41XLaQIC3djGj8iAnJOoA z9NzfTps2euByRyfT4qdr99FIzUif1K7lJ7u0Byhxi04Yx8LNMN0gg2AZgtK2JUrliyk 0Lig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CdT4eWum; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 29/31] accel/tcg: Inline need_replay_interrupt Date: Tue, 30 Jan 2024 09:01:19 +1000 Message-Id: <20240129230121.8091-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22a; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The function is now trivial, and with inlining we can re-use the calling function's tcg_ops variable. Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 2eacd694ea..75f7ba7bed 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -765,20 +765,6 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) return false; } -#ifndef CONFIG_USER_ONLY -/* - * CPU_INTERRUPT_POLL is a virtual event which gets converted into a - * "real" interrupt event later. It does not need to be recorded for - * replay purposes. - */ -static inline bool need_replay_interrupt(CPUState *cpu, int interrupt_request) -{ - const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; - return !tcg_ops->need_replay_interrupt - || tcg_ops->need_replay_interrupt(interrupt_request); -} -#endif /* !CONFIG_USER_ONLY */ - static inline bool icount_exit_request(CPUState *cpu) { if (!icount_enabled()) { @@ -862,7 +848,8 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, if (tcg_ops->cpu_exec_interrupt && tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { - if (need_replay_interrupt(cpu, interrupt_request)) { + if (!tcg_ops->need_replay_interrupt || + tcg_ops->need_replay_interrupt(interrupt_request)) { replay_interrupt(); } /* From patchwork Mon Jan 29 23:01:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767449 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119238wro; Mon, 29 Jan 2024 15:10:31 -0800 (PST) X-Google-Smtp-Source: AGHT+IFMCnKD0DPoDrYpLYcHMpjkgyCeHTXJpnoJA7ogPzo2P60EqMdb5qJtlGhvOOG/tSjLHwYz X-Received: by 2002:a05:6808:2385:b0:3be:333d:5232 with SMTP id bp5-20020a056808238500b003be333d5232mr7344208oib.22.1706569831406; Mon, 29 Jan 2024 15:10:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569831; cv=none; d=google.com; s=arc-20160816; b=Q9xQh0OWIEDkFTCsakbeqg0vGmXi/EZ74YfTXHf8oL4SmCQCyhme/cm30E3X4XA/US XZGITR+zXm0UKDFumKnhTjQaE3aY64woG6maYgspSGst7zROGpVD+gtOdAGMj6YPm5/F kYfkqTcrmhPDXWcIuQL/JJQDUuaHTUyytI6miws5ZFRNYnOHaA4vuFceeha/MVL5wmzM 4cJHztflSHtPRYgPnH8jfNR78d42dxiHFC7IEwuuSZzXPP0mUG8VBlqeiMjIbtj1xMxX q76W3Baz4ROrd04KjJmj369aKq49XbJFY4crqoCmDNUInOXAGIDrlrnvRVBV3CJERjES YMhw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LMqE9xBix0QLmyhH8Xqft/09pdbioiePfeACz0Kfp3o=; fh=HGG5jZNhe8Q+zQJ9+mddel2c/xsqW3vEoqbd78QYiOw=; b=km6179vNVA3fAACNCimsZ9Yd2g2VJpICReECzOMrmANb567QdN27EZ2rF/saLVsscY bsgEnOjyK6MBOiKCeyXBs4yR15Yf/6K5IFRba2kwMZacCV25TQ/Ok2nJQk1DthJYfvHQ kNjZ2/ik8IUrHoTEzSGaulyNYfxcAJL2uapL5Ii0yjfFxjmAcY6wrrltavSK4Nd6OnOA klUdZTpRWyBXTY1Fmy1FunoDvq3abuvPrVmfl2M4ptlDG+ySSfPqWLhBn1yjwSGE+bIY sPK4qS0OOREdNr/O8y9Zh7fZXuMAn+4jXf4gGwJt3Tt+219tHAAevCuLCzt79yn4u4vm kaZQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GxVbeobX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:42 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson Subject: [PULL 30/31] accel/tcg: Introduce TCGCPUOps::cpu_exec_halt() handler Date: Tue, 30 Jan 2024 09:01:20 +1000 Message-Id: <20240129230121.8091-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé In order to make accel/tcg/ target agnostic, introduce the cpu_exec_halt() handler. Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240124101639.30056-9-philmd@linaro.org> Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 2 ++ accel/tcg/cpu-exec.c | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 013867b890..bf8ff8e3ee 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -112,6 +112,8 @@ struct TCGCPUOps { void (*do_interrupt)(CPUState *cpu); /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */ bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); + /** @cpu_exec_halt: Callback for handling halt in cpu_exec */ + void (*cpu_exec_halt)(CPUState *cpu); /** * @tlb_fill: Handle a softmmu tlb miss * diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 75f7ba7bed..82627b12b8 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -664,6 +664,8 @@ static inline bool cpu_handle_halt(CPUState *cpu) { #ifndef CONFIG_USER_ONLY if (cpu->halted) { + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; + #if defined(TARGET_I386) if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { X86CPU *x86_cpu = X86_CPU(cpu); @@ -673,6 +675,9 @@ static inline bool cpu_handle_halt(CPUState *cpu) bql_unlock(); } #endif /* TARGET_I386 */ + if (tcg_ops->cpu_exec_halt) { + tcg_ops->cpu_exec_halt(cpu); + } if (!cpu_has_work(cpu)) { return true; } From patchwork Mon Jan 29 23:01:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 767444 Delivered-To: patch@linaro.org Received: by 2002:adf:ee41:0:b0:33a:e5bd:fedd with SMTP id w1csp1119001wro; Mon, 29 Jan 2024 15:09:51 -0800 (PST) X-Google-Smtp-Source: AGHT+IE3M6snZP1p21tMfoijKlXJUDOa7zjgC8W9lnCbCUmrsiT7cSW3qChaMm2SRAv0se0L1Kd/ X-Received: by 2002:ac8:5991:0:b0:42a:97dc:9e5d with SMTP id e17-20020ac85991000000b0042a97dc9e5dmr6795801qte.104.1706569791199; Mon, 29 Jan 2024 15:09:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706569791; cv=none; d=google.com; s=arc-20160816; b=Z14kdzhuKxgPkLfzuaLstJrzpZw+El8WvNYZ8EwFjN6Ckb2ROiqsgYxqVOLhaszwq4 a3usUINPeClzKmApKiLxxK/m8/iEaS4BwtdXIb16TF3zRFIzeN4WuA9WO1TnZv1wQ5P6 kobsQCMsnkxym4bpIX4HbxecxHuqO933GbsDOM1PUJZBcWE19fjPw+Ecjct7Na4uhoV+ xJNY/bEIDc7b5iCQ/WVuWTidJ0e3nsa1sLSRj3O2Sk02jGNFDGz29HtUbWk6TM6ZrALA l4k5INfVU7xRYCNEKhc/En6mlpAvm+8DD0tcBryR6RYbEXLyCW0zqqBLzkMNmps+a0yW nEQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=T/uaC3GU2r5ag1NYLRtG0R3ws3tDO6FtLPMPWrHI/7I=; fh=HGG5jZNhe8Q+zQJ9+mddel2c/xsqW3vEoqbd78QYiOw=; b=A9iE18myK+qVebDl5CnjlVSzgaSgrzd7F2KyBRykrSg2MI4w0XPFpJ71UZKc0ziAh3 xirzZ2bzdYr1Aij46N74DWoy5r9JqKu/nhupXWXqfUozGAroLzW+G4IavZWbZ/lIBkj/ QorSTPd197euLFbK6HyjlpCbFdDUovQwkSw56FgkZ/dYE+FgnIKNg1Sw8k3QVcwG1UcT GfpUkNavW4aIIcHRssPdhXXIMaYAl6DW0Tbh8/iO2EZO+tfzsyj03NRrc0D5ZkXgLAgp KuAOCMWcUgTJRSk2Ef4ekEWHJE4/qXYZAz69hXOTsvPE0NcIfWXtr9oJYhdICu1xDVaY 3JEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SmySVDk4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id r10-20020aa78b8a000000b006ddcf56fb78sm6419368pfd.62.2024.01.29.15.02.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:02:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson Subject: [PULL 31/31] target/i386: Extract x86_cpu_exec_halt() from accel/tcg/ Date: Tue, 30 Jan 2024 09:01:21 +1000 Message-Id: <20240129230121.8091-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129230121.8091-1-richard.henderson@linaro.org> References: <20240129230121.8091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Move this x86-specific code out of the generic accel/tcg/. Reported-by: Anton Johansson Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240124101639.30056-10-philmd@linaro.org> Signed-off-by: Richard Henderson --- target/i386/tcg/helper-tcg.h | 1 + accel/tcg/cpu-exec.c | 12 ------------ target/i386/tcg/sysemu/seg_helper.c | 13 +++++++++++++ target/i386/tcg/tcg-cpu.c | 1 + 4 files changed, 15 insertions(+), 12 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index 253b1f561e..effc2c1c98 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -39,6 +39,7 @@ QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS); */ void x86_cpu_do_interrupt(CPUState *cpu); #ifndef CONFIG_USER_ONLY +void x86_cpu_exec_halt(CPUState *cpu); bool x86_need_replay_interrupt(int interrupt_request); bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); #endif diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 82627b12b8..977576ca14 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -30,9 +30,6 @@ #include "qemu/rcu.h" #include "exec/log.h" #include "qemu/main-loop.h" -#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) -#include "hw/i386/apic.h" -#endif #include "sysemu/cpus.h" #include "exec/cpu-all.h" #include "sysemu/cpu-timers.h" @@ -666,15 +663,6 @@ static inline bool cpu_handle_halt(CPUState *cpu) if (cpu->halted) { const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; -#if defined(TARGET_I386) - if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { - X86CPU *x86_cpu = X86_CPU(cpu); - bql_lock(); - apic_poll_irq(x86_cpu->apic_state); - cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); - bql_unlock(); - } -#endif /* TARGET_I386 */ if (tcg_ops->cpu_exec_halt) { tcg_ops->cpu_exec_halt(cpu); } diff --git a/target/i386/tcg/sysemu/seg_helper.c b/target/i386/tcg/sysemu/seg_helper.c index e6f42282bb..2db8083748 100644 --- a/target/i386/tcg/sysemu/seg_helper.c +++ b/target/i386/tcg/sysemu/seg_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" +#include "qemu/main-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "exec/cpu_ldst.h" @@ -127,6 +128,18 @@ void x86_cpu_do_interrupt(CPUState *cs) } } +void x86_cpu_exec_halt(CPUState *cpu) +{ + if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { + X86CPU *x86_cpu = X86_CPU(cpu); + + bql_lock(); + apic_poll_irq(x86_cpu->apic_state); + cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); + bql_unlock(); + } +} + bool x86_need_replay_interrupt(int interrupt_request) { /* diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 5bdcf45199..cca19cd40e 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -119,6 +119,7 @@ static const TCGCPUOps x86_tcg_ops = { #else .tlb_fill = x86_cpu_tlb_fill, .do_interrupt = x86_cpu_do_interrupt, + .cpu_exec_halt = x86_cpu_exec_halt, .cpu_exec_interrupt = x86_cpu_exec_interrupt, .do_unaligned_access = x86_cpu_do_unaligned_access, .debug_excp_handler = breakpoint_handler,