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[83.97.153.254]) by smtp.gmail.com with ESMTPSA id c4-20020a05600c0a4400b0040e621feca9sm2723301wmq.17.2024.01.26.11.46.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 11:46:33 -0800 (PST) Message-ID: Subject: [PATCH 1/3] spi: spi-rockchip: Fix out of bounds array access From: Luis de Arquer To: linux-spi@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: broonie@kernel.org, heiko@sntech.de, linux-arm-kernel@lists.infradead.org, Robin Murphy , luis.dearquer@inertim.com Date: Fri, 26 Jan 2024 20:46:22 +0100 User-Agent: Evolution 3.44.4-0ubuntu2 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Luis de Arquer Since spi-rockchip enables use_gpio_descriptors and the SPI_CONTROLLER_GPIO_SS flag, the spi subsytem may call set_cs() for spi devices with indexes above ROCKCHIP_SPI_MAX_CS_NUM Remove array cs_asserted[] which held a shadow copy of the state of the chip select lines with the only purpose of optimizing out rewriting a chip select line to the current state (no-op) This case is already handled by spi.c Signed-off-by: Luis de Arquer --- drivers/spi/spi-rockchip.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 4b9669da2cf3..2fb2d65bd5f4 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -192,8 +192,6 @@ struct rockchip_spi { u8 n_bytes; u8 rsd; - bool cs_asserted[ROCKCHIP_SPI_MAX_CS_NUM]; - bool target_abort; bool cs_inactive; /* spi target tansmition stop when cs inactive */ bool cs_high_supported; /* native CS supports active-high polarity */ @@ -245,10 +243,6 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable; - /* Return immediately for no-op */ - if (cs_asserted == rs->cs_asserted[spi_get_chipselect(spi, 0)]) - return; - if (cs_asserted) { /* Keep things powered as long as CS is asserted */ pm_runtime_get_sync(rs->dev); @@ -268,8 +262,6 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) /* Drop reference from when we first asserted CS */ pm_runtime_put(rs->dev); } - - rs->cs_asserted[spi_get_chipselect(spi, 0)] = cs_asserted; } static void rockchip_spi_handle_err(struct spi_controller *ctlr, From patchwork Fri Jan 26 19:46:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luis de Arquer X-Patchwork-Id: 767336 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE1B6224D1 for ; Fri, 26 Jan 2024 19:46:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706298419; cv=none; b=cP3E0EQU9l3TyDpBmn8OkYBBo5Ph3AfV8MRBwT2zl9vkpyAgTp0DT8cE9Qf8YqLLeEtdY0VfrFX0rIfuLx72YgyiUsWi62OI6NTNEdI2QqxZIl97fnPKE26UUvnrWtpge7riAiaYHm6y04cuc/IKalPbR0brPd8jfsdGJHQc2JY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706298419; c=relaxed/simple; bh=wd4mMcJ6WsoBVRWMVafZ87B6uvpdvd70W4jhd0cTjXI=; h=Message-ID:Subject:From:To:Cc:Date:Content-Type:MIME-Version; b=IYRGzsm7Vysv+eAz5M6RAmGccEM+N7GLrYfjy60xXfkZMu6rMZPYGu+cOue/aWmCwlbg/OWB6p+Rsxk71spsgQqrrZvHYRtOUOpmlHFYOfDwtZrR/Cad5bcEipkOQAoJCA6QDCTzuKvon3MhYDSWiTBCJejrXgSUu7VOaAtsoc4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=anQSbQSq; arc=none smtp.client-ip=209.85.221.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="anQSbQSq" Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-339231c062bso840006f8f.0 for ; Fri, 26 Jan 2024 11:46:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1706298416; x=1706903216; darn=vger.kernel.org; h=mime-version:user-agent:content-transfer-encoding:date:cc:to:from :subject:message-id:from:to:cc:subject:date:message-id:reply-to; bh=0IIrz90wxugAXxqo1oEKAPrbqAXFmZOvUWx/sZLFUrc=; b=anQSbQSqshJtY3E3XYaBuJi+WtMbTbjDR44C2KCpoKGtfJV7lkSoSU0PtX+DXUXl3i V7M5vJc8ZhctZv1J+6aJRHeOWcSNewS5f5rqkikBUO2zKi5SBexukVORtGhNSB7XpLju FFz/xfzApTqV8R9GJRToLbkk6t+IYTp3t6ajyKssC/g2FFa7peeY+yz5zr4EU1pCep3I 05JgNOkIVmXe+yx/znvTdXEMx0YbXMEQvOJd5atrsjoohf7l0PMAwsqPIwlny+S6Se5T ptBnWV0yThgkA55PJN9M9q2qKtpFweuW2x79pf+g5s19hwg7lxIoiLkOI0Brp4d9iMI8 +shQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706298416; x=1706903216; h=mime-version:user-agent:content-transfer-encoding:date:cc:to:from :subject:message-id:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=0IIrz90wxugAXxqo1oEKAPrbqAXFmZOvUWx/sZLFUrc=; b=OSwOEJQXaBXZyUoasPIWmqngKs6PjMXcdy1Gqc0LUxxc8No1M8CpwIRO9ND8JJJfOJ /j2lkvElUgRE3mbuMpHEM4vSsZnIs1uPKt9Yq+W0ICC+aO8xrv5WIbacAH3Wy2mPhfXV skLQ7VSSGtcYPNRllGS6M30cSN1UF2Cqsn82wKyOJpeqbY6ty9iB8hDHRbnCUd9+QwiU DvZSUER+IYrPRRfNy8DPaHhLPFCKAt4+rqrAQ/Luwz2OURkxB1uFDjeyiF11B+twB1el V+lpZElzqeVyY9h+T4Th0Dqbhlgt6erOIzQwiG5KCGHDUOxInPe4rHPPPD5xzLfwFqYs eqWw== X-Gm-Message-State: AOJu0Ywnn3wLblw3QmQW93Dr6t1nU2DGg3AQgLiZ7g3foVVrO5frYdys vQFzfoWswDHF5vrT44J6BSWggqIF+pxkO5Nl/RhCQzOOMEJhHbYnqC6bO/SeiOXcJA== X-Google-Smtp-Source: AGHT+IFtcvfcwyggy7yof16qegpXOAcbCVaLwA7I4eH2tEs0+zqJOppVHA/couG3saqmW2UUqbqyiA== X-Received: by 2002:a5d:694b:0:b0:33a:dec1:308e with SMTP id r11-20020a5d694b000000b0033adec1308emr138083wrw.116.1706298415756; Fri, 26 Jan 2024 11:46:55 -0800 (PST) Received: from [192.168.0.5] (cm-83-97-153-254.telecable.es. [83.97.153.254]) by smtp.gmail.com with ESMTPSA id j17-20020adfe511000000b00339214d70b5sm1876673wrm.85.2024.01.26.11.46.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 11:46:55 -0800 (PST) Message-ID: <4d18808e85b85077761c5655083f20ebfd7d3770.camel@gmail.com> Subject: [PATCH 2/3] spi: spi-rockchip: Fix max_native_cs From: Luis de Arquer To: linux-spi@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: broonie@kernel.org, heiko@sntech.de, linux-arm-kernel@lists.infradead.org, Robin Murphy , luis.dearquer@inertim.com Date: Fri, 26 Jan 2024 20:46:44 +0100 User-Agent: Evolution 3.44.4-0ubuntu2 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Luis de Arquer Signed-off-by: Luis de Arquer --- drivers/spi/spi-rockchip.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 2fb2d65bd5f4..e1ecd96c7858 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -160,8 +160,7 @@ */ #define ROCKCHIP_SPI_MAX_TRANLEN 0xffff -/* 2 for native cs, 2 for cs-gpio */ -#define ROCKCHIP_SPI_MAX_CS_NUM 4 +#define ROCKCHIP_SPI_MAX_NATIVE_CS_NUM 2 #define ROCKCHIP_SPI_VER2_TYPE1 0x05EC0002 #define ROCKCHIP_SPI_VER2_TYPE2 0x00110002 @@ -839,7 +838,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) ctlr->target_abort = rockchip_spi_target_abort; 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[83.97.153.254]) by smtp.gmail.com with ESMTPSA id eo9-20020a056000428900b00337d9b772c6sm1891773wrb.37.2024.01.26.11.47.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 11:47:16 -0800 (PST) Message-ID: Subject: [PATCH 3/3] spi: spi-rockchip: Fix unused chip select line when using gpio cs From: Luis de Arquer To: linux-spi@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: broonie@kernel.org, heiko@sntech.de, linux-arm-kernel@lists.infradead.org, Robin Murphy , luis.dearquer@inertim.com Date: Fri, 26 Jan 2024 20:47:05 +0100 User-Agent: Evolution 3.44.4-0ubuntu2 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Luis de Arquer This change allows the DT to use native c1 for a device while leaving native cs0 reserved for allowing gpio cs operation Signed-off-by: Luis de Arquer --- drivers/spi/spi-rockchip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index e1ecd96c7858..e1ae62e8765c 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -247,13 +247,13 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) pm_runtime_get_sync(rs->dev); if (spi_get_csgpiod(spi, 0)) - ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, ctlr->unused_native_cs); else ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi_get_chipselect(spi, 0))); } else { if (spi_get_csgpiod(spi, 0)) - ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); + ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, ctlr->unused_native_cs); else ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi_get_chipselect(spi, 0)));