From patchwork Tue Jan 23 22:25:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765333 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A7474F5EC; Tue, 23 Jan 2024 22:25:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048750; cv=none; b=CsUcHr1S9dO9sEPWVdrxxgNjkXMalG2wLmTyps27P0duKV7SU7awVNB6rd+GUiBHWaYshyZr+XGKgReA+kCANrYywwKthlqkirhV8DfpC5UfblN7J9bhKeSqIiNr1/DVA7W4oeqHYJ4CAxhEjP7zyNJhpn2eL72l2rzKLd/UaTM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048750; c=relaxed/simple; bh=MLzJXMzlZPywODP3DzyXGrNkKNdu7Qt6wK2FpFhpWDw=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=ef9qsjameJAoX8ZksbI3BLCZfdXLKtc4wqzBiDRb2Kmu9RATBs/zcz5YKok5P05g5BC1IIseNnsHTRPOeogDbigF/bfn8s6nqiuokLCuIDZwkAoysVUOdJ1mzPLNynYrn/6NcJWdqKgSHIvqu7qKwO1KpyUNKCDae4MEYrpsBtY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Mr0Bziyz; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Mr0Bziyz" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPbbN058345; Tue, 23 Jan 2024 16:25:37 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1706048737; bh=E4V+m3ceuBNsJd2beKt93a+FUbahotqPfUyo0k3p28Y=; h=From:To:CC:Subject:Date; b=Mr0BziyzPwHlVhqDsB21b1YkCnSZfItuI43wF1MvGHI5vb2XlBnlhz2YGgFukiDnB 5VZlabntXsIrtILFe09N4i2U8ZdnyWwxoiIIepiekyJbxYeYtVTbntvklTDo4dBfik VFUwMFzcEUAwFSM32dJQEXUlzRlHfiJR/soQ9drI= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40NMPb7S122068 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 23 Jan 2024 16:25:37 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 23 Jan 2024 16:25:37 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 23 Jan 2024 16:25:37 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabU064564; Tue, 23 Jan 2024 16:25:36 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 01/11] arm64: dts: ti: k3-am642-evm: Do not split single items Date: Tue, 23 Jan 2024 16:25:26 -0600 Message-ID: <20240123222536.875797-1-afd@ti.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 8c5651d2cf5dd..c407f6eca3433 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -660,25 +660,25 @@ mbox_m4_0: mbox-m4-0 { }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { - mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>; + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { - mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>; + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; From patchwork Tue Jan 23 22:25:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765769 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6188D4F203; Tue, 23 Jan 2024 22:25:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048748; cv=none; b=DVJ4YWJ+gr/sj2UAadHJx/flWeLOEO4VtmLxQPxJgv8KAunGjqfJq2DfTReGfy/GXMJKY9uxBuJJegsTWCvbxtLYzjfbrOdM8kw0/lbmDx9QY8VatFTsA9qp60tOZuB5M3g75IxomGT6x/4WaKytjxexytZf5AW7HjsdFlS9lOc= ARC-Message-Signature: i=1; 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Tue, 23 Jan 2024 16:25:37 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabV064564; Tue, 23 Jan 2024 16:25:37 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 02/11] arm64: dts: ti: k3-am642-sk: Do not split single items Date: Tue, 23 Jan 2024 16:25:27 -0600 Message-ID: <20240123222536.875797-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 1dddd6fc1a0d2..a00c20b99dfa8 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -646,25 +646,25 @@ mbox_m4_0: mbox-m4-0 { }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { - mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>; + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { - mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>; + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; From patchwork Tue Jan 23 22:25:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765334 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 948D24F209; Tue, 23 Jan 2024 22:25:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.248 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048750; cv=none; b=q2GpVuQgafKelsAX2/xSEsVBI989kgynhLQVZwE9dlTyRZCJYSEtFO5/uidlm8aw7HyIy2Tfc6lozb/CNYjBek2aM4qyrkyq1DGWu9liCjPjxWEIEpmL4HLUNKKk9XcvehzdUs2I6cTWJE7wkjQomoN71jFrXQIA4trxAeOwRHQ= ARC-Message-Signature: i=1; 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Tue, 23 Jan 2024 16:25:37 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabW064564; Tue, 23 Jan 2024 16:25:37 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 03/11] arm64: dts: ti: iot2050: Do not split single items Date: Tue, 23 Jan 2024 16:25:28 -0600 Message-ID: <20240123222536.875797-3-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index 61a634afaa4fe..0368b04700a18 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -1418,13 +1418,13 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { &mcu_r5fss0_core0 { memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; }; &mcu_r5fss0_core1 { memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; - mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; }; &icssg0_mdio { From patchwork Tue Jan 23 22:25:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765335 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3770F4F1F2; Tue, 23 Jan 2024 22:25:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048748; cv=none; b=sQKRLb++8OTYB/e1k9nZQJ2kZWpm5giG9zfXcjfEjRwu/BpwV3X93fqic0M8g41YDAJxTEupdrGVWLlOnUho/sEzK10jBtOYy52kUybKlNpZuW2cOpjadRQRj2DTD2nfHxGqz8TdDqPgvUNEXx1qOVwRDmu4wF/l4RCAjhMvju4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048748; c=relaxed/simple; bh=4iEwTpf91AFnnH/xZW/RkBQ9VRcL4+IP5Ih8Wnvn58g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HcZozf3ch5XR5UlJU2SNFt8vNhHJfxgM7wa/DL228Q9m0jl2rxvnmRFq0mu3RLTlpqN1sOd2Cp+YiCb9O9wV785waA5qN725PV/JEbMcngom6KGoiymWL/73JfDmVbqn/FQfScEdYSt9K4qhM677tzhUCUtwBVzBzmgP4QwBzbQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Fc3DyWMT; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Fc3DyWMT" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPclf040290; Tue, 23 Jan 2024 16:25:38 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1706048738; bh=BHtXD9Ok6Qte7tQ3BQ9td3fvPK0A9kQ+2yGstHGtysM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Fc3DyWMTyM60WzyX13cPc9ZYVZkb+ZD8pqN45pvxyiUgyW6BNUzHgNq1YiUTU+4Ee zGAEUpPGBwBF/RpSmELis5qhw4ym2zf2kBIaDW4jU5U4aGcq1xPKZS1dOMjCUwqKTE GvsDWW6zZioxe3wPtCDwr5D7Z6WWX47tCnPcEuM4= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40NMPcZj004701 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 23 Jan 2024 16:25:38 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 23 Jan 2024 16:25:38 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 23 Jan 2024 16:25:38 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabX064564; Tue, 23 Jan 2024 16:25:38 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 04/11] arm64: dts: ti: k3-am654-base-board: Do not split single items Date: Tue, 23 Jan 2024 16:25:29 -0600 Message-ID: <20240123222536.875797-4-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index 822c288d27976..71c8e035c3eb9 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -531,13 +531,13 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { &mcu_r5fss0_core0 { memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; }; &mcu_r5fss0_core1 { memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; - mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; }; &ospi0 { From patchwork Tue Jan 23 22:25:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765767 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 133704F613; Tue, 23 Jan 2024 22:25:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.248 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048751; cv=none; b=kxZXY563mY/PpWnR/5rSm2rpB0Y/FPnhamqoBPFmtGkBngD/Ry5XFbGwVGddhCKnkGAGuxCjhcfgGSROKi3wyGIaD8vjX14ybYICOJnQrdwScPc9/NIZ0M7T4SbFsJII2pynzuBKWZe9Y8SHucW3vsybUSotnt6SR0bCP/tpqkw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048751; c=relaxed/simple; bh=WGe2el4xcb0i2lJOf3mXvkDd1huDnWBcYb48owS8hxY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UB7+Ic1RUQ8+AjwvdNwtYPdiEUk4BhY3BC6o/X8S3ViOUhTC5IFawMJhpJerbktVaa/RGmjbk2nFLFUkRKTwJjaoh6/SaT/bB4UJh8pFBUiVoOkHgqCslftUdK5fVSCpB8VxBFeNr4igZWR+CzWdfEZ8LaxI2ub3S+bDS82wMks= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=nryuQxf8; arc=none smtp.client-ip=198.47.23.248 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="nryuQxf8" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPdGH019496; Tue, 23 Jan 2024 16:25:39 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1706048739; bh=n8tLL3Yrw87gmA9q9zSoBaId8teK0A8dUGjjCJOkpXA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nryuQxf81LB92eUgfsayuA9nil8p66OaqcZFdLjqTWp8/1t5Rk3gUGKRyyJ4NTf41 bjT6ZpCz6HT7pXYCocZPpfH9KqfERnIuL2EyiaGA2ajM3RAma4GP1fQQcUuejOYzWq thadVgu1T8AM4TW6AHGEPacPtyzKJG9KZvGF/AJk= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40NMPd4g089413 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 23 Jan 2024 16:25:39 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 23 Jan 2024 16:25:38 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 23 Jan 2024 16:25:38 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabY064564; Tue, 23 Jan 2024 16:25:38 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 05/11] arm64: dts: ti: k3-am68-sk-som: Do not split single items Date: Tue, 23 Jan 2024 16:25:30 -0600 Message-ID: <20240123222536.875797-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi index 20861a0a46b0d..250f80b402d60 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi @@ -209,51 +209,51 @@ mbox_c71_1: mbox-c71-1 { }; &mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; &c71_0 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; + mboxes = <&mailbox0_cluster4 &mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; &c71_1 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_1>; + mboxes = <&mailbox0_cluster4 &mbox_c71_1>; memory-region = <&c71_1_dma_memory_region>, <&c71_1_memory_region>; }; From patchwork Tue Jan 23 22:25:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765332 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A70C4F5EB; Tue, 23 Jan 2024 22:25:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048751; cv=none; b=iVM0w6tAZH70RhOlZFoKcfs0VFi/7zSmy4V3iZ+WppgNyDXMZsmoAcYM1g3N2cTkVObWrDI9wC5h+CK4BS1vguy7QdSKz3v+q3LOUX7UxbAHICb73OQD8QmGgFWyH/bEHsaUbCUbWD27/bhzJPoS/MK/wJ+fDVmhP9cXkPIXhHo= ARC-Message-Signature: i=1; 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Tue, 23 Jan 2024 16:25:39 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabZ064564; Tue, 23 Jan 2024 16:25:38 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 06/11] arm64: dts: ti: k3-am69-sk: Do not split single items Date: Tue, 23 Jan 2024 16:25:31 -0600 Message-ID: <20240123222536.875797-6-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am69-sk.dts | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts index 8da5915798688..62b87c34c442d 100644 --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts @@ -822,77 +822,77 @@ &mcu_cpsw_port1 { }; &mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; &main_r5fss2_core0 { - mboxes = <&mailbox0_cluster3>, <&mbox_main_r5fss2_core0>; + mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>; memory-region = <&main_r5fss2_core0_dma_memory_region>, <&main_r5fss2_core0_memory_region>; }; &main_r5fss2_core1 { - mboxes = <&mailbox0_cluster3>, <&mbox_main_r5fss2_core1>; + mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>; memory-region = <&main_r5fss2_core1_dma_memory_region>, <&main_r5fss2_core1_memory_region>; }; &c71_0 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; + mboxes = <&mailbox0_cluster4 &mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; &c71_1 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_1>; + mboxes = <&mailbox0_cluster4 &mbox_c71_1>; memory-region = <&c71_1_dma_memory_region>, <&c71_1_memory_region>; }; &c71_2 { status = "okay"; - mboxes = <&mailbox0_cluster5>, <&mbox_c71_2>; + mboxes = <&mailbox0_cluster5 &mbox_c71_2>; memory-region = <&c71_2_dma_memory_region>, <&c71_2_memory_region>; }; &c71_3 { status = "okay"; - mboxes = <&mailbox0_cluster5>, <&mbox_c71_3>; + mboxes = <&mailbox0_cluster5 &mbox_c71_3>; memory-region = <&c71_3_dma_memory_region>, <&c71_3_memory_region>; }; From patchwork Tue Jan 23 22:25:32 2024 Content-Type: text/plain; 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Tue, 23 Jan 2024 16:25:39 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 07/11] arm64: dts: ti: k3-j7200-som-p0: Do not split single items Date: Tue, 23 Jan 2024 16:25:32 -0600 Message-ID: <20240123222536.875797-7-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index ea47f10d393af..228efcc170afd 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -222,25 +222,25 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { }; &mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; From patchwork Tue Jan 23 22:25:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765768 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E8904F5EA; Tue, 23 Jan 2024 22:25:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048750; cv=none; b=Nr7myHrzO+/NcEShEZdTHQuoYRTXt07rOADbpYrAHcxHNzDtFx4WllS8AGWR0vNeXCOH7oK5wg3f/wga+7nRg0Da8IY+iWSuAQYBWXdTBlfp7phmLEfNvtExSdqXvuac6GYmX1nVqdsIkBoWxbflEPXyRcB2IAvx+xrvko77hzI= ARC-Message-Signature: i=1; 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Tue, 23 Jan 2024 16:25:40 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabb064564; Tue, 23 Jan 2024 16:25:39 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 08/11] arm64: dts: ti: k3-j721e-beagleboneai64: Do not split single items Date: Tue, 23 Jan 2024 16:25:33 -0600 Message-ID: <20240123222536.875797-8-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- .../boot/dts/ti/k3-j721e-beagleboneai64.dts | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index 2f954729f3533..effc605382de0 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -936,58 +936,58 @@ mbox_c71_0: mbox-c71-0 { }; &mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; &c66_0 { status = "okay"; - mboxes = <&mailbox0_cluster3>, <&mbox_c66_0>; + mboxes = <&mailbox0_cluster3 &mbox_c66_0>; memory-region = <&c66_0_dma_memory_region>, <&c66_0_memory_region>; }; &c66_1 { status = "okay"; - mboxes = <&mailbox0_cluster3>, <&mbox_c66_1>; + mboxes = <&mailbox0_cluster3 &mbox_c66_1>; memory-region = <&c66_1_dma_memory_region>, <&c66_1_memory_region>; }; &c71_0 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; + mboxes = <&mailbox0_cluster4 &mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; From patchwork Tue Jan 23 22:25:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765331 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C65884F8A7; Tue, 23 Jan 2024 22:25:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Tue, 23 Jan 2024 16:25:40 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 23 Jan 2024 16:25:40 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabc064564; Tue, 23 Jan 2024 16:25:40 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 09/11] arm64: dts: ti: k3-j721e-sk: Do not split single items Date: Tue, 23 Jan 2024 16:25:34 -0600 Message-ID: <20240123222536.875797-9-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index 188dfe291a32b..78f304475b7a0 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -1168,58 +1168,58 @@ mbox_c71_0: mbox-c71-0 { }; &mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; &c66_0 { status = "okay"; - mboxes = <&mailbox0_cluster3>, <&mbox_c66_0>; + mboxes = <&mailbox0_cluster3 &mbox_c66_0>; memory-region = <&c66_0_dma_memory_region>, <&c66_0_memory_region>; }; &c66_1 { status = "okay"; - mboxes = <&mailbox0_cluster3>, <&mbox_c66_1>; + mboxes = <&mailbox0_cluster3 &mbox_c66_1>; memory-region = <&c66_1_dma_memory_region>, <&c66_1_memory_region>; }; &c71_0 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; + mboxes = <&mailbox0_cluster4 &mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; From patchwork Tue Jan 23 22:25:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765764 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7B3E5B1F9; Tue, 23 Jan 2024 22:25:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048760; cv=none; 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Tue, 23 Jan 2024 16:25:41 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 23 Jan 2024 16:25:41 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabd064564; Tue, 23 Jan 2024 16:25:40 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 10/11] arm64: dts: ti: k3-j721e-som-p0: Do not split single items Date: Tue, 23 Jan 2024 16:25:35 -0600 Message-ID: <20240123222536.875797-10-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi index a75611eec7914..8724ae20fb23e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -549,58 +549,58 @@ mbox_c71_0: mbox-c71-0 { }; &mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; &c66_0 { status = "okay"; - mboxes = <&mailbox0_cluster3>, <&mbox_c66_0>; + mboxes = <&mailbox0_cluster3 &mbox_c66_0>; memory-region = <&c66_0_dma_memory_region>, <&c66_0_memory_region>; }; &c66_1 { status = "okay"; - mboxes = <&mailbox0_cluster3>, <&mbox_c66_1>; + mboxes = <&mailbox0_cluster3 &mbox_c66_1>; memory-region = <&c66_1_dma_memory_region>, <&c66_1_memory_region>; }; &c71_0 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; + mboxes = <&mailbox0_cluster4 &mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; From patchwork Tue Jan 23 22:25:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 765765 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C65544F8A6; Tue, 23 Jan 2024 22:25:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706048752; cv=none; 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Tue, 23 Jan 2024 16:25:41 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 23 Jan 2024 16:25:41 -0600 Received: from lelvsmtp6.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40NMPabe064564; Tue, 23 Jan 2024 16:25:41 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 11/11] arm64: dts: ti: k3-j721s2-som-p0: Do not split single items Date: Tue, 23 Jan 2024 16:25:36 -0600 Message-ID: <20240123222536.875797-11-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240123222536.875797-1-afd@ti.com> References: <20240123222536.875797-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi index da3237b23b63a..6eca93893f8c3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -504,51 +504,51 @@ mbox_c71_1: mbox-c71-1 { }; &mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { - mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; &main_r5fss0_core0 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { - mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; + mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>; + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; &c71_0 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; + mboxes = <&mailbox0_cluster4 &mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; &c71_1 { status = "okay"; - mboxes = <&mailbox0_cluster4>, <&mbox_c71_1>; + mboxes = <&mailbox0_cluster4 &mbox_c71_1>; memory-region = <&c71_1_dma_memory_region>, <&c71_1_memory_region>; };