From patchwork Tue Sep 10 11:50:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 173516 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp5682382ilq; Tue, 10 Sep 2019 04:50:22 -0700 (PDT) X-Google-Smtp-Source: APXvYqx4ViJW7dSvTbnFU+MIozRIZiab9hp0kl8TF6+sCUTv692ZFIme6hDSunaBGaljIgSDoseE X-Received: by 2002:a05:6402:149a:: with SMTP id e26mr30291982edv.298.1568116222255; Tue, 10 Sep 2019 04:50:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568116222; cv=none; d=google.com; s=arc-20160816; b=Hm3PA+4PKNIevzp45kDS+qpbyevk758Hj7fe9h9wecmFn10fi6cUjNNkp55WNwUj+Y qYLCVoy+EKC3J932mVJFmbk/qrpbBwOGpityB+HgAuqTelfP9WzPimX3MizLdrhVrh7l XImkXbDuz0k3FZF1qARJrIkL/UmWzFS4t8wjmbiNZdmngEc/2RvKP3MkFqYODCqyeB5K 6+Su9DsrTqxak5Vfoq1m7I+dpRFFxVe4SEtGMYYvv2WamEXL7nP9k1VD+Fy+Hw+SiYxR KltoxlUyJrJ116FN3ln2mW/Ehht7cShfHqewjSTb4Izjbu21rw9Eo/+LqDfa8pa+WJU5 CtpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EqKT5FCpYXzCmOXY0n2mABkUfFslwNpZ85dM04a5nHc=; b=OVC85KuwXmjGFNa7cH5PbF42lJvmO1mCba5JPi29+FqQjqYzaTn0ZownIx6W8NwC+N mQdUkQE5gQ3vpIfzGRwhE2idf/dZwBBCf17RM+2HP4ZPzA9fXnQDSkXzrCFEw5YHkGjN ixa8NMIJti0UtFwEsZ+JMTpS+79d4q/REF3s9aJ1HuEjeYxtACdPzDiIsR1BeMv6eP3M /FoNx+AE41CKNHQxiwYa9G483pjlfa/YHKHDrxUs8jEe6s3VxhTnulOc227VTFJ4mVWw 8w/rOSQ5qh8hPyO/HxgMMQznKSL1jlrcBufVPFA/0MAhlHzzgLxSShfbd1fkcAkrmDtl WRHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=BlbforvP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b26si2241807ejb.291.2019.09.10.04.50.22; Tue, 10 Sep 2019 04:50:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=BlbforvP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731699AbfIJLuO (ORCPT + 27 others); Tue, 10 Sep 2019 07:50:14 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:33200 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727120AbfIJLuN (ORCPT ); Tue, 10 Sep 2019 07:50:13 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x8ABoBuR040806; Tue, 10 Sep 2019 06:50:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1568116211; bh=EqKT5FCpYXzCmOXY0n2mABkUfFslwNpZ85dM04a5nHc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=BlbforvP0LGbgN1TGnofPmcmASn2nZxobkNRBxTrWaJT7EyblYsVD0U8awgUtRLsK kAz0/gSPjmZU9msAqrctAIxBxn2BTdVggkaGjp5D9Rd8InRohByZrJeU7JiD3m9zDi wk+nDPhJSm+0oZeiVDNxR4lu0dD/YmJAj+lOpCvw= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x8ABoBvr010377 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 10 Sep 2019 06:50:11 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 10 Sep 2019 06:50:10 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 10 Sep 2019 06:50:09 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x8ABo5cG028909; Tue, 10 Sep 2019 06:50:08 -0500 From: Peter Ujfalusi To: , CC: , , , Subject: [PATCH 1/3] dt-bindings: dma: Add documentation for DMA domains Date: Tue, 10 Sep 2019 14:50:35 +0300 Message-ID: <20190910115037.23539-2-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190910115037.23539-1-peter.ujfalusi@ti.com> References: <20190910115037.23539-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On systems where multiple DMA controllers available, non Slave (for example memcpy operation) users can not be described in DT as there is no device involved from the DMA controller's point of view, DMA binding is not usable. However in these systems still a peripheral might need to be serviced by or it is better to serviced by specific DMA controller. When a memcpy is used to/from a memory mapped region for example a DMA in the same domain can perform better. For generic software modules doing mem 2 mem operations it also matter that they will get a channel from a controller which is faster in DDR to DDR mode rather then from the first controller happen to be loaded. This property is inherited, so it may be specified in a device node or in any of its parent nodes. Signed-off-by: Peter Ujfalusi --- .../devicetree/bindings/dma/dma-domain.yaml | 88 +++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/dma-domain.yaml -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/dma/dma-domain.yaml b/Documentation/devicetree/bindings/dma/dma-domain.yaml new file mode 100644 index 000000000000..da59bb129c58 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/dma-domain.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/dma-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DMA Domain Controller Definition + +maintainers: + - Vinod Koul + +allOf: + - $ref: "dma-controller.yaml#" + +description: + On systems where multiple DMA controllers available, none Slave (for example + memcpy operation) users can not be described in DT as there is no device + involved from the DMA controller's point of view, DMA binding is not usable. + However in these systems still a peripheral might need to be serviced by or + it is better to serviced by specific DMA controller. + When a memcpy is used to/from a memory mapped region for example a DMA in the + same domain can perform better. + For generic software modules doing mem 2 mem operations it also matter that + they will get a channel from a controller which is faster in DDR to DDR mode + rather then from the first controller happen to be loaded. + + This property is inherited, so it may be specified in a device node or in any + of its parent nodes. + +properties: + $dma-domain-controller: + $ref: /schemas/types.yaml#definitions/phandle + description: + phande to the DMA controller node which should be used for the device or + domain. + +examples: + - | + / { + model = "Texas Instruments K3 AM654 SoC"; + compatible = "ti,am654"; + interrupt-parent = <&gic500>; + /* For modules without device, DDR to DDR is faster on main UDMAP */ + dma-domain-controller = <&main_udmap>; + #address-cells = <2>; + #size-cells = <2>; + ... + }; + + &cbass_main { + /* For modules within MAIN domain, use main UDMAP */ + dma-domain-controller = <&main_udmap>; + + cbass_main_navss: interconnect0 { + ... + main_udmap: dma-controller@31150000 { + compatible = "ti,am654-navss-main-udmap"; + ... + }; + }; + }; + + &cbass_mcu { + /* For modules within MCU domain, use mcu UDMAP */ + dma-domain-controller = <&mcu_udmap>; + + cbass_mcu_navss: interconnect1 { + ... + mcu_udmap: dma-controller@285c0000 { + compatible = "ti,am654-navss-mcu-udmap"; + ... + }; + }; + + fss: fss@47000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + ... + /* memcpy channel will be request from mcu_udmap */ + }; + }; + }; +... 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[209.132.180.67]) by mx.google.com with ESMTP id b26si2241807ejb.291.2019.09.10.04.50.24; Tue, 10 Sep 2019 04:50:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=I+pCMCrA; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731600AbfIJLuP (ORCPT + 3 others); Tue, 10 Sep 2019 07:50:15 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:33210 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727120AbfIJLuP (ORCPT ); Tue, 10 Sep 2019 07:50:15 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x8ABoCSe040815; Tue, 10 Sep 2019 06:50:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1568116212; bh=zvSBZ3H3T5stp36yhMsjbO3YbMTzllNSS6fxmYUaT5w=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=I+pCMCrA57ed763fTCgJf5Cc3rOK5XqEGnQKKcISMjY1Xb+KbOIZ7oYERvoWkcUbZ BKQYuKwF0mvq20mxbYYZdvLHI0vugMHQZcro5jcXqOR+KLrDjc0XsFTwi864bQldkK PW5QyVFgNYbSGQEUH+P0GbKHAByCrztBIHqXmeZg= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x8ABoCbM093258 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 10 Sep 2019 06:50:12 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 10 Sep 2019 06:50:12 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 10 Sep 2019 06:50:12 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x8ABo5cH028909; Tue, 10 Sep 2019 06:50:10 -0500 From: Peter Ujfalusi To: , CC: , , , Subject: [PATCH 2/3] dmaengine: of_dma: Function to look up the DMA domain of a client Date: Tue, 10 Sep 2019 14:50:36 +0300 Message-ID: <20190910115037.23539-3-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190910115037.23539-1-peter.ujfalusi@ti.com> References: <20190910115037.23539-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Find the DMA domain controller of the client device by iterating up in device tree looking for the closest 'dma-domain-controller' property. If the client's node is not provided then check the DT root for the controller. Signed-off-by: Peter Ujfalusi --- drivers/dma/of-dma.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/linux/of_dma.h | 7 +++++++ 2 files changed, 49 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/dma/of-dma.c b/drivers/dma/of-dma.c index c2d779daa4b5..b4bff47006b0 100644 --- a/drivers/dma/of-dma.c +++ b/drivers/dma/of-dma.c @@ -18,6 +18,48 @@ static LIST_HEAD(of_dma_list); static DEFINE_MUTEX(of_dma_lock); +/** + * of_find_dma_domain - Get the domain DMA controller + * @np: device node of the client device + * + * Look up the DMA controller of the domain the client device is part of. + * Finds the dma-domain controller the client device belongs to. It is used when + * requesting non slave channels (like channel for memcpy) to make sure that the + * channel can be request from a DMA controller which can service the given + * domain best. + * + * Returns the device_node pointer of the DMA controller or succes or NULL on + * error. + */ +struct device_node *of_find_dma_domain(struct device_node *np) +{ + struct device_node *dma_domain = NULL; + phandle dma_phandle; + + /* + * If no device_node is provided look at the root level for system + * default DMA controller for modules. + */ + if (!np) + np = of_root; + + if (!np || !of_node_get(np)) + return NULL; + + do { + if (of_property_read_u32(np, "dma-domain-controller", + &dma_phandle)) { + np = of_get_next_parent(np); + } else { + dma_domain = of_find_node_by_phandle(dma_phandle); + of_node_put(np); + } + } while (!dma_domain && np); + + return dma_domain; +} +EXPORT_SYMBOL_GPL(of_find_dma_domain); + /** * of_dma_find_controller - Get a DMA controller in DT DMA helpers list * @dma_spec: pointer to DMA specifier as found in the device tree diff --git a/include/linux/of_dma.h b/include/linux/of_dma.h index fd706cdf255c..6eab0a8d3335 100644 --- a/include/linux/of_dma.h +++ b/include/linux/of_dma.h @@ -32,6 +32,8 @@ struct of_dma_filter_info { }; #ifdef CONFIG_DMA_OF +extern struct device_node *of_find_dma_domain(struct device_node *np); + extern int of_dma_controller_register(struct device_node *np, struct dma_chan *(*of_dma_xlate) (struct of_phandle_args *, struct of_dma *), @@ -52,6 +54,11 @@ extern struct dma_chan *of_dma_xlate_by_chan_id(struct of_phandle_args *dma_spec struct of_dma *ofdma); #else +static inline struct device_node *of_find_dma_domain(struct device_node *np) +{ + return NULL; +} + static inline int of_dma_controller_register(struct device_node *np, struct dma_chan *(*of_dma_xlate) (struct of_phandle_args *, struct of_dma *), From patchwork Tue Sep 10 11:50:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 173518 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp5682408ilq; Tue, 10 Sep 2019 04:50:23 -0700 (PDT) X-Google-Smtp-Source: APXvYqxKcw6UNcS728D0IY3PNSr5J6FuMgDgBy2RzuAq/jbmJGTSYyxIgn9IXYuNKXP5Te1EmrYO X-Received: by 2002:a50:fa99:: with SMTP id w25mr29962564edr.259.1568116223310; Tue, 10 Sep 2019 04:50:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568116223; cv=none; d=google.com; s=arc-20160816; b=KqThJU6OFic8m4xXUra2YamtBUjmdUGxnlvtLAiCRoeQRSycpQYUmsR7CRS/kfAgwK MYBgSZbAAnX+QKLViXQdCrYi4lFe49zfYfkoi10PvuJATtOCYQ4iXIVrhy2ScGa7qaBx 6WphWgITa2RgH1SGOZ+cmKfem9H/tiT3+hellAcXh2jQ5LGT3OxCyMk6Knd6iV12lxsJ adTz/bFHibVPvP0ei2de/lR8gboxAl2lknC+gdis4KC9yj/ltBq+qAOB1NY09y8my6FL eYwRSypGEhyahKIGPqPUTlyE5Ib0YLaOoWcFat/I1vqLj8Bwut/DXWLM7h95ksV2f/b1 O/SQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=FIswI+Spzr3FuHme+8/MFEJTlDFumZEJPiU62/4thvM=; b=xTylctmJZhN+XBZ9ueK/95ALOmKBDTVAFOLZ+yIIFKSDQFM1fHd4czMBUd8DkO7dL4 TI4yjDUz7BNt+6SnFz2XqiEyodzfDuPVj7K5JeC1GcV1eWY1ZyqhhmbO5bnzmZQKmi+N bsNoBFKj4ACqSWPiUgxTF5K8kgbWf3EuBys+SG3y/Tg828Dh1lXGn+KJ1NPSBHBuCcil wmaWLvQQoEq7jhUw2xuasGK/x6cenUzHWb+6Tv1WMftWvz6YzTRUXJIG2TQpozSVL7C3 1BlamG5ZhypfHIRKHyw+Ay/6jkC2yZAfUpJtcnzpqs7m9aYXfnnouHdn7HuNerIDuAvx 6lVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="LA/FMTDx"; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b26si2241807ejb.291.2019.09.10.04.50.22; Tue, 10 Sep 2019 04:50:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="LA/FMTDx"; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731770AbfIJLuR (ORCPT + 3 others); Tue, 10 Sep 2019 07:50:17 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:33214 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731726AbfIJLuQ (ORCPT ); Tue, 10 Sep 2019 07:50:16 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x8ABoEDe040830; Tue, 10 Sep 2019 06:50:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1568116214; bh=FIswI+Spzr3FuHme+8/MFEJTlDFumZEJPiU62/4thvM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LA/FMTDxr9pw0iuLQXwJ1fFYHeR9eJPh5VbzS625h/0cakdjpulc+aNUUdC+HEwQ9 t06+BDOfAYFdPyJ88JCZaKUJI3uf12qTZjVEDGztFgguUyll7nHXu2/G8LyYszC4jV MAh95JoQn3GcMZ1XvgVyeD+jqrgAV1ncFEXxsAUc= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x8ABoEW0089127; Tue, 10 Sep 2019 06:50:14 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 10 Sep 2019 06:50:14 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 10 Sep 2019 06:50:14 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x8ABo5cI028909; Tue, 10 Sep 2019 06:50:12 -0500 From: Peter Ujfalusi To: , CC: , , , Subject: [PATCH 3/3] dmaengine: Support for requesting channels preferring DMA domain controller Date: Tue, 10 Sep 2019 14:50:37 +0300 Message-ID: <20190910115037.23539-4-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190910115037.23539-1-peter.ujfalusi@ti.com> References: <20190910115037.23539-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org In case the channel is not requested via the slave API, use the of_find_dma_domain() to see if a system default DMA controller is specified. Add new function which can be used by clients to request channels by mask from their DMA domain controller if specified. Client drivers can take advantage of the domain support by moving from dma_request_chan_by_mask() to dma_request_chan_by_domain() Signed-off-by: Peter Ujfalusi --- drivers/dma/dmaengine.c | 21 ++++++++++++++++----- include/linux/dmaengine.h | 9 ++++++--- 2 files changed, 22 insertions(+), 8 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index 03ac4b96117c..1bae3ff24da0 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c @@ -640,6 +640,10 @@ struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, struct dma_device *device, *_d; struct dma_chan *chan = NULL; + /* If np is not specified, get the default DMA domain controller */ + if (!np) + np = of_find_dma_domain(NULL); + /* Find a channel */ mutex_lock(&dma_list_mutex); list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { @@ -751,19 +755,26 @@ struct dma_chan *dma_request_slave_channel(struct device *dev, EXPORT_SYMBOL_GPL(dma_request_slave_channel); /** - * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities - * @mask: capabilities that the channel must satisfy + * dma_request_chan_by_domain - allocate a channel by mask from DMA domain + * @dev: pointer to client device structure + * @mask: capabilities that the channel must satisfy * * Returns pointer to appropriate DMA channel on success or an error pointer. */ -struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask) +struct dma_chan *dma_request_chan_by_domain(struct device *dev, + const dma_cap_mask_t *mask) { struct dma_chan *chan; if (!mask) return ERR_PTR(-ENODEV); - chan = __dma_request_channel(mask, NULL, NULL, NULL); + if (dev) + chan = __dma_request_channel(mask, NULL, NULL, + of_find_dma_domain(dev->of_node)); + else + chan = __dma_request_channel(mask, NULL, NULL, NULL); + if (!chan) { mutex_lock(&dma_list_mutex); if (list_empty(&dma_device_list)) @@ -775,7 +786,7 @@ struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask) return chan; } -EXPORT_SYMBOL_GPL(dma_request_chan_by_mask); +EXPORT_SYMBOL_GPL(dma_request_chan_by_domain); void dma_release_channel(struct dma_chan *chan) { diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 8fcdee1c0cf9..de5c52810443 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1307,7 +1307,8 @@ struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name); struct dma_chan *dma_request_chan(struct device *dev, const char *name); -struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask); +struct dma_chan *dma_request_chan_by_domain(struct device *dev, + const dma_cap_mask_t *mask); void dma_release_channel(struct dma_chan *chan); int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps); @@ -1344,8 +1345,8 @@ static inline struct dma_chan *dma_request_chan(struct device *dev, { return ERR_PTR(-ENODEV); } -static inline struct dma_chan *dma_request_chan_by_mask( - const dma_cap_mask_t *mask) +static inline struct dma_chan *dma_request_chan_by_domain(struct device *dev, + const dma_cap_mask_t *mask) { return ERR_PTR(-ENODEV); } @@ -1406,6 +1407,8 @@ struct dma_chan *dma_get_any_slave_channel(struct dma_device *device); __dma_request_channel(&(mask), x, y, NULL) #define dma_request_slave_channel_compat(mask, x, y, dev, name) \ __dma_request_slave_channel_compat(&(mask), x, y, dev, name) +#define dma_request_chan_by_mask(mask) \ + dma_request_chan_by_domain(NULL, mask) static inline struct dma_chan *__dma_request_slave_channel_compat(const dma_cap_mask_t *mask,