From patchwork Tue Jan 16 01:08:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 763437 Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC54641C87 for ; Tue, 16 Jan 2024 01:08:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="UOptdqcQ" Received: by mail-lf1-f53.google.com with SMTP id 2adb3069b0e04-50e7b51b0ceso9363889e87.1 for ; Mon, 15 Jan 2024 17:08:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705367319; x=1705972119; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=2GejD4zZZsGDMHwYRtgsSZy6lum8oExkOS46Y7L43Kw=; b=UOptdqcQT5WJDc6CE2x/MuBStJwy2Xyodd2Fv7UWOiBU9F7DPP006ebmYPZ350a9ZM 7Fzuf9Ub7QPk/vFO5mKBk4eeGTWPlb0UteD46wr4APz6rHDklNrY671XYN8mEbDUhTD1 AfvY/BaZVSPOljTn23nM/DhZmsK1RRsKFdCOlYmRsFaTVGcCDDZnGe2thbLAXYFohSAw 0ILx034PxDKNo5wShb2HOub+/4NWiSr1XLYAoKMELr9C+BftcXl+6EEWkUzHKQ5ojD+X oF47EpkN90AL10//JXnt2WR4COqoEYEgcrRCwHxSQbMu7XJmGluhhDjZDnVfxyX+yqrk 5e5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705367319; x=1705972119; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2GejD4zZZsGDMHwYRtgsSZy6lum8oExkOS46Y7L43Kw=; b=s0FFNdQZ3KyuICjxz92oYSUMZgMaZHacqRsxqshZSu8+75kNa4dUyR0U9nglQVefr1 qwyMXnHLSJRu9aWAHUyrktDQz0z7EcxJ+JFBxlRvjnTDzaj6c/NzRV0RLmQcfd1NtM3b BeSFiBj0KeZTG1MHozVxwRVRvb9219hNotAnR8JAsQFKEgOR/4BWO/Cc47L09hUGOiZD 6sUtu7j0LtNdDAeDO4zr14KZ+spAT4s/tccxd4fOrVy71jUfudoOpjrYnnqoBEqASN/x n3wyVYXMl/xDFOvV2hRlx6Xo3LS2W0qe0tv13nFlZomTbQsKgh/G3Mc+PFEA3tUG2SzE qCRg== X-Gm-Message-State: AOJu0YyKtWwz5Fs3E9lpHs3ChM2fHBL+g+pn5ESmXmehAdZPH6bJNaEy rAVDsJ8PLcWdUa3HaC09w7nF3hygwQG8Lg== X-Google-Smtp-Source: AGHT+IF4uY2IXXqcFlQk0kE43Q3PU+KiNoFsBavpJ8CtG05uDWkQ8ylL0yG7cG2uDfhV/l7L8wGeRw== X-Received: by 2002:a05:6512:39d3:b0:50e:70b9:8600 with SMTP id k19-20020a05651239d300b0050e70b98600mr4138890lfu.0.1705367318393; Mon, 15 Jan 2024 17:08:38 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id t3-20020a056512208300b0050eb2325472sm1615507lfr.37.2024.01.15.17.08.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jan 2024 17:08:38 -0800 (PST) From: Dmitry Baryshkov Date: Tue, 16 Jan 2024 03:08:27 +0200 Subject: [PATCH 1/6] dt-bindings: mfd: qcom,tcsr: Add compatibles for QCM2290 and SM6115 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240116-usbc-phy-vls-clamp-v1-1-73b2da7691c5@linaro.org> References: <20240116-usbc-phy-vls-clamp-v1-0-73b2da7691c5@linaro.org> In-Reply-To: <20240116-usbc-phy-vls-clamp-v1-0-73b2da7691c5@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Jeffrey Hugo Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-phy@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1054; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Y+5fCr59sQqkRvEhrPMHqTIkuV7VTqZkyNtAF9yAvO0=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlpdcTmV3QAehqNHLkPutAKWHGSN2ww4nuk/KvH 8y0ySv2OpqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZaXXEwAKCRCLPIo+Aiko 1e94B/9wqdYVWm8HYtf/Ue6b5mdGcQIQWHHHZMY1fnsWqMaPORGTKLpgJGwJ/EtES8+Q+49LwfV Me31jibYz9GVkaujuwN4H4y3EnYd3CWlIj6U44rJ1oiGBSGrsfYaece9x3H2l6PP5pMxpsRbq3W zAQ/Zq6h1d/R7BqeTT2B2uhfueY5EHjYmKmayDNi/M295/3b3O/caKdO953L6tGjfcFGfng2cdY KT11GycxK9SeZURuTyJzZgZiAxLQPcNFH/+qchs8dIEbDsNtqJmZEjL52sRcxKnY8uoyE7EXxkr CkeEpR5hLY1OSqfPZwSzv2dTNq+X6/EfwWy7pnQOS/3pWOup X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Add qcom,qcm2290-tcsr and qcom,sm6115-tcsr, compatibles for TCSR blocks on the corresponding platforms. Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index 798705ab6a46..b97d77015335 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -19,6 +19,7 @@ properties: - enum: - qcom,msm8976-tcsr - qcom,msm8998-tcsr + - qcom,qcm2290-tcsr - qcom,qcs404-tcsr - qcom,sc7180-tcsr - qcom,sc7280-tcsr @@ -28,6 +29,7 @@ properties: - qcom,sdx55-tcsr - qcom,sdx65-tcsr - qcom,sm4450-tcsr + - qcom,sm6115-tcsr - qcom,sm8150-tcsr - qcom,sm8250-tcsr - qcom,sm8350-tcsr From patchwork Tue Jan 16 01:08:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 763436 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6943241C9A for ; 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Mon, 15 Jan 2024 17:08:40 -0800 (PST) From: Dmitry Baryshkov Date: Tue, 16 Jan 2024 03:08:30 +0200 Subject: [PATCH 4/6] arm64: dts: qcom: msm8998: declare VLS CLAMP register for USB3 PHY Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240116-usbc-phy-vls-clamp-v1-4-73b2da7691c5@linaro.org> References: <20240116-usbc-phy-vls-clamp-v1-0-73b2da7691c5@linaro.org> In-Reply-To: <20240116-usbc-phy-vls-clamp-v1-0-73b2da7691c5@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Jeffrey Hugo Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-phy@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=891; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=f12NIWxuaNF6335LMHvzmeal7J/0jE48+iZdMsjs8pU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlpdcUA8BUvO4Wnz7aji2y1YM/6hAjte1eVG47Z JNASjDNHYmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZaXXFAAKCRCLPIo+Aiko 1UvWCACP1E1eQ+zq2gm6nte6GNYwnjgkNsu3bQqf3JTyTM+qr7Bxxx/fWTfWf1oYITy+IpqIJeM rGF6hjNDw32Q9hACywkkN428oWtcmFPt696i1pj8VUELOeIUi5SxZvsowN7+ArPhUDjtBNJRoMC s2dGoqYra9M8xRvQ7Z4FMum/LXjBPzU5Bxnig5PU82hY2xy6Fs3BUDQwXqQRo6Y8sBRZDJzMvor rcsKgTZqW4WfyNNoQ0qmxC1sA7IYp5QfxDVWmaZOOpHVDdrGr7bAnRONU9gA8ANy+uhWMdJBiKg daVJ4Rul3PnAGpufyUxD3pbO3lV/G+mZ0sjdag3YOCy5GEV6 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The USB3 PHY on the MSM8998 platform doesn't have built-in PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately via the register in the TCSR space. Declare corresponding register. Fixes: 026dad8f5873 ("arm64: dts: qcom: msm8998: Add USB-related nodes") Cc: Jeffrey Hugo Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 2793cc22d381..e21e5693ba1e 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2174,6 +2174,8 @@ usb3phy: phy@c010000 { reset-names = "phy", "phy_phy"; + qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>; + status = "disabled"; }; From patchwork Tue Jan 16 01:08:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 763435 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 58C5241C8A for ; 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Mon, 15 Jan 2024 17:08:41 -0800 (PST) From: Dmitry Baryshkov Date: Tue, 16 Jan 2024 03:08:32 +0200 Subject: [PATCH 6/6] arm64: dts: qcom: sm6115: declare VLS CLAMP register for USB3 PHY Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240116-usbc-phy-vls-clamp-v1-6-73b2da7691c5@linaro.org> References: <20240116-usbc-phy-vls-clamp-v1-0-73b2da7691c5@linaro.org> In-Reply-To: <20240116-usbc-phy-vls-clamp-v1-0-73b2da7691c5@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Jeffrey Hugo Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-phy@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1151; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=AdXDhIsnd+iXSWZKTFcLsyqUk+oKkuaRSto6EvCY8cg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlpdcUlM9KRQMg6qbyevu03KD/zZr72wNib4qD1 uB4dUptrKeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZaXXFAAKCRCLPIo+Aiko 1R/XB/9FpNoeUmcKdOQ6BmmvI4G2XZzEF+ILr7Y0cQdQPcopIXTcMcJUqYEM6eAhwIQLOhsxE0o ZmyurDD5Mvv6hMZqdudsoMoVgOz3YhVTiUyMg5wEAMdSYgtwigWEsA9C4JasUen3m4zfclT+WeL 2Ed2c5799TBbn56oGjrXcolU0RUOd9fIl9EibLT7ZK1Lj8U58reZ4urgkjxzpkT5wzIWWU4s7+K A0FDXtbK+To573tmlnFj/5aLxphxn1Di8D0rT453WxunZF/eTp5lpQQs5shEZOX9IY+HnFjnGAz 6Zf9pwsf9cU1C7rzCh/rmEnCRNQ/8s3DKWindT753QqFnAJr X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The USB3 PHY on the SM6115 platform doesn't have built-in PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately via the register in the TCSR space. Declare corresponding register. Fixes: 9dd5f6dba729 ("arm64: dts: qcom: sm6115: Add USB SS qmp phy node") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 160e098f1075..8cee943fb24e 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -614,6 +614,11 @@ tcsr_mutex: hwlock@340000 { #hwlock-cells = <1>; }; + tcsr_regs_1: syscon@360000 { + compatible = "qcom,sm6115-tcsr", "syscon"; + reg = <0x0 0x00360000 0x0 0x20000>; + }; + tlmm: pinctrl@500000 { compatible = "qcom,sm6115-tlmm"; reg = <0x0 0x00500000 0x0 0x400000>, @@ -879,6 +884,8 @@ usb_qmpphy: phy@1615000 { #phy-cells = <0>; + qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>; + status = "disabled"; };