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[209.51.188.17]) by mx.google.com with ESMTPS id k53si4204505edb.303.2019.09.06.13.27.13 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 06 Sep 2019 13:27:13 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="cFeW/KPm"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:60042 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i6Kp6-000379-2k for patch@linaro.org; Fri, 06 Sep 2019 16:27:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58054) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i6Koa-00036b-PL for qemu-devel@nongnu.org; Fri, 06 Sep 2019 16:26:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i6KoZ-0002Ql-Ku for qemu-devel@nongnu.org; Fri, 06 Sep 2019 16:26:40 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]:36083) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i6KoZ-0002QG-Cb for qemu-devel@nongnu.org; Fri, 06 Sep 2019 16:26:39 -0400 Received: by mail-wm1-x32b.google.com with SMTP id p13so8445368wmh.1 for ; Fri, 06 Sep 2019 13:26:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uRjmOsEbXk15ydPmEJ99gd5DAhkd0VbLE+A+syxTleE=; b=cFeW/KPm39yoZlIL/v/yZICYrcxotgsE73fpad1iCm6MLu2U7zzMjmplcmvP1wO9RS zcFUXkraLWxi1NbyFGbY1uopjdrSeFnLoihWbUSx5G1gyKM5HkdbMnfryZa89SjhdpuB 2Urv+c7Irt3ZSzN77A3LIrU0S4BJ746+WZioWzQuROz8u0VkcDh4krgeEdsT3yap0NGo 2aT9L5FJ6W6Q6S4HUqC41s0eGKQhaTMpDBNI1q91cEYHxUeD6t5ud+UY9TzprwUYl9tm BDZ0J/d9S2Cj1KwaMOM2l8M7WbWarB0NilcDwgtJ1z18MNLii+kn9/rUexiMKZbaiVrI XNNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uRjmOsEbXk15ydPmEJ99gd5DAhkd0VbLE+A+syxTleE=; b=CW7xmD/8zqPgBYlieQM3dtYsK00qUzf0LXrPcD6TR4S4Ckv/Z06iXItoS6rbtvwJhT zw43yl4y9+xf3jaxDuVIeRDI09O8FS+Av5oAcRP0kx9n172X8rhri+c0jBKz4p9E4ITR 0qMtDcydlAmB8vbCnZhExfEUUiPPkRiHgo3rapnq+Q4YCio3QQHydmY885V52dJN+lh+ p3INsPIxC4nGZ+9JVVYGGBaFd+v5KV7lLtKHZujWofzqZ3Hk9ksFWg57vJFwkrkIbIHv G8S+zj7PvT1xn/La57g0kJB9zMinIpyZilhZ8hPhAyg35aOFYs9WAzGdjkxQYHjj88Kv iaeg== X-Gm-Message-State: APjAAAWUcEp9SX379vzZbJ4O/vWCDEgqZyf51yztJH0REqnSXAGvra7k KgXGtEKwzF2CYZdihdp5iStdkg== X-Received: by 2002:a1c:cf8c:: with SMTP id f134mr9015976wmg.174.1567801598306; Fri, 06 Sep 2019 13:26:38 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id l62sm8689030wml.13.2019.09.06.13.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2019 13:26:36 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 521711FF8C; Fri, 6 Sep 2019 21:26:36 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 6 Sep 2019 21:26:32 +0100 Message-Id: <20190906202636.28642-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190906202636.28642-1-alex.bennee@linaro.org> References: <20190906202636.28642-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32b Subject: [Qemu-devel] [PATCH v4 1/4] target/arm: handle M-profile semihosting at translate time X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We do this for other semihosting calls so we might as well do it for M-profile as well. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- v2 - update for change to gen_exception_internal_insn API v3 - update for decode tree v4 - use !IS_USER --- target/arm/m_helper.c | 18 ++++++------------ target/arm/translate.c | 8 +++++++- 2 files changed, 13 insertions(+), 13 deletions(-) -- 2.20.1 diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 884d35d2b02..27cd2f3f964 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -2114,19 +2114,13 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) break; } break; + case EXCP_SEMIHOST: + qemu_log_mask(CPU_LOG_INT, + "...handling as semihosting call 0x%x\n", + env->regs[0]); + env->regs[0] = do_arm_semihosting(env); + return; case EXCP_BKPT: - if (semihosting_enabled()) { - int nr; - nr = arm_lduw_code(env, env->regs[15], arm_sctlr_b(env)) & 0xff; - if (nr == 0xab) { - env->regs[15] += 2; - qemu_log_mask(CPU_LOG_INT, - "...handling as semihosting call 0x%x\n", - env->regs[0]); - env->regs[0] = do_arm_semihosting(env); - return; - } - } armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_DEBUG, false); break; case EXCP_IRQ: diff --git a/target/arm/translate.c b/target/arm/translate.c index 34bb280e3da..6689acc911e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8424,7 +8424,13 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a) if (!ENABLE_ARCH_5) { return false; } - gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, false)); + if (arm_dc_feature(s, ARM_FEATURE_M) && + semihosting_enabled() && !IS_USER(s) && + (a->imm == 0xab)) { + gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST); + } else { + gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, false)); + } return true; } From patchwork Fri Sep 6 20:26:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 173297 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp1211104ilq; Fri, 6 Sep 2019 13:27:27 -0700 (PDT) X-Google-Smtp-Source: APXvYqz64xG/mq8Pa9yFMfuZjzwoIkD1CDyLACyNpN641Nq2Auc3LlaVCuQRbUYouvMvaaatTFXq X-Received: by 2002:a50:da02:: with SMTP id z2mr11744828edj.254.1567801647326; Fri, 06 Sep 2019 13:27:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1567801647; cv=none; d=google.com; s=arc-20160816; b=z97wcMKMRiPrMCfjALjs0dNJWVuA3apBV43Lqs4OnGbqg1H7sNJkokLxlqdDEJIotU HdzkFryJFELm4uGe9YiDTbyZhIzxVatL35DIicxsZzCgta4A2zrNBnU2E7Yw1KwPGdCT 1EzS7tbeNAkARhNdlfmIp/uyj6ZSUQ/QT9w7r0mAPh2FAk+6LbzF4gUItgcrsNvUXbKZ 76iHIA5PLWKiJXetk+ntBFsZYMyB445svsZk9D13x5qVWUtqEU1Pl08/whZg/+cbUNgs ryD4WZAlahi+Zd6xh9twBrbGPY73MkIxXDAuK9fzLXMhC6WQENJ88bMXk/ko1Qo8q4Mu figA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=ZOU2dawRnEbn8gBP7FThkgEA/iC2qfVj+g99luazd38=; b=ksvCpIqekTUswAt6//bpQfDo88myHUfLE7mIdmo4oPiStGhNNVWbEyicDV49kMhowG ERY1A/7b5tSUp6VMHGGe61xq70PB6noyuUTy53nt9J5AdGw109C8iEaj2JAO4ZlvuZIl IS0ppg/Nc46lbJKiJooJN+20NZi/G8gfhojQpHAxOLss0PjVD/lxhR1qUV/Vq6h/VgX4 jv2Tz4cKOBGd64bY23aOgcrEAtqF6O9vK0DAxuxcaTqG6siynT1uvRtWmOYsN/cpzQdh qTIA0jrp9ilNBjDChC1U4LQCnHvh+BVsvMrUNqYL/mnm8VrWq8lO5TKn00KWFf6v7Fcu ek5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=eBASGjen; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id qh24si3571429ejb.19.2019.09.06.13.27.27 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 06 Sep 2019 13:27:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=eBASGjen; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:60074 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i6KpK-0003XS-19 for patch@linaro.org; Fri, 06 Sep 2019 16:27:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58079) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i6Kob-00036d-Iu for qemu-devel@nongnu.org; Fri, 06 Sep 2019 16:26:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i6Koa-0002RO-Ce for qemu-devel@nongnu.org; Fri, 06 Sep 2019 16:26:41 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:44093) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i6Koa-0002Qa-6G for qemu-devel@nongnu.org; Fri, 06 Sep 2019 16:26:40 -0400 Received: by mail-wr1-x444.google.com with SMTP id 30so7798107wrk.11 for ; Fri, 06 Sep 2019 13:26:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZOU2dawRnEbn8gBP7FThkgEA/iC2qfVj+g99luazd38=; b=eBASGjen2ZL2L4llBMfB43XePTKBBldIO3FhxmCpbQvf3xIyLMRS4WtGA4alGa+1VY kDhGv4vp95je7khBoW/IJDzfrMqxKIW2Bwfw9vheq21wM+tI638mdXs4x1oPubw0GLk0 jlb8/w3Unh6BKMn35MeTxTuEfkPchcuLN/EALq2g4J6mHksqIT8ZygBb4va6ElwKlqIc GMzE5jUeUQ3WIFaBHz3GfLJC6vimStaJxUEiN/emmK214PDWHr75FL3fHJsNzmd16Ko8 qCbUv/Kw1SD5in9G+PMwWHHOn2zCCamLPfJ6TSFJIBrlq/pQ5hsqLQ9OcIPxPNw/C3vt Aiqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZOU2dawRnEbn8gBP7FThkgEA/iC2qfVj+g99luazd38=; b=GyAbLKYguuSBWL0C/eCVh54IcuG+n+H8ZizDzwzutiAXKItWLt44jAp+1Dl4TrGHwq A4HOxiEy0uzNtibwoUwhmIXVwXnQEa3fFKF6k3anzSg297cEYQ4Gn1th4v/VWJMD5ibs 2nTZ/TSlRHKUhyLkjzPjyMVUWaGAKtei8u1i+QYlo4x3b39TN8n50PJb8Yg2jyxaARZb fSzE9rrPqxPSwzd0jyvkfIyqAV0o1sZOoIRrZwwsYbvitlbE0gqu3fQbP9P7wwkeCJZz DUOndMVcWf+emJG2AlFRaLyBhN56XwFAjKnpimu3SImJo4GY4dyAsifZp+ejRYakWrmo BTng== X-Gm-Message-State: APjAAAUwfsAJugUx2DdNKoAOcfDUTjrckxtE3Chg8k94zdkNbCkZglVH pAPVy2vSiC0SqHu7CGokAVgW6MDr7jM= X-Received: by 2002:a5d:49c3:: with SMTP id t3mr9007638wrs.151.1567801599051; Fri, 06 Sep 2019 13:26:39 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id e3sm9315586wrh.12.2019.09.06.13.26.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2019 13:26:38 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 8CC581FF8F; Fri, 6 Sep 2019 21:26:36 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 6 Sep 2019 21:26:33 +0100 Message-Id: <20190906202636.28642-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190906202636.28642-1-alex.bennee@linaro.org> References: <20190906202636.28642-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH v4 2/4] target/arm: handle A-profile semihosting at translate time X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" As for the other semihosting calls we can resolve this at translate time. Signed-off-by: Alex Bennée --- v2 - update for change to gen_exception_internal_insn API v3 - update for decode tree, merge T32 & A32 commits - dropped r-b due to changes v4 - !IS_USER and !arm_dc_feature(s, ARM_FEATURE_M) --- target/arm/translate.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) -- 2.20.1 diff --git a/target/arm/translate.c b/target/arm/translate.c index 6689acc911e..d7ee4f88ace 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -10219,14 +10219,22 @@ static bool trans_CBZ(DisasContext *s, arg_CBZ *a) } /* - * Supervisor call + * Supervisor call - both T32 & A32 come here so we need to check + * which mode we are in when checking for semihosting. */ static bool trans_SVC(DisasContext *s, arg_SVC *a) { - gen_set_pc_im(s, s->base.pc_next); - s->svc_imm = a->imm; - s->base.is_jmp = DISAS_SWI; + const uint32_t semihost_imm = s->thumb ? 0xab : 0x123456; + + if (!arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled() + && !IS_USER(s) && (a->imm == semihost_imm)) { + gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST); + } else { + gen_set_pc_im(s, s->base.pc_next); + s->svc_imm = a->imm; + s->base.is_jmp = DISAS_SWI; + } return true; } From patchwork Fri Sep 6 20:26:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 173302 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp1216807ilq; Fri, 6 Sep 2019 13:33:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqwM58IdX1w7+E1o+xHfqCIUMiBr5joWF7r0HMyq2fptREs7SidZaDJsxWQPNdRQsZHXTgqh X-Received: by 2002:a05:6402:332:: with SMTP id q18mr12033023edw.149.1567802013903; Fri, 06 Sep 2019 13:33:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1567802013; cv=none; d=google.com; s=arc-20160816; b=n6IZvQ++jjODeL2vegBBpXWf0yxpamq38WRJdCXHSm53Y7L5lT6M3nPPyBtdz/zQr0 CAUZ8fdUm0decz852MrxJ8wJjghzdqoevErcIJ5FubxZ0fCOhux0Ryun+/bTnvlJAIdH ewR6Pwi//C2I0r70tKIYyRnfbAVa4y9fPGcNWWPOj407xUVJbmCbvJg1JDhoP9NzvpZx Lpuv0HfW0FXfggjpRuye7IOuycDUeqTP4QFt+0xMsruv2R2wslZtlJkHbzt/ZPyI2egJ ZBGhBqs2ntYtezSSJN0Xlg9Bfna82GQvV27vr3gI/+CBN5TxSR8FcftHU7xQIUCG+AFm EW1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=zlpCkLPxW/plsVCAFKM/m8fldNY7IYpuz4hZ7EfXmKg=; b=tLHSAumkDXWj09XaCljxKEm78nvimq2NjdubwVUSY88QQxDOF/jQrZ+0+4OHUqPBvz KAXdTsh4VuzcwTbjI04OV3jzEfzVliA54Xabpn+JadGpBsFREpxiu+h54Rhu0PufkNU0 PSEp6UCvzEHZO1VO940WnHQQ+H73Bk7FPIUD+Gc9Ur2ucKtL3iXPCckvReIaa0ug6vcJ hmNK6SCM9AV9GF1wq2Yt2HUD/TtL89TT6pWBPem2/lTuuv3ui27z3CGrsVA2pK77tH3R RHrB5CL7rdr4MUANGEnctlD4niA2W5cKH9hMSxAsjQVc0eqThOYAjWShBT/+H4UDkMQ+ KRdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jetbpzXq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH v4 3/4] target/arm: remove run time semihosting checks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now we do all our checking and use a common EXCP_SEMIHOST for semihosting operations we can make helper code a lot simpler. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- v2 - fix re-base conflicts - hoist EXCP_SEMIHOST check - comment cleanups v5 - move CONFIG_TCG ifdefs --- target/arm/helper.c | 96 +++++++++++---------------------------------- 1 file changed, 22 insertions(+), 74 deletions(-) -- 2.20.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index 507026c9154..a87ae6d46a1 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8339,88 +8339,32 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) new_el, env->pc, pstate_read(env)); } -static inline bool check_for_semihosting(CPUState *cs) -{ +/* + * Do semihosting call and set the appropriate return value. All the + * permission and validity checks have been done at translate time. + * + * We only see semihosting exceptions in TCG only as they are not + * trapped to the hypervisor in KVM. + */ #ifdef CONFIG_TCG - /* Check whether this exception is a semihosting call; if so - * then handle it and return true; otherwise return false. - */ +static void handle_semihosting(CPUState *cs) +{ ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; if (is_a64(env)) { - if (cs->exception_index == EXCP_SEMIHOST) { - /* This is always the 64-bit semihosting exception. - * The "is this usermode" and "is semihosting enabled" - * checks have been done at translate time. - */ - qemu_log_mask(CPU_LOG_INT, - "...handling as semihosting call 0x%" PRIx64 "\n", - env->xregs[0]); - env->xregs[0] = do_arm_semihosting(env); - return true; - } - return false; + qemu_log_mask(CPU_LOG_INT, + "...handling as semihosting call 0x%" PRIx64 "\n", + env->xregs[0]); + env->xregs[0] = do_arm_semihosting(env); } else { - uint32_t imm; - - /* Only intercept calls from privileged modes, to provide some - * semblance of security. - */ - if (cs->exception_index != EXCP_SEMIHOST && - (!semihosting_enabled() || - ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR))) { - return false; - } - - switch (cs->exception_index) { - case EXCP_SEMIHOST: - /* This is always a semihosting call; the "is this usermode" - * and "is semihosting enabled" checks have been done at - * translate time. - */ - break; - case EXCP_SWI: - /* Check for semihosting interrupt. */ - if (env->thumb) { - imm = arm_lduw_code(env, env->regs[15] - 2, arm_sctlr_b(env)) - & 0xff; - if (imm == 0xab) { - break; - } - } else { - imm = arm_ldl_code(env, env->regs[15] - 4, arm_sctlr_b(env)) - & 0xffffff; - if (imm == 0x123456) { - break; - } - } - return false; - case EXCP_BKPT: - /* See if this is a semihosting syscall. */ - if (env->thumb) { - imm = arm_lduw_code(env, env->regs[15], arm_sctlr_b(env)) - & 0xff; - if (imm == 0xab) { - env->regs[15] += 2; - break; - } - } - return false; - default: - return false; - } - qemu_log_mask(CPU_LOG_INT, "...handling as semihosting call 0x%x\n", env->regs[0]); env->regs[0] = do_arm_semihosting(env); - return true; } -#else - return false; -#endif } +#endif /* Handle a CPU exception for A and R profile CPUs. * Do any appropriate logging, handle PSCI calls, and then hand off @@ -8451,13 +8395,17 @@ void arm_cpu_do_interrupt(CPUState *cs) return; } - /* Semihosting semantics depend on the register width of the - * code that caused the exception, not the target exception level, - * so must be handled here. + /* + * Semihosting semantics depend on the register width of the code + * that caused the exception, not the target exception level, so + * must be handled here. */ - if (check_for_semihosting(cs)) { +#ifdef CONFIG_TCG + if (cs->exception_index == EXCP_SEMIHOST) { + handle_semihosting(cs); return; } +#endif /* Hooks may change global state so BQL should be held, also the * BQL needs to be held for any modification of From patchwork Fri Sep 6 20:26:35 2019 Content-Type: text/plain; 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X-Received-From: 2a00:1450:4864:20::342 Subject: [Qemu-devel] [PATCH v4 4/4] atomic_template: fix indentation in GEN_ATOMIC_HELPER X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , "Emilio G. Cota" , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée --- accel/tcg/atomic_template.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.20.1 diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h index df9c8388178..287433d809b 100644 --- a/accel/tcg/atomic_template.h +++ b/accel/tcg/atomic_template.h @@ -149,7 +149,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr, #define GEN_ATOMIC_HELPER(X) \ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ - ABI_TYPE val EXTRA_ARGS) \ + ABI_TYPE val EXTRA_ARGS) \ { \ ATOMIC_MMU_DECLS; \ DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \