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Tue, 09 Jan 2024 11:26:37 -0800 (PST) Received: from latitude-fedora.lan ([2001:8f8:183b:50fb::d35]) by smtp.gmail.com with ESMTPSA id u7-20020a05600c138700b0040d62f97e3csm15672468wmf.10.2024.01.09.11.26.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jan 2024 11:26:36 -0800 (PST) From: Alexey Charkov To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Sebastian Reichel , Cristian Ciocaltea , Christopher Obbard , =?utf-8?b?VGFtw6FzIFN6xbFj?= =?utf-8?b?cw==?= , Shreeya Patel , Alexey Charkov , Kever Yang , Jagan Teki , Chris Morgan , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] arm64: dts: rockchip: enable built-in thermal monitoring on rk3588 Date: Tue, 9 Jan 2024 23:19:47 +0400 Message-ID: <20240109192608.5981-1-alchark@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240106222357.23835-1-alchark@gmail.com> References: <20240106222357.23835-1-alchark@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Include thermal zones information in device tree for rk3588 variants and enable the built-in thermal sensing ADC on RADXA Rock 5B Signed-off-by: Alexey Charkov --- Changes in v2: - Dropped redundant comments - Included all CPU cores in cooling maps - Split cooling maps into more granular ones utilizing TSADC channels 1-3 which measure temperature by separate CPU clusters instead of channel 0 which measures the center of the SoC die --- .../boot/dts/rockchip/rk3588-rock-5b.dts | 4 + arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 151 ++++++++++++++++++ 2 files changed, 155 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts index a5a104131403..f9d540000de3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -772,3 +772,7 @@ &usb_host1_ehci { &usb_host1_ohci { status = "okay"; }; + +&tsadc { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 8aa0499f9b03..8d54998d0ecc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "rockchip,rk3588"; @@ -2112,6 +2113,156 @@ tsadc: tsadc@fec00000 { status = "disabled"; }; + thermal_zones: thermal-zones { + /* sensor near the center of the whole chip */ + soc_thermal: soc-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + sustainable-power = <2100>; + thermal-sensors = <&tsadc 0>; + + trips { + soc_crit: soc-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + /* sensor between A76 cores 0 and 1 */ + bigcore0_thermal: bigcore0-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + thermal-sensors = <&tsadc 1>; + + trips { + bigcore0_alert: bigcore0-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + bigcore0_crit: bigcore0-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&bigcore0_alert>; + cooling-device = + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; + }; + + /* sensor between A76 cores 2 and 3 */ + bigcore2_thermal: bigcore2-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + thermal-sensors = <&tsadc 2>; + + trips { + bigcore2_alert: bigcore2-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + bigcore2_crit: bigcore2-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map1 { + trip = <&bigcore2_alert>; + cooling-device = + <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; + }; + + /* sensor between the four A55 cores */ + little_core_thermal: littlecore-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + thermal-sensors = <&tsadc 3>; + + trips { + littlecore_alert: littlecore-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + littlecore_crit: littlecore-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map2 { + trip = <&littlecore_alert>; + cooling-device = + <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; + }; + + /* sensor near the PD_CENTER power domain */ + center_thermal: center-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + thermal-sensors = <&tsadc 4>; + + trips { + center_crit: center-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + thermal-sensors = <&tsadc 5>; + + trips { + gpu_crit: gpu-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + npu_thermal: npu-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + thermal-sensors = <&tsadc 6>; + + trips { + npu_crit: npu-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + saradc: adc@fec10000 { compatible = "rockchip,rk3588-saradc"; reg = <0x0 0xfec10000 0x0 0x10000>;