From patchwork Thu Jan 4 13:01:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harald Mommer X-Patchwork-Id: 761418 Received: from refb02.tmes.trendmicro.eu (refb02.tmes.trendmicro.eu [18.185.115.60]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE3F222305 for ; Thu, 4 Jan 2024 13:12:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensynergy.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensynergy.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=opensynergy.com header.i=@opensynergy.com header.b="WPPTqUZ3" Received: from 104.47.11.169_.trendmicro.com (unknown [172.21.10.186]) by refb02.tmes.trendmicro.eu (Postfix) with ESMTPS id 6F6D410A35F44; Thu, 4 Jan 2024 13:01:53 +0000 (UTC) Received: from 104.47.11.169_.trendmicro.com (unknown [172.21.165.80]) by repost01.tmes.trendmicro.eu (Postfix) with SMTP id 1C14C10000D76; Thu, 4 Jan 2024 13:01:46 +0000 (UTC) X-TM-MAIL-RECEIVED-TIME: 1704373305.809000 X-TM-MAIL-UUID: 7255899f-988c-4139-bb95-88cde1beafff Received: from DEU01-FR2-obe.outbound.protection.outlook.com (unknown [104.47.11.169]) by repre01.tmes.trendmicro.eu (Trend Micro Email Security) with ESMTPS id C59F010047C2A; Thu, 4 Jan 2024 13:01:45 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=LOqELa/huCpU7VEmB3YCfHCoWdTyI8sLpYRlDI+Xpag3HQDCDLlL/l0SAlTG35RwlXrbYTRtOpd3ecrcSLKOudilGwaMGRE05Z3we9x46F4ip90V5W/WPztnHf8Aa/ch6cLtFJbUt+aBJrkX8aA/nGkOl7RiYxbPQlUmOU+O5NrCKtuj/yaheXd4f32EoErLKiufiCJ+ruMHc/ue3g2MA1sOApXAmbbx9ThhpSq5/GzE/1tTDFbE5Thtypa+yjAbHo30AcA7NI2VV1xEIqMSngJVu1DX6ca0jxHETSgFQVMcDO37pUxj0nr/sl/j4WbqqRGMRxNfGKx9q9MYUvJz1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=zSNSQiLw2taR/25gESYnwRtDRVy5PR4seJYFt74sGfw=; b=aC+E4tIxlNK7qh+Z+IPtxwEJRj7cXfKxMVsKPhXLJxybifQi/4s5TVIwTbtVs6vhPv8Y7gzFXNcAh0ntEHeFIiRzOQvXPAGlfF6FHFQEvz8rbOw6FsBP/Vm5XtkCel/IguF0k5B97s6mLiKf3S9hU1MHwaiLYop0pvhs7u3/mG8KuiHjM8WZZafRbSwDpqcXh8vbR7GD1KCnbzcDbB9nJ9d3uL5CUUjJ69c16CeK121H9+zgeyjllbGmbnmrNUxYViWIGN+UVxGx2bsg2cYkrrm7Hgvg388TCTfvkWnHJpDrRGWC/ONDXzyfMPm6pPnXfKsf2Yayk8bqsiCPHpzOxg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 217.66.60.4) smtp.rcpttodomain=kernel.org smtp.mailfrom=opensynergy.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=opensynergy.com; dkim=none (message not signed); arc=none (0) X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 217.66.60.4) smtp.mailfrom=opensynergy.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=opensynergy.com; Received-SPF: Pass (protection.outlook.com: domain of opensynergy.com designates 217.66.60.4 as permitted sender) receiver=protection.outlook.com; client-ip=217.66.60.4; helo=SR-MAIL-03.open-synergy.com; pr=C From: Harald Mommer To: virtio-dev@lists.oasis-open.org, Haixu Cui , Mark Brown , Viresh Kumar , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_ztu@quicinc.com, Matti Moell , Mikhail Golubev , Harald Mommer Subject: [RFC PATCH v2 1/3] virtio: Add ID for virtio SPI. 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Signed-off-by: Harald Mommer Reviewed-by: Viresh Kumar --- include/uapi/linux/virtio_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/uapi/linux/virtio_ids.h b/include/uapi/linux/virtio_ids.h index 7aa2eb766205..6c12db16faa3 100644 --- a/include/uapi/linux/virtio_ids.h +++ b/include/uapi/linux/virtio_ids.h @@ -68,6 +68,7 @@ #define VIRTIO_ID_AUDIO_POLICY 39 /* virtio audio policy */ #define VIRTIO_ID_BT 40 /* virtio bluetooth */ #define VIRTIO_ID_GPIO 41 /* virtio gpio */ +#define VIRTIO_ID_SPI 45 /* virtio spi */ /* * Virtio Transitional IDs From patchwork Thu Jan 4 13:01:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harald Mommer X-Patchwork-Id: 760110 Received: from refb02.tmes.trendmicro.eu (refb02.tmes.trendmicro.eu [18.185.115.60]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0107C22305 for ; Thu, 4 Jan 2024 13:13:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensynergy.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensynergy.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=opensynergy.com header.i=@opensynergy.com header.b="wOf4cC/t" Received: from 104.47.7.169_.trendmicro.com (unknown [172.21.19.34]) by refb02.tmes.trendmicro.eu (Postfix) with ESMTPS id 55D3B10A32985 for ; Thu, 4 Jan 2024 13:01:53 +0000 (UTC) Received: from 104.47.7.169_.trendmicro.com (unknown [172.21.176.220]) by repost01.tmes.trendmicro.eu (Postfix) with SMTP id 7C7E210000C35; Thu, 4 Jan 2024 13:01:46 +0000 (UTC) X-TM-MAIL-RECEIVED-TIME: 1704373306.074000 X-TM-MAIL-UUID: 5474ea3e-5a98-4133-a7e1-e61acef30fb5 Received: from DEU01-BE0-obe.outbound.protection.outlook.com (unknown [104.47.7.169]) by repre01.tmes.trendmicro.eu (Trend Micro Email Security) with ESMTPS id 123591000040D; Thu, 4 Jan 2024 13:01:46 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IMTOQVH5GgGvmKH0ocYlm8p9atXFSedlLCoue4ZpWX2ec1VWAAgpvrTVWeSkf/MnZS8oKM6yHz6ztlmlL8j+Vp67Rb2DZ7fp4ItK7C1pQL+cPAlw7/sdcVBxnSF/h/JmGn8NXRSlVbIUbh/BDC048sCkOMKl8qQRzkhlg1DdFEjpnfTY4r9PMXqYYuaKcDLPLcoZUGWsGPrzcyrG02JguO+T81gGDwKtrpzVAYHbI9a70LHdexiYcbhcIKgNCNcy8kymRi00+6Oovgmrf2hj36ZSGHD7RUf4M0lVWlw7nzrLDcdAXy2FbNBEX0osc4c+V5CL3V2VUMp1WisozpM0rw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=k373ENbKKgZEygbJ2ZAkGzkQCJqpH/pxUPIlD6aCUPM=; b=YwXq/S1eIESO80Qi3ZVlHgxxakgZf54FAIaBcxguNcWhzHBxtxOEVeAQk9yLzrDCBk8KfW+nNqekElVccaN1JeC3QileZCqbjR9TMg8RHfo10HgUyB1CrXbhWlF1p1pRMCXxxTn82SqUL2OSHgAHf9N23W5RsaSSLDc9MnXRfj2a0h1TbufqGhYipU3NIEUa6iWW7Q733YylF0YFZx/APl2/S1zY1zrqdp+ZwsBVxJI2YfSB3AU6J8uBTm5KyAANEI2xQ7yX4EOXhweMcanoFbOyGfKt5vBsv7vc2CA/0L9ZB+YPX+wkmvdl3L9Gbc1pr8nsNA+/uAu+GaUlulx/bg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 217.66.60.4) smtp.rcpttodomain=kernel.org smtp.mailfrom=opensynergy.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=opensynergy.com; dkim=none (message not signed); arc=none (0) X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 217.66.60.4) smtp.mailfrom=opensynergy.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=opensynergy.com; Received-SPF: Pass (protection.outlook.com: domain of opensynergy.com designates 217.66.60.4 as permitted sender) receiver=protection.outlook.com; client-ip=217.66.60.4; helo=SR-MAIL-03.open-synergy.com; pr=C From: Harald Mommer To: virtio-dev@lists.oasis-open.org, Haixu Cui , Mark Brown , Viresh Kumar , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_ztu@quicinc.com, Matti Moell , Mikhail Golubev , Harald Mommer Subject: [RFC PATCH v2 2/3] virtio-spi: Add virtio-spi.h (V10 draft specification). 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The header file is compliant to the virtio SPI draft specification V10. Signed-off-by: Harald Mommer Reviewed-by: Viresh Kumar --- include/uapi/linux/virtio_spi.h | 185 ++++++++++++++++++++++++++++++++ 1 file changed, 185 insertions(+) create mode 100644 include/uapi/linux/virtio_spi.h diff --git a/include/uapi/linux/virtio_spi.h b/include/uapi/linux/virtio_spi.h new file mode 100644 index 000000000000..d56843fcb2ec --- /dev/null +++ b/include/uapi/linux/virtio_spi.h @@ -0,0 +1,185 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* + * Copyright (C) 2023 OpenSynergy GmbH + */ +#ifndef _LINUX_VIRTIO_VIRTIO_SPI_H +#define _LINUX_VIRTIO_VIRTIO_SPI_H + +#include +#include +#include +#include + +/* Sample data on trailing clock edge */ +#define VIRTIO_SPI_CPHA (1 << 0) +/* Clock is high when IDLE */ +#define VIRTIO_SPI_CPOL (1 << 1) +/* Chip Select is active high */ +#define VIRTIO_SPI_CS_HIGH (1 << 2) +/* Transmit LSB first */ +#define VIRTIO_SPI_MODE_LSB_FIRST (1 << 3) +/* Loopback mode */ +#define VIRTIO_SPI_MODE_LOOP (1 << 4) + +/* + * All config fields are read-only for the Virtio SPI driver + * + * @cs_max_number: maximum number of chipselect the host SPI controller + * supports. + * @cs_change_supported: indicates if the host SPI controller supports to toggle + * chipselect after each transfer in one message: + * 0: unsupported, chipselect will be kept in active state throughout the + * message transaction; + * 1: supported. + * Note: Message here contains a sequence of SPI transfers. + * @tx_nbits_supported: indicates the supported number of bit for writing: + * bit 0: DUAL (2-bit transfer), 1 for supported + * bit 1: QUAD (4-bit transfer), 1 for supported + * bit 2: OCTAL (8-bit transfer), 1 for supported + * other bits are reserved as 0, 1-bit transfer is always supported. + * @rx_nbits_supported: indicates the supported number of bit for reading: + * bit 0: DUAL (2-bit transfer), 1 for supported + * bit 1: QUAD (4-bit transfer), 1 for supported + * bit 2: OCTAL (8-bit transfer), 1 for supported + * other bits are reserved as 0, 1-bit transfer is always supported. + * @bits_per_word_mask: mask indicating which values of bits_per_word are + * supported. If not set, no limitation for bits_per_word. + * @mode_func_supported: indicates the following features are supported or not: + * bit 0-1: CPHA feature + * 0b00: invalid, should support as least one CPHA setting + * 0b01: supports CPHA=0 only + * 0b10: supports CPHA=1 only + * 0b11: supports CPHA=0 and CPHA=1. + * bit 2-3: CPOL feature + * 0b00: invalid, should support as least one CPOL setting + * 0b01: supports CPOL=0 only + * 0b10: supports CPOL=1 only + * 0b11: supports CPOL=0 and CPOL=1. + * bit 4: chipselect active high feature, 0 for unsupported and 1 for + * supported, chipselect active low should always be supported. + * bit 5: LSB first feature, 0 for unsupported and 1 for supported, + * MSB first should always be supported. + * bit 6: loopback mode feature, 0 for unsupported and 1 for supported, + * normal mode should always be supported. + * @max_freq_hz: the maximum clock rate supported in Hz unit, 0 means no + * limitation for transfer speed. + * @max_word_delay_ns: the maximum word delay supported in ns unit, + * 0 means word delay feature is unsupported. + * Note: Just as one message contains a sequence of transfers, + * one transfer may contain a sequence of words. + * @max_cs_setup_ns: the maximum delay supported after chipselect is asserted, + * in ns unit, 0 means delay is not supported to introduce after chipselect is + * asserted. + * @max_cs_hold_ns: the maximum delay supported before chipselect is deasserted, + * in ns unit, 0 means delay is not supported to introduce before chipselect + * is deasserted. + * @max_cs_incative_ns: maximum delay supported after chipselect is deasserted, + * in ns unit, 0 means delay is not supported to introduce after chipselect is + * deasserted. + */ +struct virtio_spi_config { + /* # of /dev/spidev.CS with CS=0..chip_select_max_number -1 */ + __u8 cs_max_number; + __u8 cs_change_supported; +#define VIRTIO_SPI_RX_TX_SUPPORT_DUAL (1 << 0) +#define VIRTIO_SPI_RX_TX_SUPPORT_QUAD (1 << 1) +#define VIRTIO_SPI_RX_TX_SUPPORT_OCTAL (1 << 2) + __u8 tx_nbits_supported; + __u8 rx_nbits_supported; + __le32 bits_per_word_mask; +#define VIRTIO_SPI_MF_SUPPORT_CPHA_0 (1 << 0) +#define VIRTIO_SPI_MF_SUPPORT_CPHA_1 (1 << 1) +#define VIRTIO_SPI_MF_SUPPORT_CPOL_0 (1 << 2) +#define VIRTIO_SPI_MF_SUPPORT_CPOL_1 (1 << 3) +#define VIRTIO_SPI_MF_SUPPORT_CS_HIGH (1 << 4) +#define VIRTIO_SPI_MF_SUPPORT_LSB_FIRST (1 << 5) +#define VIRTIO_SPI_MF_SUPPORT_LOOPBACK (1 << 6) + __le32 mode_func_supported; + __le32 max_freq_hz; + __le32 max_word_delay_ns; + __le32 max_cs_setup_ns; + __le32 max_cs_hold_ns; + __le32 max_cs_inactive_ns; +}; + +/* + * @chip_select_id: chipselect index the SPI transfer used. + * + * @bits_per_word: the number of bits in each SPI transfer word. + * + * @cs_change: whether to deselect device after finishing this transfer + * before starting the next transfer, 0 means cs keep asserted and + * 1 means cs deasserted then asserted again. + * + * @tx_nbits: bus width for write transfer. + * 0,1: bus width is 1, also known as SINGLE + * 2 : bus width is 2, also known as DUAL + * 4 : bus width is 4, also known as QUAD + * 8 : bus width is 8, also known as OCTAL + * other values are invalid. + * + * @rx_nbits: bus width for read transfer. + * 0,1: bus width is 1, also known as SINGLE + * 2 : bus width is 2, also known as DUAL + * 4 : bus width is 4, also known as QUAD + * 8 : bus width is 8, also known as OCTAL + * other values are invalid. + * + * @reserved: for future use. + * + * @mode: SPI transfer mode. + * bit 0: CPHA, determines the timing (i.e. phase) of the data + * bits relative to the clock pulses.For CPHA=0, the + * "out" side changes the data on the trailing edge of the + * preceding clock cycle, while the "in" side captures the data + * on (or shortly after) the leading edge of the clock cycle. + * For CPHA=1, the "out" side changes the data on the leading + * edge of the current clock cycle, while the "in" side + * captures the data on (or shortly after) the trailing edge of + * the clock cycle. + * bit 1: CPOL, determines the polarity of the clock. CPOL=0 is a + * clock which idles at 0, and each cycle consists of a pulse + * of 1. CPOL=1 is a clock which idles at 1, and each cycle + * consists of a pulse of 0. + * bit 2: CS_HIGH, if 1, chip select active high, else active low. + * bit 3: LSB_FIRST, determines per-word bits-on-wire, if 0, MSB + * first, else LSB first. + * bit 4: LOOP, loopback mode. + * + * @freq: the transfer speed in Hz. + * + * @word_delay_ns: delay to be inserted between consecutive words of a + * transfer, in ns unit. + * + * @cs_setup_ns: delay to be introduced after CS is asserted, in ns + * unit. + * + * @cs_delay_hold_ns: delay to be introduced before CS is deasserted + * for each transfer, in ns unit. + * + * @cs_change_delay_inactive_ns: delay to be introduced after CS is + * deasserted and before next asserted, in ns unit. + */ +struct spi_transfer_head { + __u8 chip_select_id; + __u8 bits_per_word; + __u8 cs_change; + __u8 tx_nbits; + __u8 rx_nbits; + __u8 reserved[3]; + __le32 mode; + __le32 freq; + __le32 word_delay_ns; + __le32 cs_setup_ns; + __le32 cs_delay_hold_ns; + __le32 cs_change_delay_inactive_ns; +}; + +struct spi_transfer_result { +#define VIRTIO_SPI_TRANS_OK 0 +#define VIRTIO_SPI_PARAM_ERR 1 +#define VIRTIO_SPI_TRANS_ERR 2 + u8 result; +}; + +#endif /* #ifndef _LINUX_VIRTIO_VIRTIO_SPI_H */ From patchwork Thu Jan 4 13:01:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harald Mommer X-Patchwork-Id: 761417 Received: from refb02.tmes.trendmicro.eu (refb02.tmes.trendmicro.eu [18.185.115.58]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 023FB22304 for ; Thu, 4 Jan 2024 13:13:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensynergy.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensynergy.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=opensynergy.com header.i=@opensynergy.com header.b="WUxYwK/i" Received: from 104.47.7.168_.trendmicro.com (unknown [172.21.19.202]) by refb02.tmes.trendmicro.eu (Postfix) with ESMTPS id 48C0E10A3EB94 for ; Thu, 4 Jan 2024 13:01:56 +0000 (UTC) Received: from 104.47.7.168_.trendmicro.com (unknown [172.21.176.220]) by repost01.tmes.trendmicro.eu (Postfix) with SMTP id 215B1100017A6; Thu, 4 Jan 2024 13:01:49 +0000 (UTC) X-TM-MAIL-RECEIVED-TIME: 1704373308.670000 X-TM-MAIL-UUID: d07ada51-4d3a-476c-a830-014f30aa25a4 Received: from DEU01-BE0-obe.outbound.protection.outlook.com (unknown [104.47.7.168]) by repre01.tmes.trendmicro.eu (Trend Micro Email Security) with ESMTPS id A3CE010047C38; Thu, 4 Jan 2024 13:01:48 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Ymh/UGRCUzqE4kwA1LNRD3V76rrU0q5JmXDQmICtgagGd0Sx+6VKeX2wQT3Bgmy4M5W5lmPNCv/wjBtmpdkE76CNQWzu11JKah5qaxWsvyIcK6bXXGzZKOGDURMEtwPc7H5vJRvVf2b9mXD6F9urkxlBkUMqy+QagjyE75Uw2CCsIn0ccSKPpW/iWCs/pFGZQIX6wCpqAMZar4rS07+XnVKqbs5xmawIX/F3btB3t4T02sxH4HmpJAhpcue4qVxfIXlyozSrZeQArwI2nRB4O59Xq8onQeBRxkjAEz19GsZ29UcdY64yvRYn9YJgu7kcYNg6dOpEWq+PIgukrt63rA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=A44VEZYTspkX2zfu6+lQI056JfCNUZlrpQHGpBI4xJ0=; b=c2tAnvbo1XUcD3oFt0xNKMnL86OEcaZGEvzarswmJrM6rhjpCkzdc1VVfUUpe5aYCkzGaR+u6mnESUH61TNsm9olAYfxcNTJqcJ0LPIM1wey1VxiuvwRO2nRibNNx2qToTsJFEtFJth71eKPKaKO8+MlCLog3lGNFy0LLejk4aeLZodl0ChVIZbKjYzJQIg7R23+oWeJ8wmuHbPOCebSGBZ6NxxtQOhxPj7bfDQKliHA3vELRoiWCmxtUutRaAbcN/34pIL5UzgrnOPyDmQC793LLAVwX/6o5v98ty0E6+Pq9EUBZCmZgCugUex/Sa0Gf6KydNNnTGvLHGO/kzJzEQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 217.66.60.4) smtp.rcpttodomain=kernel.org smtp.mailfrom=opensynergy.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=opensynergy.com; dkim=none (message not signed); arc=none (0) X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 217.66.60.4) smtp.mailfrom=opensynergy.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=opensynergy.com; Received-SPF: Pass (protection.outlook.com: domain of opensynergy.com designates 217.66.60.4 as permitted sender) receiver=protection.outlook.com; client-ip=217.66.60.4; helo=SR-MAIL-03.open-synergy.com; pr=C From: Harald Mommer To: virtio-dev@lists.oasis-open.org, Haixu Cui , Mark Brown , Viresh Kumar , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_ztu@quicinc.com, Matti Moell , Mikhail Golubev , Harald Mommer , Harald Mommer Subject: [RFC PATCH v2 3/3] SPI: Add virtio SPI driver (V10 draft specification). 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a=rsa-sha256; c=simple/simple; d=opensynergy.com; s=TM-DKIM-20210503141657; t=1704373308; bh=vWrXFOLO2Qy0YjZHKJ1cFRl1tGLQHZRjXF4n+dkhQSA=; l=14341; h=From:To:Date; b=WUxYwK/iIh2NVW9W+6vd0e5juR88oLcJYD+QP/nr9utbDQHe+yAUSMfNYBtTJ+Pcx +0Ca2IaV7qM/fxBvl33CFuP/1wQJBOyhH0GZsds6+kEnc2RLxRZ8TXtTAqAa4bal5D QtJbNOvBujGKA3vb8Q9jZmH2YHwllApqp8Ozqo6CjmdevvK5waID5w/cyhM8MPuVkD CqkuwaU/y8xKouGQMYXezifCGvAXof7pcc7mWXElhcCeyaeJAZssikEdqr5ccOlAjW dHioRjHuuQi5vONnj2OmRSd63rrM9MPMopLkouVZW1LMF7uukmtQE8N8946lzztmLw NG4WBYs5RcKrQ== From: Harald Mommer This is the virtio SPI Linux kernel driver compliant to the "PATCH v10" draft virtio SPI specification. Signed-off-by: Harald Mommer --- drivers/spi/Kconfig | 11 + drivers/spi/Makefile | 1 + drivers/spi/spi-virtio.c | 430 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 442 insertions(+) create mode 100644 drivers/spi/spi-virtio.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ddae0fde798e..f4f617c79ad7 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -1125,6 +1125,17 @@ config SPI_UNIPHIER If your SoC supports SCSSI, say Y here. +config SPI_VIRTIO + tristate "Virtio SPI SPI Controller" + depends on VIRTIO + help + This enables the Virtio SPI driver. + + Virtio SPI is an SPI driver for virtual machines using Virtio. + + If your Linux is a virtual machine using Virtio, say Y here. + If unsure, say N. + config SPI_XCOMM tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" depends on I2C diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 4ff8d725ba5e..ff2243e44e00 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -146,6 +146,7 @@ spi-thunderx-objs := spi-cavium.o spi-cavium-thunderx.o obj-$(CONFIG_SPI_THUNDERX) += spi-thunderx.o obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o obj-$(CONFIG_SPI_UNIPHIER) += spi-uniphier.o +obj-$(CONFIG_SPI_VIRTIO) += spi-virtio.o obj-$(CONFIG_SPI_XCOMM) += spi-xcomm.o obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o obj-$(CONFIG_SPI_XLP) += spi-xlp.o diff --git a/drivers/spi/spi-virtio.c b/drivers/spi/spi-virtio.c new file mode 100644 index 000000000000..39eb38184793 --- /dev/null +++ b/drivers/spi/spi-virtio.c @@ -0,0 +1,430 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SPI bus driver for the Virtio SPI controller + * Copyright (C) 2023 OpenSynergy GmbH + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* virtio_spi private data structure */ +struct virtio_spi_priv { + /* The virtio device we're associated with */ + struct virtio_device *vdev; + /* Pointer to the virtqueue */ + struct virtqueue *vq; + /* Copy of config space mode_func_supported */ + u32 mode_func_supported; + /* Copy of config space max_freq_hz */ + u32 max_freq_hz; +}; + +struct virtio_spi_req { + struct completion completion; + struct spi_transfer_head transfer_head ____cacheline_aligned; + const uint8_t *tx_buf ____cacheline_aligned; + uint8_t *rx_buf ____cacheline_aligned; + struct spi_transfer_result result ____cacheline_aligned; +}; + +static struct spi_board_info board_info = { + .modalias = "spi-virtio", +}; + +static void virtio_spi_msg_done(struct virtqueue *vq) +{ + struct virtio_spi_req *req; + unsigned int len; + + while ((req = virtqueue_get_buf(vq, &len))) + complete(&req->completion); +} + +static int virtio_spi_one_transfer(struct virtio_spi_req *spi_req, + struct spi_controller *ctrl, + struct spi_message *msg, + struct spi_transfer *xfer) +{ + struct virtio_spi_priv *priv = spi_controller_get_devdata(ctrl); + struct device *dev = &priv->vdev->dev; + struct spi_device *spi = msg->spi; + struct spi_transfer_head *th; + struct scatterlist sg_out_head, sg_out_payload; + struct scatterlist sg_in_result, sg_in_payload; + struct scatterlist *sgs[4]; + unsigned int outcnt = 0u; + unsigned int incnt = 0u; + int ret; + + th = &spi_req->transfer_head; + + /* Fill struct spi_transfer_head */ + th->chip_select_id = spi_get_chipselect(spi, 0); + th->bits_per_word = spi->bits_per_word; + /* + * Got comment: "The virtio spec for cs_change is *not* what the Linux + * cs_change field does, this will not do the right thing." + * TODO: Understand/discuss this, still unclear what may be wrong here + */ + th->cs_change = xfer->cs_change; + th->tx_nbits = xfer->tx_nbits; + th->rx_nbits = xfer->rx_nbits; + th->reserved[0] = 0; + th->reserved[1] = 0; + th->reserved[2] = 0; + + BUILD_BUG_ON(VIRTIO_SPI_CPHA != SPI_CPHA); + BUILD_BUG_ON(VIRTIO_SPI_CPOL != SPI_CPOL); + BUILD_BUG_ON(VIRTIO_SPI_CS_HIGH != SPI_CS_HIGH); + BUILD_BUG_ON(VIRTIO_SPI_MODE_LSB_FIRST != SPI_LSB_FIRST); + + th->mode = cpu_to_le32(spi->mode & (SPI_LSB_FIRST | SPI_CS_HIGH | + SPI_CPOL | SPI_CPHA)); + if ((spi->mode & SPI_LOOP) != 0) + th->mode |= cpu_to_le32(VIRTIO_SPI_MODE_LOOP); + + th->freq = cpu_to_le32(xfer->speed_hz); + + ret = spi_delay_to_ns(&xfer->word_delay, xfer); + if (ret < 0) { + dev_warn(dev, "Cannot convert word_delay\n"); + goto msg_done; + } + th->word_delay_ns = cpu_to_le32((u32)ret); + + ret = spi_delay_to_ns(&xfer->delay, xfer); + if (ret < 0) { + dev_warn(dev, "Cannot convert delay\n"); + goto msg_done; + } + th->cs_setup_ns = cpu_to_le32((u32)ret); + th->cs_delay_hold_ns = cpu_to_le32((u32)ret); + + /* This is the "off" time when CS has to be deasserted for a moment */ + ret = spi_delay_to_ns(&xfer->cs_change_delay, xfer); + if (ret < 0) { + dev_warn(dev, "Cannot convert cs_change_delay\n"); + goto msg_done; + } + th->cs_change_delay_inactive_ns = cpu_to_le32((u32)ret); + + /* Set buffers */ + spi_req->tx_buf = xfer->tx_buf; + spi_req->rx_buf = xfer->rx_buf; + + /* Prepare sending of virtio message */ + init_completion(&spi_req->completion); + + sg_init_one(&sg_out_head, &spi_req->transfer_head, + sizeof(struct spi_transfer_head)); + sgs[outcnt] = &sg_out_head; + outcnt++; + + if (spi_req->tx_buf) { + sg_init_one(&sg_out_payload, spi_req->tx_buf, xfer->len); + sgs[outcnt] = &sg_out_payload; + outcnt++; + } + + if (spi_req->rx_buf) { + sg_init_one(&sg_in_payload, spi_req->rx_buf, xfer->len); + sgs[outcnt + incnt] = &sg_in_payload; + incnt++; + } + + sg_init_one(&sg_in_result, &spi_req->result, + sizeof(struct spi_transfer_result)); + sgs[outcnt + incnt] = &sg_in_result; + incnt++; + + ret = virtqueue_add_sgs(priv->vq, sgs, outcnt, incnt, spi_req, + GFP_KERNEL); + +msg_done: + if (ret) + msg->status = ret; + + return ret; +} + +static int virtio_spi_transfer_one_message(struct spi_controller *ctrl, + struct spi_message *msg) +{ + struct virtio_spi_priv *priv = spi_controller_get_devdata(ctrl); + struct virtio_spi_req *spi_req; + struct spi_transfer *xfer; + int ret = 0; + + spi_req = kzalloc(sizeof(*spi_req), GFP_KERNEL); + if (!spi_req) { + ret = -ENOMEM; + goto no_mem; + } + + /* + * Simple implementation: Process message by message and wait for each + * message to be completed by the device side. + */ + list_for_each_entry(xfer, &msg->transfers, transfer_list) { + ret = virtio_spi_one_transfer(spi_req, ctrl, msg, xfer); + if (ret) + goto msg_done; + + virtqueue_kick(priv->vq); + + wait_for_completion(&spi_req->completion); + + /* Read result from message */ + ret = (int)spi_req->result.result; + if (ret) + goto msg_done; + } + +msg_done: + kfree(spi_req); +no_mem: + msg->status = ret; + spi_finalize_current_message(ctrl); + + return ret; +} + +static void virtio_spi_read_config(struct virtio_device *vdev) +{ + struct spi_controller *ctrl = dev_get_drvdata(&vdev->dev); + struct virtio_spi_priv *priv = vdev->priv; + u8 cs_max_number; + u8 tx_nbits_supported; + u8 rx_nbits_supported; + + cs_max_number = virtio_cread8(vdev, offsetof(struct virtio_spi_config, + cs_max_number)); + ctrl->num_chipselect = cs_max_number; + + /* Set the mode bits which are understood by this driver */ + priv->mode_func_supported = + virtio_cread32(vdev, offsetof(struct virtio_spi_config, + mode_func_supported)); + ctrl->mode_bits = priv->mode_func_supported & + (VIRTIO_SPI_CS_HIGH | VIRTIO_SPI_MODE_LSB_FIRST); + if ((priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_CPHA_1) != 0) + ctrl->mode_bits |= VIRTIO_SPI_CPHA; + if ((priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_CPOL_1) != 0) + ctrl->mode_bits |= VIRTIO_SPI_CPOL; + if ((priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_LSB_FIRST) != 0) + ctrl->mode_bits |= SPI_LSB_FIRST; + if ((priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_LOOPBACK) != 0) + ctrl->mode_bits |= SPI_LOOP; + tx_nbits_supported = + virtio_cread8(vdev, offsetof(struct virtio_spi_config, + tx_nbits_supported)); + if ((tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_DUAL) != 0) + ctrl->mode_bits |= SPI_TX_DUAL; + if ((tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_QUAD) != 0) + ctrl->mode_bits |= SPI_TX_QUAD; + if ((tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_OCTAL) != 0) + ctrl->mode_bits |= SPI_TX_OCTAL; + rx_nbits_supported = + virtio_cread8(vdev, offsetof(struct virtio_spi_config, + rx_nbits_supported)); + if ((rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_DUAL) != 0) + ctrl->mode_bits |= SPI_RX_DUAL; + if ((rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_QUAD) != 0) + ctrl->mode_bits |= SPI_RX_QUAD; + if ((rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_OCTAL) != 0) + ctrl->mode_bits |= SPI_RX_OCTAL; + + ctrl->bits_per_word_mask = + virtio_cread32(vdev, offsetof(struct virtio_spi_config, + bits_per_word_mask)); + + priv->max_freq_hz = + virtio_cread32(vdev, offsetof(struct virtio_spi_config, + max_freq_hz)); +} + +static int virtio_spi_find_vqs(struct virtio_spi_priv *priv) +{ + struct virtqueue *vq; + + vq = virtio_find_single_vq(priv->vdev, virtio_spi_msg_done, "spi-rq"); + if (IS_ERR(vq)) + return (int)PTR_ERR(vq); + priv->vq = vq; + return 0; +} + +/* Function must not be called before virtio_spi_find_vqs() has been run */ +static void virtio_spi_del_vq(struct virtio_device *vdev) +{ + virtio_reset_device(vdev); + vdev->config->del_vqs(vdev); +} + +static int virtio_spi_validate(struct virtio_device *vdev) +{ + /* + * SPI needs always access to the config space. + * Check that the driver can access the config space + */ + if (!vdev->config->get) { + dev_err(&vdev->dev, "%s failure: config access disabled\n", + __func__); + return -EINVAL; + } + + if (!virtio_has_feature(vdev, VIRTIO_F_VERSION_1)) { + dev_err(&vdev->dev, + "device does not comply with spec version 1.x\n"); + return -EINVAL; + } + + return 0; +} + +static int virtio_spi_probe(struct virtio_device *vdev) +{ + struct device_node *np = vdev->dev.parent->of_node; + struct virtio_spi_priv *priv; + struct spi_controller *ctrl; + int err; + u32 bus_num; + u16 csi; + + ctrl = devm_spi_alloc_host(&vdev->dev, sizeof(*priv)); + if (!ctrl) { + dev_err(&vdev->dev, "Kernel memory exhausted in %s()\n", + __func__); + err = -ENOMEM; + goto err_return; + } + + priv = spi_controller_get_devdata(ctrl); + priv->vdev = vdev; + vdev->priv = priv; + dev_set_drvdata(&vdev->dev, ctrl); + + err = of_property_read_u32(np, "spi,bus-num", &bus_num); + if (!err && bus_num <= S16_MAX) + ctrl->bus_num = (s16)bus_num; + + virtio_spi_read_config(vdev); + + /* Method to transfer a single SPI message */ + ctrl->transfer_one_message = virtio_spi_transfer_one_message; + + /* Initialize virtqueues */ + err = virtio_spi_find_vqs(priv); + if (err) { + dev_err(&vdev->dev, "Cannot setup virtqueues\n"); + goto err_return; + } + + err = spi_register_controller(ctrl); + if (err) { + dev_err(&vdev->dev, "Cannot register controller\n"); + goto err_return; + } + + board_info.max_speed_hz = priv->max_freq_hz; + /* spi_new_device() currently does not use bus_num but better set it */ + board_info.bus_num = (u16)ctrl->bus_num; + + /* Add chip selects to controller */ + for (csi = 0; csi < ctrl->num_chipselect; csi++) { + dev_dbg(&vdev->dev, "Setting up CS=%u\n", csi); + board_info.chip_select = csi; + /* TODO: Discuss setting of board_info.mode */ + if (!(priv->mode_func_supported & VIRTIO_SPI_CS_HIGH)) + board_info.mode = SPI_MODE_0; + else + board_info.mode = SPI_MODE_0 | SPI_CS_HIGH; + if (!spi_new_device(ctrl, &board_info)) { + dev_err(&vdev->dev, "Cannot setup device %u\n", csi); + err = -ENODEV; + goto err_return; + } + } + + return 0; + +err_return: + return err; +} + +static void virtio_spi_remove(struct virtio_device *vdev) +{ + struct spi_controller *ctrl = dev_get_drvdata(&vdev->dev); + + spi_unregister_controller(ctrl); + virtio_spi_del_vq(vdev); +} + +static int virtio_spi_freeze(struct virtio_device *vdev) +{ + struct device *dev = &vdev->dev; + struct spi_controller *ctrl = dev_get_drvdata(dev); + int ret; + + /* Stop the queue running */ + ret = spi_controller_suspend(ctrl); + if (ret) { + dev_warn(dev, "cannot suspend controller (%d)\n", ret); + return ret; + } + + virtio_spi_del_vq(vdev); + return 0; +} + +static int virtio_spi_restore(struct virtio_device *vdev) +{ + struct device *dev = &vdev->dev; + struct spi_controller *ctrl = dev_get_drvdata(dev); + int ret; + + ret = virtio_spi_find_vqs(vdev->priv); + if (ret) { + dev_err(dev, "problem starting vqueue (%d)\n", ret); + return ret; + } + + ret = spi_controller_resume(ctrl); + if (ret) + dev_err(dev, "problem resuming controller (%d)\n", ret); + + return ret; +} + +static struct virtio_device_id virtio_spi_id_table[] = { + { VIRTIO_ID_SPI, VIRTIO_DEV_ANY_ID }, + { 0 }, +}; + +static struct virtio_driver virtio_spi_driver = { + .driver.name = KBUILD_MODNAME, + .driver.owner = THIS_MODULE, + .id_table = virtio_spi_id_table, + .validate = virtio_spi_validate, + .probe = virtio_spi_probe, + .remove = virtio_spi_remove, + .freeze = pm_sleep_ptr(virtio_spi_freeze), + .restore = pm_sleep_ptr(virtio_spi_restore), +}; + +module_virtio_driver(virtio_spi_driver); +MODULE_DEVICE_TABLE(virtio, virtio_spi_id_table); + +MODULE_AUTHOR("OpenSynergy GmbH"); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Virtio SPI bus driver");