From patchwork Tue Jan 2 21:07:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760053 Received: from mail-io1-f46.google.com (mail-io1-f46.google.com [209.85.166.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A81E6168CD for ; Tue, 2 Jan 2024 21:08:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="mxlR/JRm" Received: by mail-io1-f46.google.com with SMTP id ca18e2360f4ac-7bbbe7b1b36so41537039f.1 for ; Tue, 02 Jan 2024 13:08:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229727; x=1704834527; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WvEk8+CF0e0obxZ9GfqxQDlPWDurZBaCRVB9kdh79UY=; b=mxlR/JRmwEzQ24gQbrDuASfLAvbvVtviILTojV9tH+legi9uf4b7ADzWQF5EqQddIX xT6pNgZodzRXQHKsKbDQwzJoHjqoQgx2e8tm8tSVI049sJzPbI2KiAidhangrsB5MK5I 4w9xwxX7r/qLSQrGz9oBndIzZwjj3vIDlt9Ls= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229727; x=1704834527; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WvEk8+CF0e0obxZ9GfqxQDlPWDurZBaCRVB9kdh79UY=; b=jEELBgAqNmhA2JnDwz1DOP7PVw7kvdk8aSYR8HKyt6qEAs8w5QalIHKbiTSAniiGNR ns/pueaTxi3jiu9Zx9CkWeE45e8DDvJB1FRwmPTR9z0EaF8JlvxFW+F49NT7am9vplLE UrKyxnav4yYVeRc8UHRTK9wPNgSXYNiM2mXPsvVhRooy+bLbF2ig8UKtnr754M5cXY7U jXjO0mW2V2lPMcAKLUihkLdEtWy5i97+zzvP0xknKyBcVZekNibM8wUQVOSnXn3GFYHS 0XZ8Hpu/N4q3EIUChqFkM3TctnZEZxW87Kr1C3P7/bVSujw+oqjsdJrUAWhO/wAO6nV2 x/uw== X-Gm-Message-State: AOJu0Yyy4vB/pXOtdrdy7y49lrN4wCozpeV7QgMtAEAy1dwCTQ6t9g4U tA8HQb01ekmZHURVqICbh4rOpi/LQx2O X-Google-Smtp-Source: AGHT+IHI75xAGPFlil09eKYafdEG2aev9jD01DbjIlsGjx+6zXyEPaBuo+v0kDgukm1xT+F/6TUdeA== X-Received: by 2002:a6b:500e:0:b0:7ba:af56:55b4 with SMTP id e14-20020a6b500e000000b007baaf5655b4mr12329868iob.3.1704229726966; Tue, 02 Jan 2024 13:08:46 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:46 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 04/24] dt-bindings: power: Clarify wording for wakeup-source property Date: Tue, 2 Jan 2024 14:07:28 -0700 Message-ID: <20240102140734.v4.4.I1016a45ac9e8daf8a9ebc9854ab90ec3542e7c30@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The wording in the current documentation is a little strong. The intention was not to fix any particular interrupt as wakeup capable but leave those details to the device. It wasn't intended to enforce any rules as what can be or can't be a wakeup interrupt. Soften the wording to not mandate that the 'wakeup-source' property be used, and clarify what it means when an interrupt is marked (or not marked) for wakeup. Link: https://lore.kernel.org/all/ZYAjxxHcCOgDVMTQ@bogus/ Link: https://lore.kernel.org/all/CAL_Jsq+MYwOG40X26cYmO9EkZ9xqWrXDi03MaRfxnV-+VGkXWQ@mail.gmail.com/ Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit title prefixes Changes in v2: -New patch .../bindings/power/wakeup-source.txt | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/power/wakeup-source.txt b/Documentation/devicetree/bindings/power/wakeup-source.txt index 697333a56d5e2..75bc20b95688f 100644 --- a/Documentation/devicetree/bindings/power/wakeup-source.txt +++ b/Documentation/devicetree/bindings/power/wakeup-source.txt @@ -3,16 +3,20 @@ Specifying wakeup capability for devices Any device nodes ---------------- -Nodes that describe devices which has wakeup capability must contain an +Nodes that describe devices which have wakeup capability may contain a "wakeup-source" boolean property. -Also, if device is marked as a wakeup source, then all the primary -interrupt(s) can be used as wakeup interrupt(s). +If the device is marked as a wakeup-source, interrupt wake capability depends +on the device specific "interrupt-names" property. If no interrupts are labeled +as wake capable, then it is up to the device to determine which interrupts can +wake the system. -However if the devices have dedicated interrupt as the wakeup source -then they need to specify/identify the same using device specific -interrupt name. In such cases only that interrupt can be used as wakeup -interrupt. +However if a device has a dedicated interrupt as the wakeup source, then it +needs to specify/identify it using a device specific interrupt name. In such +cases only that interrupt can be used as a wakeup interrupt. + +While various legacy interrupt names exist, new devices should use "wakeup" as +the canonical interrupt name. List of legacy properties and respective binding document --------------------------------------------------------- From patchwork Tue Jan 2 21:07:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759498 Received: from mail-il1-f170.google.com (mail-il1-f170.google.com [209.85.166.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A76B8171AC for ; Tue, 2 Jan 2024 21:08:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="TzvupCHx" Received: by mail-il1-f170.google.com with SMTP id e9e14a558f8ab-35fe47edd2eso20695395ab.0 for ; Tue, 02 Jan 2024 13:08:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229728; x=1704834528; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZjO95JnMkaDwwshxg++NkSMHj1Inq11nKJ2Uva51g+s=; b=TzvupCHxAkkrsakCQUzqs0yVAGMgiH7X+OVX1f6xgCQZhuzy8vI+jmgglIB58+S9A8 KKgaCT7i8KW2AG098C8PjBrgHatDj9qcDiI1C38wY/xg2Wc+6TKcqQT0FrkM6Obe5veF Is2QuhFPtC644eyxFHEh5OClumx/XWyBD638k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229728; x=1704834528; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZjO95JnMkaDwwshxg++NkSMHj1Inq11nKJ2Uva51g+s=; b=EWTAH3YWBiuKP7SBwqn0Nuvn17FYbWJLZKZ6NWfG+8bqyMsowZRjGwutpJFjETKYtx 6Kpc9vyf8DIfzJjUcTm+42Tps6+cqBoqLBnNDLPOxDuc0RA288OKwYsChuwJtrBFsl+/ E8ZKr+QHw0jb/SybrNWuLYQnbbyyQ11MGjULjWu9Bfm0GiFd2pdDABeIPECzzMxxAylR ky40gfVl+HKPIeROYHf23rIwsZH6TX9Jt7VZjlNwq/n56v5LJjE3aCNMlMJqE7ic+Ogq +XhEQDN2KgnxeHOkq8K79amav4Dfg8gIeVl/ACB4YVcevynvYsb1uir9Z9c5YZ7QfzAP eB1A== X-Gm-Message-State: AOJu0Yw94edYcabM1hj5G3cDLBM8YdGsdEeVt83fW5Nq4Igw+6xMFA2G fTiUukQp6yRZw24/fSrzaGvdXjNnFlKI X-Google-Smtp-Source: AGHT+IHfNiRymIq/Ou3HrROS4WwsUL4yhL5gA1ghZKZZRYnQQE6kSgie8hkLsVKsxguzK0X1QgYH8w== X-Received: by 2002:a05:6e02:20ea:b0:360:142:3fec with SMTP id q10-20020a056e0220ea00b0036001423fecmr44297ilv.6.1704229727943; Tue, 02 Jan 2024 13:08:47 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:47 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Alexandre TORGUE , Andre Przywara , Conor Dooley , Jonathan Hunter , Krzysztof Kozlowski , Nick Hawkins , Paul Barker , Rob Herring , Romain Perier , Thierry Reding , Wei Xu , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v4 05/24] ARM: dts: tegra: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:29 -0700 Message-ID: <20240102140734.v4.5.Ia598792a1386cca61844068be03c3ccec9e81753@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi | 1 + arch/arm/boot/dts/nvidia/tegra124-venice2.dts | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi index a2ee371802004..8125c1b3e8d79 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi @@ -338,6 +338,7 @@ cros_ec: cros-ec@0 { interrupt-parent = <&gpio>; interrupts = ; reg = <0>; + wakeup-source; google,cros-ec-spi-msg-delay = <2000>; diff --git a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts index 3924ee385dee0..df98dc2a67b85 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts @@ -857,6 +857,7 @@ cros_ec: cros-ec@0 { interrupt-parent = <&gpio>; interrupts = ; reg = <0>; + wakeup-source; google,cros-ec-spi-msg-delay = <2000>; From patchwork Tue Jan 2 21:07:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760052 Received: from mail-io1-f42.google.com (mail-io1-f42.google.com [209.85.166.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C981171DB for ; Tue, 2 Jan 2024 21:08:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="fXTEKLe7" Received: by mail-io1-f42.google.com with SMTP id ca18e2360f4ac-7ba87489f97so485583639f.1 for ; Tue, 02 Jan 2024 13:08:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229728; x=1704834528; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Y5uC/dqzQmYcBPDfBK6LehJHA1Nu9NUaC8OommBsuso=; b=fXTEKLe7q71mJsF+Dq10I3kngM4DFvGhqoxx//hTAim9J3VvhgQd4W/CiK4EUo7+Af uK8PO27JvkAxve0otUSqSKXT1YNZKQzNw8P788roY0qn05/S1OcWuW6AAHJPIVeiIUHb N4T8zQhbcNYrU/mfKq2Kf4JTp1/S8JwdyzYLs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229729; x=1704834529; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Y5uC/dqzQmYcBPDfBK6LehJHA1Nu9NUaC8OommBsuso=; b=mP8fBc7EvOAsoyoeBvNoWDeeI243XrP0Wqu7RpSlYaYFRi8sCB3RrUbWwARGVWaGD6 vLYdPY0LfWRFKz/pS6LgoKgDdAaXIaGJ91THO2B75eyrnFk0jULQzjdWSVsPcEio9LND xQnggcWv2ObGYXqQry0Rr1tOEaM+mfIZjoE46Wc0UOGXSOlMWrOXbH0n7BYZINjO4vKf be/IlE7JRJR4/1HScU+HqUXWv+E+j4IlzqOmn6Uf/JwfetOG3mrxZRI+n1USj5Xh8CHM equevEZCELnYlO+SAHMKClJ1hXoGzDw9BO2RwSJrul48uOSmG1s5DpCGhoaQTqDOfdxI iTfw== X-Gm-Message-State: AOJu0YxSj9Pqyra66PORrWx/ZrLaHAolG9zBlunXZx+TEacBdis0Hesg LMXUkMFKO71bEv34n/rFnvXcKsU2b/V4iBrQQhhpB7yoXx3n X-Google-Smtp-Source: AGHT+IHWKoCxJRGKNJPcLHrsAhYdGs8ek7DpUdoZoMbtH5+b3OOlyzYczn2NyfouKVIhZZpmVYFcgQ== X-Received: by 2002:a5d:8d84:0:b0:7bb:40db:9a47 with SMTP id b4-20020a5d8d84000000b007bb40db9a47mr8538555ioj.34.1704229728788; Tue, 02 Jan 2024 13:08:48 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:48 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v4 06/24] ARM: dts: rockchip: rk3288: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:30 -0700 Message-ID: <20240102140734.v4.6.I8249df4df0b7d12fb68ea1e69f84ca589c574bb1@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi index 092316be67f74..1554fe36e60fe 100644 --- a/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi @@ -112,6 +112,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ec_int>; spi-max-frequency = <3000000>; + wakeup-source; i2c_tunnel: i2c-tunnel { compatible = "google,cros-ec-i2c-tunnel"; From patchwork Tue Jan 2 21:07:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759497 Received: from mail-io1-f51.google.com (mail-io1-f51.google.com [209.85.166.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62DE617744 for ; Tue, 2 Jan 2024 21:08:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="grYAbEpE" Received: by mail-io1-f51.google.com with SMTP id ca18e2360f4ac-7ba8c218fe1so522825939f.3 for ; Tue, 02 Jan 2024 13:08:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229729; x=1704834529; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kFylEVwz6/jxQq1ZweDsmHVwptzQPuyXfUnhxAJ710k=; b=grYAbEpEGE+CY/lcVPOfo1nBGvsxD8gVu/PNJDxGLdxkl9JO2ttuV88LTUkBL6Nvu+ NDF4w4L2ULGkrLijFRY+PJ9FqOQwcOwgH7o1SnrTzXrh2gfX/nI8eyCeHlWwXbJ2WXe1 yzIBQweyAEsgllUrhRDkcgnbHpf4Er2TQLN0g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229729; x=1704834529; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kFylEVwz6/jxQq1ZweDsmHVwptzQPuyXfUnhxAJ710k=; b=ATGCvSQrNLxasK3fLX2T8l68tjK35NtrMHCGT34T34NN4Srzh3aaoS+zrM2H4X/jDl rG2qLXTtvGFzAEs2AAPKGzx0s6dKt6X3TcMGMWsJZvGF70Q5KqMFzWFqDYmzAtItEUwI pV2twSwO3hRbhSfQ5Q7O2QruHp+0kcPkfRzTwOESWDZl9wrIW2efRPoW4LcyZUUNqJka epw3kg+ib8+LPtYn2Xpz9EhRXC3oa1CUU5oluQzCDJY9yA7ERT5Bubvp9WL4F/LpkZ/s qRYWJ7rR1VDr0lmTcwmpLU3JKlRJSGKdyNDHguy45DI4eBglPWjhy09IQFKXk4B6j3LM YCXg== X-Gm-Message-State: AOJu0Yz63APgeXp+FozE2+0j3heyd7QTI5AKuZNjaANr1m+J2Bd7QGn3 eRTFyPysaLmYWz2gDvp1aktFx9UQh39O X-Google-Smtp-Source: AGHT+IHEJbHth/xM3Ut15mQoMsgLsloOubZy6ZZ76RDsFpY7YTAqNzQUU9yztAFE3PAbKB9V85o07g== X-Received: by 2002:a6b:c342:0:b0:7bb:cc1:a3b3 with SMTP id t63-20020a6bc342000000b007bb0cc1a3b3mr7901421iof.21.1704229729647; Tue, 02 Jan 2024 13:08:49 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:49 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Alim Akhtar , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v4 07/24] ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:31 -0700 Message-ID: <20240102140734.v4.7.I06b059021de1bf6103e60a73211f078f2af75d17@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts b/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts index 4e757b6e28e1c..3759742d38cac 100644 --- a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts @@ -967,6 +967,7 @@ cros_ec: cros-ec@0 { reg = <0>; spi-max-frequency = <3125000>; google,has-vbc-nvram; + wakeup-source; controller-data { samsung,spi-feedback-delay = <1>; From patchwork Tue Jan 2 21:07:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760051 Received: from mail-io1-f41.google.com (mail-io1-f41.google.com [209.85.166.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56B4517994 for ; Tue, 2 Jan 2024 21:08:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="NxKC8Bg1" Received: by mail-io1-f41.google.com with SMTP id ca18e2360f4ac-7bb0af58134so310693339f.3 for ; Tue, 02 Jan 2024 13:08:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229730; x=1704834530; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Iih8S9CbSKYXK6Eu1V5z5fk9f7rCImQ6DnJQzgwRsXQ=; b=NxKC8Bg1E9loB28npLQy86G1Uk0jberzz0pipqr7NQKvJ55wAfFyIo/RUlTOuhxG8u jQOtXZm8zekL6yMFVXzNdqAqdEDBIxF65VbIf9DGIXLYs5Dz0n1Qr4cPnF3jb3NqdZ55 Sb4E+K1G9ILQM6kDWcB0LKl5Ru1vymvI/M29o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229730; x=1704834530; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Iih8S9CbSKYXK6Eu1V5z5fk9f7rCImQ6DnJQzgwRsXQ=; b=ARFJ+W2fr2EawVTPfh55z9whr4b/4nQDAaScciQqxUlQUmrHMtwTx0kPSYvMkeNspQ rH9eNQSPDcU4JULVwfGhsXFbGKGCcK/XGXnHJhi/R5cmO9wk2xusVrsjZeTNumylwn9G feGHj1OhmApCTkZMLILjTQkZQiVgSdksJMHRaqh9YddEQ6g8SvOJ67+Iieddxxrs4UO5 L8E0fOO+AnxE+eY/87HJZCH8SU7ZjrVRnBEZJt71EV/mtSG7CS4PsUHqaDZqhLkjqLT7 bWLrOVBIAp26JyL+hxFzJErvcZ36ORUglCgGauGkxDdA6F6T2wgDf0v40ZNsSyMTiBfb pK6Q== X-Gm-Message-State: AOJu0Yy91nqUewJ9ffvXKcUibfjkxJDA/gRTU8n1eUJjyf5mei2WmQSw iLfP6EF21vnk9c9wVGyOp5wGyRn7C3lD X-Google-Smtp-Source: AGHT+IEGMyFoc4xM4Z76PcN9nzKX4GmQlxsOK5XWY9+A3y0Tt67mNC5lPz5MkPwv5iXKSvpSPmJo2g== X-Received: by 2002:a5e:a50b:0:b0:7b7:55fc:7d4 with SMTP id 11-20020a5ea50b000000b007b755fc07d4mr24457360iog.18.1704229730619; Tue, 02 Jan 2024 13:08:50 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:50 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Alim Akhtar , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v4 08/24] ARM: dts: samsung: exynos5800: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:32 -0700 Message-ID: <20240102140734.v4.8.Idc995ce08a52ba4c5fde0685118ddf2873fc8acd@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts index f91bc4ae008e4..9bbbdce9103a6 100644 --- a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts @@ -949,6 +949,7 @@ cros_ec: cros-ec@0 { reg = <0>; spi-max-frequency = <3125000>; google,has-vbc-nvram; + wakeup-source; controller-data { samsung,spi-feedback-delay = <1>; From patchwork Tue Jan 2 21:07:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759496 Received: from mail-io1-f51.google.com (mail-io1-f51.google.com [209.85.166.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6321C1802D for ; Tue, 2 Jan 2024 21:08:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="PyeXmrBb" Received: by mail-io1-f51.google.com with SMTP id ca18e2360f4ac-7bb5fda069bso168108839f.0 for ; Tue, 02 Jan 2024 13:08:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229731; x=1704834531; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LeATnxPiO37XaEtB4eQZXrEcgW0prfgDBCAc6VotlMc=; b=PyeXmrBbvHD0JEpLy/toV24mUPQXkcKEsrP2CPsbMBEuvug9xWLv23V0nsM8kdoo+w WiNM0e8Bz8Vhbweqg+l3plE1Jsa2Bm2ria9NHeYlnAevYO58QE8mLuVCm0bs77KA8ZOq W+IkdzfVuDsf48UFKrOG1IaC5HM+92ztPIzww= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229731; x=1704834531; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LeATnxPiO37XaEtB4eQZXrEcgW0prfgDBCAc6VotlMc=; b=VUltyHi6++4jcV1cDATwW1t153o9EeVtOuQyGxe5Bp4BV38VdZZ2ZdciAYEdG0XdcP a1DUpT0WsA25BmSXh7/Xfu+DYqxdY7hHzD8FauBUgFtBCweR2yNUlKO1jAXiUNRFgXvo RyDWZdPbZBHr8/zX8KMrXFRJf5d1vNR0m29WPWHPrhp2WgIkStnMp1uJBIC2y3SwZZ+h CAq9S1jbWCpADlGlRR2uMNk/SinjO6atvbNSOTFCpbYDK0c8yzdGj3v8mxDpdTv8UDZ/ iXmYpb28/sNy0nEuNuNs5LzKoq3ByxaO+zRlATI5GUXSYheBreizhT4vl6reNhK93/4N Tt/Q== X-Gm-Message-State: AOJu0Yyf8nPqbXodLMnnENDNpmJ5nXbS1ppmHCiNcn0Bd48xBBJhaAM5 wt/BC0fkTLkYnwPabg1j/NGORo7MDpc0 X-Google-Smtp-Source: AGHT+IEq/nXkNhcxVKQTcs7pZQy/wi+fDhhMJ7dsO0o+UvKjnInsDMjSKm1DUuQtSSG5kZZEdWWxwA== X-Received: by 2002:a6b:f008:0:b0:7b7:4c36:f295 with SMTP id w8-20020a6bf008000000b007b74c36f295mr20729710ioc.40.1704229731497; Tue, 02 Jan 2024 13:08:51 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:51 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 09/24] arm64: dts: mediatek: mt8173: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:33 -0700 Message-ID: <20240102140734.v4.9.Ic09ebe116c18e83cc1161f4bb073fea8043f03f3@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer Reviewed-by: AngeloGioacchino Del Regno --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi index 8d614ac2c58ed..335aed42dc9e3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -1155,6 +1155,7 @@ cros_ec: ec@0 { spi-max-frequency = <12000000>; interrupts-extended = <&pio 0 IRQ_TYPE_LEVEL_LOW>; google,cros-ec-spi-msg-delay = <500>; + wakeup-source; i2c_tunnel: i2c-tunnel0 { compatible = "google,cros-ec-i2c-tunnel"; From patchwork Tue Jan 2 21:07:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759495 Received: from mail-io1-f46.google.com (mail-io1-f46.google.com [209.85.166.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25C7618040 for ; Tue, 2 Jan 2024 21:08:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="OUJsj7U4" Received: by mail-io1-f46.google.com with SMTP id ca18e2360f4ac-7b7fdde8b98so496498939f.1 for ; Tue, 02 Jan 2024 13:08:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229732; x=1704834532; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5bEDuGxV/dPJIqZg1w0wl3qVgLyOuLBrt1YTH4lJcK4=; b=OUJsj7U4B/Wkgmd/AEzsPthDKbgyGX+3iugDar/5gA7ccoYTJ6wxikYoAtPZTOREmK UJ2mnqV+1gAUnr0GnKfLOhhpqJ/7zGJiUupAXFKyjhdkm8b3y1gJCpMPYQiqaPPvfz6H patHhOOm4j4GiWVlxD8AODicg2PmeldUrdKfg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229732; x=1704834532; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5bEDuGxV/dPJIqZg1w0wl3qVgLyOuLBrt1YTH4lJcK4=; b=Pbm8VNbgjRjOAtyJlbVGVxEXtRqh96qPPt61SRyK+9sCy4jG+LRZLcHWy9IIXXTfgL zwZrM+ldGoWI+iNzp327s/HtsfVWWu0iCfN3R5MDcPe4PbJtIGlejeJeDUAYZQ4CWjFw 078kUAmiV6Ip3qA/4hIjQXEkzk8H02FwvQlVMqX6G4/WLIiO/uLvgsWG483xNdGu2+1v djk8jAMTA8rj3I8X0j+wDrOYOi98Ki3T2VAkP1s9+4aBA4AQmbSCouCk6KpA/Lc/e+0S BL66v345pbyss6HCnuex7e+AVIcAalLYMgyid1PEz8C8aQwzyGFKxGeIFES3XBu0tlTu XK2A== X-Gm-Message-State: AOJu0YzxdSpvq8MOzhQxQ8ZeCcA6JUwDSBjFndAULCc9n+aKLMyu8i+7 kSLjBaRRgLENT/iZ2F0SLFtBJMK4PB5B X-Google-Smtp-Source: AGHT+IEepz+cz572l3C4gGDpkRMfzMAxMxz3DhHQT6lcFpZI37i5Utc7APQrtUv4nIj51c+vjo/kRw== X-Received: by 2002:a05:6602:147:b0:7bb:cd42:ed8e with SMTP id v7-20020a056602014700b007bbcd42ed8emr301320iot.28.1704229732361; Tue, 02 Jan 2024 13:08:52 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:52 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 10/24] arm64: dts: mediatek: mt8183: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:34 -0700 Message-ID: <20240102140734.v4.10.Iba4a8b7e908989e57f7838a80013a4062be5e614@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index 5506de83f61d4..08261164ab18d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -924,6 +924,7 @@ cros_ec: cros-ec@0 { interrupts-extended = <&pio 151 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; pinctrl-0 = <&ec_ap_int_odl>; + wakeup-source; i2c_tunnel: i2c-tunnel { compatible = "google,cros-ec-i2c-tunnel"; From patchwork Tue Jan 2 21:07:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760050 Received: from mail-il1-f174.google.com (mail-il1-f174.google.com [209.85.166.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0116318026 for ; Tue, 2 Jan 2024 21:08:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="KkhdR48g" Received: by mail-il1-f174.google.com with SMTP id e9e14a558f8ab-35ffb15244dso61513375ab.1 for ; Tue, 02 Jan 2024 13:08:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229733; x=1704834533; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Kv/aa+b9yoEdKvBahkqrw433Fqiy1xO+ioSsYaTJvb4=; b=KkhdR48gDfOnK0JzFjr9dKqzquQEnAWkct5MJKxXTVUYMsVdlUwo5iSD+vN7NzaVQa jetjvii6Fno+XkzfzFS/H1THp689jd0nzmp9/pCLWh616Sa0EGBDt+JmupEyUi/76F/2 Re4a0iKMXdCcCSwVDy1s5HI2HojH4odrxmZGs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229733; x=1704834533; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Kv/aa+b9yoEdKvBahkqrw433Fqiy1xO+ioSsYaTJvb4=; b=DzUgd1czNCziWmzgw8lr6zsZYdqIqnvlL/uhjUoAUvwA/bUap9J9ElYA+nX8mJQbOO M3Bw5VY1vDvELUS1Ttp8zyxVt2R8qgC8NioQmAKdxCxjC+OMfGO9KCLVcKuy2bkeZRhy YojjlEEzNAoFuTkw4MzsI3lKSKn6d/qNC5BBPh7I2pJatV3i0lyysVTg68OP2YUHiWVK i8xVNS3WTkMDHPgpQ1kvCs/ra58CsCcJUeYNB+/s3Fl8EQlu0pT3hkPQcxjYpV8X5XkH I4PIYVw1VvM7iPg03/nsc3gLeA2NkX77L5ARO2cci1s+kXZjlwdGzChdMQGGEgIdmbAa IY4Q== X-Gm-Message-State: AOJu0YzCf9JYEkskPxTAigQZXZEsx07L51S4SPWr/5YCzInrFhimmXhk Sgzd5d0K6zXvgU8s0z/hecQQqSA/qdG+ X-Google-Smtp-Source: AGHT+IHHN3TbtDEmyfVNFzxMQSipzvaGMekbOIDXc3JT0zP9D5s4Ute8SBzjxYwpVjI4JooHeisxkw== X-Received: by 2002:a05:6e02:1a88:b0:35f:a4b2:7018 with SMTP id k8-20020a056e021a8800b0035fa4b27018mr27509779ilv.29.1704229733266; Tue, 02 Jan 2024 13:08:53 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:53 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 11/24] arm64: dts: mediatek: mt8192: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:35 -0700 Message-ID: <20240102140734.v4.11.Ibd330d26a00f5e219a7e448452769124833a9762@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index f2281250ac35d..ab44d382f757e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -1332,6 +1332,7 @@ cros_ec: ec@0 { spi-max-frequency = <3000000>; pinctrl-names = "default"; pinctrl-0 = <&cros_ec_int>; + wakeup-source; #address-cells = <1>; #size-cells = <0>; From patchwork Tue Jan 2 21:07:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760049 Received: from mail-io1-f43.google.com (mail-io1-f43.google.com [209.85.166.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A0BE18624 for ; Tue, 2 Jan 2024 21:08:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="JXIgDXon" Received: by mail-io1-f43.google.com with SMTP id ca18e2360f4ac-7b7f6caf047so466021539f.3 for ; Tue, 02 Jan 2024 13:08:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229734; x=1704834534; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n3q5bAzQikGEaFLCjfRt4Z8nKD+aA0c3SnrfHNcWXEY=; b=JXIgDXonyYNTm//xOUZbqvGEUrcO/uNkN4iZlt5SKgdAoy2vIhCqJ8k3ilv1Qyju9n sqEoOwLdDWLnZ5BHEI3SEUOUyYRBKWtMGCPbadhqosOiYy2D0oupIDf7vv0ygYDSO2F6 Z92VWWV+mmFZk/gLa7p6FtRIY8D2fo6aJ2Mm8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229734; x=1704834534; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n3q5bAzQikGEaFLCjfRt4Z8nKD+aA0c3SnrfHNcWXEY=; b=ST3SVzOyOZh8jKCxSWkLgKXIPDk2GY0jkiRr5K36Cid655JyEljrWyG8sDML1GmVGP +WHiSyVsch95eGTgBa+MXLd9nplHfwWLZGwzTqIQwyFxo+naicXW2Vi5JhLi4Ow3WgvM BLjT/NcN7uYavJTyJ4mxDxR1JHIV2vn2yobUkXNdwihxHKXeYOBF3AIzTi1nEpKhDxQI lrINRguT8xftuHlWUa7iqJg8ZpxFgu2lSCyQbyz4WC8B4O16lfz7y68cGjjWZMvipBDk bR74/hMU0wpdawlRm6dFOvyjeAyIeReknEixrUBRFWxbXhE+cgexBr/LIlDll7+ktGqB /2Ew== X-Gm-Message-State: AOJu0YxJhHyflTjRyiieTRZpBHefikRC/QxZPqA2PpfrD92sZbHppFnw xEkl3dhmHYaPXfR5tjHgBU1ipM1IBswz X-Google-Smtp-Source: AGHT+IFyaB/cl9XINtwxzc8FyOfrkFwShCGVt+Q6OLCTlAP9Elw0gWl88LBFhGGJGmWTzbBD05MnBA== X-Received: by 2002:a6b:5905:0:b0:7bb:bca0:7670 with SMTP id n5-20020a6b5905000000b007bbbca07670mr1472284iob.23.1704229734077; Tue, 02 Jan 2024 13:08:54 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:53 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 12/24] arm64: dts: mediatek: mt8195: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:36 -0700 Message-ID: <20240102140734.v4.12.Iee33a7f1f991408cef372744199026f936bf54e2@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index bbdcd441c049d..2edb270d0bc2f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -1149,6 +1149,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&cros_ec_int>; spi-max-frequency = <3000000>; + wakeup-source; keyboard-backlight { compatible = "google,cros-kbd-led-backlight"; From patchwork Tue Jan 2 21:07:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759494 Received: from mail-io1-f53.google.com (mail-io1-f53.google.com [209.85.166.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDFCD1864A for ; Tue, 2 Jan 2024 21:08:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="J/iviGxT" Received: by mail-io1-f53.google.com with SMTP id ca18e2360f4ac-7ba9f24acf8so453017839f.2 for ; Tue, 02 Jan 2024 13:08:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229735; x=1704834535; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6xWplU6V/74zhrE0fU+phMJuFQc01H2ditVc3hsW/nY=; b=J/iviGxTnseTosGYD18/rbF8CRnnRPLnuoyhM+uMxt2rHo8zsjpoIu858je2rx9fSw nNFtxc1LOzjg1Bb5JrY3peV4KD6mCmd/qEqnogrUal+3AjklC1X68C2uWM0UK6ZPDF1m MCEH3hKAIXs4HL84mb8+Hlm2oT8Lv2Jt3Vbtk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229735; x=1704834535; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6xWplU6V/74zhrE0fU+phMJuFQc01H2ditVc3hsW/nY=; b=AMyMyRDpord30LNtwd3kyJT7q1G/1PK8+WihodmvtheoX7LUW49G3+IHd408AJ+mS0 7NZW9poFO8LhAtiLP6fYmqPUfN6Wm1KdJSrICBG/vOJnG0l11L4xlP2ecaCObMQkDcP9 Rf5Q9vnYetP1agnjIRUWnqK0qLX+qpOLVRtT5GNLlwTiWGKQydNNhsn2jnme/woflnw7 5uMc4zuaRYfWjnZTWEpi9yYk4+B5ZHDlD5aTFww1XPXle7LSgtl+WfVYm6AxkJ3K1LIg adtFN6F9MiL8yLyhG9Kgv3Og+wySuR09qGTnt3tVO9UWOn2nE7rPSMsrIPYWDyTc2lIw ab5A== X-Gm-Message-State: AOJu0YyA2pzrju9prz6XE5UM1w+RSO+PL67rDC0yznaZO0dPv3sgOsaF D/VdNgDHqAv1HhwXDSoUAZYmNfigDuLo X-Google-Smtp-Source: AGHT+IHfOsWwH7XeGwxyO82lQ7Beiea2aMSZMszgEK2VhB9dcZJ2V4KeyfBreF3d8IlhWEEKQTrnQw== X-Received: by 2002:a05:6e02:1be1:b0:360:2197:4bbe with SMTP id y1-20020a056e021be100b0036021974bbemr15914894ilv.59.1704229735102; Tue, 02 Jan 2024 13:08:55 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:54 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Jonathan Hunter , Krzysztof Kozlowski , Rob Herring , Thierry Reding , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v4 13/24] arm64: dts: tegra: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:37 -0700 Message-ID: <20240102140734.v4.13.Ic12bf13efe60f9ffaa444126c55a35fbf6c521cc@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts index bbc2e9bef08da..14d58859bb55c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts @@ -762,6 +762,7 @@ ec: cros-ec@0 { interrupt-parent = <&gpio>; interrupts = ; reg = <0>; + wakeup-source; google,cros-ec-spi-msg-delay = <2000>; From patchwork Tue Jan 2 21:07:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760048 Received: from mail-io1-f48.google.com (mail-io1-f48.google.com [209.85.166.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D904E18AF0 for ; Tue, 2 Jan 2024 21:08:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="DqgZYr4s" Received: by mail-io1-f48.google.com with SMTP id ca18e2360f4ac-7ba9f24acf8so453019139f.2 for ; Tue, 02 Jan 2024 13:08:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229736; x=1704834536; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ASVoJVcd+TT62Fgbp6rK6yB+IeWHJc5zYIDcydTnCh8=; b=DqgZYr4s3hSliN6FFFZaaGj74rg0u+PKQ1gTCVl99wqo4J+y870TQTIqaDrLDd/TzA IybtfT638ChuMEOSvh8m1OL/HOeSwCZUVK0vYTxkluiEZDWtcCcavssrYXdS7znuMpop e48pWg80Kd4vg6POS7V8Vk2nIpVzTckgE1a+c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229736; x=1704834536; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ASVoJVcd+TT62Fgbp6rK6yB+IeWHJc5zYIDcydTnCh8=; b=Gbqbi+LdQ5iiVe/rTRMcxDlx/e7Reakcu1ilKsjTpT/7zEep3HL5rl2/VNniILJX0K Qwi4d1dW8vhJLAngCyE+4ld/T9ApDn0HnYkVeMz3og0DDPb+u3GfbOyeoyNq+buW6OxF 0QIgyeMQwcfXAHGnJkILLXGSu4/QZsvraYUJYOrn8WnOUXP+Fs6bGhXeVzXHtWzm+s1g 6PYczo8H+ut4l1VJfM+lBQ64Oi2HobxMzloPkGiBVogfBqoRrwR+kJEXto/9io8TGLgo An8Lh9X4zEmqTKSlLtF8iVvZmZEjP7JCu064ale+jj0b1kO3ZKtidhS7ob8h5w73n+BS 3Hww== X-Gm-Message-State: AOJu0YzE9hqCIj3zWym3vgSfaRHWaMXTGFwoBuRGGC3Sezt5wMqHeyn7 RsHzNZDP6RySVNNDyLCDSVkTqPHhcNgG X-Google-Smtp-Source: AGHT+IFfB2E9EzwO+I1teXfZzVOtZVKaH/8eX07388HbCZbdRd+yWGht2HftqPyzTSf0/1SlFl/Oyg== X-Received: by 2002:a5d:9358:0:b0:7ba:e1c5:7b47 with SMTP id i24-20020a5d9358000000b007bae1c57b47mr15402309ioo.33.1704229736202; Tue, 02 Jan 2024 13:08:56 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:55 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Douglas Anderson , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Rob Herring , cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v4 14/24] arm64: dts: qcom: sc7180: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:38 -0700 Message-ID: <20240102140734.v4.14.I2ee94aede9e25932f656c2bdb832be3199fa1291@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Reviewed-by: Douglas Anderson Signed-off-by: Mark Hasemeyer --- Changes in v4: -Add Douglas's Reviewed-by tag from v2 review Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 46aaeba286047..f3a6da8b28901 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -649,6 +649,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; + wakeup-source; cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; From patchwork Tue Jan 2 21:07:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759493 Received: from mail-io1-f42.google.com (mail-io1-f42.google.com [209.85.166.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E247018C01 for ; Tue, 2 Jan 2024 21:08:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="G/dP0i3f" Received: by mail-io1-f42.google.com with SMTP id ca18e2360f4ac-7b7d65d4eecso508549439f.0 for ; Tue, 02 Jan 2024 13:08:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229737; x=1704834537; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=17sTLQMT2wthv6A1NoR1+c8v3q9aB7n6ZqwH4HJJEV0=; b=G/dP0i3fJD0GauZiZhHTIMDLCqWdj0PmuwNf+pRtfpGVkOOxze1QGiQHgR8CJXkzQ0 M1eOOs20S4ff2isiJd9MsA1GwnWU0ZaMmDK6mVPekj7tWiRLCYxMiGDsFQg1tacsJCqK 7IJ10o14ZlZJ7KSVfc6p/qi8iz7hntt+wkNKM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229737; x=1704834537; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=17sTLQMT2wthv6A1NoR1+c8v3q9aB7n6ZqwH4HJJEV0=; b=SjRHz55J0c3pUxgC5Y59/W4tQE5/tPlvRGECuavNpzvpQqkcqdxuNHfQONWlR4GqMv hxqeU315xiTvx6ShJmZnbDxGe1mrNKKyTtyuaec1LANRCG4ItDYIviy1VbYzvT9BhDaB CUPTzBIcuNCPH8bwswavyFoJpUy6Zu20phmumaFL8wCpmfllbftTT4E4Fcx/9b0SCW4Y JKK21cD9JBTqWLDGORRCCRy++yAPSn1EoX5RMWItUnl8Wnpf2kFhUp7AhPcQ/PWOfs6F t/bt1cRmCzIKlzCoESjqasCywN1a495psSnRmrHmiyy5hORKWGI/WEdJbP2ul/RN8Jhc JMTw== X-Gm-Message-State: AOJu0YySi2XgV/s07MONaQlF8S9JHcDHIoCgtUvkkTMfYmkXx3qJrZVC Tc3B9+ZOjk3Wk2tXIFbahrw4fKPCHhus X-Google-Smtp-Source: AGHT+IG15JicEnj5m9+AYHheVx6jq8nHGYdtkF3GHDFBR8wkn+8r3oGMHOzGhdudxknyHLeWlKuuSA== X-Received: by 2002:a05:6602:19cf:b0:7ba:8706:3413 with SMTP id ba15-20020a05660219cf00b007ba87063413mr23570133iob.41.1704229737084; Tue, 02 Jan 2024 13:08:57 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:56 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Douglas Anderson , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Rob Herring , cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v4 15/24] arm64: dts: qcom: sc7280: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:39 -0700 Message-ID: <20240102140734.v4.15.I7ea3f53272c9b7cd77633adfd18058ba443eed96@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Reviewed-by: Douglas Anderson Signed-off-by: Mark Hasemeyer --- Changes in v4: -Add Douglas's Reviewed-by tag from v2 review Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 1 + arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index 9ea6636125ad9..2ba4ea60cb147 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -548,6 +548,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; + wakeup-source; cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi index ebae545c587c4..fbfac7534d3c6 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi @@ -19,6 +19,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; + wakeup-source; cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; From patchwork Tue Jan 2 21:07:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760047 Received: from mail-io1-f46.google.com (mail-io1-f46.google.com [209.85.166.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ABDF118C32 for ; Tue, 2 Jan 2024 21:08:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="gPGOZCPV" Received: by mail-io1-f46.google.com with SMTP id ca18e2360f4ac-7ba834684abso506386239f.2 for ; Tue, 02 Jan 2024 13:08:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229738; x=1704834538; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YBXG8fkqI4E9TDywbJQDVQlGARTRe1Vl9dne1ILm/18=; b=gPGOZCPVl2IIrjDodIynds27pMs1g9tjyI6RUW8c4K5irQ1QWFY02ZdmSp9dw1xXuD lVXArgUDrQ1w0wwrIRF2JSKyrb2MoJmnK0jQdeXA9XfriG2gO5eaIKLgFI/l0UfGKoUS ImvMVxBWqgtbgpsE3ief97V6bU0JucG9PvaZY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229738; x=1704834538; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YBXG8fkqI4E9TDywbJQDVQlGARTRe1Vl9dne1ILm/18=; b=fqzkC4vzgYNyeG3Cjpgqyn5oYvErHclWa3cA51Zlosd7uaqxE7UDwwpVtnAg7DU7b8 P00WzG2UpIMa0panlH+yeT7The+b7AxBzzk28mQRGKrMgG5iYtPAM7URaMPqF3A1Xjnc zqud62sauTxWDKfuvTJjtw6nOQ1ORz6GuV4tu/uXNPDQcj9AI2AZLgUxLJSQGLDl8r4O LTYsDrDWvb0n3jGHyRx7fZiWPu4ZOUhwPgzznxt8/4XzciLYEiXKCnsMdnadupJU5+D5 zdn3ZAzFP+wuFqIFMRDvqCZL+fheKYF6AHuWAvE8JJna5uUDoNtmBvrmPamkVXQLUO6Q 5WmA== X-Gm-Message-State: AOJu0YxHZ0g1rEz9QlwivAYie52PYBU7VoM99aN0Jtx9RqjXz5Tf+6S/ 7cyqBKC1SYCrAl5KRVpOq8s6fI6JGh3y X-Google-Smtp-Source: AGHT+IFDiPa9pElKMxmX/lH+gQE+ZfY9viPPALh0NbNdlcQ8hMR9S/3o4NKAXs823EmCxtbJutVSRw== X-Received: by 2002:a5d:974b:0:b0:7b7:4b32:7986 with SMTP id c11-20020a5d974b000000b007b74b327986mr22772171ioo.27.1704229738043; Tue, 02 Jan 2024 13:08:58 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:57 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Douglas Anderson , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Rob Herring , cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v4 16/24] arm64: dts: qcom: sdm845: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:40 -0700 Message-ID: <20240102140734.v4.16.I870e2c3490e7fc27a8f6bc41dba23b3dfacd2d13@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Reviewed-by: Douglas Anderson Signed-off-by: Mark Hasemeyer --- Changes in v4: -Add Douglas's Reviewed-by tag from v2 review Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi index 0ab5e8f53ac9f..e8276db9eabb2 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi @@ -852,6 +852,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ec_ap_int_l>; spi-max-frequency = <3000000>; + wakeup-source; cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; From patchwork Tue Jan 2 21:07:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759492 Received: from mail-io1-f44.google.com (mail-io1-f44.google.com [209.85.166.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 989CD18E1B for ; Tue, 2 Jan 2024 21:08:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="FRVfJom6" Received: by mail-io1-f44.google.com with SMTP id ca18e2360f4ac-7ba9c26e14aso223807739f.0 for ; Tue, 02 Jan 2024 13:08:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229739; x=1704834539; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HRoMMnuwwy1ybNYQkYoJT5CIAhjtnaw7FKUhRhlzX2I=; b=FRVfJom6hMAFayRvvyslNUklQnuLd0ysUghLiqfhR6iLGS1kGoXbYm6H9qGTU8wu6P XfpobjuNTGE9PZlaiRo72OJoWH8vPqtqoTDC69Ld3yX3qpIlH2h/CZ2SfvcrfIrrQ08E L/fRdPj+tw6Xlqa4PVQvC5kDXGmfh66BqgmGk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229739; x=1704834539; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HRoMMnuwwy1ybNYQkYoJT5CIAhjtnaw7FKUhRhlzX2I=; b=XeCSKCqk6TdEPxT8dCXZlDj+OShiigCyryoLBUmMrTyNQ3RYpfpQKqV9PvzSK/0+BO ygKGja4qrcibj1a/ZfmZc/YDhOgJoaG3SKzW7tBD5U75CGOfIotlHlJvjBD22pGlmu0H T+VLPRfJeh2JiPOPe2N+5GphPG8AYh5GZnBi2bOY0o6DweJn1YdTGgCsdeEbq2ewFOMk olraO9YVV3s+YJK6nBqIg2LR9BCfOVUlKu90tGwcb2JjOxr6vAT/EKCKkh7uTNmNuSos XDnsOjsDBJBC4Kmgz6kiIdvi8RxxvFldTcZUIjTla7yRLyc7/rEj8PNQsKn1UMbOEtsi nmig== X-Gm-Message-State: AOJu0YyRRpJJqnPPrhggJMWHa2MBV9otUAveaEo7H/edixNz1UO0aSr8 FR8uJvsL5+cvMzNLVsu7zrlQcD6QHSxE X-Google-Smtp-Source: AGHT+IFgjON8QaOIIt26i2gGQ8LaLRzi4hK2OMzadsvli0BLJTN6UjupAQhSNUzvjDASC8Dg4A9IRQ== X-Received: by 2002:a5d:83c2:0:b0:7bb:b722:63c1 with SMTP id u2-20020a5d83c2000000b007bbb72263c1mr34165ior.16.1704229738882; Tue, 02 Jan 2024 13:08:58 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:58 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v4 17/24] arm64: dts: rockchip: rk3399: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:41 -0700 Message-ID: <20240102140734.v4.17.Ice617703aded22ad4c806459129e1ae693eb57af@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi index 789fd0dcc88ba..b5734e056aef1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi @@ -603,6 +603,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ec_ap_int_l>; spi-max-frequency = <3000000>; + wakeup-source; i2c_tunnel: i2c-tunnel { compatible = "google,cros-ec-i2c-tunnel"; From patchwork Tue Jan 2 21:07:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760046 Received: from mail-io1-f48.google.com (mail-io1-f48.google.com [209.85.166.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DE6318EAC for ; Tue, 2 Jan 2024 21:09:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="BuKTDh26" Received: by mail-io1-f48.google.com with SMTP id ca18e2360f4ac-7ba84a3cc96so505853939f.3 for ; Tue, 02 Jan 2024 13:09:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229740; x=1704834540; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ukfFPOjxIuuxKMITUORsVWUdW86ng+CgXwCq16suFWg=; b=BuKTDh26A6XoTsL9jU4OHGP74zfboMwfa682+h1xxyYoT9Wy7X034wmDLOa2XtgGHj JNnJTueHayzv1E/RFzT1boN8Y1067xCddRoyDnwSi86lGooWovPJ5qzmDFOKvWp7DZNC KTbZD5Zoa8/3Fc58AX59iHYNm4dEDn288uGp0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229740; x=1704834540; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ukfFPOjxIuuxKMITUORsVWUdW86ng+CgXwCq16suFWg=; b=SbaxELSy1i9fAqlgYy7NYvQ+CmE1wF7nRsrzJjEs0tOM/Qwh893yHOzcKP+RMc3Ipg U8uWzM6uVWSGBAqtbZEYTlAJwGevUcX3GxN62q5R4T9kqD/9KVHUOiYZ52nO0EFVLbNW 6zRRDpQaW1buScDxQuilAOFrOUTKqlzpLzsUSeOINgRIQCvQ67IGg3/+7DCDiFu+y4IT GCj3q6EdGupuRLELzOsnprfQN9zJ0YCJTKWN4jbyOqPCFLcFPBs+2Wzt+lrf3C0+8RFS esfv4Es2B0cLwskKAdpcsSb+MPUJXs5SDq1a8oW7jIU7UqDPE9i51S2KcR+nR4m1cwr+ 7pRw== X-Gm-Message-State: AOJu0YxMmysFX72P6Cn9CsXNu3oAeLAjMXVWLDX72DNakqzxpz2dtx+1 kHCRSoeZ1B3zGm/WtZRCK/Q82P60b+Mz X-Google-Smtp-Source: AGHT+IHQLlMXlASfyYWPPcAmTYaHNcLGLWehburZ9CX9ch22O4LYpZP838Qcp2DVG1hld682ssfAhg== X-Received: by 2002:a5d:9a17:0:b0:7bb:41bd:715f with SMTP id s23-20020a5d9a17000000b007bb41bd715fmr12202311iol.39.1704229739844; Tue, 02 Jan 2024 13:08:59 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:59 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Frank Rowand , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 18/24] of: irq: add wake capable bit to of_irq_resource() Date: Tue, 2 Jan 2024 14:07:42 -0700 Message-ID: <20240102140734.v4.18.I29b26a7f3b80fac0a618707446a10b6cc974fdaf@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add wake capability information to the IRQ resource. Wake capability is assumed based on conventions provided in the devicetree wakeup-source binding documentation. An interrupt is considered wake capable if the following are true: 1. A wakeup-source property exits in the same device node as the interrupt. 2. The IRQ is marked as dedicated by setting its interrupt-name to "wakeup". The wakeup-source documentation states that dedicated interrupts can use device specific interrupt names and device drivers are still welcome to use their own naming schemes. This API is provided as a helper if one is willing to conform to the above conventions. The ACPI subsystems already provides similar APIs that allow one to query the wake capability of an IRQ. This brings closer feature parity to the devicetree. Reviewed-by: Rob Herring Signed-off-by: Mark Hasemeyer --- Changes in v4: -Add Rob's Reviewed-by tag from v2 -Ignored Andy's Reviewed-by tag per his request: https://lore.kernel.org/all/ZYxgQn8L7ENkc0AJ@smile.fi.intel.com/ Changes in v3: -Use DEFINE_RES_IRQ_NAMED_FLAGS macro Changes in v2: -Update logic to return true only if wakeup-source property and "wakeup" interrupt-name are defined -irq->IRQ, api->API drivers/of/irq.c | 39 +++++++++++++++++++++++++++++++++++---- 1 file changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 174900072c18c..cdecdc3515f88 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -383,11 +383,39 @@ int of_irq_parse_one(struct device_node *device, int index, struct of_phandle_ar } EXPORT_SYMBOL_GPL(of_irq_parse_one); +/** + * __of_irq_wake_capable - Determine whether a given IRQ index is wake capable + * + * The IRQ is considered wake capable if the following are true: + * 1. wakeup-source property exists + * 2. provided IRQ index is labelled as a dedicated wakeirq + * + * This logic assumes the provided IRQ index is valid. + * + * @dev: pointer to device tree node + * @index: zero-based index of the IRQ + * Return: True if provided IRQ index for #dev is wake capable. False otherwise. + */ +static bool __of_irq_wake_capable(const struct device_node *dev, int index) +{ + int wakeindex; + + if (!of_property_read_bool(dev, "wakeup-source")) + return false; + + wakeindex = of_property_match_string(dev, "interrupt-names", "wakeup"); + return wakeindex >= 0 && wakeindex == index; +} + /** * of_irq_to_resource - Decode a node's IRQ and return it as a resource * @dev: pointer to device tree node - * @index: zero-based index of the irq + * @index: zero-based index of the IRQ * @r: pointer to resource structure to return result into. + * + * Return: Linux IRQ number on success, or 0 on the IRQ mapping failure, or + * -EPROBE_DEFER if the IRQ domain is not yet created, or error code in case + * of any other failure. */ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) { @@ -399,6 +427,7 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) /* Only dereference the resource if both the * resource and the irq are valid. */ if (r && irq) { + u32 irq_flags; const char *name = NULL; memset(r, 0, sizeof(*r)); @@ -409,9 +438,11 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) of_property_read_string_index(dev, "interrupt-names", index, &name); - r->start = r->end = irq; - r->flags = IORESOURCE_IRQ | irqd_get_trigger_type(irq_get_irq_data(irq)); - r->name = name ? name : of_node_full_name(dev); + irq_flags = irqd_get_trigger_type(irq_get_irq_data(irq)); + if (__of_irq_wake_capable(dev, index)) + irq_flags |= IORESOURCE_IRQ_WAKECAPABLE; + + *r = DEFINE_RES_IRQ_NAMED_FLAGS(irq, name ?: of_node_full_name(dev), irq_flags); } return irq; From patchwork Tue Jan 2 21:07:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759491 Received: from mail-io1-f53.google.com (mail-io1-f53.google.com [209.85.166.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 51FD018EC5 for ; Tue, 2 Jan 2024 21:09:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="Jd+OrY9Y" Received: by mail-io1-f53.google.com with SMTP id ca18e2360f4ac-7bb982d0f12so46516539f.0 for ; Tue, 02 Jan 2024 13:09:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229740; x=1704834540; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mrqyCRQGWqtYZon/B8x6Cl4Beyi5N2srdFtijVb67bM=; b=Jd+OrY9YWz3i/Dgd40CfK61o+Ojf3v5aYpvPs2XixprcNnM76DiksrFsbbvnYCw1F/ NsxXHGO/4IdweWWLAfvIFHf3LCILdaCKVxlgufoMIRO5YwRMy8+w1Zs+GD/2UzJNi/6Q 4C4KqXzv4tj0m1mlNjS+7c7LM29ibY27GoC8Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229740; x=1704834540; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mrqyCRQGWqtYZon/B8x6Cl4Beyi5N2srdFtijVb67bM=; b=e4VdrXgqtFVBQyswtxw5OuskrvriQg84JRLi5+ifCX7oB8JIlk9u223bXrFnDRf7+b 1KoZnIWh4h9uUf7JSviTBSHbBsHkyvKnWn1qDZp8JBE6cLxEM2Nzd+sz7XWVJ9FtSMrR IpZgCsxYVVqQ3Ka6mhKUQpUF5w1t6ih9F9GzPdfJUCmRkkSpQ7NNlsSynoMiqqO/h5SF b6Zsd1pQhMNDg2kQt6t3t2jsyH3+stPkIIbeNDwYXQiHMFcZ8wxBOLXFpqiXEAxKOez/ Nw26rbU3i9c2aH/sUlvlKt0ywOl+kCxac1/eSc1g97EW1qD3GKNOeMQAfx+KlRK1Jrlk aDmA== X-Gm-Message-State: AOJu0Yztsc4ZEyhMs9AOWwEByokR7VIVBGKxP1yMnnNKPM68fXE3eFE0 5JBuSFvImmME82vDM/tD3on5NzzXaZMP X-Google-Smtp-Source: AGHT+IFQzUcaDIy67wDz2ySoGOwpwi0H1El9nejGF4EWnyK78NzOzFm7YOjrdDK8vQhhffUOy1ZGCw== X-Received: by 2002:a05:6e02:1a0e:b0:35d:59b3:2f7d with SMTP id s14-20020a056e021a0e00b0035d59b32f7dmr40919ild.18.1704229740602; Tue, 02 Jan 2024 13:09:00 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.09.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:09:00 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Frank Rowand , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 19/24] of: irq: Add default implementation for of_irq_to_resource() Date: Tue, 2 Jan 2024 14:07:43 -0700 Message-ID: <20240102140734.v4.19.I31d4dd6a7e5a3e5eee05c87b358e63cd1aa0e467@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Similar to of_irq_to_resource_table(), add a default implementation of of_irq_to_resource() for systems that don't have CONFIG_OF_IRQ defined. Acked-by: Rob Herring Signed-off-by: Mark Hasemeyer --- Changes in v4: -Add Rob's Ack tag from v2 include/linux/of_irq.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index d6d3eae2f1452..0d73b2ca92d31 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -34,8 +34,6 @@ static inline int of_irq_parse_oldworld(const struct device_node *device, int in extern int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *out_irq); extern unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data); -extern int of_irq_to_resource(struct device_node *dev, int index, - struct resource *r); #ifdef CONFIG_OF_IRQ extern void of_irq_init(const struct of_device_id *matches); @@ -44,6 +42,7 @@ extern int of_irq_parse_one(struct device_node *device, int index, extern int of_irq_count(struct device_node *dev); extern int of_irq_get(struct device_node *dev, int index); extern int of_irq_get_byname(struct device_node *dev, const char *name); +extern int of_irq_to_resource(struct device_node *dev, int index, struct resource *r); extern int of_irq_to_resource_table(struct device_node *dev, struct resource *res, int nr_irqs); extern struct device_node *of_irq_find_parent(struct device_node *child); @@ -76,6 +75,11 @@ static inline int of_irq_get_byname(struct device_node *dev, const char *name) { return 0; } +static inline int of_irq_to_resource(struct device_node *dev, int index, + struct resource *r) +{ + return 0; +} static inline int of_irq_to_resource_table(struct device_node *dev, struct resource *res, int nr_irqs) { From patchwork Tue Jan 2 21:07:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 760045 Received: from mail-io1-f42.google.com (mail-io1-f42.google.com [209.85.166.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1359C19441 for ; Tue, 2 Jan 2024 21:09:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="PcMWXXwG" Received: by mail-io1-f42.google.com with SMTP id ca18e2360f4ac-7baa8da5692so421996539f.0 for ; Tue, 02 Jan 2024 13:09:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229741; x=1704834541; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yuhkCzL2l+Es2a6yZtXMYTtf834z1coLX69xx0eVIxw=; b=PcMWXXwGKxi3lOnc4PVx41Mbqm//fWa3Q8P5FK/aWfOfM4ABtshA+gXmY6cY5tkNqe A8sIKKRrVMk2Wgz+YPZcl7R+2GAF0KdMU6rHV5xr1AJt55NCYK65MqZ7LBZzmpSh0iC2 qwsim/jG2f+82HVKObdmWlOw9oG0hMp41Y5Cg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229741; x=1704834541; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yuhkCzL2l+Es2a6yZtXMYTtf834z1coLX69xx0eVIxw=; b=BuWxZLptq/rzFh54atElOPCnbb2gaRJW9wzO3xUQmlQxFwGOdwMcvCpwUAoCMK5GJL dtGBfDOzQ9DarBCi4a8riOwa8ORvm9DQmXB3hega7bP32lMceOWMEKDpnwomPMLOgwDF 2Ju0Q0ak6jRefQsE0IeQpnwfA6cp/txbtQDDtqjrewMJBiLVluWDsx9TLRtxF7dN/VR5 sr/eMHSM3h6gVnZubqwvpoc7NrymQgu3N6KRxijg0IJqCN8BTParHKVbTABE2idQK5sb YJzuW0IKkk0iIN+mgp0UMLyr6eOj61NN6ueUNxtEaLnWL8AFgtp+SxIxPbFSmHKqVEwZ X14A== X-Gm-Message-State: AOJu0YzA++Jwz/7enlxnu9oksBsJEsmQs3ivaDn3ubgGrv+nAoBK6TCG JudWI3zuR5rfOQ3hl+cd3Pz5JPHbeCCD X-Google-Smtp-Source: AGHT+IFp2QttZwtW1kCru0qHHoHoT70NG6O1ERnMyBH3znA+Ew+qlRfeZfzdwG/Vk/iKKPZKXXki8w== X-Received: by 2002:a05:6602:1492:b0:7b7:be85:23c with SMTP id a18-20020a056602149200b007b7be85023cmr25585003iow.30.1704229741350; Tue, 02 Jan 2024 13:09:01 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.09.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:09:01 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Frank Rowand , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 20/24] of: irq: Remove extern from function declarations Date: Tue, 2 Jan 2024 14:07:44 -0700 Message-ID: <20240102140734.v4.20.I319e781c11e6352eb5b6c408dc20bd54a720edbf@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The extern keyword is implicit for function declarations. Remove it where possible and adjust the line wrapping accordingly. Acked-by: Rob Herring Signed-off-by: Mark Hasemeyer --- Changes in v4: -Add Rob's Ack tag from v2 Changes in v2: -New patch include/linux/of_irq.h | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index 0d73b2ca92d31..a130dcbc4bb45 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -32,27 +32,26 @@ static inline int of_irq_parse_oldworld(const struct device_node *device, int in } #endif /* CONFIG_PPC32 && CONFIG_PPC_PMAC */ -extern int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *out_irq); -extern unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data); +int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *out_irq); +unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data); #ifdef CONFIG_OF_IRQ -extern void of_irq_init(const struct of_device_id *matches); -extern int of_irq_parse_one(struct device_node *device, int index, - struct of_phandle_args *out_irq); -extern int of_irq_count(struct device_node *dev); -extern int of_irq_get(struct device_node *dev, int index); -extern int of_irq_get_byname(struct device_node *dev, const char *name); -extern int of_irq_to_resource(struct device_node *dev, int index, struct resource *r); -extern int of_irq_to_resource_table(struct device_node *dev, - struct resource *res, int nr_irqs); -extern struct device_node *of_irq_find_parent(struct device_node *child); -extern struct irq_domain *of_msi_get_domain(struct device *dev, +void of_irq_init(const struct of_device_id *matches); +int of_irq_parse_one(struct device_node *device, int index, + struct of_phandle_args *out_irq); +int of_irq_count(struct device_node *dev); +int of_irq_get(struct device_node *dev, int index); +int of_irq_get_byname(struct device_node *dev, const char *name); +int of_irq_to_resource(struct device_node *dev, int index, struct resource *r); +int of_irq_to_resource_table(struct device_node *dev, struct resource *res, + int nr_irqs); +struct device_node *of_irq_find_parent(struct device_node *child); +struct irq_domain *of_msi_get_domain(struct device *dev, struct device_node *np, enum irq_domain_bus_token token); -extern struct irq_domain *of_msi_map_get_device_domain(struct device *dev, - u32 id, - u32 bus_token); -extern void of_msi_configure(struct device *dev, struct device_node *np); +struct irq_domain *of_msi_map_get_device_domain(struct device *dev, u32 id, + u32 bus_token); +void of_msi_configure(struct device *dev, struct device_node *np); u32 of_msi_map_id(struct device *dev, struct device_node *msi_np, u32 id_in); #else static inline void of_irq_init(const struct of_device_id *matches) @@ -117,7 +116,7 @@ static inline u32 of_msi_map_id(struct device *dev, * implements it differently. However, the prototype is the same for all, * so declare it here regardless of the CONFIG_OF_IRQ setting. */ -extern unsigned int irq_of_parse_and_map(struct device_node *node, int index); +unsigned int irq_of_parse_and_map(struct device_node *node, int index); #else /* !CONFIG_OF && !CONFIG_SPARC */ static inline unsigned int irq_of_parse_and_map(struct device_node *dev, From patchwork Tue Jan 2 21:07:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 759490 Received: from mail-io1-f51.google.com (mail-io1-f51.google.com [209.85.166.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 258091946C for ; Tue, 2 Jan 2024 21:09:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="VTa2leDx" Received: by mail-io1-f51.google.com with SMTP id ca18e2360f4ac-7b7fbe3db16so507821339f.3 for ; Tue, 02 Jan 2024 13:09:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229742; x=1704834542; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/6j1jotrF6PIPGIyj1YNZnkSmwkK1WAFrbZbjbyI7go=; b=VTa2leDxBK9KlSyJAN+wQVXeA1P9mITLlz8byiLbkbleOsU2gLTU7X0nQz3gcCCSE0 wj/aQkuDG9REKxEHVAzkvWZ/OldAVYC4tkeCsOvgyWxv2QPLLgy8aelwkID87NWiFtzW +YHSpuj+3e2XnAHEZjOe4kTixkYZQnfUHEn40= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229742; x=1704834542; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/6j1jotrF6PIPGIyj1YNZnkSmwkK1WAFrbZbjbyI7go=; b=rFzK70U0+dHXE4Mfz13Y0uqLpJNP96a1gBGClHTMuDkiB/hx9C9CD1wIOXcvZM8a6K vPzFJivk+djISEVueiYAKY21HSnhLk91y8mTDqS5rjoy1MWTlx6w3ZeQUc0pa25DXAyl aael3HNL9jM5H5XeyxxTVhPdVfhJOhf/v5H/vAczbGJST+Mx81Obe8HYl+v/tRyNpdun mp4TBH0oU3wrmuRJ6U0TE7dRwLjVXGQedPt08ebXyllyi2MRc/sVaHc5XVhn6QgwFqXz COAQlm0AAbXDq/r13crNiv23Q9dDqcQrykuGmqV1s6eXT7FhQVrbhbhJzHIcTrVdLwMV l8yA== X-Gm-Message-State: AOJu0YxSKpfNZYKCF4GdPN5im3RK2dwtPGTS35B0Y+szeOS5N0MC8J0D d+Bs2iwJxosPREONFazIzXl5TxfKZn/R X-Google-Smtp-Source: AGHT+IEnk7hkWBTpiE59//TC3J8Hc2YJfZJNZSBWZ/zM4jqFy4w9a/MURJc4iEaZLOWtCJ4vPXcb4Q== X-Received: by 2002:a05:6602:19cf:b0:7ba:8706:3413 with SMTP id ba15-20020a05660219cf00b007ba87063413mr23570270iob.41.1704229742417; Tue, 02 Jan 2024 13:09:02 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.09.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:09:02 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Andy Shevchenko , Sakari Ailus , Daniel Scally , Frank Rowand , Greg Kroah-Hartman , Heikki Krogerus , Len Brown , "Rafael J. Wysocki" , Rob Herring , devicetree@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v4 21/24] device property: Modify fwnode irq_get() to use resource Date: Tue, 2 Jan 2024 14:07:45 -0700 Message-ID: <20240102140734.v4.21.I38ac58ab04985a404ed6551eb5813fa7841ef410@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The underlying ACPI and OF subsystems provide their own APIs which provide IRQ information as a struct resource. This allows callers to get more information about the IRQ by looking at the resource flags. For example, whether or not an IRQ is wake capable. Suggested-by: Andy Shevchenko Reviewed-by: Sakari Ailus Signed-off-by: Mark Hasemeyer Reviewed-by: Andy Shevchenko Reviewed-by: Rob Herring --- Changes in v4: -Add Sakari's Reviewed-by tag from v2 -Remove ioport.h dependency in fwnode.h -Use Andy's @linux.intel.com email Changes in v3: -Add Suggested-by tag -Initialize struct resource to 0 on stack -EXPORT_SYMBOL()->EXPORT_SYMBOL_GPL() -Remove extra space in commit message -Reformat fwnode_irq_get_resource() declaration Changes in v2: -New patch drivers/acpi/property.c | 11 +++++------ drivers/base/property.c | 32 +++++++++++++++++++++++++------- drivers/of/property.c | 8 ++++---- include/linux/fwnode.h | 8 +++++--- include/linux/property.h | 2 ++ 5 files changed, 41 insertions(+), 20 deletions(-) diff --git a/drivers/acpi/property.c b/drivers/acpi/property.c index a6ead5204046b..891fff5a16797 100644 --- a/drivers/acpi/property.c +++ b/drivers/acpi/property.c @@ -1627,17 +1627,16 @@ static int acpi_fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode, return 0; } -static int acpi_fwnode_irq_get(const struct fwnode_handle *fwnode, - unsigned int index) +static int acpi_fwnode_irq_get_resource(const struct fwnode_handle *fwnode, unsigned int index, + struct resource *r) { - struct resource res; int ret; - ret = acpi_irq_get(ACPI_HANDLE_FWNODE(fwnode), index, &res); + ret = acpi_irq_get(ACPI_HANDLE_FWNODE(fwnode), index, r); if (ret) return ret; - return res.start; + return r->start; } #define DECLARE_ACPI_FWNODE_OPS(ops) \ @@ -1664,7 +1663,7 @@ static int acpi_fwnode_irq_get(const struct fwnode_handle *fwnode, acpi_graph_get_remote_endpoint, \ .graph_get_port_parent = acpi_fwnode_get_parent, \ .graph_parse_endpoint = acpi_fwnode_graph_parse_endpoint, \ - .irq_get = acpi_fwnode_irq_get, \ + .irq_get_resource = acpi_fwnode_irq_get_resource, \ }; \ EXPORT_SYMBOL_GPL(ops) diff --git a/drivers/base/property.c b/drivers/base/property.c index a1b01ab420528..441899171d19d 100644 --- a/drivers/base/property.c +++ b/drivers/base/property.c @@ -1046,6 +1046,29 @@ void __iomem *fwnode_iomap(struct fwnode_handle *fwnode, int index) } EXPORT_SYMBOL(fwnode_iomap); +/** + * fwnode_irq_get_resource - Get IRQ directly from a fwnode and populate + * the resource struct + * @fwnode: Pointer to the firmware node + * @index: Zero-based index of the IRQ + * @r: Pointer to resource to populate with IRQ information. + * + * Return: Linux IRQ number on success. Negative errno on failure. + */ +int fwnode_irq_get_resource(const struct fwnode_handle *fwnode, unsigned int index, + struct resource *r) +{ + int ret; + + ret = fwnode_call_int_op(fwnode, irq_get_resource, index, r); + /* We treat mapping errors as invalid case */ + if (ret == 0) + return -EINVAL; + + return ret; +} +EXPORT_SYMBOL_GPL(fwnode_irq_get_resource); + /** * fwnode_irq_get - Get IRQ directly from a fwnode * @fwnode: Pointer to the firmware node @@ -1055,14 +1078,9 @@ EXPORT_SYMBOL(fwnode_iomap); */ int fwnode_irq_get(const struct fwnode_handle *fwnode, unsigned int index) { - int ret; + struct resource r = {}; - ret = fwnode_call_int_op(fwnode, irq_get, index); - /* We treat mapping errors as invalid case */ - if (ret == 0) - return -EINVAL; - - return ret; + return fwnode_irq_get_resource(fwnode, index, &r); } EXPORT_SYMBOL(fwnode_irq_get); diff --git a/drivers/of/property.c b/drivers/of/property.c index afdaefbd03f61..864ea5fa5702b 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -1425,10 +1425,10 @@ static void __iomem *of_fwnode_iomap(struct fwnode_handle *fwnode, int index) #endif } -static int of_fwnode_irq_get(const struct fwnode_handle *fwnode, - unsigned int index) +static int of_fwnode_irq_get_resource(const struct fwnode_handle *fwnode, + unsigned int index, struct resource *r) { - return of_irq_get(to_of_node(fwnode), index); + return of_irq_to_resource(to_of_node(fwnode), index, r); } static int of_fwnode_add_links(struct fwnode_handle *fwnode) @@ -1469,7 +1469,7 @@ const struct fwnode_operations of_fwnode_ops = { .graph_get_port_parent = of_fwnode_graph_get_port_parent, .graph_parse_endpoint = of_fwnode_graph_parse_endpoint, .iomap = of_fwnode_iomap, - .irq_get = of_fwnode_irq_get, + .irq_get_resource = of_fwnode_irq_get_resource, .add_links = of_fwnode_add_links, }; EXPORT_SYMBOL_GPL(of_fwnode_ops); diff --git a/include/linux/fwnode.h b/include/linux/fwnode.h index 2a72f55d26eb8..b82c9c072bcc9 100644 --- a/include/linux/fwnode.h +++ b/include/linux/fwnode.h @@ -9,12 +9,13 @@ #ifndef _LINUX_FWNODE_H_ #define _LINUX_FWNODE_H_ -#include -#include #include #include +#include +#include struct fwnode_operations; +struct resource; struct device; /* @@ -164,7 +165,8 @@ struct fwnode_operations { int (*graph_parse_endpoint)(const struct fwnode_handle *fwnode, struct fwnode_endpoint *endpoint); void __iomem *(*iomap)(struct fwnode_handle *fwnode, int index); - int (*irq_get)(const struct fwnode_handle *fwnode, unsigned int index); + int (*irq_get_resource)(const struct fwnode_handle *fwnode, + unsigned int index, struct resource *r); int (*add_links)(struct fwnode_handle *fwnode); }; diff --git a/include/linux/property.h b/include/linux/property.h index e6516d0b7d52a..685ba72a8ce9e 100644 --- a/include/linux/property.h +++ b/include/linux/property.h @@ -190,6 +190,8 @@ struct fwnode_handle *fwnode_handle_get(struct fwnode_handle *fwnode); void fwnode_handle_put(struct fwnode_handle *fwnode); int fwnode_irq_get(const struct fwnode_handle *fwnode, unsigned int index); +int fwnode_irq_get_resource(const struct fwnode_handle *fwnode, + unsigned int index, struct resource *r); int fwnode_irq_get_byname(const struct fwnode_handle *fwnode, const char *name); unsigned int device_get_child_node_count(const struct device *dev);