From patchwork Wed Dec 27 15:04:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baruch Siach X-Patchwork-Id: 758506 Received: from mail.tkos.co.il (hours.tkos.co.il [84.110.109.230]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3EC5E4595B; Wed, 27 Dec 2023 15:12:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=tkos.co.il Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tkos.co.il Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tkos.co.il header.i=@tkos.co.il header.b="NDqdcjcT" Received: from tarshish.tkos.co.il (unknown [10.0.8.3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.tkos.co.il (Postfix) with ESMTPS id 43D39440F19; Wed, 27 Dec 2023 17:02:43 +0200 (IST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tkos.co.il; s=default; t=1703689363; bh=NDjhIXrijySlyAenotxkN/N6ucKkMmhIuT0+ciVsprY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NDqdcjcTK2m+7XK61ZGidZ5CHtBbiSX38xo6izGJCY26bma2wq7IBWT4vz000eUw1 GBbwyf7OQe+WaevbOBXI+5vavzS5FexuGsu1cTgMYyNCTp1yxO8Kx5jqkppNWa6Z8j G/94uSrvb6kFeiuJzbR3wWgZFMCTFEAZXRRD5jqHa1q3iQwABRitbkrY3IBwFqBRM9 ZlogSwyK6XNcbZ5B6kSPEuHxCz0+ItVYTRfoquADxy8KvWxqqP11b4ScQU54jhnxXU S5X08TEbiHVEdcVcv7WEld7Zmelmi5aa6tL4Gh5BrEponHpbVWgdEmUQ1qNIAqcQTZ dZT3UDYjbT/8A== From: Baruch Siach To: Christoph Hellwig , Marek Szyprowski , Rob Herring , Frank Rowand , Catalin Marinas , Will Deacon Cc: Baruch Siach , Robin Murphy , iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?UGV0ciBUZXNhxZnDrWs=?= , Ramon Fried Subject: [PATCH RFC 1/4] of: get dma area lower limit Date: Wed, 27 Dec 2023 17:04:25 +0200 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 of_dma_get_max_cpu_address() returns the highest CPU address that devices can use for DMA. The implicit assumption is that all CPU addresses below that limit are suitable for DMA. However the 'dma-ranges' property this code uses also encodes a lower limit for DMA that is potentially non zero. Rename to of_dma_get_cpu_limits(), and extend to retrieve also the lower limit for the same 'dma-ranges' property describing the high limit. Update callers of of_dma_get_max_cpu_address(). No functional change intended. Signed-off-by: Baruch Siach --- arch/arm64/mm/init.c | 4 +++- drivers/of/address.c | 38 +++++++++++++++++++++++++++----------- drivers/of/unittest.c | 8 ++++---- include/linux/of.h | 11 ++++++++--- 4 files changed, 42 insertions(+), 19 deletions(-) diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 74c1db8ce271..d6c723ae6fb0 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -136,11 +136,13 @@ static void __init zone_sizes_init(void) unsigned long max_zone_pfns[MAX_NR_ZONES] = {0}; unsigned int __maybe_unused acpi_zone_dma_bits; unsigned int __maybe_unused dt_zone_dma_bits; + phys_addr_t __maybe_unused max_cpu_address; phys_addr_t __maybe_unused dma32_phys_limit = max_zone_phys(32); #ifdef CONFIG_ZONE_DMA acpi_zone_dma_bits = fls64(acpi_iort_dma_get_max_cpu_address()); - dt_zone_dma_bits = fls64(of_dma_get_max_cpu_address(NULL)); + of_dma_get_cpu_limits(NULL, &max_cpu_address, NULL); + dt_zone_dma_bits = fls64(max_cpu_address); zone_dma_bits = min3(32U, dt_zone_dma_bits, acpi_zone_dma_bits); arm64_dma_phys_limit = max_zone_phys(zone_dma_bits); max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit); diff --git a/drivers/of/address.c b/drivers/of/address.c index b59956310f66..51fa52bbe911 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -965,21 +965,25 @@ int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map) #endif /* CONFIG_HAS_DMA */ /** - * of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA + * of_dma_get_cpu_limits - Gets highest CPU address suitable for DMA * @np: The node to start searching from or NULL to start from the root + * @max: Pointer to high address limit or NULL if not needed + * @min: Pointer to low address limit or NULL if not needed * * Gets the highest CPU physical address that is addressable by all DMA masters - * in the sub-tree pointed by np, or the whole tree if NULL is passed. If no - * DMA constrained device is found, it returns PHYS_ADDR_MAX. + * in the sub-tree pointed by np, or the whole tree if @np in NULL. If no + * DMA constrained device is found, @*max is PHYS_ADDR_MAX, and @*low is 0. */ -phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np) +void __init of_dma_get_cpu_limits(struct device_node *np, + phys_addr_t *max, phys_addr_t *min) { phys_addr_t max_cpu_addr = PHYS_ADDR_MAX; struct of_range_parser parser; - phys_addr_t subtree_max_addr; + phys_addr_t min_cpu_addr = 0; struct device_node *child; struct of_range range; const __be32 *ranges; + u64 cpu_start = 0; u64 cpu_end = 0; int len; @@ -989,21 +993,33 @@ phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np) ranges = of_get_property(np, "dma-ranges", &len); if (ranges && len) { of_dma_range_parser_init(&parser, np); - for_each_of_range(&parser, &range) - if (range.cpu_addr + range.size > cpu_end) + for_each_of_range(&parser, &range) { + if (range.cpu_addr + range.size > cpu_end) { cpu_end = range.cpu_addr + range.size - 1; + cpu_start = range.cpu_addr; + } + } - if (max_cpu_addr > cpu_end) + if (max_cpu_addr > cpu_end) { max_cpu_addr = cpu_end; + min_cpu_addr = cpu_start; + } } for_each_available_child_of_node(np, child) { - subtree_max_addr = of_dma_get_max_cpu_address(child); - if (max_cpu_addr > subtree_max_addr) + phys_addr_t subtree_max_addr, subtree_min_addr; + + of_dma_get_cpu_limits(child, &subtree_max_addr, &subtree_min_addr); + if (max_cpu_addr > subtree_max_addr) { max_cpu_addr = subtree_max_addr; + min_cpu_addr = subtree_min_addr; + } } - return max_cpu_addr; + if (max) + *max = max_cpu_addr; + if (min) + *min = min_cpu_addr; } /** diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index e9e90e96600e..21d273a05ba6 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -908,7 +908,7 @@ static void __init of_unittest_changeset(void) #endif } -static void __init of_unittest_dma_get_max_cpu_address(void) +static void __init of_unittest_dma_get_cpu_limits(void) { struct device_node *np; phys_addr_t cpu_addr; @@ -922,9 +922,9 @@ static void __init of_unittest_dma_get_max_cpu_address(void) return; } - cpu_addr = of_dma_get_max_cpu_address(np); + of_dma_get_cpu_limits(np, &cpu_addr, NULL); unittest(cpu_addr == 0x4fffffff, - "of_dma_get_max_cpu_address: wrong CPU addr %pad (expecting %x)\n", + "of_dma_get_cpu_limits: wrong CPU addr %pad (expecting %x)\n", &cpu_addr, 0x4fffffff); } @@ -4104,7 +4104,7 @@ static int __init of_unittest(void) of_unittest_changeset(); of_unittest_parse_interrupts(); of_unittest_parse_interrupts_extended(); - of_unittest_dma_get_max_cpu_address(); + of_unittest_dma_get_cpu_limits(); of_unittest_parse_dma_ranges(); of_unittest_pci_dma_ranges(); of_unittest_bus_ranges(); diff --git a/include/linux/of.h b/include/linux/of.h index 6a9ddf20e79a..629b402d81bf 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -445,7 +445,8 @@ int of_map_id(struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, struct device_node **target, u32 *id_out); -phys_addr_t of_dma_get_max_cpu_address(struct device_node *np); +void of_dma_get_cpu_limits(struct device_node *np, phys_addr_t *max, + phys_addr_t *min); struct kimage; void *of_kexec_alloc_and_setup_fdt(const struct kimage *image, @@ -865,9 +866,13 @@ static inline int of_map_id(struct device_node *np, u32 id, return -EINVAL; } -static inline phys_addr_t of_dma_get_max_cpu_address(struct device_node *np) +static inline void of_dma_get_cpu_limits(struct device_node *np, + phys_addr_t *max, phys_addr_t *min) { - return PHYS_ADDR_MAX; + if (max) + *max = PHYS_ADDR_MAX; + if (min) + *min = 0; } static inline const void *of_device_get_match_data(const struct device *dev) From patchwork Wed Dec 27 15:04:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baruch Siach X-Patchwork-Id: 758508 Received: from mail.tkos.co.il (mail.tkos.co.il [84.110.109.230]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1F4145945; Wed, 27 Dec 2023 15:12:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=tkos.co.il Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tkos.co.il Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tkos.co.il header.i=@tkos.co.il header.b="mo8kuyQN" Received: from tarshish.tkos.co.il (unknown [10.0.8.3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.tkos.co.il (Postfix) with ESMTPS id 9B3B4440F44; Wed, 27 Dec 2023 17:02:43 +0200 (IST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tkos.co.il; s=default; t=1703689363; bh=vHknldfNxE6H031gNGXJeZaZPVKmHSiQjt/n9eWWmvs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mo8kuyQN+AxfYfCNDNSuV7Xg9+Hh8qX3c8Ccb7hNdP1yl4uRh6Ays7AwF/oL0Wlnb sFFQUfKuwK9waKPQYMFGGyU5MOuL49rj8n0iThLx3uWD7bWmfiY7fkOgTyd2ry9q4H I2X6UQrFkZRkBtIO0Av1+6Bnpt1FuX136J2T/zU9e6NiwGPO9N+Ar02+IiMjckBYDP lNDV/T3N3w7UXhPiHIP8UeaCfy7R6mNBgTQhndtuoWeld/Ku/vr+H2kcfwXKmge28Y IUgg/NrAtre8xqij2GLQkalGCiD7vum2qsElzd84bvK8CE1IF3l1wdjA6CCLRhG7We RyPND9l8Ga1bw== From: Baruch Siach To: Christoph Hellwig , Marek Szyprowski , Rob Herring , Frank Rowand , Catalin Marinas , Will Deacon Cc: Baruch Siach , Robin Murphy , iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?UGV0ciBUZXNhxZnDrWs=?= , Ramon Fried Subject: [PATCH RFC 2/4] of: unittest: add test for of_dma_get_cpu_limits() 'min' param Date: Wed, 27 Dec 2023 17:04:26 +0200 Message-ID: <9704923d06839d92f4ef6fb28523b0f47e154df4.1703683642.git.baruch@tkos.co.il> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Verify that of_dma_get_cpu_limits() sets this new parameter to the expected result. Signed-off-by: Baruch Siach --- drivers/of/unittest.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index 21d273a05ba6..d3b2c6ca56cd 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -911,7 +911,7 @@ static void __init of_unittest_changeset(void) static void __init of_unittest_dma_get_cpu_limits(void) { struct device_node *np; - phys_addr_t cpu_addr; + phys_addr_t cpu_addr_max, cpu_addr_min; if (!IS_ENABLED(CONFIG_OF_ADDRESS)) return; @@ -922,10 +922,13 @@ static void __init of_unittest_dma_get_cpu_limits(void) return; } - of_dma_get_cpu_limits(np, &cpu_addr, NULL); - unittest(cpu_addr == 0x4fffffff, - "of_dma_get_cpu_limits: wrong CPU addr %pad (expecting %x)\n", - &cpu_addr, 0x4fffffff); + of_dma_get_cpu_limits(np, &cpu_addr_max, &cpu_addr_min); + unittest(cpu_addr_max == 0x4fffffff, + "of_dma_get_cpu_limits: wrong CPU max addr %pad (expecting %x)\n", + &cpu_addr_max, 0x4fffffff); + unittest(cpu_addr_min == 0x40000000, + "of_dma_get_cpu_limits: wrong CPU min addr %pad (expecting %x)\n", + &cpu_addr_min, 0x40000000); } static void __init of_unittest_dma_ranges_one(const char *path, From patchwork Wed Dec 27 15:04:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baruch Siach X-Patchwork-Id: 758507 Received: from mail.tkos.co.il (mail.tkos.co.il [84.110.109.230]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EFB5A4594F; Wed, 27 Dec 2023 15:12:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=tkos.co.il Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tkos.co.il Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tkos.co.il header.i=@tkos.co.il header.b="NxNyJc+I" Received: from tarshish.tkos.co.il (unknown [10.0.8.3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.tkos.co.il (Postfix) with ESMTPS id 83D11440F4F; Wed, 27 Dec 2023 17:02:44 +0200 (IST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tkos.co.il; s=default; t=1703689364; bh=z/R1KgqdKS7NyxMFjGVmdIDGKoIBS1QfbhFNrs3Fnbs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NxNyJc+IY8RZrFmWwyP1yFuErwO6dUxa893heT/GsEdHBoJSid19eX8xWM4HFb1vh Tb1WRVA0fGMIvU7ofAVvI8euZs3sZyT3MJao8Svo6d0Ey4smRJZkOUB3lc3Usiy9Ec 9h/aOPBmjcxWrfCbFHxxe2SzF8IIuwFbEoAxy7qX0HeeH6bArOLQNjEFdSS15LEhjG 6JvO61GhQB8nCCrYzuYHnsOE0XzMmzmQ+cOjLbto2inSFTfw9F53XOhBM1LMGmx7oa UioelDo5PlbEIUGcplg4IFzjWB/YoP6iaQIjYrI/ay6trFf02fqvkv5k4f56mKm4hW PiOD+SINQYQ6A== From: Baruch Siach To: Christoph Hellwig , Marek Szyprowski , Rob Herring , Frank Rowand , Catalin Marinas , Will Deacon Cc: Baruch Siach , Robin Murphy , iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?UGV0ciBUZXNhxZnDrWs=?= , Ramon Fried Subject: [PATCH RFC 4/4] arm64: mm: take DMA zone offset into account Date: Wed, 27 Dec 2023 17:04:28 +0200 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Commit 791ab8b2e3db ("arm64: Ignore any DMA offsets in the max_zone_phys() calculation") made DMA/DMA32 zones span the entire RAM when RAM starts above 32-bits. This breaks hardware with DMA area that start above 32-bits. But the commit log says that "we haven't noticed any such hardware". It turns out that such hardware does exist. One such platform has RAM starting at 32GB with an internal bus that has the following DMA limits: #address-cells = <2>; #size-cells = <2>; dma-ranges = <0x00 0xc0000000 0x08 0x00000000 0x00 0x40000000>; Devices under this bus can see 1GB of DMA range between 3GB-4GB in each device address space. This range is mapped to CPU memory at 32GB-33GB. With current code DMA allocations for devices under this bus are not limited to DMA area, leading to run-time allocation failure. Modify 'zone_dma_bits' calculation (via dt_zone_dma_bits) to only cover the actual DMA area starting at 'zone_dma_off'. Use the newly introduced 'min' parameter of of_dma_get_cpu_limits() to set 'zone_dma_off'. DMA32 zone is useless in this configuration, so make its limit the same as the DMA zone when the lower DMA limit is higher than 32-bits. The result is DMA zone that properly reflects the hardware constraints as follows: [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000800000000-0x000000083fffffff] [ 0.000000] DMA32 empty [ 0.000000] Normal [mem 0x0000000840000000-0x0000000bffffffff] Suggested-by: Catalin Marinas Signed-off-by: Baruch Siach --- arch/arm64/mm/init.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index d6c723ae6fb0..4a8fd8394ce6 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -118,10 +118,11 @@ static void __init arch_reserve_crashkernel(void) * limit. If DRAM starts above 32-bit, expand the zone to the maximum * available memory, otherwise cap it at 32-bit. */ -static phys_addr_t __init max_zone_phys(unsigned int zone_bits) +static phys_addr_t __init max_zone_phys(unsigned int zone_bits, + phys_addr_t zone_off) { phys_addr_t zone_mask = DMA_BIT_MASK(zone_bits); - phys_addr_t phys_start = memblock_start_of_DRAM(); + phys_addr_t phys_start = memblock_start_of_DRAM() - zone_off; if (phys_start > U32_MAX) zone_mask = PHYS_ADDR_MAX; @@ -137,14 +138,19 @@ static void __init zone_sizes_init(void) unsigned int __maybe_unused acpi_zone_dma_bits; unsigned int __maybe_unused dt_zone_dma_bits; phys_addr_t __maybe_unused max_cpu_address; - phys_addr_t __maybe_unused dma32_phys_limit = max_zone_phys(32); + phys_addr_t __maybe_unused min_cpu_address; + phys_addr_t __maybe_unused dma32_phys_limit = max_zone_phys(32, 0); #ifdef CONFIG_ZONE_DMA acpi_zone_dma_bits = fls64(acpi_iort_dma_get_max_cpu_address()); - of_dma_get_cpu_limits(NULL, &max_cpu_address, NULL); - dt_zone_dma_bits = fls64(max_cpu_address); + of_dma_get_cpu_limits(NULL, &max_cpu_address, &min_cpu_address); + dt_zone_dma_bits = fls64(max_cpu_address - min_cpu_address); zone_dma_bits = min3(32U, dt_zone_dma_bits, acpi_zone_dma_bits); - arm64_dma_phys_limit = max_zone_phys(zone_dma_bits); + zone_dma_off = min_cpu_address; + arm64_dma_phys_limit = max_zone_phys(zone_dma_bits, zone_dma_off) + + zone_dma_off; + if (zone_dma_off > U32_MAX) + dma32_phys_limit = arm64_dma_phys_limit; max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit); #endif #ifdef CONFIG_ZONE_DMA32