From patchwork Tue Dec 26 19:21:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758423 Received: from mail-io1-f54.google.com (mail-io1-f54.google.com [209.85.166.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7526623B0 for ; Tue, 26 Dec 2023 19:22:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="Cy/CqcB3" Received: by mail-io1-f54.google.com with SMTP id ca18e2360f4ac-7b7d55d7717so215333139f.2 for ; Tue, 26 Dec 2023 11:22:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618525; x=1704223325; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=L6bkILyn4KnLLU+kxlxlq+bLie/uQ2I8rSrs6iLt190=; b=Cy/CqcB3gF/OQgZj7mtBm/1Tl0SDmEZz5BIs1zLWTq/GtgWhCJCHaxDXmBn/J8zjmi ig2bxZRIEinHyw4PrdkUInhwMLN16E9wAgD4Xal4b8hugKm+DVVBmJ+yuMsNrWwyXeZm Ru2BgaBeG7fVU0obMfY48lI3RAVhdh6P4XmH0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618525; x=1704223325; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=L6bkILyn4KnLLU+kxlxlq+bLie/uQ2I8rSrs6iLt190=; b=oJcgUX6LraJHBUrvVLcJtC1xBg8PEvMlJ0FcdOzg3nsqZedD4gt5l/jd7aXm5Yh3VI z2Nd+l4gO7naCOYi+ino+ClwZMgK2Jaawc3sIOMsuz0LTTKBxk4JcIHz1qBlzc6iQEP5 2KwI8UD5yTjli0Iu/wsFWE4jdW+Figy48BbhEaBjTyL2tzItH64hgs6IfIgHAgQLVavJ RBffyebYKSu/IuUFO1iCm6YWv8bS8WYOLB513SPF8j8M6XTxP/D+cboKVhBv5GQL85je 740/KMqbZeRP2szpr1W1FBuBDCWUeJguVDB1d1R6kc8Ufbiy5dR8azSeosRXFw+NYOZS 2wwg== X-Gm-Message-State: AOJu0Yz6qLoRJEsJJDKT43w4an84KQTx4vum7pW+GmfDPSNE163ABZGz y0xZxacjsaKL8i6MVgJizgw32NYRS/ZT X-Google-Smtp-Source: AGHT+IExsAxEbXq1TtdWgrQ9/NpPCel1/j/cE8sOMacWX3i+Tc+l1Hpf5PLx4sWy2XX4HHrTsl4m1w== X-Received: by 2002:a6b:7215:0:b0:7b7:fe53:ebdb with SMTP id n21-20020a6b7215000000b007b7fe53ebdbmr8548677ioc.32.1703618525657; Tue, 26 Dec 2023 11:22:05 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:05 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v3 04/24] dt-bindings: power: Clarify wording for wakeup-source property Date: Tue, 26 Dec 2023 12:21:08 -0700 Message-ID: <20231226122113.v3.4.I1016a45ac9e8daf8a9ebc9854ab90ec3542e7c30@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The wording in the current documentation is a little strong. The intention was not to fix any particular interrupt as wakeup capable but leave those details to the device. It wasn't intended to enforce any rules as what can be or can't be a wakeup interrupt. Soften the wording to not mandate that the 'wakeup-source' property be used, and clarify what it means when an interrupt is marked (or not marked) for wakeup. Link: https://lore.kernel.org/all/ZYAjxxHcCOgDVMTQ@bogus/ Link: https://lore.kernel.org/all/CAL_Jsq+MYwOG40X26cYmO9EkZ9xqWrXDi03MaRfxnV-+VGkXWQ@mail.gmail.com/ Signed-off-by: Mark Hasemeyer --- Changes in v3: -Update commit title prefixes Changes in v2: -New patch .../bindings/power/wakeup-source.txt | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/power/wakeup-source.txt b/Documentation/devicetree/bindings/power/wakeup-source.txt index 697333a56d5e2..75bc20b95688f 100644 --- a/Documentation/devicetree/bindings/power/wakeup-source.txt +++ b/Documentation/devicetree/bindings/power/wakeup-source.txt @@ -3,16 +3,20 @@ Specifying wakeup capability for devices Any device nodes ---------------- -Nodes that describe devices which has wakeup capability must contain an +Nodes that describe devices which have wakeup capability may contain a "wakeup-source" boolean property. -Also, if device is marked as a wakeup source, then all the primary -interrupt(s) can be used as wakeup interrupt(s). +If the device is marked as a wakeup-source, interrupt wake capability depends +on the device specific "interrupt-names" property. If no interrupts are labeled +as wake capable, then it is up to the device to determine which interrupts can +wake the system. -However if the devices have dedicated interrupt as the wakeup source -then they need to specify/identify the same using device specific -interrupt name. In such cases only that interrupt can be used as wakeup -interrupt. +However if a device has a dedicated interrupt as the wakeup source, then it +needs to specify/identify it using a device specific interrupt name. In such +cases only that interrupt can be used as a wakeup interrupt. + +While various legacy interrupt names exist, new devices should use "wakeup" as +the canonical interrupt name. List of legacy properties and respective binding document --------------------------------------------------------- From patchwork Tue Dec 26 19:21:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758422 Received: from mail-io1-f47.google.com (mail-io1-f47.google.com [209.85.166.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96151F4F6 for ; Tue, 26 Dec 2023 19:22:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="PbeqUeut" Received: by mail-io1-f47.google.com with SMTP id ca18e2360f4ac-7b435966249so207192439f.0 for ; Tue, 26 Dec 2023 11:22:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618526; x=1704223326; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9rsZne3Du//Ba4tQVuy5o6whq4EULCeTIrjLPCPwLmw=; b=PbeqUeutUGm76q78UEDh2my6snYS1o26/wLzk83OYI0Iq0FYVbRaTFkkWvYmq466A3 Q3uhC9vIwUyiTIVDAgETxRMaLSUshEhL+1GwSZ5KKGXCGUv+3hFf73iUF20Lqd1wn9ql UR9UuiDjOR5fyGCab8ZZ7Y7lq19iJojYsn3E8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618526; x=1704223326; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9rsZne3Du//Ba4tQVuy5o6whq4EULCeTIrjLPCPwLmw=; b=r0SdVq4jtf7jqHwgkWoLi0ZDZiM9pTYkQyeujun/gvZNtBYyzvd+bDedVeBOsl3Cef t46xYEn0u69s5JzaGBzjK7UZwLx/LFTSceGSg1R5Kg+HN/Od8/pJq/ZiXOSQKzo5F15E VmHciHzBpi3v19h4hgzBEbbuYQS+VVANkOU2pZj+yAr3RDwTNQzkcQ0zMkpGM8Ek7MQL B2dNaH982sqBt85BAiffOd2t5ePCqkdid5YdkZ7MWkzHysv8gN9JppeQeNc301cDim56 YxZ0FXRfCJjChj78EordvxrVzfb4TSRO+pS93OOcvHN/bclAkjoEZqdfiMi5e/zqWXFV D7Og== X-Gm-Message-State: AOJu0YxxIIhttAtj+uCzBc4D9+6FaJsE3g3v7VqTAX79V4ZytH9SwlT9 6YeUDEYkYzHBCRmt/RatVV/mF8+Dv3JZ X-Google-Smtp-Source: AGHT+IHs1QYIWBfAJ7Y5I9JjqcChVhSW1Ns/FLlrlDgrSy48A7jEaduIJBcEhsZZObOO6KB70LTa+w== X-Received: by 2002:a5e:8b0c:0:b0:7ba:fcc0:e03e with SMTP id g12-20020a5e8b0c000000b007bafcc0e03emr1029520iok.14.1703618526626; Tue, 26 Dec 2023 11:22:06 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:06 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Alexandre TORGUE , Andre Przywara , Conor Dooley , Enric Balletbo i Serra , Jonathan Hunter , Krzysztof Kozlowski , Manivannan Sadhasivam , Michal Simek , Nick Hawkins , Rob Herring , Thierry Reding , Tony Lindgren , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v3 05/24] ARM: dts: tegra: Enable cros-ec-spi as wake source Date: Tue, 26 Dec 2023 12:21:09 -0700 Message-ID: <20231226122113.v3.5.Ia598792a1386cca61844068be03c3ccec9e81753@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. -Commit-changes: 3 -Update commit message to provide details of the motivation behind the change Signed-off-by: Mark Hasemeyer --- (no changes since v2) Changes in v2: -Split by arch/soc arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi | 1 + arch/arm/boot/dts/nvidia/tegra124-venice2.dts | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi index a2ee371802004..8125c1b3e8d79 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi @@ -338,6 +338,7 @@ cros_ec: cros-ec@0 { interrupt-parent = <&gpio>; interrupts = ; reg = <0>; + wakeup-source; google,cros-ec-spi-msg-delay = <2000>; diff --git a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts index 3924ee385dee0..df98dc2a67b85 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts @@ -857,6 +857,7 @@ cros_ec: cros-ec@0 { interrupt-parent = <&gpio>; interrupts = ; reg = <0>; + wakeup-source; google,cros-ec-spi-msg-delay = <2000>; From patchwork Tue Dec 26 19:21:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758421 Received: from mail-il1-f181.google.com (mail-il1-f181.google.com [209.85.166.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4CBE10A25 for ; Tue, 26 Dec 2023 19:22:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="Bk0PBuj3" Received: by mail-il1-f181.google.com with SMTP id e9e14a558f8ab-35fe8a4b311so15234265ab.1 for ; Tue, 26 Dec 2023 11:22:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618529; x=1704223329; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VEODyyeyprVfJRUjUtUcn0PH/jJY9TEHe0bos5Y4zHc=; b=Bk0PBuj3zKTP/LArK9YDe0mv7GUIt00/gfVPl240ojZ+vU9/0kiadYnEJLigw2zm3Q qQNm0qsp606kFMaXFuIQcYYrzpMPBeJ4FhODDBD7JOVDLILC3Q3yaCls3e4OsBUuoSww dVdOd4u0aEMWydzzirDdbT/0XUdhXnFiH5P4w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618529; x=1704223329; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VEODyyeyprVfJRUjUtUcn0PH/jJY9TEHe0bos5Y4zHc=; b=VMJFIQzC4EBG4hW9WMEwHD6dWCl15NfMR8pt+j4RquFMjBLHBHxrAGqzCKiVqfPRzb WC2F1LNl4uKbkMf5o+YhZN5oscCBsU4iLqP2JIU4ilwlnPS8IyANb1+bfaK/rzVOLFGG K8QyXyIo81tmhCfOnE/wam45gy0DWYUMfHAnsQyCrev1IWEqjQC0z2kRh7XBo15mHRuD JhAxpPdMqUAqYttGIi8LGGIBCz9FaCikZQzIgNn+aJf8KgXwk+xclouIQqVzo6+1j0u/ m1s1wW9qMdgx0wvSwlOO5La6dhpcq+ofLT5hwwU0tC/TPc7Jb+xhfrAUmg4M2R85LxiX JI6w== X-Gm-Message-State: AOJu0YwredAMcp+G+tRkked4SxW8cDASZnB+B4J8iC0xrFDXGHWUOPm+ l/aFsaL4FX/sVT26lc9v5KGw00OXIr7Q X-Google-Smtp-Source: AGHT+IHa/0vFINH4R7TOUcFlOypJ6/So3v6QYpByaNG5AzpKzcz2ODJE44ZeU7zukq+ljzKdNZ5lIA== X-Received: by 2002:a05:6e02:1528:b0:360:17a7:1f28 with SMTP id i8-20020a056e02152800b0036017a71f28mr963152ilu.15.1703618529143; Tue, 26 Dec 2023 11:22:09 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:08 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Alim Akhtar , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v3 08/24] ARM: dts: samsung: exynos5800: Enable cros-ec-spi as wake source Date: Tue, 26 Dec 2023 12:21:12 -0700 Message-ID: <20231226122113.v3.8.Idc995ce08a52ba4c5fde0685118ddf2873fc8acd@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. -Commit-changes: 3 -Update commit message to provide details of the motivation behind the change Signed-off-by: Mark Hasemeyer --- (no changes since v2) Changes in v2: -Split by arch/soc arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts index f91bc4ae008e4..9bbbdce9103a6 100644 --- a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts @@ -949,6 +949,7 @@ cros_ec: cros-ec@0 { reg = <0>; spi-max-frequency = <3125000>; google,has-vbc-nvram; + wakeup-source; controller-data { samsung,spi-feedback-delay = <1>; From patchwork Tue Dec 26 19:21:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758420 Received: from mail-io1-f50.google.com (mail-io1-f50.google.com [209.85.166.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B75A2111A6 for ; Tue, 26 Dec 2023 19:22:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="BRVMLh/5" Received: by mail-io1-f50.google.com with SMTP id ca18e2360f4ac-7ba834684abso248667039f.2 for ; Tue, 26 Dec 2023 11:22:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618530; x=1704223330; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=72Y9hKrM6wg7C/dkdJ1azVBKmo9vO5yjLJYb3Lbo8g8=; b=BRVMLh/5XH6oixuKamI/PIb5hC/lBLPhi6BkEogj5+8EKQdVa9IXllD7ZynnPt7ozp AcL1QPGuVoIJd59bU51BnN33FVw/1qMSgjnl1JueHW+F66qVjRKkxBuiQ2Lj0pR+t/iC RQsv8MRSJdxkyyHNgEcjIIJQu6vDH9d3Yp/A8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618530; x=1704223330; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=72Y9hKrM6wg7C/dkdJ1azVBKmo9vO5yjLJYb3Lbo8g8=; b=KxP/3Ro9SKm9nkQaq6Xjv6Y0ofjoV20esPvW/FX4zzG8Rf+BcXFwTHHZS1egXujPu5 yaTARo4V2wRSlE5AvD3lb5LQoYT7AEJjsYryItBHW3cAnN6DxWcQkobQQS69PxnhNfb9 W9tLG9TW56tMl52tKtVHAFoqvZUogfDXDZRZ8Tqn6EYMMZtayx7ANAAvxuYHMtEmaFZ/ OrR03s9S+cSIRLckf7cp14AeUrhucQCgehWAiQF5bkZ6WFt+BQl7VzpKo7ePBNUB0xLH pKUDhbBlLCNGK9bKmTNICDT3VTfPfbLxRDtx1wWlQ3zNMdEZJWOLPY7FE+NTEVTNtZtq 1vnQ== X-Gm-Message-State: AOJu0YznD8ED2y+9AUrrloZZna6vaC+wJd2DLpwfOIhLlXlEU1789mZ+ Y3GEHaV3X5rihCm4RfrSCVRQZU4KHnzX X-Google-Smtp-Source: AGHT+IF6JaIjJ+4nkw3XKAI7b2qhT+RLQRJF93my4pWqagV6xX2LpANA+cbIE30OOMeWGip9I5fCQg== X-Received: by 2002:a6b:d807:0:b0:7ba:9ad0:657f with SMTP id y7-20020a6bd807000000b007ba9ad0657fmr10906914iob.0.1703618529969; Tue, 26 Dec 2023 11:22:09 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:09 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 09/24] arm64: dts: mediatek: mt8173: Enable cros-ec-spi as wake source Date: Tue, 26 Dec 2023 12:21:13 -0700 Message-ID: <20231226122113.v3.9.Ic09ebe116c18e83cc1161f4bb073fea8043f03f3@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. -Commit-changes: 3 -Update commit message to provide details of the motivation behind the change Signed-off-by: Mark Hasemeyer --- (no changes since v2) Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi index 8d614ac2c58ed..335aed42dc9e3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -1155,6 +1155,7 @@ cros_ec: ec@0 { spi-max-frequency = <12000000>; interrupts-extended = <&pio 0 IRQ_TYPE_LEVEL_LOW>; google,cros-ec-spi-msg-delay = <500>; + wakeup-source; i2c_tunnel: i2c-tunnel0 { compatible = "google,cros-ec-i2c-tunnel"; From patchwork Tue Dec 26 19:21:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758419 Received: from mail-il1-f182.google.com (mail-il1-f182.google.com [209.85.166.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 537F3134CA for ; Tue, 26 Dec 2023 19:22:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="KNBDXOTR" Received: by mail-il1-f182.google.com with SMTP id e9e14a558f8ab-35fd8662acaso10286845ab.0 for ; Tue, 26 Dec 2023 11:22:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618532; x=1704223332; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0O8RtIP4pYk/I1CB5YssfqNJgeBGU8rziw+9z/3E58g=; b=KNBDXOTRa9TRuzLfjN0nENjKHo7jOEfo9jyUYKuYwTjmWVxgkSlM7d96c1C1xHhZjE 40ufDV2ONTWZialao6qgAmqbe4NQvnoynfLafu7HmIrRV8HUrvuNlJCh9uugL/Ls+gC+ tjRr8CtqrpJkg6K6pzxilcH/4NNZA3OpfvZUM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618532; x=1704223332; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0O8RtIP4pYk/I1CB5YssfqNJgeBGU8rziw+9z/3E58g=; b=Umznc+oTwPQjtne0D8orsnDe2sV3MZyMSNX1RpK8BTfS5C0AZ2azlhVSL5CfGzen7T kgjhQmGqkSjOk6ucn+oIsQgPGoHHUKwbN8x/3IO4RgytvtCUvwis3ob9C1BkpLg0DlMw FbSUf4ZT4avROEgHz/qJwRSTtD1k69YIJK/dL1hFLLj2UCgiDzcTNJk0maLmaLs8Nf1L AbBkOuj/fEm+mfeeAUXCp7GOAf23GbuUA7Md5Bkb2k3NYGAmNt90sIYNpEeONPl02Y+W w7FJ06NKjFahMKkjjxRAeMuqFUQZ6B4DO4a4TIK8pHlWIo73MQzBIRDE+Fh4XmUAQ7ro v0sg== X-Gm-Message-State: AOJu0YyNyu257zHcskG51vI1BOWlcRGCQsPDISNLR8AZDd5bJQFqshUM vED8uiJcPxsnkSmY/9wWIxcwT6M1Whbe X-Google-Smtp-Source: AGHT+IEPvjdPgLWnim9CRScF1zgDLSQesNC/8qGs5BHhtwyK/zW05fi43O35+h7z9keU2BUHrJr/5Q== X-Received: by 2002:a05:6e02:1a08:b0:35f:eceb:f845 with SMTP id s8-20020a056e021a0800b0035fecebf845mr4107785ild.8.1703618532594; Tue, 26 Dec 2023 11:22:12 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:12 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 12/24] arm64: dts: mediatek: mt8195: Enable cros-ec-spi as wake source Date: Tue, 26 Dec 2023 12:21:16 -0700 Message-ID: <20231226122113.v3.12.Iee33a7f1f991408cef372744199026f936bf54e2@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. -Commit-changes: 3 -Update commit message to provide details of the motivation behind the change Signed-off-by: Mark Hasemeyer --- (no changes since v2) Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index bbdcd441c049d..2edb270d0bc2f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -1149,6 +1149,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&cros_ec_int>; spi-max-frequency = <3000000>; + wakeup-source; keyboard-backlight { compatible = "google,cros-kbd-led-backlight"; From patchwork Tue Dec 26 19:21:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758418 Received: from mail-io1-f41.google.com (mail-io1-f41.google.com [209.85.166.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF68014F87 for ; Tue, 26 Dec 2023 19:22:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="lwH5ozb3" Received: by mail-io1-f41.google.com with SMTP id ca18e2360f4ac-7b7fdde8b54so249162839f.1 for ; Tue, 26 Dec 2023 11:22:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618534; x=1704223334; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fJeII5b51gSKYdx0OFHNNgnpr2euSDHg7QynlWWpDkw=; b=lwH5ozb3yLiy84322iyB6vejF0bjEUAPClt0LjlK6D6YdaOZrGoKWVHUMzvDHKr9kl SEhhJjGRTK+9DBvFoc7Isvpqi9dBtkN7aNTJzJteuu9H5/tSKRCAXheBHY6zwcNDbKRB FurQCAX0Nfbhc8OpEPUMpj4s9W/ATfdVSeNjs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618534; x=1704223334; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fJeII5b51gSKYdx0OFHNNgnpr2euSDHg7QynlWWpDkw=; b=RiwxW3Jqcm9XvxEexyi5UDpXdPlvmpRXoZw/5YdIJ2lGAajsR+0uTTk8CVZpqpFKmV w4kxY7u4AA8S5DfWjHYnr+lGcGXtqR5Avl7tNZNOyuDj0g/O1MwwbAzVCtBTtUKzkvg1 iQdbE+gl8igZaEIVZSSB3ryxMrYMFkUVO0Onq5cR5l1erH6NbqqCvwxtcyrddO5EDNlj uNPMY5vVaMhQYnrRQo0FpxyC2g2yTFqOHO/9Asq2FiuGNUS1A2dbyIkynrhkdCLak63P DS84ZNF+lYiwGXhiZUIcAgzIH/r2COBJu9eNZxkYMpKc/SZv8I4eXfOHDl13/LorAZ+F iaHg== X-Gm-Message-State: AOJu0Yyi20kXArLTegCjag4X4393onx3Q9Yiu4FI7uN2eCSy476r8CFg eLZ5oZOd3ogwbt+bjiuJQMNbPK6KAcjV X-Google-Smtp-Source: AGHT+IFW+l6vYtJ1wQeOu4xfaiQEthQFJVyQR2YUwsgACernOoQnKZ0+YPBF19sE1clzCmB/C9/JQw== X-Received: by 2002:a5d:974b:0:b0:7b7:4b32:7986 with SMTP id c11-20020a5d974b000000b007b74b327986mr10235601ioo.27.1703618534234; Tue, 26 Dec 2023 11:22:14 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:14 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Rob Herring , cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 14/24] arm64: dts: qcom: sc7180: Enable cros-ec-spi as wake source Date: Tue, 26 Dec 2023 12:21:18 -0700 Message-ID: <20231226122113.v3.14.I2ee94aede9e25932f656c2bdb832be3199fa1291@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. -Commit-changes: 3 -Update commit message to provide details of the motivation behind the change Signed-off-by: Mark Hasemeyer --- (no changes since v2) Changes in v2: -Split by arch/soc arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 46aaeba286047..f3a6da8b28901 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -649,6 +649,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; + wakeup-source; cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; From patchwork Tue Dec 26 19:21:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758417 Received: from mail-io1-f45.google.com (mail-io1-f45.google.com [209.85.166.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A063517747 for ; Tue, 26 Dec 2023 19:22:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="MS6sJGkx" Received: by mail-io1-f45.google.com with SMTP id ca18e2360f4ac-7ba8e33dd0cso199197039f.0 for ; Tue, 26 Dec 2023 11:22:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618536; x=1704223336; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jqUYIaw9tUo9kdqHB2Dv3IsUt9S6YDu3MfPzCVXpIHY=; b=MS6sJGkxdkX0z7x2nxw0xkPNbqiOWCdIBhd26tonRLpr/51eXdzUTj/bhZu2e27vof o2T7mvqG1fV1Ca2kVvHIxLSdzUA/oABGzAXyyA1fMOcY32bHgVt5BwVo6lHbyCHeXelM ZyTij5OUkYf0Hp2bal67qE+yxghYTbSwmnAoM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618536; x=1704223336; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jqUYIaw9tUo9kdqHB2Dv3IsUt9S6YDu3MfPzCVXpIHY=; b=vDAt1f4KQsfby+g5quf4e6UWiFtXpMaB1NPbxFrPE6SjFQflQARoO7fNLFIidwKFnh ij+2ax8lg9U9rOECsN/DGJSo860PJQTEsLPvpFveqBr1g5sw/RbTNInftdI7UA/sFA3m tLLkTbWFUsBOCzcTfgL0k+vzxL5K1SqXx6YyeEdU6ShDtO9VnetTFtjCU6CCQTJVmkMe 8nMgR2kFfNbaisSYFalBdtO7h2zG05G1nLnQpNxusJa7mZI+Zm9yKIXUSdPdbLs0yiZu P0x0uEK2G1WoqKTCZkK5nsTaV76VUZvTFxUFqNV53H/bN6JOqAiXLeFovW+IdzkQmwfR zuAQ== X-Gm-Message-State: AOJu0YyBah77d3FRKHAY60iY+v+oPJPZYO9k/P93pVmbC2VbtzoRAIn6 e/fyLFyzLWW9NUjyHROJ8BLYDzJgdC3R X-Google-Smtp-Source: AGHT+IFj1KB5D+02jkLiHmvX5p2wx9e8GF6AOssDMMgP9jAk68kfSL3ub0MUuBke1AgTXDiucynj9A== X-Received: by 2002:a5d:9557:0:b0:7ba:f96f:8c76 with SMTP id a23-20020a5d9557000000b007baf96f8c76mr1245177ios.35.1703618535947; Tue, 26 Dec 2023 11:22:15 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:15 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Rob Herring , cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 16/24] arm64: dts: qcom: sdm845: Enable cros-ec-spi as wake source Date: Tue, 26 Dec 2023 12:21:20 -0700 Message-ID: <20231226122113.v3.16.I870e2c3490e7fc27a8f6bc41dba23b3dfacd2d13@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. -Commit-changes: 3 -Update commit message to provide details of the motivation behind the change Signed-off-by: Mark Hasemeyer --- (no changes since v2) Changes in v2: -Split by arch/soc arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi index 0ab5e8f53ac9f..e8276db9eabb2 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi @@ -852,6 +852,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ec_ap_int_l>; spi-max-frequency = <3000000>; + wakeup-source; cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; From patchwork Tue Dec 26 19:21:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758416 Received: from mail-io1-f44.google.com (mail-io1-f44.google.com [209.85.166.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97CF618C28 for ; Tue, 26 Dec 2023 19:22:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="RWv8qcAs" Received: by mail-io1-f44.google.com with SMTP id ca18e2360f4ac-7bade847536so84623239f.0 for ; Tue, 26 Dec 2023 11:22:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618538; x=1704223338; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pxmhdaZ3UzecFQENHodwfGETPRP37VNTRDU74oHDCzk=; b=RWv8qcAs2uBHdnfNlufkkGBYghPrJw7pIP95YqvmnCsSj9ZAyAWarxzYnpCBXmFXbX h1MDQjxJ0jj61vXii4tPNSxKf6iZXuBfIsQdjnUP6h1YFAvTEECp2LxBDKCqxY0858at +n9Y3NMZCiH+aUDbdu6pOy918M9OHUaloCqkE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618538; x=1704223338; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pxmhdaZ3UzecFQENHodwfGETPRP37VNTRDU74oHDCzk=; b=HZkLAK4HxDExlmEY2Y4jbnw/L8ZW+WESFNfELiZP21ZTZCEnJGUoTKeovckCtEoAp4 vIDOMV6LwJS/gY1QqyWoF0hXnL5zxjpg2+2+nhN7kkqp7IX/o9MBTpDfK7yTwURO18Hm 88/eVtNLyhn0p4y3PbqoH9kFAVe2VB+a3j9ExJNDGui878IihitGoOU9p1z+2UBxcydx HScANjyuO37d0ePE8Thdoat0mYUaOf8GX+MwuFG6O9fCMrGLpEReqF9BCjLwq209Ck3f qgzFeWFfaN02CDiKjlK9NPJynrwo50gf796EhiJ5+9CN9vb65ONBYTIhgWypUOptYpdQ 7SSA== X-Gm-Message-State: AOJu0YzQVp6EVw8rEUxZy6pv1p7kyEadoQ2B0yaZ2JVJ6pqI20qknoXt +aNNEMVacNK2UBnRZvtfDcRTxMYQZyd0 X-Google-Smtp-Source: AGHT+IEqSgC8hhnx7dR56hSUAn0xu8OJZ2XCJkAuVfhkLlOJtzedd7KZq8eCLrxJSgwWJ7fRF/1kIg== X-Received: by 2002:a05:6602:4908:b0:7ba:b173:502b with SMTP id ef8-20020a056602490800b007bab173502bmr10010919iob.24.1703618537789; Tue, 26 Dec 2023 11:22:17 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:17 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Frank Rowand , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v3 18/24] of: irq: add wake capable bit to of_irq_resource() Date: Tue, 26 Dec 2023 12:21:22 -0700 Message-ID: <20231226122113.v3.18.I29b26a7f3b80fac0a618707446a10b6cc974fdaf@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add wake capability information to the IRQ resource. Wake capability is assumed based on conventions provided in the devicetree wakeup-source binding documentation. An interrupt is considered wake capable if the following are true: 1. A wakeup-source property exits in the same device node as the interrupt. 2. The IRQ is marked as dedicated by setting its interrupt-name to "wakeup". The wakeup-source documentation states that dedicated interrupts can use device specific interrupt names and device drivers are still welcome to use their own naming schemes. This API is provided as a helper if one is willing to conform to the above conventions. The ACPI subsystems already provides similar APIs that allow one to query the wake capability of an IRQ. This brings closer feature parity to the devicetree. Signed-off-by: Mark Hasemeyer Reviewed-by: Andy Shevchenko Reviewed-by: Rob Herring --- Changes in v3: -Use DEFINE_RES_IRQ_NAMED_FLAGS macro Changes in v2: -Update logic to return true only if wakeup-source property and "wakeup" interrupt-name are defined -irq->IRQ, api->API drivers/of/irq.c | 39 +++++++++++++++++++++++++++++++++++---- 1 file changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 174900072c18c..cdecdc3515f88 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -383,11 +383,39 @@ int of_irq_parse_one(struct device_node *device, int index, struct of_phandle_ar } EXPORT_SYMBOL_GPL(of_irq_parse_one); +/** + * __of_irq_wake_capable - Determine whether a given IRQ index is wake capable + * + * The IRQ is considered wake capable if the following are true: + * 1. wakeup-source property exists + * 2. provided IRQ index is labelled as a dedicated wakeirq + * + * This logic assumes the provided IRQ index is valid. + * + * @dev: pointer to device tree node + * @index: zero-based index of the IRQ + * Return: True if provided IRQ index for #dev is wake capable. False otherwise. + */ +static bool __of_irq_wake_capable(const struct device_node *dev, int index) +{ + int wakeindex; + + if (!of_property_read_bool(dev, "wakeup-source")) + return false; + + wakeindex = of_property_match_string(dev, "interrupt-names", "wakeup"); + return wakeindex >= 0 && wakeindex == index; +} + /** * of_irq_to_resource - Decode a node's IRQ and return it as a resource * @dev: pointer to device tree node - * @index: zero-based index of the irq + * @index: zero-based index of the IRQ * @r: pointer to resource structure to return result into. + * + * Return: Linux IRQ number on success, or 0 on the IRQ mapping failure, or + * -EPROBE_DEFER if the IRQ domain is not yet created, or error code in case + * of any other failure. */ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) { @@ -399,6 +427,7 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) /* Only dereference the resource if both the * resource and the irq are valid. */ if (r && irq) { + u32 irq_flags; const char *name = NULL; memset(r, 0, sizeof(*r)); @@ -409,9 +438,11 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) of_property_read_string_index(dev, "interrupt-names", index, &name); - r->start = r->end = irq; - r->flags = IORESOURCE_IRQ | irqd_get_trigger_type(irq_get_irq_data(irq)); - r->name = name ? name : of_node_full_name(dev); + irq_flags = irqd_get_trigger_type(irq_get_irq_data(irq)); + if (__of_irq_wake_capable(dev, index)) + irq_flags |= IORESOURCE_IRQ_WAKECAPABLE; + + *r = DEFINE_RES_IRQ_NAMED_FLAGS(irq, name ?: of_node_full_name(dev), irq_flags); } return irq; From patchwork Tue Dec 26 19:21:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 758415 Received: from mail-io1-f48.google.com (mail-io1-f48.google.com [209.85.166.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28A6718ED1 for ; Tue, 26 Dec 2023 19:22:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="fCnWs/2R" Received: by mail-io1-f48.google.com with SMTP id ca18e2360f4ac-7b7fe0ae57bso282939939f.0 for ; Tue, 26 Dec 2023 11:22:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703618539; x=1704223339; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WGEOA7VnVi81L2sEgap1qKk2oI4GW7FWt/PKKqipwFA=; b=fCnWs/2RPcwyS4r+8mm40SUREOvOYuS/hgHs9WpcYGgE4tILMBxqFZOHCUfFGmgH6e w5qyDxkpcAaDNhixYqLnFqBdEVug3YZaAgU+FS4j+ckG0UZqSJR7L9F42PnvQzlyLdk9 E2iSsyTZxGk+YyqkX/vaCWu0U3VPmwz/r4hLs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703618539; x=1704223339; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WGEOA7VnVi81L2sEgap1qKk2oI4GW7FWt/PKKqipwFA=; b=O3+dwXb+jw2e4e6j1ht44Gtcu+YqquKaeRFslFxP2xrGfrp8yXyggS40r2oyCE2L7G zN6hBAVPg5Uxts+b7IsAhzJ5UmfzJubZVDWQy4EJ14z3/4lIckft69i/LqJchh6K6cki RM/GqPtASiZPxhaJpuMnmUqcoC3FtTyS5q3ZaaPev066+bmBeP/+1alUP+EsjBy7dwpe VohJmaSuM7XEfDEal9phEmSSdjTBcBy0r+D7WmZTiNk82LznB/1zQj2OP9Qeu2i98JmU yoa/tk9RwQGh7bezNYmJpbLh74VJ/xA6SFFDgMcLsGkwVKxu/EhIwxv6KYzQIzPO2HZq L0Uw== X-Gm-Message-State: AOJu0YxOeo0YBqdqRIbh7AlRr3rpWRzDzsGNZOoSAMpwv506UPFB6QWM s70ePpDS64UD31uxS8nWZZsyyA0S/+ND X-Google-Smtp-Source: AGHT+IGwo5chhqjsS60uLPxsZz7Aue5NMBmLwETHgxYW043SgR4k4mm2O7+bTWAEs3KDxRW8UynYJQ== X-Received: by 2002:a05:6602:1492:b0:7ba:9707:67ad with SMTP id a18-20020a056602149200b007ba970767admr14464146iow.28.1703618539365; Tue, 26 Dec 2023 11:22:19 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id gw3-20020a0566381ee300b0046b692e719esm3207609jab.150.2023.12.26.11.22.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Dec 2023 11:22:19 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Rob Herring , Konrad Dybcio , Sudeep Holla , Andy Shevchenko , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Frank Rowand , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v3 20/24] of: irq: Remove extern from function declarations Date: Tue, 26 Dec 2023 12:21:24 -0700 Message-ID: <20231226122113.v3.20.I319e781c11e6352eb5b6c408dc20bd54a720edbf@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231226192149.1830592-1-markhas@chromium.org> References: <20231226192149.1830592-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The extern keyword is implicit for function declarations. Remove it where possible and adjust the line wrapping accordingly. Signed-off-by: Mark Hasemeyer Acked-by: Rob Herring --- (no changes since v2) Changes in v2: -New patch include/linux/of_irq.h | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index 0d73b2ca92d31..a130dcbc4bb45 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -32,27 +32,26 @@ static inline int of_irq_parse_oldworld(const struct device_node *device, int in } #endif /* CONFIG_PPC32 && CONFIG_PPC_PMAC */ -extern int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *out_irq); -extern unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data); +int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *out_irq); +unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data); #ifdef CONFIG_OF_IRQ -extern void of_irq_init(const struct of_device_id *matches); -extern int of_irq_parse_one(struct device_node *device, int index, - struct of_phandle_args *out_irq); -extern int of_irq_count(struct device_node *dev); -extern int of_irq_get(struct device_node *dev, int index); -extern int of_irq_get_byname(struct device_node *dev, const char *name); -extern int of_irq_to_resource(struct device_node *dev, int index, struct resource *r); -extern int of_irq_to_resource_table(struct device_node *dev, - struct resource *res, int nr_irqs); -extern struct device_node *of_irq_find_parent(struct device_node *child); -extern struct irq_domain *of_msi_get_domain(struct device *dev, +void of_irq_init(const struct of_device_id *matches); +int of_irq_parse_one(struct device_node *device, int index, + struct of_phandle_args *out_irq); +int of_irq_count(struct device_node *dev); +int of_irq_get(struct device_node *dev, int index); +int of_irq_get_byname(struct device_node *dev, const char *name); +int of_irq_to_resource(struct device_node *dev, int index, struct resource *r); +int of_irq_to_resource_table(struct device_node *dev, struct resource *res, + int nr_irqs); +struct device_node *of_irq_find_parent(struct device_node *child); +struct irq_domain *of_msi_get_domain(struct device *dev, struct device_node *np, enum irq_domain_bus_token token); -extern struct irq_domain *of_msi_map_get_device_domain(struct device *dev, - u32 id, - u32 bus_token); -extern void of_msi_configure(struct device *dev, struct device_node *np); +struct irq_domain *of_msi_map_get_device_domain(struct device *dev, u32 id, + u32 bus_token); +void of_msi_configure(struct device *dev, struct device_node *np); u32 of_msi_map_id(struct device *dev, struct device_node *msi_np, u32 id_in); #else static inline void of_irq_init(const struct of_device_id *matches) @@ -117,7 +116,7 @@ static inline u32 of_msi_map_id(struct device *dev, * implements it differently. However, the prototype is the same for all, * so declare it here regardless of the CONFIG_OF_IRQ setting. */ -extern unsigned int irq_of_parse_and_map(struct device_node *node, int index); +unsigned int irq_of_parse_and_map(struct device_node *node, int index); #else /* !CONFIG_OF && !CONFIG_SPARC */ static inline unsigned int irq_of_parse_and_map(struct device_node *dev,