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[78.151.55.40]) by smtp.gmail.com with ESMTPSA id i15-20020a05600c354f00b0040d378510adsm10138520wmq.1.2023.12.22.08.54.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 08:54:41 -0800 (PST) From: Peter Griffin To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, daniel.lezcano@linaro.org, tglx@linutronix.de, conor+dt@kernel.org, alim.akhtar@samsung.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, mturquette@baylibre.com, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, semen.protsenko@linaro.org, saravanak@google.com, willmcvicker@google.com Subject: [PATCH 1/3] dt-bindings: timer: exynos4210-mct: Add google, gs101-mct compatible Date: Fri, 22 Dec 2023 16:53:53 +0000 Message-ID: <20231222165355.1462740-2-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231222165355.1462740-1-peter.griffin@linaro.org> References: <20231222165355.1462740-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add dedicated google,gs101-mct compatible to the dt-schema for representing mct timer of the Google Tensor gs101 SoC. Signed-off-by: Peter Griffin Reviewed-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/timer/samsung,exynos4210-mct.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index 829bd2227f7c..774b7992a0ca 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -26,6 +26,7 @@ properties: - items: - enum: - axis,artpec8-mct + - google,gs101-mct - samsung,exynos3250-mct - samsung,exynos5250-mct - samsung,exynos5260-mct @@ -127,6 +128,7 @@ allOf: contains: enum: - axis,artpec8-mct + - google,gs101-mct - samsung,exynos5260-mct - samsung,exynos5420-mct - samsung,exynos5433-mct From patchwork Fri Dec 22 16:53:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 757912 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BAFAD25763 for ; Fri, 22 Dec 2023 16:54:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Acal+pj5" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-40d2e56f3a6so12068375e9.1 for ; Fri, 22 Dec 2023 08:54:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703264084; x=1703868884; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H2C5UTNIPG7mjByyTbN4UUYUJWv2TfPmtilLr3g/kHI=; b=Acal+pj5ltoXwBdUReQyg/omMeFy1jj5Lxj6mhz51FAs58aI/exFwygV2ItRqsW301 6+vfgPxkEiNGz/weGDz4ovq0SwJtKWiCZdpgbfbPxQ2hknWsSXRxE53opZwlvKXqIslY 4uzUrkALoOC9r0syqwfDwN8MW/7D9MnBArpr84cH/Ym27nrSN0UiQrw7woE7QjpEMSaw MPnMGcfaixVYLMM+7WqP+6rKknmcvgoczrvr9NezTvdnYWNjg88PzBw1WLqpps8sL2qU AjJycwSglELdYIpdGDjCi66QXDVxe9UGzPFkbbKJYKAaurM7hF3QM0gEDiSONVSyb6CM Epyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703264084; x=1703868884; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H2C5UTNIPG7mjByyTbN4UUYUJWv2TfPmtilLr3g/kHI=; b=efrdehzJnwfqKOx0wyEn3cdgnPl13FqAyf/bJsPwTbS0oFjT0Tw1zu+q+/7Tx0kPLb hJB/aSS8u/b71P7MS5oYeZF9lVxHBWFCkEZvNWV5KfRjAsN8Nqgll1hCiVjf+vrFbOpc I9WU87qQ9LdS33p3F6BgTXem95mY83sV/KLWmh0jiST0P4zgSMeZYSx/v7vYczRHqF9B J5K+CFpmoCydBfZ8jnoBGy7qNjwanGJ4T5KQccl/vmprQ6n6chh4C3J9UOB3quvKP25n 3n7WiS4GV0Cq3kti1/F22B3lLCKo3pNCVDgAq1TBjRBFezwJM/ZKDQBoYCl+6MSimwY0 DqNQ== X-Gm-Message-State: AOJu0YyQnKnYaDoac9I1c/y/Uj0bBNGeQRcA973TF3yMjlC2A7gP0Bf2 TitUObCm60cAGkLqw2eZnO08yZIl0hWtBw== X-Google-Smtp-Source: AGHT+IEDtRq/ZQw8ts0TCzkxHtm3cLI7WebPXBaKkTQlRZdi99kRrHc6ikhQl7aJvQ9Z9sqp/hNTUA== X-Received: by 2002:a05:600c:a686:b0:40d:39ea:1076 with SMTP id ip6-20020a05600ca68600b0040d39ea1076mr900090wmb.93.1703264083920; Fri, 22 Dec 2023 08:54:43 -0800 (PST) Received: from gpeter-l.lan (host-78-151-55-40.as13285.net. [78.151.55.40]) by smtp.gmail.com with ESMTPSA id i15-20020a05600c354f00b0040d378510adsm10138520wmq.1.2023.12.22.08.54.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 08:54:43 -0800 (PST) From: Peter Griffin To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, daniel.lezcano@linaro.org, tglx@linutronix.de, conor+dt@kernel.org, alim.akhtar@samsung.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, mturquette@baylibre.com, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, semen.protsenko@linaro.org, saravanak@google.com, willmcvicker@google.com Subject: [PATCH 2/3] clk: samsung: gs101: register cmu_misc clocks early Date: Fri, 22 Dec 2023 16:53:54 +0000 Message-ID: <20231222165355.1462740-3-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231222165355.1462740-1-peter.griffin@linaro.org> References: <20231222165355.1462740-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Update cmu_misc so it is registered early, as it contains the gate which clocks the Multi Core Timer (MCT). This clock is required early in boot, otherwise exynos_mct will fail obtaining the clock. Note this wasn't previously an issue as exynos_mct wasn't enabled. Signed-off-by: Peter Griffin --- drivers/clk/samsung/clk-gs101.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/clk/samsung/clk-gs101.c b/drivers/clk/samsung/clk-gs101.c index 0964bb11657f..590119a25c18 100644 --- a/drivers/clk/samsung/clk-gs101.c +++ b/drivers/clk/samsung/clk-gs101.c @@ -2478,6 +2478,15 @@ static const struct samsung_cmu_info misc_cmu_info __initconst = { .clk_name = "dout_cmu_misc_bus", }; +static void __init gs101_cmu_misc_init(struct device_node *np) +{ + exynos_arm64_register_cmu(NULL, np, &misc_cmu_info); +} + +/* Register CMU_MISC early, as it's needed for MCT timer */ +CLK_OF_DECLARE(gs101_cmu_misc, "google,gs101-cmu-misc", + gs101_cmu_misc_init); + /* ---- platform_driver ----------------------------------------------------- */ static int __init gs101_cmu_probe(struct platform_device *pdev) @@ -2495,9 +2504,6 @@ static const struct of_device_id gs101_cmu_of_match[] = { { .compatible = "google,gs101-cmu-apm", .data = &apm_cmu_info, - }, { - .compatible = "google,gs101-cmu-misc", - .data = &misc_cmu_info, }, { }, }; From patchwork Fri Dec 22 16:53:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 757554 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3F8928DC6 for ; Fri, 22 Dec 2023 16:54:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="d3mkzOnT" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-40d48304efdso3968915e9.0 for ; Fri, 22 Dec 2023 08:54:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703264085; x=1703868885; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CivDZddIU1oXgeJl9yAANMyChstbAynIX36qq2yqXq0=; b=d3mkzOnT0NqkpTiPlPgB4vbou6YNlPJsX1kjhDRhVT321SBhn3bKd0BdJAIIFocmBs kM5+GNckSkN7sURU36NELzWL42yxZBNVdoemG7DPjhuP95KCuaY4eKTHix4EeyCkHWvF /r4b5WWMYh0BmVoiWh66BAU70P2aTPvJz2VLYeRKO5vqGQVklOOnJJGSq1bZ+jpterjT El/06zR5Lt91fUTc4EDOe5gqGjv/KONVD79q6El1r4Fonk6PGkucgPNZ/83KC22MnVtG jjW6xhQjY9cOaEUXrckwRvRfjkBlNbsnHAFwZmhPYlToiG+p7LPdDlnZIOJz1vzOLg4J uZxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703264085; x=1703868885; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CivDZddIU1oXgeJl9yAANMyChstbAynIX36qq2yqXq0=; b=DbcnrXvnynawqOUTuXJ9mwlOTZpUcdouZq5Z9ZE0t9HGth435EZpPmDPU8npP64TR0 HS29yUxO6A/GXFgX+SL7puF8Gsw6qX5AVbWz3eVVibvhk5YSrV3nYrZHK5OcwtxXaVPD LrpycW73HzLPh0QE3l+DoveAqB0vDHKlEtCit5j0erwCGBt13nNsax7YI1ANaLhp+FEK rGObrO3UBYwbomWNDPa3pewPshrfNQDbW5tAUAKlSyKx5vpqwK+mxlXpoQg0118l9fPW qJMZOlc4C94MrelngpUHnFTpsp6BbnT/bu3PLpXRwTmp1Bp0/fb/y64FEMrtst63yPQE uA5A== X-Gm-Message-State: AOJu0YxQCq+OYRiSX3cp2OnzeaBBcFbjBE4xaYBYGONTr44r56O1f5qQ XHLDpeOvN1hcSqhcRQ4SGGTdldiPGWoEtA== X-Google-Smtp-Source: AGHT+IEAvkSh4ddQHp5zuB6x9sxaGJ/xdv0XpTipLUPjLXBv1HMvTHIR8c78uD3+cHX5A/MeMODLVw== X-Received: by 2002:a05:600c:1d26:b0:40d:2876:def6 with SMTP id l38-20020a05600c1d2600b0040d2876def6mr971581wms.45.1703264085160; Fri, 22 Dec 2023 08:54:45 -0800 (PST) Received: from gpeter-l.lan (host-78-151-55-40.as13285.net. [78.151.55.40]) by smtp.gmail.com with ESMTPSA id i15-20020a05600c354f00b0040d378510adsm10138520wmq.1.2023.12.22.08.54.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 08:54:44 -0800 (PST) From: Peter Griffin To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, daniel.lezcano@linaro.org, tglx@linutronix.de, conor+dt@kernel.org, alim.akhtar@samsung.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, mturquette@baylibre.com, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, semen.protsenko@linaro.org, saravanak@google.com, willmcvicker@google.com Subject: [PATCH 3/3] arm64: dts: exynos: gs101: define Multi Core Timer (MCT) node Date: Fri, 22 Dec 2023 16:53:55 +0000 Message-ID: <20231222165355.1462740-4-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231222165355.1462740-1-peter.griffin@linaro.org> References: <20231222165355.1462740-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MCT has one global timer and 8 CPU local timers. The global timer can generate 4 interrupts, and each local timer can generate an interrupt making 12 interrupts in total. Signed-off-by: Peter Griffin Reviewed-by: Sam Protsenko --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 9747cb3fa03a..4b09e740b58a 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -292,6 +292,26 @@ cmu_misc: clock-controller@10010000 { clock-names = "dout_cmu_misc_bus", "dout_cmu_misc_sss"; }; + timer@10050000 { + compatible = "google,gs101-mct", + "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&ext_24_5m>, <&cmu_misc CLK_GOUT_MISC_MCT_PCLK>; + clock-names = "fin_pll", "mct"; + }; + watchdog_cl0: watchdog@10060000 { compatible = "google,gs101-wdt"; reg = <0x10060000 0x100>;