From patchwork Mon Dec 18 07:38:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 756228 Received: from mail5.25mail.st (mail5.25mail.st [74.50.62.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92550D27C for ; Mon, 18 Dec 2023 07:39:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=atomide.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=atomide.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=atomide.com header.i=@atomide.com header.b="ajYc8hkc" Received: from localhost (91-158-86-216.elisa-laajakaista.fi [91.158.86.216]) by mail5.25mail.st (Postfix) with ESMTPSA id BBD47603E6; Mon, 18 Dec 2023 07:39:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=atomide.com; s=25mailst; t=1702885170; bh=U4QS9i9NkaqrTjHX7Qh/XjQOYdOu8cU4C5bPkeziLp0=; h=From:To:Cc:Subject:Date:From; b=ajYc8hkcno+HL7PCrOluKiAzN0bOULOIuy17tBNHL25MEAZdW7Y1wP+uiN13oAyyn AoXalMXsW3ytLnZWYijlIcxxAr7wptjoBOtT/hbzZUWymDSjGxGOCkJeGoy51uVOLV Lv/opo5DDQ2y0aYrBfb1EsxRjCntjP0mUtK5Y8/ICfiAaqipMqg3k7aSQDv4yvQtKF VkpO6ViaVPBo+XVnJ5FC2w/SOuu0kut19nNi4WASPY1TNqXl6iPlv2Obkjwm4GVOIk K2g6ExhCd2FMwL8X+aIrrX4LMi7yW/TAXSp/AgDP7t8FjWEFCa9i63U661DVHqZjCU dsWxww1nm+9Zw== From: Tony Lindgren To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Dhruva Gole , Kevin Hilman , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH] arm64: dts: ti: k3-am62-wakeup: Configure ti-sysc for wkup_uart0 Date: Mon, 18 Dec 2023 09:38:14 +0200 Message-ID: <20231218073816.32241-1-tony@atomide.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The devices in the wkup domain are capable of waking up the system from suspend. We can configure the wkup domain devices in a generic way using the ti-sysc interconnect target module driver like we have done with the earlier TI SoCs. As ti-sysc manages the SYSCONFIG related registers independent of the child hardware device, the wake-up configuration is also set even if wkup_uart0 is reserved by sysfw. The wkup_uart0 device has interconnect target module register mapping like dra7 wkup uart. There is a 1 MB interconnect target range with one uart IP block in the target module. The power domain and clock affects the whole interconnect target module. Note we change the functional clock name to follow the ti-sysc binding and use "fck" instead of "fclk". Tested-by: Dhruva Gole Reviewed-by: Kevin Hilman Signed-off-by: Tony Lindgren --- Changes since v2: - Fix node name for 8250 IP, it's at offset 0 from the target module - Added Kevin's Reviewed-by from v2 as the node name change is mostly cosmetic --- arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 33 ++++++++++++++++++---- 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -5,6 +5,8 @@ * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ +#include + &cbass_wakeup { wkup_conf: syscon@43000000 { bootph-all; @@ -21,14 +23,33 @@ chipid: chipid@14 { }; }; - wkup_uart0: serial@2b300000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x2b300000 0x00 0x100>; - interrupts = ; + target-module@2b300000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0 0x2b300050 0 0x4>, + <0 0x2b300054 0 0x4>, + <0 0x2b300058 0 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + , + ; + ti,syss-mask = <1>; power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 114 0>; - clock-names = "fclk"; - status = "disabled"; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x2b300000 0x100000>; + + wkup_uart0: serial@0 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0 0x100>; + interrupts = ; + status = "disabled"; + }; }; wkup_i2c0: i2c@2b200000 {